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Commit | Line | Data |
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fc01f7e7 FB |
1 | /* |
2 | * QEMU System Emulator header | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #ifndef VL_H | |
25 | #define VL_H | |
26 | ||
67b915a5 FB |
27 | /* we put basic includes here to avoid repeating them in device drivers */ |
28 | #include <stdlib.h> | |
29 | #include <stdio.h> | |
30 | #include <stdarg.h> | |
31 | #include <string.h> | |
32 | #include <inttypes.h> | |
85571bc7 | 33 | #include <limits.h> |
8a7ddc38 | 34 | #include <time.h> |
67b915a5 FB |
35 | #include <ctype.h> |
36 | #include <errno.h> | |
37 | #include <unistd.h> | |
38 | #include <fcntl.h> | |
7d3505c5 | 39 | #include <sys/stat.h> |
67b915a5 FB |
40 | |
41 | #ifndef O_LARGEFILE | |
42 | #define O_LARGEFILE 0 | |
43 | #endif | |
40c3bac3 FB |
44 | #ifndef O_BINARY |
45 | #define O_BINARY 0 | |
46 | #endif | |
67b915a5 | 47 | |
71c2fd5c TS |
48 | #ifndef ENOMEDIUM |
49 | #define ENOMEDIUM ENODEV | |
50 | #endif | |
2e9671da | 51 | |
67b915a5 | 52 | #ifdef _WIN32 |
a18e524a | 53 | #include <windows.h> |
ac62f715 | 54 | #define fsync _commit |
57d1a2b6 FB |
55 | #define lseek _lseeki64 |
56 | #define ENOTSUP 4096 | |
beac80cd FB |
57 | extern int qemu_ftruncate64(int, int64_t); |
58 | #define ftruncate qemu_ftruncate64 | |
59 | ||
57d1a2b6 FB |
60 | |
61 | static inline char *realpath(const char *path, char *resolved_path) | |
62 | { | |
63 | _fullpath(resolved_path, path, _MAX_PATH); | |
64 | return resolved_path; | |
65 | } | |
ec3757de FB |
66 | |
67 | #define PRId64 "I64d" | |
26a76461 FB |
68 | #define PRIx64 "I64x" |
69 | #define PRIu64 "I64u" | |
70 | #define PRIo64 "I64o" | |
67b915a5 | 71 | #endif |
8a7ddc38 | 72 | |
ea2384d3 FB |
73 | #ifdef QEMU_TOOL |
74 | ||
75 | /* we use QEMU_TOOL in the command line tools which do not depend on | |
76 | the target CPU type */ | |
77 | #include "config-host.h" | |
78 | #include <setjmp.h> | |
79 | #include "osdep.h" | |
80 | #include "bswap.h" | |
81 | ||
82 | #else | |
83 | ||
4f209290 | 84 | #include "audio/audio.h" |
16f62432 FB |
85 | #include "cpu.h" |
86 | ||
ea2384d3 FB |
87 | #endif /* !defined(QEMU_TOOL) */ |
88 | ||
67b915a5 FB |
89 | #ifndef glue |
90 | #define xglue(x, y) x ## y | |
91 | #define glue(x, y) xglue(x, y) | |
92 | #define stringify(s) tostring(s) | |
93 | #define tostring(s) #s | |
94 | #endif | |
95 | ||
24236869 FB |
96 | #ifndef MIN |
97 | #define MIN(a, b) (((a) < (b)) ? (a) : (b)) | |
98 | #endif | |
99 | #ifndef MAX | |
100 | #define MAX(a, b) (((a) > (b)) ? (a) : (b)) | |
101 | #endif | |
102 | ||
18607dcb FB |
103 | /* cutils.c */ |
104 | void pstrcpy(char *buf, int buf_size, const char *str); | |
105 | char *pstrcat(char *buf, int buf_size, const char *s); | |
106 | int strstart(const char *str, const char *val, const char **ptr); | |
107 | int stristart(const char *str, const char *val, const char **ptr); | |
108 | ||
33e3963e | 109 | /* vl.c */ |
80cabfad | 110 | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
313aa567 | 111 | |
80cabfad FB |
112 | void hw_error(const char *fmt, ...); |
113 | ||
80cabfad FB |
114 | extern const char *bios_dir; |
115 | ||
8a7ddc38 | 116 | extern int vm_running; |
c35734b2 | 117 | extern const char *qemu_name; |
8a7ddc38 | 118 | |
0bd48850 FB |
119 | typedef struct vm_change_state_entry VMChangeStateEntry; |
120 | typedef void VMChangeStateHandler(void *opaque, int running); | |
8a7ddc38 FB |
121 | typedef void VMStopHandler(void *opaque, int reason); |
122 | ||
0bd48850 FB |
123 | VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb, |
124 | void *opaque); | |
125 | void qemu_del_vm_change_state_handler(VMChangeStateEntry *e); | |
126 | ||
8a7ddc38 FB |
127 | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); |
128 | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); | |
129 | ||
130 | void vm_start(void); | |
131 | void vm_stop(int reason); | |
132 | ||
bb0c6722 FB |
133 | typedef void QEMUResetHandler(void *opaque); |
134 | ||
135 | void qemu_register_reset(QEMUResetHandler *func, void *opaque); | |
136 | void qemu_system_reset_request(void); | |
137 | void qemu_system_shutdown_request(void); | |
3475187d FB |
138 | void qemu_system_powerdown_request(void); |
139 | #if !defined(TARGET_SPARC) | |
140 | // Please implement a power failure function to signal the OS | |
141 | #define qemu_system_powerdown() do{}while(0) | |
142 | #else | |
143 | void qemu_system_powerdown(void); | |
144 | #endif | |
bb0c6722 | 145 | |
ea2384d3 FB |
146 | void main_loop_wait(int timeout); |
147 | ||
0ced6589 FB |
148 | extern int ram_size; |
149 | extern int bios_size; | |
ee22c2f7 | 150 | extern int rtc_utc; |
1f04275e | 151 | extern int cirrus_vga_enabled; |
d34cab9f | 152 | extern int vmsvga_enabled; |
28b9b5af FB |
153 | extern int graphic_width; |
154 | extern int graphic_height; | |
155 | extern int graphic_depth; | |
3d11d0eb | 156 | extern const char *keyboard_layout; |
d993e026 | 157 | extern int kqemu_allowed; |
a09db21f | 158 | extern int win2k_install_hack; |
bb36d470 | 159 | extern int usb_enabled; |
6a00d601 | 160 | extern int smp_cpus; |
667accab | 161 | extern int no_quit; |
8e71621f | 162 | extern int semihosting_enabled; |
3c07f8e8 | 163 | extern int autostart; |
47d5d01a | 164 | extern const char *bootp_filename; |
0ced6589 | 165 | |
9ae02555 TS |
166 | #define MAX_OPTION_ROMS 16 |
167 | extern const char *option_rom[MAX_OPTION_ROMS]; | |
168 | extern int nb_option_roms; | |
169 | ||
0ced6589 | 170 | /* XXX: make it dynamic */ |
970ac5a3 | 171 | #define MAX_BIOS_SIZE (4 * 1024 * 1024) |
75956cf0 | 172 | #if defined (TARGET_PPC) || defined (TARGET_SPARC64) |
d5295253 | 173 | #define BIOS_SIZE ((512 + 32) * 1024) |
6af0bf9c | 174 | #elif defined(TARGET_MIPS) |
567daa49 | 175 | #define BIOS_SIZE (4 * 1024 * 1024) |
0ced6589 | 176 | #endif |
aaaa7df6 | 177 | |
63066f4f FB |
178 | /* keyboard/mouse support */ |
179 | ||
180 | #define MOUSE_EVENT_LBUTTON 0x01 | |
181 | #define MOUSE_EVENT_RBUTTON 0x02 | |
182 | #define MOUSE_EVENT_MBUTTON 0x04 | |
183 | ||
184 | typedef void QEMUPutKBDEvent(void *opaque, int keycode); | |
185 | typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); | |
186 | ||
455204eb TS |
187 | typedef struct QEMUPutMouseEntry { |
188 | QEMUPutMouseEvent *qemu_put_mouse_event; | |
189 | void *qemu_put_mouse_event_opaque; | |
190 | int qemu_put_mouse_event_absolute; | |
191 | char *qemu_put_mouse_event_name; | |
192 | ||
193 | /* used internally by qemu for handling mice */ | |
194 | struct QEMUPutMouseEntry *next; | |
195 | } QEMUPutMouseEntry; | |
196 | ||
63066f4f | 197 | void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); |
455204eb TS |
198 | QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, |
199 | void *opaque, int absolute, | |
200 | const char *name); | |
201 | void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry); | |
63066f4f FB |
202 | |
203 | void kbd_put_keycode(int keycode); | |
204 | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); | |
09b26c5e | 205 | int kbd_mouse_is_absolute(void); |
63066f4f | 206 | |
455204eb TS |
207 | void do_info_mice(void); |
208 | void do_mouse_set(int index); | |
209 | ||
82c643ff FB |
210 | /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx |
211 | constants) */ | |
212 | #define QEMU_KEY_ESC1(c) ((c) | 0xe100) | |
213 | #define QEMU_KEY_BACKSPACE 0x007f | |
214 | #define QEMU_KEY_UP QEMU_KEY_ESC1('A') | |
215 | #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') | |
216 | #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') | |
217 | #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') | |
218 | #define QEMU_KEY_HOME QEMU_KEY_ESC1(1) | |
219 | #define QEMU_KEY_END QEMU_KEY_ESC1(4) | |
220 | #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) | |
221 | #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) | |
222 | #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) | |
223 | ||
224 | #define QEMU_KEY_CTRL_UP 0xe400 | |
225 | #define QEMU_KEY_CTRL_DOWN 0xe401 | |
226 | #define QEMU_KEY_CTRL_LEFT 0xe402 | |
227 | #define QEMU_KEY_CTRL_RIGHT 0xe403 | |
228 | #define QEMU_KEY_CTRL_HOME 0xe404 | |
229 | #define QEMU_KEY_CTRL_END 0xe405 | |
230 | #define QEMU_KEY_CTRL_PAGEUP 0xe406 | |
231 | #define QEMU_KEY_CTRL_PAGEDOWN 0xe407 | |
232 | ||
233 | void kbd_put_keysym(int keysym); | |
234 | ||
c20709aa FB |
235 | /* async I/O support */ |
236 | ||
237 | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); | |
238 | typedef int IOCanRWHandler(void *opaque); | |
7c9d8e07 | 239 | typedef void IOHandler(void *opaque); |
c20709aa | 240 | |
7c9d8e07 FB |
241 | int qemu_set_fd_handler2(int fd, |
242 | IOCanRWHandler *fd_read_poll, | |
243 | IOHandler *fd_read, | |
244 | IOHandler *fd_write, | |
245 | void *opaque); | |
246 | int qemu_set_fd_handler(int fd, | |
247 | IOHandler *fd_read, | |
248 | IOHandler *fd_write, | |
249 | void *opaque); | |
c20709aa | 250 | |
f331110f FB |
251 | /* Polling handling */ |
252 | ||
253 | /* return TRUE if no sleep should be done afterwards */ | |
254 | typedef int PollingFunc(void *opaque); | |
255 | ||
256 | int qemu_add_polling_cb(PollingFunc *func, void *opaque); | |
257 | void qemu_del_polling_cb(PollingFunc *func, void *opaque); | |
258 | ||
a18e524a FB |
259 | #ifdef _WIN32 |
260 | /* Wait objects handling */ | |
261 | typedef void WaitObjectFunc(void *opaque); | |
262 | ||
263 | int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); | |
264 | void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); | |
265 | #endif | |
266 | ||
86e94dea TS |
267 | typedef struct QEMUBH QEMUBH; |
268 | ||
82c643ff FB |
269 | /* character device */ |
270 | ||
271 | #define CHR_EVENT_BREAK 0 /* serial break char */ | |
ea2384d3 | 272 | #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
86e94dea | 273 | #define CHR_EVENT_RESET 2 /* new connection established */ |
2122c51a FB |
274 | |
275 | ||
276 | #define CHR_IOCTL_SERIAL_SET_PARAMS 1 | |
277 | typedef struct { | |
278 | int speed; | |
279 | int parity; | |
280 | int data_bits; | |
281 | int stop_bits; | |
282 | } QEMUSerialSetParams; | |
283 | ||
284 | #define CHR_IOCTL_SERIAL_SET_BREAK 2 | |
285 | ||
286 | #define CHR_IOCTL_PP_READ_DATA 3 | |
287 | #define CHR_IOCTL_PP_WRITE_DATA 4 | |
288 | #define CHR_IOCTL_PP_READ_CONTROL 5 | |
289 | #define CHR_IOCTL_PP_WRITE_CONTROL 6 | |
290 | #define CHR_IOCTL_PP_READ_STATUS 7 | |
5867c88a TS |
291 | #define CHR_IOCTL_PP_EPP_READ_ADDR 8 |
292 | #define CHR_IOCTL_PP_EPP_READ 9 | |
293 | #define CHR_IOCTL_PP_EPP_WRITE_ADDR 10 | |
294 | #define CHR_IOCTL_PP_EPP_WRITE 11 | |
2122c51a | 295 | |
82c643ff FB |
296 | typedef void IOEventHandler(void *opaque, int event); |
297 | ||
298 | typedef struct CharDriverState { | |
299 | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); | |
e5b0bc44 | 300 | void (*chr_update_read_handler)(struct CharDriverState *s); |
2122c51a | 301 | int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); |
82c643ff | 302 | IOEventHandler *chr_event; |
e5b0bc44 PB |
303 | IOCanRWHandler *chr_can_read; |
304 | IOReadHandler *chr_read; | |
305 | void *handler_opaque; | |
eb45f5fe | 306 | void (*chr_send_event)(struct CharDriverState *chr, int event); |
f331110f | 307 | void (*chr_close)(struct CharDriverState *chr); |
82c643ff | 308 | void *opaque; |
20d8a3ed | 309 | int focus; |
86e94dea | 310 | QEMUBH *bh; |
82c643ff FB |
311 | } CharDriverState; |
312 | ||
5856de80 | 313 | CharDriverState *qemu_chr_open(const char *filename); |
82c643ff FB |
314 | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); |
315 | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); | |
ea2384d3 | 316 | void qemu_chr_send_event(CharDriverState *s, int event); |
e5b0bc44 PB |
317 | void qemu_chr_add_handlers(CharDriverState *s, |
318 | IOCanRWHandler *fd_can_read, | |
319 | IOReadHandler *fd_read, | |
320 | IOEventHandler *fd_event, | |
321 | void *opaque); | |
2122c51a | 322 | int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); |
86e94dea | 323 | void qemu_chr_reset(CharDriverState *s); |
e5b0bc44 PB |
324 | int qemu_chr_can_read(CharDriverState *s); |
325 | void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len); | |
f8d179e3 | 326 | |
82c643ff FB |
327 | /* consoles */ |
328 | ||
329 | typedef struct DisplayState DisplayState; | |
330 | typedef struct TextConsole TextConsole; | |
331 | ||
95219897 PB |
332 | typedef void (*vga_hw_update_ptr)(void *); |
333 | typedef void (*vga_hw_invalidate_ptr)(void *); | |
334 | typedef void (*vga_hw_screen_dump_ptr)(void *, const char *); | |
335 | ||
336 | TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update, | |
337 | vga_hw_invalidate_ptr invalidate, | |
338 | vga_hw_screen_dump_ptr screen_dump, | |
339 | void *opaque); | |
340 | void vga_hw_update(void); | |
341 | void vga_hw_invalidate(void); | |
342 | void vga_hw_screen_dump(const char *filename); | |
343 | ||
344 | int is_graphic_console(void); | |
82c643ff FB |
345 | CharDriverState *text_console_init(DisplayState *ds); |
346 | void console_select(unsigned int index); | |
347 | ||
8d11df9e FB |
348 | /* serial ports */ |
349 | ||
350 | #define MAX_SERIAL_PORTS 4 | |
351 | ||
352 | extern CharDriverState *serial_hds[MAX_SERIAL_PORTS]; | |
353 | ||
6508fe59 FB |
354 | /* parallel ports */ |
355 | ||
356 | #define MAX_PARALLEL_PORTS 3 | |
357 | ||
358 | extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS]; | |
359 | ||
5867c88a TS |
360 | struct ParallelIOArg { |
361 | void *buffer; | |
362 | int count; | |
363 | }; | |
364 | ||
7c9d8e07 FB |
365 | /* VLANs support */ |
366 | ||
367 | typedef struct VLANClientState VLANClientState; | |
368 | ||
369 | struct VLANClientState { | |
370 | IOReadHandler *fd_read; | |
d861b05e PB |
371 | /* Packets may still be sent if this returns zero. It's used to |
372 | rate-limit the slirp code. */ | |
373 | IOCanRWHandler *fd_can_read; | |
7c9d8e07 FB |
374 | void *opaque; |
375 | struct VLANClientState *next; | |
376 | struct VLANState *vlan; | |
377 | char info_str[256]; | |
378 | }; | |
379 | ||
380 | typedef struct VLANState { | |
381 | int id; | |
382 | VLANClientState *first_client; | |
383 | struct VLANState *next; | |
384 | } VLANState; | |
385 | ||
386 | VLANState *qemu_find_vlan(int id); | |
387 | VLANClientState *qemu_new_vlan_client(VLANState *vlan, | |
d861b05e PB |
388 | IOReadHandler *fd_read, |
389 | IOCanRWHandler *fd_can_read, | |
390 | void *opaque); | |
391 | int qemu_can_send_packet(VLANClientState *vc); | |
7c9d8e07 | 392 | void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size); |
d861b05e | 393 | void qemu_handler_true(void *opaque); |
7c9d8e07 FB |
394 | |
395 | void do_info_network(void); | |
396 | ||
7fb843f8 FB |
397 | /* TAP win32 */ |
398 | int tap_win32_init(VLANState *vlan, const char *ifname); | |
7fb843f8 | 399 | |
7c9d8e07 | 400 | /* NIC info */ |
c4b1fcc0 FB |
401 | |
402 | #define MAX_NICS 8 | |
403 | ||
7c9d8e07 | 404 | typedef struct NICInfo { |
c4b1fcc0 | 405 | uint8_t macaddr[6]; |
a41b2ff2 | 406 | const char *model; |
7c9d8e07 FB |
407 | VLANState *vlan; |
408 | } NICInfo; | |
c4b1fcc0 FB |
409 | |
410 | extern int nb_nics; | |
7c9d8e07 | 411 | extern NICInfo nd_table[MAX_NICS]; |
8a7ddc38 FB |
412 | |
413 | /* timers */ | |
414 | ||
415 | typedef struct QEMUClock QEMUClock; | |
416 | typedef struct QEMUTimer QEMUTimer; | |
417 | typedef void QEMUTimerCB(void *opaque); | |
418 | ||
419 | /* The real time clock should be used only for stuff which does not | |
420 | change the virtual machine state, as it is run even if the virtual | |
69b91039 | 421 | machine is stopped. The real time clock has a frequency of 1000 |
8a7ddc38 FB |
422 | Hz. */ |
423 | extern QEMUClock *rt_clock; | |
424 | ||
e80cfcfc | 425 | /* The virtual clock is only run during the emulation. It is stopped |
8a7ddc38 FB |
426 | when the virtual machine is stopped. Virtual timers use a high |
427 | precision clock, usually cpu cycles (use ticks_per_sec). */ | |
428 | extern QEMUClock *vm_clock; | |
429 | ||
430 | int64_t qemu_get_clock(QEMUClock *clock); | |
431 | ||
432 | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque); | |
433 | void qemu_free_timer(QEMUTimer *ts); | |
434 | void qemu_del_timer(QEMUTimer *ts); | |
435 | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time); | |
436 | int qemu_timer_pending(QEMUTimer *ts); | |
437 | ||
438 | extern int64_t ticks_per_sec; | |
439 | extern int pit_min_timer_count; | |
440 | ||
1dce7c3c | 441 | int64_t cpu_get_ticks(void); |
8a7ddc38 FB |
442 | void cpu_enable_ticks(void); |
443 | void cpu_disable_ticks(void); | |
444 | ||
445 | /* VM Load/Save */ | |
446 | ||
faea38e7 | 447 | typedef struct QEMUFile QEMUFile; |
8a7ddc38 | 448 | |
faea38e7 FB |
449 | QEMUFile *qemu_fopen(const char *filename, const char *mode); |
450 | void qemu_fflush(QEMUFile *f); | |
451 | void qemu_fclose(QEMUFile *f); | |
8a7ddc38 FB |
452 | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); |
453 | void qemu_put_byte(QEMUFile *f, int v); | |
454 | void qemu_put_be16(QEMUFile *f, unsigned int v); | |
455 | void qemu_put_be32(QEMUFile *f, unsigned int v); | |
456 | void qemu_put_be64(QEMUFile *f, uint64_t v); | |
457 | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); | |
458 | int qemu_get_byte(QEMUFile *f); | |
459 | unsigned int qemu_get_be16(QEMUFile *f); | |
460 | unsigned int qemu_get_be32(QEMUFile *f); | |
461 | uint64_t qemu_get_be64(QEMUFile *f); | |
462 | ||
463 | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) | |
464 | { | |
465 | qemu_put_be64(f, *pv); | |
466 | } | |
467 | ||
468 | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) | |
469 | { | |
470 | qemu_put_be32(f, *pv); | |
471 | } | |
472 | ||
473 | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) | |
474 | { | |
475 | qemu_put_be16(f, *pv); | |
476 | } | |
477 | ||
478 | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) | |
479 | { | |
480 | qemu_put_byte(f, *pv); | |
481 | } | |
482 | ||
483 | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) | |
484 | { | |
485 | *pv = qemu_get_be64(f); | |
486 | } | |
487 | ||
488 | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) | |
489 | { | |
490 | *pv = qemu_get_be32(f); | |
491 | } | |
492 | ||
493 | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) | |
494 | { | |
495 | *pv = qemu_get_be16(f); | |
496 | } | |
497 | ||
498 | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) | |
499 | { | |
500 | *pv = qemu_get_byte(f); | |
501 | } | |
502 | ||
c27004ec FB |
503 | #if TARGET_LONG_BITS == 64 |
504 | #define qemu_put_betl qemu_put_be64 | |
505 | #define qemu_get_betl qemu_get_be64 | |
506 | #define qemu_put_betls qemu_put_be64s | |
507 | #define qemu_get_betls qemu_get_be64s | |
508 | #else | |
509 | #define qemu_put_betl qemu_put_be32 | |
510 | #define qemu_get_betl qemu_get_be32 | |
511 | #define qemu_put_betls qemu_put_be32s | |
512 | #define qemu_get_betls qemu_get_be32s | |
513 | #endif | |
514 | ||
8a7ddc38 FB |
515 | int64_t qemu_ftell(QEMUFile *f); |
516 | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence); | |
517 | ||
518 | typedef void SaveStateHandler(QEMUFile *f, void *opaque); | |
519 | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); | |
520 | ||
8a7ddc38 FB |
521 | int register_savevm(const char *idstr, |
522 | int instance_id, | |
523 | int version_id, | |
524 | SaveStateHandler *save_state, | |
525 | LoadStateHandler *load_state, | |
526 | void *opaque); | |
527 | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts); | |
528 | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts); | |
c4b1fcc0 | 529 | |
6a00d601 FB |
530 | void cpu_save(QEMUFile *f, void *opaque); |
531 | int cpu_load(QEMUFile *f, void *opaque, int version_id); | |
532 | ||
faea38e7 FB |
533 | void do_savevm(const char *name); |
534 | void do_loadvm(const char *name); | |
535 | void do_delvm(const char *name); | |
536 | void do_info_snapshots(void); | |
537 | ||
83f64091 | 538 | /* bottom halves */ |
83f64091 FB |
539 | typedef void QEMUBHFunc(void *opaque); |
540 | ||
541 | QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque); | |
542 | void qemu_bh_schedule(QEMUBH *bh); | |
543 | void qemu_bh_cancel(QEMUBH *bh); | |
544 | void qemu_bh_delete(QEMUBH *bh); | |
6eb5733a | 545 | int qemu_bh_poll(void); |
83f64091 | 546 | |
fc01f7e7 FB |
547 | /* block.c */ |
548 | typedef struct BlockDriverState BlockDriverState; | |
ea2384d3 FB |
549 | typedef struct BlockDriver BlockDriver; |
550 | ||
551 | extern BlockDriver bdrv_raw; | |
19cb3738 | 552 | extern BlockDriver bdrv_host_device; |
ea2384d3 FB |
553 | extern BlockDriver bdrv_cow; |
554 | extern BlockDriver bdrv_qcow; | |
555 | extern BlockDriver bdrv_vmdk; | |
3c56521b | 556 | extern BlockDriver bdrv_cloop; |
585d0ed9 | 557 | extern BlockDriver bdrv_dmg; |
a8753c34 | 558 | extern BlockDriver bdrv_bochs; |
6a0f9e82 | 559 | extern BlockDriver bdrv_vpc; |
de167e41 | 560 | extern BlockDriver bdrv_vvfat; |
faea38e7 FB |
561 | extern BlockDriver bdrv_qcow2; |
562 | ||
563 | typedef struct BlockDriverInfo { | |
564 | /* in bytes, 0 if irrelevant */ | |
565 | int cluster_size; | |
566 | /* offset at which the VM state can be saved (0 if not possible) */ | |
567 | int64_t vm_state_offset; | |
568 | } BlockDriverInfo; | |
569 | ||
570 | typedef struct QEMUSnapshotInfo { | |
571 | char id_str[128]; /* unique snapshot id */ | |
572 | /* the following fields are informative. They are not needed for | |
573 | the consistency of the snapshot */ | |
574 | char name[256]; /* user choosen name */ | |
575 | uint32_t vm_state_size; /* VM state info size */ | |
576 | uint32_t date_sec; /* UTC date of the snapshot */ | |
577 | uint32_t date_nsec; | |
578 | uint64_t vm_clock_nsec; /* VM clock relative to boot */ | |
579 | } QEMUSnapshotInfo; | |
ea2384d3 | 580 | |
83f64091 FB |
581 | #define BDRV_O_RDONLY 0x0000 |
582 | #define BDRV_O_RDWR 0x0002 | |
583 | #define BDRV_O_ACCESS 0x0003 | |
584 | #define BDRV_O_CREAT 0x0004 /* create an empty file */ | |
585 | #define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */ | |
586 | #define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to | |
587 | use a disk image format on top of | |
588 | it (default for | |
589 | bdrv_file_open()) */ | |
590 | ||
ea2384d3 FB |
591 | void bdrv_init(void); |
592 | BlockDriver *bdrv_find_format(const char *format_name); | |
593 | int bdrv_create(BlockDriver *drv, | |
594 | const char *filename, int64_t size_in_sectors, | |
595 | const char *backing_file, int flags); | |
c4b1fcc0 FB |
596 | BlockDriverState *bdrv_new(const char *device_name); |
597 | void bdrv_delete(BlockDriverState *bs); | |
83f64091 FB |
598 | int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags); |
599 | int bdrv_open(BlockDriverState *bs, const char *filename, int flags); | |
600 | int bdrv_open2(BlockDriverState *bs, const char *filename, int flags, | |
ea2384d3 | 601 | BlockDriver *drv); |
fc01f7e7 FB |
602 | void bdrv_close(BlockDriverState *bs); |
603 | int bdrv_read(BlockDriverState *bs, int64_t sector_num, | |
604 | uint8_t *buf, int nb_sectors); | |
605 | int bdrv_write(BlockDriverState *bs, int64_t sector_num, | |
606 | const uint8_t *buf, int nb_sectors); | |
83f64091 FB |
607 | int bdrv_pread(BlockDriverState *bs, int64_t offset, |
608 | void *buf, int count); | |
609 | int bdrv_pwrite(BlockDriverState *bs, int64_t offset, | |
610 | const void *buf, int count); | |
611 | int bdrv_truncate(BlockDriverState *bs, int64_t offset); | |
612 | int64_t bdrv_getlength(BlockDriverState *bs); | |
fc01f7e7 | 613 | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr); |
33e3963e | 614 | int bdrv_commit(BlockDriverState *bs); |
77fef8c1 | 615 | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
83f64091 FB |
616 | /* async block I/O */ |
617 | typedef struct BlockDriverAIOCB BlockDriverAIOCB; | |
618 | typedef void BlockDriverCompletionFunc(void *opaque, int ret); | |
619 | ||
ce1a14dc PB |
620 | BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num, |
621 | uint8_t *buf, int nb_sectors, | |
622 | BlockDriverCompletionFunc *cb, void *opaque); | |
623 | BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num, | |
624 | const uint8_t *buf, int nb_sectors, | |
625 | BlockDriverCompletionFunc *cb, void *opaque); | |
83f64091 | 626 | void bdrv_aio_cancel(BlockDriverAIOCB *acb); |
83f64091 FB |
627 | |
628 | void qemu_aio_init(void); | |
629 | void qemu_aio_poll(void); | |
6192bc37 | 630 | void qemu_aio_flush(void); |
83f64091 FB |
631 | void qemu_aio_wait_start(void); |
632 | void qemu_aio_wait(void); | |
633 | void qemu_aio_wait_end(void); | |
634 | ||
7a6cba61 PB |
635 | /* Ensure contents are flushed to disk. */ |
636 | void bdrv_flush(BlockDriverState *bs); | |
33e3963e | 637 | |
c4b1fcc0 FB |
638 | #define BDRV_TYPE_HD 0 |
639 | #define BDRV_TYPE_CDROM 1 | |
640 | #define BDRV_TYPE_FLOPPY 2 | |
4dbb0f50 TS |
641 | #define BIOS_ATA_TRANSLATION_AUTO 0 |
642 | #define BIOS_ATA_TRANSLATION_NONE 1 | |
643 | #define BIOS_ATA_TRANSLATION_LBA 2 | |
644 | #define BIOS_ATA_TRANSLATION_LARGE 3 | |
645 | #define BIOS_ATA_TRANSLATION_RECHS 4 | |
c4b1fcc0 FB |
646 | |
647 | void bdrv_set_geometry_hint(BlockDriverState *bs, | |
648 | int cyls, int heads, int secs); | |
649 | void bdrv_set_type_hint(BlockDriverState *bs, int type); | |
46d4767d | 650 | void bdrv_set_translation_hint(BlockDriverState *bs, int translation); |
c4b1fcc0 FB |
651 | void bdrv_get_geometry_hint(BlockDriverState *bs, |
652 | int *pcyls, int *pheads, int *psecs); | |
653 | int bdrv_get_type_hint(BlockDriverState *bs); | |
46d4767d | 654 | int bdrv_get_translation_hint(BlockDriverState *bs); |
c4b1fcc0 FB |
655 | int bdrv_is_removable(BlockDriverState *bs); |
656 | int bdrv_is_read_only(BlockDriverState *bs); | |
657 | int bdrv_is_inserted(BlockDriverState *bs); | |
19cb3738 | 658 | int bdrv_media_changed(BlockDriverState *bs); |
c4b1fcc0 FB |
659 | int bdrv_is_locked(BlockDriverState *bs); |
660 | void bdrv_set_locked(BlockDriverState *bs, int locked); | |
19cb3738 | 661 | void bdrv_eject(BlockDriverState *bs, int eject_flag); |
c4b1fcc0 FB |
662 | void bdrv_set_change_cb(BlockDriverState *bs, |
663 | void (*change_cb)(void *opaque), void *opaque); | |
ea2384d3 | 664 | void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); |
c4b1fcc0 FB |
665 | void bdrv_info(void); |
666 | BlockDriverState *bdrv_find(const char *name); | |
82c643ff | 667 | void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
ea2384d3 FB |
668 | int bdrv_is_encrypted(BlockDriverState *bs); |
669 | int bdrv_set_key(BlockDriverState *bs, const char *key); | |
670 | void bdrv_iterate_format(void (*it)(void *opaque, const char *name), | |
671 | void *opaque); | |
672 | const char *bdrv_get_device_name(BlockDriverState *bs); | |
faea38e7 FB |
673 | int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num, |
674 | const uint8_t *buf, int nb_sectors); | |
675 | int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi); | |
c4b1fcc0 | 676 | |
83f64091 FB |
677 | void bdrv_get_backing_filename(BlockDriverState *bs, |
678 | char *filename, int filename_size); | |
faea38e7 FB |
679 | int bdrv_snapshot_create(BlockDriverState *bs, |
680 | QEMUSnapshotInfo *sn_info); | |
681 | int bdrv_snapshot_goto(BlockDriverState *bs, | |
682 | const char *snapshot_id); | |
683 | int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id); | |
684 | int bdrv_snapshot_list(BlockDriverState *bs, | |
685 | QEMUSnapshotInfo **psn_info); | |
686 | char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn); | |
687 | ||
688 | char *get_human_readable_size(char *buf, int buf_size, int64_t size); | |
83f64091 FB |
689 | int path_is_absolute(const char *path); |
690 | void path_combine(char *dest, int dest_size, | |
691 | const char *base_path, | |
692 | const char *filename); | |
ea2384d3 FB |
693 | |
694 | #ifndef QEMU_TOOL | |
54fa5af5 FB |
695 | |
696 | typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, | |
697 | int boot_device, | |
698 | DisplayState *ds, const char **fd_filename, int snapshot, | |
699 | const char *kernel_filename, const char *kernel_cmdline, | |
94fc95cd | 700 | const char *initrd_filename, const char *cpu_model); |
54fa5af5 FB |
701 | |
702 | typedef struct QEMUMachine { | |
703 | const char *name; | |
704 | const char *desc; | |
705 | QEMUMachineInitFunc *init; | |
706 | struct QEMUMachine *next; | |
707 | } QEMUMachine; | |
708 | ||
709 | int qemu_register_machine(QEMUMachine *m); | |
710 | ||
711 | typedef void SetIRQFunc(void *opaque, int irq_num, int level); | |
3de388f6 | 712 | typedef void IRQRequestFunc(void *opaque, int level); |
54fa5af5 | 713 | |
94fc95cd JM |
714 | #if defined(TARGET_PPC) |
715 | void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); | |
716 | #endif | |
717 | ||
33d68b5f TS |
718 | #if defined(TARGET_MIPS) |
719 | void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); | |
720 | #endif | |
721 | ||
26aa7d72 FB |
722 | /* ISA bus */ |
723 | ||
724 | extern target_phys_addr_t isa_mem_base; | |
725 | ||
726 | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); | |
727 | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); | |
728 | ||
729 | int register_ioport_read(int start, int length, int size, | |
730 | IOPortReadFunc *func, void *opaque); | |
731 | int register_ioport_write(int start, int length, int size, | |
732 | IOPortWriteFunc *func, void *opaque); | |
69b91039 FB |
733 | void isa_unassign_ioport(int start, int length); |
734 | ||
aef445bd PB |
735 | void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size); |
736 | ||
69b91039 FB |
737 | /* PCI bus */ |
738 | ||
69b91039 FB |
739 | extern target_phys_addr_t pci_mem_base; |
740 | ||
46e50e9d | 741 | typedef struct PCIBus PCIBus; |
69b91039 FB |
742 | typedef struct PCIDevice PCIDevice; |
743 | ||
744 | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, | |
745 | uint32_t address, uint32_t data, int len); | |
746 | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, | |
747 | uint32_t address, int len); | |
748 | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, | |
749 | uint32_t addr, uint32_t size, int type); | |
750 | ||
751 | #define PCI_ADDRESS_SPACE_MEM 0x00 | |
752 | #define PCI_ADDRESS_SPACE_IO 0x01 | |
753 | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 | |
754 | ||
755 | typedef struct PCIIORegion { | |
5768f5ac | 756 | uint32_t addr; /* current PCI mapping address. -1 means not mapped */ |
69b91039 FB |
757 | uint32_t size; |
758 | uint8_t type; | |
759 | PCIMapIORegionFunc *map_func; | |
760 | } PCIIORegion; | |
761 | ||
8a8696a3 FB |
762 | #define PCI_ROM_SLOT 6 |
763 | #define PCI_NUM_REGIONS 7 | |
502a5395 PB |
764 | |
765 | #define PCI_DEVICES_MAX 64 | |
766 | ||
767 | #define PCI_VENDOR_ID 0x00 /* 16 bits */ | |
768 | #define PCI_DEVICE_ID 0x02 /* 16 bits */ | |
769 | #define PCI_COMMAND 0x04 /* 16 bits */ | |
770 | #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ | |
771 | #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ | |
772 | #define PCI_CLASS_DEVICE 0x0a /* Device class */ | |
773 | #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ | |
774 | #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ | |
775 | #define PCI_MIN_GNT 0x3e /* 8 bits */ | |
776 | #define PCI_MAX_LAT 0x3f /* 8 bits */ | |
777 | ||
69b91039 FB |
778 | struct PCIDevice { |
779 | /* PCI config space */ | |
780 | uint8_t config[256]; | |
781 | ||
782 | /* the following fields are read only */ | |
46e50e9d | 783 | PCIBus *bus; |
69b91039 FB |
784 | int devfn; |
785 | char name[64]; | |
8a8696a3 | 786 | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
69b91039 FB |
787 | |
788 | /* do not access the following fields */ | |
789 | PCIConfigReadFunc *config_read; | |
790 | PCIConfigWriteFunc *config_write; | |
502a5395 | 791 | /* ??? This is a PC-specific hack, and should be removed. */ |
5768f5ac | 792 | int irq_index; |
d2b59317 PB |
793 | |
794 | /* Current IRQ levels. Used internally by the generic PCI code. */ | |
795 | int irq_state[4]; | |
69b91039 FB |
796 | }; |
797 | ||
46e50e9d FB |
798 | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
799 | int instance_size, int devfn, | |
69b91039 FB |
800 | PCIConfigReadFunc *config_read, |
801 | PCIConfigWriteFunc *config_write); | |
802 | ||
803 | void pci_register_io_region(PCIDevice *pci_dev, int region_num, | |
804 | uint32_t size, int type, | |
805 | PCIMapIORegionFunc *map_func); | |
806 | ||
5768f5ac FB |
807 | void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
808 | ||
809 | uint32_t pci_default_read_config(PCIDevice *d, | |
810 | uint32_t address, int len); | |
811 | void pci_default_write_config(PCIDevice *d, | |
812 | uint32_t address, uint32_t val, int len); | |
89b6b508 FB |
813 | void pci_device_save(PCIDevice *s, QEMUFile *f); |
814 | int pci_device_load(PCIDevice *s, QEMUFile *f); | |
5768f5ac | 815 | |
d2b59317 PB |
816 | typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level); |
817 | typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); | |
818 | PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, | |
80b3ada7 | 819 | void *pic, int devfn_min, int nirq); |
502a5395 | 820 | |
abcebc7e | 821 | void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn); |
502a5395 PB |
822 | void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len); |
823 | uint32_t pci_data_read(void *opaque, uint32_t addr, int len); | |
824 | int pci_bus_num(PCIBus *s); | |
80b3ada7 | 825 | void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d)); |
9995c51f | 826 | |
5768f5ac | 827 | void pci_info(void); |
80b3ada7 PB |
828 | PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id, |
829 | pci_map_irq_fn map_irq, const char *name); | |
26aa7d72 | 830 | |
502a5395 | 831 | /* prep_pci.c */ |
46e50e9d | 832 | PCIBus *pci_prep_init(void); |
77d4bc34 | 833 | |
502a5395 PB |
834 | /* grackle_pci.c */ |
835 | PCIBus *pci_grackle_init(uint32_t base, void *pic); | |
836 | ||
837 | /* unin_pci.c */ | |
838 | PCIBus *pci_pmac_init(void *pic); | |
839 | ||
840 | /* apb_pci.c */ | |
841 | PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base, | |
842 | void *pic); | |
843 | ||
e69954b9 | 844 | PCIBus *pci_vpb_init(void *pic, int irq, int realview); |
502a5395 PB |
845 | |
846 | /* piix_pci.c */ | |
f00fc47c FB |
847 | PCIBus *i440fx_init(PCIDevice **pi440fx_state); |
848 | void i440fx_set_smm(PCIDevice *d, int val); | |
8f1c91d8 | 849 | int piix3_init(PCIBus *bus, int devfn); |
f00fc47c | 850 | void i440fx_init_memory_mappings(PCIDevice *d); |
a41b2ff2 | 851 | |
5856de80 TS |
852 | int piix4_init(PCIBus *bus, int devfn); |
853 | ||
28b9b5af FB |
854 | /* openpic.c */ |
855 | typedef struct openpic_t openpic_t; | |
47103572 JM |
856 | enum { |
857 | OPENPIC_EVT_INT = 0, /* IRQ */ | |
858 | OPENPIC_EVT_CINT, /* critical IRQ */ | |
859 | OPENPIC_EVT_MCK, /* Machine check event */ | |
860 | OPENPIC_EVT_DEBUG, /* Inconditional debug event */ | |
861 | OPENPIC_EVT_RESET, /* Core reset event */ | |
862 | }; | |
54fa5af5 | 863 | void openpic_set_irq(void *opaque, int n_IRQ, int level); |
47103572 | 864 | openpic_t *openpic_init (PCIBus *bus, SetIRQFunc *set_irq, |
e69f67b6 | 865 | int *pmem_index, int nb_cpus, |
05a8096f | 866 | struct CPUState **envp); |
28b9b5af | 867 | |
54fa5af5 FB |
868 | /* heathrow_pic.c */ |
869 | typedef struct HeathrowPICS HeathrowPICS; | |
870 | void heathrow_pic_set_irq(void *opaque, int num, int level); | |
871 | HeathrowPICS *heathrow_pic_init(int *pmem_index); | |
872 | ||
fde7d5bd TS |
873 | /* gt64xxx.c */ |
874 | PCIBus *pci_gt64120_init(void *pic); | |
875 | ||
6a36d84e FB |
876 | #ifdef HAS_AUDIO |
877 | struct soundhw { | |
878 | const char *name; | |
879 | const char *descr; | |
880 | int enabled; | |
881 | int isa; | |
882 | union { | |
883 | int (*init_isa) (AudioState *s); | |
884 | int (*init_pci) (PCIBus *bus, AudioState *s); | |
885 | } init; | |
886 | }; | |
887 | ||
888 | extern struct soundhw soundhw[]; | |
889 | #endif | |
890 | ||
313aa567 FB |
891 | /* vga.c */ |
892 | ||
74a14f22 | 893 | #define VGA_RAM_SIZE (8192 * 1024) |
313aa567 | 894 | |
82c643ff | 895 | struct DisplayState { |
313aa567 FB |
896 | uint8_t *data; |
897 | int linesize; | |
898 | int depth; | |
d3079cd2 | 899 | int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */ |
82c643ff FB |
900 | int width; |
901 | int height; | |
24236869 FB |
902 | void *opaque; |
903 | ||
313aa567 FB |
904 | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
905 | void (*dpy_resize)(struct DisplayState *s, int w, int h); | |
906 | void (*dpy_refresh)(struct DisplayState *s); | |
d34cab9f TS |
907 | void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, |
908 | int dst_x, int dst_y, int w, int h); | |
909 | void (*dpy_fill)(struct DisplayState *s, int x, int y, | |
910 | int w, int h, uint32_t c); | |
911 | void (*mouse_set)(int x, int y, int on); | |
912 | void (*cursor_define)(int width, int height, int bpp, int hot_x, int hot_y, | |
913 | uint8_t *image, uint8_t *mask); | |
82c643ff | 914 | }; |
313aa567 FB |
915 | |
916 | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) | |
917 | { | |
918 | s->dpy_update(s, x, y, w, h); | |
919 | } | |
920 | ||
921 | static inline void dpy_resize(DisplayState *s, int w, int h) | |
922 | { | |
923 | s->dpy_resize(s, w, h); | |
924 | } | |
925 | ||
89b6b508 FB |
926 | int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base, |
927 | unsigned long vga_ram_offset, int vga_ram_size); | |
928 | int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, | |
929 | unsigned long vga_ram_offset, int vga_ram_size, | |
930 | unsigned long vga_bios_offset, int vga_bios_size); | |
313aa567 | 931 | |
d6bfa22f | 932 | /* cirrus_vga.c */ |
46e50e9d | 933 | void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
d6bfa22f | 934 | unsigned long vga_ram_offset, int vga_ram_size); |
d6bfa22f FB |
935 | void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, |
936 | unsigned long vga_ram_offset, int vga_ram_size); | |
937 | ||
d34cab9f TS |
938 | /* vmware_vga.c */ |
939 | void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, | |
940 | unsigned long vga_ram_offset, int vga_ram_size); | |
941 | ||
313aa567 | 942 | /* sdl.c */ |
43523e93 | 943 | void sdl_display_init(DisplayState *ds, int full_screen, int no_frame); |
313aa567 | 944 | |
da4dbf74 FB |
945 | /* cocoa.m */ |
946 | void cocoa_display_init(DisplayState *ds, int full_screen); | |
947 | ||
24236869 | 948 | /* vnc.c */ |
73fc9742 | 949 | void vnc_display_init(DisplayState *ds, const char *display); |
a9ce8590 | 950 | void do_info_vnc(void); |
24236869 | 951 | |
6070dd07 TS |
952 | /* x_keymap.c */ |
953 | extern uint8_t _translate_keycode(const int key); | |
954 | ||
5391d806 FB |
955 | /* ide.c */ |
956 | #define MAX_DISKS 4 | |
957 | ||
faea38e7 | 958 | extern BlockDriverState *bs_table[MAX_DISKS + 1]; |
5391d806 | 959 | |
69b91039 FB |
960 | void isa_ide_init(int iobase, int iobase2, int irq, |
961 | BlockDriverState *hd0, BlockDriverState *hd1); | |
54fa5af5 FB |
962 | void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, |
963 | int secondary_ide_enabled); | |
502a5395 | 964 | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn); |
28b9b5af | 965 | int pmac_ide_init (BlockDriverState **hd_table, |
54fa5af5 | 966 | SetIRQFunc *set_irq, void *irq_opaque, int irq); |
5391d806 | 967 | |
2e5d83bb PB |
968 | /* cdrom.c */ |
969 | int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track); | |
970 | int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num); | |
971 | ||
9542611a TS |
972 | /* ds1225y.c */ |
973 | typedef struct ds1225y_t ds1225y_t; | |
974 | ds1225y_t *ds1225y_init(target_ulong mem_base, const char *filename); | |
975 | ||
1d14ffa9 | 976 | /* es1370.c */ |
c0fe3827 | 977 | int es1370_init (PCIBus *bus, AudioState *s); |
1d14ffa9 | 978 | |
fb065187 | 979 | /* sb16.c */ |
c0fe3827 | 980 | int SB16_init (AudioState *s); |
fb065187 FB |
981 | |
982 | /* adlib.c */ | |
c0fe3827 | 983 | int Adlib_init (AudioState *s); |
fb065187 FB |
984 | |
985 | /* gus.c */ | |
c0fe3827 | 986 | int GUS_init (AudioState *s); |
27503323 FB |
987 | |
988 | /* dma.c */ | |
85571bc7 | 989 | typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); |
27503323 | 990 | int DMA_get_channel_mode (int nchan); |
85571bc7 FB |
991 | int DMA_read_memory (int nchan, void *buf, int pos, int size); |
992 | int DMA_write_memory (int nchan, void *buf, int pos, int size); | |
27503323 FB |
993 | void DMA_hold_DREQ (int nchan); |
994 | void DMA_release_DREQ (int nchan); | |
16f62432 | 995 | void DMA_schedule(int nchan); |
27503323 | 996 | void DMA_run (void); |
28b9b5af | 997 | void DMA_init (int high_page_enable); |
27503323 | 998 | void DMA_register_channel (int nchan, |
85571bc7 FB |
999 | DMA_transfer_handler transfer_handler, |
1000 | void *opaque); | |
7138fcfb FB |
1001 | /* fdc.c */ |
1002 | #define MAX_FD 2 | |
1003 | extern BlockDriverState *fd_table[MAX_FD]; | |
1004 | ||
baca51fa FB |
1005 | typedef struct fdctrl_t fdctrl_t; |
1006 | ||
1007 | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, | |
1008 | uint32_t io_base, | |
1009 | BlockDriverState **fds); | |
1010 | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); | |
7138fcfb | 1011 | |
80cabfad FB |
1012 | /* ne2000.c */ |
1013 | ||
7c9d8e07 | 1014 | void isa_ne2000_init(int base, int irq, NICInfo *nd); |
abcebc7e | 1015 | void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn); |
80cabfad | 1016 | |
a41b2ff2 PB |
1017 | /* rtl8139.c */ |
1018 | ||
abcebc7e | 1019 | void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn); |
a41b2ff2 | 1020 | |
e3c2613f FB |
1021 | /* pcnet.c */ |
1022 | ||
abcebc7e | 1023 | void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn); |
67e999be FB |
1024 | void pcnet_h_reset(void *opaque); |
1025 | void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque); | |
1026 | ||
548df2ac TS |
1027 | /* vmmouse.c */ |
1028 | void *vmmouse_init(void *m); | |
e3c2613f | 1029 | |
80cabfad FB |
1030 | /* pckbd.c */ |
1031 | ||
80cabfad FB |
1032 | void kbd_init(void); |
1033 | ||
1034 | /* mc146818rtc.c */ | |
1035 | ||
8a7ddc38 | 1036 | typedef struct RTCState RTCState; |
80cabfad | 1037 | |
8a7ddc38 FB |
1038 | RTCState *rtc_init(int base, int irq); |
1039 | void rtc_set_memory(RTCState *s, int addr, int val); | |
1040 | void rtc_set_date(RTCState *s, const struct tm *tm); | |
80cabfad FB |
1041 | |
1042 | /* serial.c */ | |
1043 | ||
c4b1fcc0 | 1044 | typedef struct SerialState SerialState; |
e5d13e2f FB |
1045 | SerialState *serial_init(SetIRQFunc *set_irq, void *opaque, |
1046 | int base, int irq, CharDriverState *chr); | |
1047 | SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque, | |
1048 | target_ulong base, int it_shift, | |
a4bc3afc TS |
1049 | int irq, CharDriverState *chr, |
1050 | int ioregister); | |
1051 | uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr); | |
1052 | void serial_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value); | |
1053 | uint32_t serial_mm_readw (void *opaque, target_phys_addr_t addr); | |
1054 | void serial_mm_writew (void *opaque, target_phys_addr_t addr, uint32_t value); | |
1055 | uint32_t serial_mm_readl (void *opaque, target_phys_addr_t addr); | |
1056 | void serial_mm_writel (void *opaque, target_phys_addr_t addr, uint32_t value); | |
80cabfad | 1057 | |
6508fe59 FB |
1058 | /* parallel.c */ |
1059 | ||
1060 | typedef struct ParallelState ParallelState; | |
1061 | ParallelState *parallel_init(int base, int irq, CharDriverState *chr); | |
1062 | ||
80cabfad FB |
1063 | /* i8259.c */ |
1064 | ||
3de388f6 FB |
1065 | typedef struct PicState2 PicState2; |
1066 | extern PicState2 *isa_pic; | |
80cabfad | 1067 | void pic_set_irq(int irq, int level); |
54fa5af5 | 1068 | void pic_set_irq_new(void *opaque, int irq, int level); |
3de388f6 | 1069 | PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque); |
d592d303 FB |
1070 | void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func, |
1071 | void *alt_irq_opaque); | |
3de388f6 FB |
1072 | int pic_read_irq(PicState2 *s); |
1073 | void pic_update_irq(PicState2 *s); | |
1074 | uint32_t pic_intack_read(PicState2 *s); | |
c20709aa | 1075 | void pic_info(void); |
4a0fb71e | 1076 | void irq_info(void); |
80cabfad | 1077 | |
c27004ec | 1078 | /* APIC */ |
d592d303 FB |
1079 | typedef struct IOAPICState IOAPICState; |
1080 | ||
c27004ec FB |
1081 | int apic_init(CPUState *env); |
1082 | int apic_get_interrupt(CPUState *env); | |
d592d303 FB |
1083 | IOAPICState *ioapic_init(void); |
1084 | void ioapic_set_irq(void *opaque, int vector, int level); | |
c27004ec | 1085 | |
80cabfad FB |
1086 | /* i8254.c */ |
1087 | ||
1088 | #define PIT_FREQ 1193182 | |
1089 | ||
ec844b96 FB |
1090 | typedef struct PITState PITState; |
1091 | ||
1092 | PITState *pit_init(int base, int irq); | |
1093 | void pit_set_gate(PITState *pit, int channel, int val); | |
1094 | int pit_get_gate(PITState *pit, int channel); | |
fd06c375 FB |
1095 | int pit_get_initial_count(PITState *pit, int channel); |
1096 | int pit_get_mode(PITState *pit, int channel); | |
ec844b96 | 1097 | int pit_get_out(PITState *pit, int channel, int64_t current_time); |
80cabfad | 1098 | |
fd06c375 FB |
1099 | /* pcspk.c */ |
1100 | void pcspk_init(PITState *); | |
1101 | int pcspk_audio_init(AudioState *); | |
1102 | ||
3fffc223 TS |
1103 | #include "hw/smbus.h" |
1104 | ||
6515b203 FB |
1105 | /* acpi.c */ |
1106 | extern int acpi_enabled; | |
502a5395 | 1107 | void piix4_pm_init(PCIBus *bus, int devfn); |
3fffc223 | 1108 | void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); |
6515b203 FB |
1109 | void acpi_bios_init(void); |
1110 | ||
3fffc223 TS |
1111 | /* smbus_eeprom.c */ |
1112 | SMBusDevice *smbus_eeprom_device_init(uint8_t addr, uint8_t *buf); | |
1113 | ||
80cabfad | 1114 | /* pc.c */ |
54fa5af5 | 1115 | extern QEMUMachine pc_machine; |
3dbbdc25 | 1116 | extern QEMUMachine isapc_machine; |
52ca8d6a | 1117 | extern int fd_bootchk; |
80cabfad | 1118 | |
6a00d601 FB |
1119 | void ioport_set_a20(int enable); |
1120 | int ioport_get_a20(void); | |
1121 | ||
26aa7d72 | 1122 | /* ppc.c */ |
54fa5af5 FB |
1123 | extern QEMUMachine prep_machine; |
1124 | extern QEMUMachine core99_machine; | |
1125 | extern QEMUMachine heathrow_machine; | |
1126 | ||
6af0bf9c FB |
1127 | /* mips_r4k.c */ |
1128 | extern QEMUMachine mips_machine; | |
1129 | ||
5856de80 TS |
1130 | /* mips_malta.c */ |
1131 | extern QEMUMachine mips_malta_machine; | |
1132 | ||
4de9b249 TS |
1133 | /* mips_int */ |
1134 | extern void cpu_mips_irq_request(void *opaque, int irq, int level); | |
1135 | ||
e16fe40c TS |
1136 | /* mips_timer.c */ |
1137 | extern void cpu_mips_clock_init(CPUState *); | |
1138 | extern void cpu_mips_irqctrl_init (void); | |
1139 | ||
27c7ca7e FB |
1140 | /* shix.c */ |
1141 | extern QEMUMachine shix_machine; | |
1142 | ||
8cc43fef | 1143 | #ifdef TARGET_PPC |
47103572 JM |
1144 | /* PowerPC hardware exceptions management helpers */ |
1145 | void ppc_set_irq (void *opaque, int n_IRQ, int level); | |
1146 | void ppc_openpic_irq (void *opaque, int n_IRQ, int level); | |
1147 | int ppc_hw_interrupt (CPUState *env); | |
8cc43fef FB |
1148 | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); |
1149 | #endif | |
64201201 | 1150 | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
77d4bc34 FB |
1151 | |
1152 | extern CPUWriteMemoryFunc *PPC_io_write[]; | |
1153 | extern CPUReadMemoryFunc *PPC_io_read[]; | |
54fa5af5 | 1154 | void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
26aa7d72 | 1155 | |
e95c8d51 | 1156 | /* sun4m.c */ |
e0353fe2 | 1157 | extern QEMUMachine ss5_machine, ss10_machine; |
e95c8d51 FB |
1158 | |
1159 | /* iommu.c */ | |
e80cfcfc | 1160 | void *iommu_init(uint32_t addr); |
67e999be | 1161 | void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr, |
a917d384 | 1162 | uint8_t *buf, int len, int is_write); |
67e999be FB |
1163 | static inline void sparc_iommu_memory_read(void *opaque, |
1164 | target_phys_addr_t addr, | |
1165 | uint8_t *buf, int len) | |
1166 | { | |
1167 | sparc_iommu_memory_rw(opaque, addr, buf, len, 0); | |
1168 | } | |
e95c8d51 | 1169 | |
67e999be FB |
1170 | static inline void sparc_iommu_memory_write(void *opaque, |
1171 | target_phys_addr_t addr, | |
1172 | uint8_t *buf, int len) | |
1173 | { | |
1174 | sparc_iommu_memory_rw(opaque, addr, buf, len, 1); | |
1175 | } | |
e95c8d51 FB |
1176 | |
1177 | /* tcx.c */ | |
95219897 | 1178 | void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base, |
6f7e9aec | 1179 | unsigned long vram_offset, int vram_size, int width, int height); |
e80cfcfc FB |
1180 | |
1181 | /* slavio_intctl.c */ | |
52cc07d0 | 1182 | void pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu); |
e0353fe2 BS |
1183 | void *slavio_intctl_init(uint32_t addr, uint32_t addrg, |
1184 | const uint32_t *intbit_to_level); | |
ba3c64fb | 1185 | void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env); |
e80cfcfc FB |
1186 | void slavio_pic_info(void *opaque); |
1187 | void slavio_irq_info(void *opaque); | |
1188 | void slavio_pic_set_irq(void *opaque, int irq, int level); | |
ba3c64fb | 1189 | void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu); |
e95c8d51 | 1190 | |
5fe141fd FB |
1191 | /* loader.c */ |
1192 | int get_image_size(const char *filename); | |
1193 | int load_image(const char *filename, uint8_t *addr); | |
74287114 TS |
1194 | int load_elf(const char *filename, int64_t virt_to_phys_addend, |
1195 | uint64_t *pentry, uint64_t *lowaddr, uint64_t *highaddr); | |
e80cfcfc | 1196 | int load_aout(const char *filename, uint8_t *addr); |
1c7b3754 | 1197 | int load_uboot(const char *filename, target_ulong *ep, int *is_linux); |
e80cfcfc FB |
1198 | |
1199 | /* slavio_timer.c */ | |
52cc07d0 BS |
1200 | void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu, |
1201 | void *intctl); | |
8d5f07fa | 1202 | |
e80cfcfc | 1203 | /* slavio_serial.c */ |
52cc07d0 BS |
1204 | SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, |
1205 | CharDriverState *chr2, void *intctl); | |
1206 | void slavio_serial_ms_kbd_init(int base, int irq, void *intctl); | |
e95c8d51 | 1207 | |
3475187d | 1208 | /* slavio_misc.c */ |
52cc07d0 | 1209 | void *slavio_misc_init(uint32_t base, int irq, void *intctl); |
3475187d FB |
1210 | void slavio_set_power_fail(void *opaque, int power_failing); |
1211 | ||
6f7e9aec | 1212 | /* esp.c */ |
fa1fb14c | 1213 | void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id); |
67e999be FB |
1214 | void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque); |
1215 | void esp_reset(void *opaque); | |
1216 | ||
1217 | /* sparc32_dma.c */ | |
1218 | void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu, | |
1219 | void *intctl); | |
1220 | void ledma_set_irq(void *opaque, int isr); | |
9b94dc32 FB |
1221 | void ledma_memory_read(void *opaque, target_phys_addr_t addr, |
1222 | uint8_t *buf, int len, int do_bswap); | |
1223 | void ledma_memory_write(void *opaque, target_phys_addr_t addr, | |
1224 | uint8_t *buf, int len, int do_bswap); | |
67e999be FB |
1225 | void espdma_raise_irq(void *opaque); |
1226 | void espdma_clear_irq(void *opaque); | |
1227 | void espdma_memory_read(void *opaque, uint8_t *buf, int len); | |
1228 | void espdma_memory_write(void *opaque, uint8_t *buf, int len); | |
1229 | void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque, | |
1230 | void *lance_opaque); | |
6f7e9aec | 1231 | |
b8174937 FB |
1232 | /* cs4231.c */ |
1233 | void cs_init(target_phys_addr_t base, int irq, void *intctl); | |
1234 | ||
3475187d FB |
1235 | /* sun4u.c */ |
1236 | extern QEMUMachine sun4u_machine; | |
1237 | ||
64201201 FB |
1238 | /* NVRAM helpers */ |
1239 | #include "hw/m48t59.h" | |
1240 | ||
1241 | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value); | |
1242 | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); | |
1243 | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value); | |
1244 | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); | |
1245 | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value); | |
1246 | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); | |
1247 | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, | |
1248 | const unsigned char *str, uint32_t max); | |
1249 | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); | |
1250 | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr, | |
1251 | uint32_t start, uint32_t count); | |
1252 | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, | |
1253 | const unsigned char *arch, | |
1254 | uint32_t RAM_size, int boot_device, | |
1255 | uint32_t kernel_image, uint32_t kernel_size, | |
28b9b5af | 1256 | const char *cmdline, |
64201201 | 1257 | uint32_t initrd_image, uint32_t initrd_size, |
28b9b5af FB |
1258 | uint32_t NVRAM_image, |
1259 | int width, int height, int depth); | |
64201201 | 1260 | |
63066f4f FB |
1261 | /* adb.c */ |
1262 | ||
1263 | #define MAX_ADB_DEVICES 16 | |
1264 | ||
e2733d20 | 1265 | #define ADB_MAX_OUT_LEN 16 |
63066f4f | 1266 | |
e2733d20 | 1267 | typedef struct ADBDevice ADBDevice; |
63066f4f | 1268 | |
e2733d20 FB |
1269 | /* buf = NULL means polling */ |
1270 | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, | |
1271 | const uint8_t *buf, int len); | |
12c28fed FB |
1272 | typedef int ADBDeviceReset(ADBDevice *d); |
1273 | ||
63066f4f FB |
1274 | struct ADBDevice { |
1275 | struct ADBBusState *bus; | |
1276 | int devaddr; | |
1277 | int handler; | |
e2733d20 | 1278 | ADBDeviceRequest *devreq; |
12c28fed | 1279 | ADBDeviceReset *devreset; |
63066f4f FB |
1280 | void *opaque; |
1281 | }; | |
1282 | ||
1283 | typedef struct ADBBusState { | |
1284 | ADBDevice devices[MAX_ADB_DEVICES]; | |
1285 | int nb_devices; | |
e2733d20 | 1286 | int poll_index; |
63066f4f FB |
1287 | } ADBBusState; |
1288 | ||
e2733d20 FB |
1289 | int adb_request(ADBBusState *s, uint8_t *buf_out, |
1290 | const uint8_t *buf, int len); | |
1291 | int adb_poll(ADBBusState *s, uint8_t *buf_out); | |
63066f4f FB |
1292 | |
1293 | ADBDevice *adb_register_device(ADBBusState *s, int devaddr, | |
e2733d20 | 1294 | ADBDeviceRequest *devreq, |
12c28fed | 1295 | ADBDeviceReset *devreset, |
63066f4f FB |
1296 | void *opaque); |
1297 | void adb_kbd_init(ADBBusState *bus); | |
1298 | void adb_mouse_init(ADBBusState *bus); | |
1299 | ||
1300 | /* cuda.c */ | |
1301 | ||
1302 | extern ADBBusState adb_bus; | |
54fa5af5 | 1303 | int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq); |
63066f4f | 1304 | |
bb36d470 FB |
1305 | #include "hw/usb.h" |
1306 | ||
a594cfbf FB |
1307 | /* usb ports of the VM */ |
1308 | ||
0d92ed30 PB |
1309 | void qemu_register_usb_port(USBPort *port, void *opaque, int index, |
1310 | usb_attachfn attach); | |
a594cfbf | 1311 | |
0d92ed30 | 1312 | #define VM_USB_HUB_SIZE 8 |
a594cfbf FB |
1313 | |
1314 | void do_usb_add(const char *devname); | |
1315 | void do_usb_del(const char *devname); | |
1316 | void usb_info(void); | |
1317 | ||
2e5d83bb | 1318 | /* scsi-disk.c */ |
4d611c9a PB |
1319 | enum scsi_reason { |
1320 | SCSI_REASON_DONE, /* Command complete. */ | |
1321 | SCSI_REASON_DATA /* Transfer complete, more data required. */ | |
1322 | }; | |
1323 | ||
2e5d83bb | 1324 | typedef struct SCSIDevice SCSIDevice; |
a917d384 PB |
1325 | typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag, |
1326 | uint32_t arg); | |
2e5d83bb PB |
1327 | |
1328 | SCSIDevice *scsi_disk_init(BlockDriverState *bdrv, | |
a917d384 | 1329 | int tcq, |
2e5d83bb PB |
1330 | scsi_completionfn completion, |
1331 | void *opaque); | |
1332 | void scsi_disk_destroy(SCSIDevice *s); | |
1333 | ||
0fc5c15a | 1334 | int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun); |
4d611c9a PB |
1335 | /* SCSI data transfers are asynchrnonous. However, unlike the block IO |
1336 | layer the completion routine may be called directly by | |
1337 | scsi_{read,write}_data. */ | |
a917d384 PB |
1338 | void scsi_read_data(SCSIDevice *s, uint32_t tag); |
1339 | int scsi_write_data(SCSIDevice *s, uint32_t tag); | |
1340 | void scsi_cancel_io(SCSIDevice *s, uint32_t tag); | |
1341 | uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag); | |
2e5d83bb | 1342 | |
7d8406be PB |
1343 | /* lsi53c895a.c */ |
1344 | void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id); | |
1345 | void *lsi_scsi_init(PCIBus *bus, int devfn); | |
1346 | ||
b5ff1b31 | 1347 | /* integratorcp.c */ |
3371d272 | 1348 | extern QEMUMachine integratorcp_machine; |
b5ff1b31 | 1349 | |
cdbdb648 PB |
1350 | /* versatilepb.c */ |
1351 | extern QEMUMachine versatilepb_machine; | |
16406950 | 1352 | extern QEMUMachine versatileab_machine; |
cdbdb648 | 1353 | |
e69954b9 PB |
1354 | /* realview.c */ |
1355 | extern QEMUMachine realview_machine; | |
1356 | ||
daa57963 FB |
1357 | /* ps2.c */ |
1358 | void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg); | |
1359 | void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg); | |
1360 | void ps2_write_mouse(void *, int val); | |
1361 | void ps2_write_keyboard(void *, int val); | |
1362 | uint32_t ps2_read_data(void *); | |
1363 | void ps2_queue(void *, int b); | |
f94f5d71 | 1364 | void ps2_keyboard_set_translation(void *opaque, int mode); |
548df2ac | 1365 | void ps2_mouse_fake_event(void *opaque); |
daa57963 | 1366 | |
80337b66 FB |
1367 | /* smc91c111.c */ |
1368 | void smc91c111_init(NICInfo *, uint32_t, void *, int); | |
1369 | ||
bdd5003a | 1370 | /* pl110.c */ |
95219897 | 1371 | void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int); |
bdd5003a | 1372 | |
cdbdb648 PB |
1373 | /* pl011.c */ |
1374 | void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr); | |
1375 | ||
1376 | /* pl050.c */ | |
1377 | void pl050_init(uint32_t base, void *pic, int irq, int is_mouse); | |
1378 | ||
1379 | /* pl080.c */ | |
e69954b9 | 1380 | void *pl080_init(uint32_t base, void *pic, int irq, int nchannels); |
cdbdb648 PB |
1381 | |
1382 | /* pl190.c */ | |
1383 | void *pl190_init(uint32_t base, void *parent, int irq, int fiq); | |
1384 | ||
1385 | /* arm-timer.c */ | |
1386 | void sp804_init(uint32_t base, void *pic, int irq); | |
1387 | void icp_pit_init(uint32_t base, void *pic, int irq); | |
1388 | ||
e69954b9 PB |
1389 | /* arm_sysctl.c */ |
1390 | void arm_sysctl_init(uint32_t base, uint32_t sys_id); | |
1391 | ||
1392 | /* arm_gic.c */ | |
1393 | void *arm_gic_init(uint32_t base, void *parent, int parent_irq); | |
1394 | ||
16406950 PB |
1395 | /* arm_boot.c */ |
1396 | ||
daf90626 | 1397 | void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, |
16406950 PB |
1398 | const char *kernel_cmdline, const char *initrd_filename, |
1399 | int board_id); | |
1400 | ||
27c7ca7e FB |
1401 | /* sh7750.c */ |
1402 | struct SH7750State; | |
1403 | ||
008a8818 | 1404 | struct SH7750State *sh7750_init(CPUState * cpu); |
27c7ca7e FB |
1405 | |
1406 | typedef struct { | |
1407 | /* The callback will be triggered if any of the designated lines change */ | |
1408 | uint16_t portamask_trigger; | |
1409 | uint16_t portbmask_trigger; | |
1410 | /* Return 0 if no action was taken */ | |
1411 | int (*port_change_cb) (uint16_t porta, uint16_t portb, | |
1412 | uint16_t * periph_pdtra, | |
1413 | uint16_t * periph_portdira, | |
1414 | uint16_t * periph_pdtrb, | |
1415 | uint16_t * periph_portdirb); | |
1416 | } sh7750_io_device; | |
1417 | ||
1418 | int sh7750_register_io_device(struct SH7750State *s, | |
1419 | sh7750_io_device * device); | |
1420 | /* tc58128.c */ | |
1421 | int tc58128_init(struct SH7750State *s, char *zone1, char *zone2); | |
1422 | ||
29133e9a FB |
1423 | /* NOR flash devices */ |
1424 | typedef struct pflash_t pflash_t; | |
1425 | ||
1426 | pflash_t *pflash_register (target_ulong base, ram_addr_t off, | |
1427 | BlockDriverState *bs, | |
1428 | target_ulong sector_len, int nb_blocs, int width, | |
1429 | uint16_t id0, uint16_t id1, | |
1430 | uint16_t id2, uint16_t id3); | |
1431 | ||
4046d913 PB |
1432 | #include "gdbstub.h" |
1433 | ||
ea2384d3 FB |
1434 | #endif /* defined(QEMU_TOOL) */ |
1435 | ||
c4b1fcc0 | 1436 | /* monitor.c */ |
82c643ff | 1437 | void monitor_init(CharDriverState *hd, int show_banner); |
ea2384d3 FB |
1438 | void term_puts(const char *str); |
1439 | void term_vprintf(const char *fmt, va_list ap); | |
40c3bac3 | 1440 | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
fef30743 | 1441 | void term_print_filename(const char *filename); |
c4b1fcc0 FB |
1442 | void term_flush(void); |
1443 | void term_print_help(void); | |
ea2384d3 FB |
1444 | void monitor_readline(const char *prompt, int is_password, |
1445 | char *buf, int buf_size); | |
1446 | ||
1447 | /* readline.c */ | |
1448 | typedef void ReadLineFunc(void *opaque, const char *str); | |
1449 | ||
1450 | extern int completion_index; | |
1451 | void add_completion(const char *str); | |
1452 | void readline_handle_byte(int ch); | |
1453 | void readline_find_completion(const char *cmdline); | |
1454 | const char *readline_get_history(unsigned int index); | |
1455 | void readline_start(const char *prompt, int is_password, | |
1456 | ReadLineFunc *readline_func, void *opaque); | |
c4b1fcc0 | 1457 | |
5e6ad6f9 FB |
1458 | void kqemu_record_dump(void); |
1459 | ||
fc01f7e7 | 1460 | #endif /* VL_H */ |