]> Git Repo - qemu.git/blame - vl.h
Configure check for alsa, by Bernhard Fischer.
[qemu.git] / vl.h
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fc01f7e7
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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
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35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
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40
41#ifndef O_LARGEFILE
42#define O_LARGEFILE 0
43#endif
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44#ifndef O_BINARY
45#define O_BINARY 0
46#endif
67b915a5 47
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48#ifdef __sun__
49#define ENOMEDIUM 4097
50#endif
51
67b915a5 52#ifdef _WIN32
a18e524a 53#include <windows.h>
ac62f715 54#define fsync _commit
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55#define lseek _lseeki64
56#define ENOTSUP 4096
19cb3738 57#define ENOMEDIUM 4097
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58extern int qemu_ftruncate64(int, int64_t);
59#define ftruncate qemu_ftruncate64
60
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61
62static inline char *realpath(const char *path, char *resolved_path)
63{
64 _fullpath(resolved_path, path, _MAX_PATH);
65 return resolved_path;
66}
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67
68#define PRId64 "I64d"
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69#define PRIx64 "I64x"
70#define PRIu64 "I64u"
71#define PRIo64 "I64o"
67b915a5 72#endif
8a7ddc38 73
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74#ifdef QEMU_TOOL
75
76/* we use QEMU_TOOL in the command line tools which do not depend on
77 the target CPU type */
78#include "config-host.h"
79#include <setjmp.h>
80#include "osdep.h"
81#include "bswap.h"
82
83#else
84
4f209290 85#include "audio/audio.h"
16f62432 86#include "cpu.h"
1fddef4b 87#include "gdbstub.h"
16f62432 88
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89#endif /* !defined(QEMU_TOOL) */
90
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91#ifndef glue
92#define xglue(x, y) x ## y
93#define glue(x, y) xglue(x, y)
94#define stringify(s) tostring(s)
95#define tostring(s) #s
96#endif
97
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98#ifndef MIN
99#define MIN(a, b) (((a) < (b)) ? (a) : (b))
100#endif
101#ifndef MAX
102#define MAX(a, b) (((a) > (b)) ? (a) : (b))
103#endif
104
33e3963e 105/* vl.c */
80cabfad 106uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 107
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108void hw_error(const char *fmt, ...);
109
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110extern const char *bios_dir;
111
112void pstrcpy(char *buf, int buf_size, const char *str);
113char *pstrcat(char *buf, int buf_size, const char *s);
82c643ff 114int strstart(const char *str, const char *val, const char **ptr);
c4b1fcc0 115
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116extern int vm_running;
117
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118typedef struct vm_change_state_entry VMChangeStateEntry;
119typedef void VMChangeStateHandler(void *opaque, int running);
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120typedef void VMStopHandler(void *opaque, int reason);
121
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122VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
123 void *opaque);
124void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
125
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126int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
127void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
128
129void vm_start(void);
130void vm_stop(int reason);
131
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132typedef void QEMUResetHandler(void *opaque);
133
134void qemu_register_reset(QEMUResetHandler *func, void *opaque);
135void qemu_system_reset_request(void);
136void qemu_system_shutdown_request(void);
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137void qemu_system_powerdown_request(void);
138#if !defined(TARGET_SPARC)
139// Please implement a power failure function to signal the OS
140#define qemu_system_powerdown() do{}while(0)
141#else
142void qemu_system_powerdown(void);
143#endif
bb0c6722 144
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145void main_loop_wait(int timeout);
146
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147extern int ram_size;
148extern int bios_size;
ee22c2f7 149extern int rtc_utc;
1f04275e 150extern int cirrus_vga_enabled;
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151extern int graphic_width;
152extern int graphic_height;
153extern int graphic_depth;
3d11d0eb 154extern const char *keyboard_layout;
d993e026 155extern int kqemu_allowed;
a09db21f 156extern int win2k_install_hack;
bb36d470 157extern int usb_enabled;
6a00d601 158extern int smp_cpus;
667accab 159extern int no_quit;
0ced6589 160
9ae02555
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161#define MAX_OPTION_ROMS 16
162extern const char *option_rom[MAX_OPTION_ROMS];
163extern int nb_option_roms;
164
0ced6589 165/* XXX: make it dynamic */
75956cf0 166#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
d5295253 167#define BIOS_SIZE ((512 + 32) * 1024)
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168#elif defined(TARGET_MIPS)
169#define BIOS_SIZE (128 * 1024)
0ced6589 170#else
7587cf44 171#define BIOS_SIZE ((256 + 64) * 1024)
0ced6589 172#endif
aaaa7df6 173
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174/* keyboard/mouse support */
175
176#define MOUSE_EVENT_LBUTTON 0x01
177#define MOUSE_EVENT_RBUTTON 0x02
178#define MOUSE_EVENT_MBUTTON 0x04
179
180typedef void QEMUPutKBDEvent(void *opaque, int keycode);
181typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
182
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183typedef struct QEMUPutMouseEntry {
184 QEMUPutMouseEvent *qemu_put_mouse_event;
185 void *qemu_put_mouse_event_opaque;
186 int qemu_put_mouse_event_absolute;
187 char *qemu_put_mouse_event_name;
188
189 /* used internally by qemu for handling mice */
190 struct QEMUPutMouseEntry *next;
191} QEMUPutMouseEntry;
192
63066f4f 193void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
455204eb
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194QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
195 void *opaque, int absolute,
196 const char *name);
197void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
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198
199void kbd_put_keycode(int keycode);
200void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
09b26c5e 201int kbd_mouse_is_absolute(void);
63066f4f 202
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203void do_info_mice(void);
204void do_mouse_set(int index);
205
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206/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
207 constants) */
208#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
209#define QEMU_KEY_BACKSPACE 0x007f
210#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
211#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
212#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
213#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
214#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
215#define QEMU_KEY_END QEMU_KEY_ESC1(4)
216#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
217#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
218#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
219
220#define QEMU_KEY_CTRL_UP 0xe400
221#define QEMU_KEY_CTRL_DOWN 0xe401
222#define QEMU_KEY_CTRL_LEFT 0xe402
223#define QEMU_KEY_CTRL_RIGHT 0xe403
224#define QEMU_KEY_CTRL_HOME 0xe404
225#define QEMU_KEY_CTRL_END 0xe405
226#define QEMU_KEY_CTRL_PAGEUP 0xe406
227#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
228
229void kbd_put_keysym(int keysym);
230
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231/* async I/O support */
232
233typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
234typedef int IOCanRWHandler(void *opaque);
7c9d8e07 235typedef void IOHandler(void *opaque);
c20709aa 236
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237int qemu_set_fd_handler2(int fd,
238 IOCanRWHandler *fd_read_poll,
239 IOHandler *fd_read,
240 IOHandler *fd_write,
241 void *opaque);
242int qemu_set_fd_handler(int fd,
243 IOHandler *fd_read,
244 IOHandler *fd_write,
245 void *opaque);
c20709aa 246
f331110f
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247/* Polling handling */
248
249/* return TRUE if no sleep should be done afterwards */
250typedef int PollingFunc(void *opaque);
251
252int qemu_add_polling_cb(PollingFunc *func, void *opaque);
253void qemu_del_polling_cb(PollingFunc *func, void *opaque);
254
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255#ifdef _WIN32
256/* Wait objects handling */
257typedef void WaitObjectFunc(void *opaque);
258
259int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
260void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
261#endif
262
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263/* character device */
264
265#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 266#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
82c643ff 267
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268
269
270#define CHR_IOCTL_SERIAL_SET_PARAMS 1
271typedef struct {
272 int speed;
273 int parity;
274 int data_bits;
275 int stop_bits;
276} QEMUSerialSetParams;
277
278#define CHR_IOCTL_SERIAL_SET_BREAK 2
279
280#define CHR_IOCTL_PP_READ_DATA 3
281#define CHR_IOCTL_PP_WRITE_DATA 4
282#define CHR_IOCTL_PP_READ_CONTROL 5
283#define CHR_IOCTL_PP_WRITE_CONTROL 6
284#define CHR_IOCTL_PP_READ_STATUS 7
285
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286typedef void IOEventHandler(void *opaque, int event);
287
288typedef struct CharDriverState {
289 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
290 void (*chr_add_read_handler)(struct CharDriverState *s,
291 IOCanRWHandler *fd_can_read,
292 IOReadHandler *fd_read, void *opaque);
2122c51a 293 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 294 IOEventHandler *chr_event;
eb45f5fe 295 void (*chr_send_event)(struct CharDriverState *chr, int event);
f331110f 296 void (*chr_close)(struct CharDriverState *chr);
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297 void *opaque;
298} CharDriverState;
299
300void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
301int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 302void qemu_chr_send_event(CharDriverState *s, int event);
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303void qemu_chr_add_read_handler(CharDriverState *s,
304 IOCanRWHandler *fd_can_read,
305 IOReadHandler *fd_read, void *opaque);
306void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
2122c51a 307int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
f8d179e3 308
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309/* consoles */
310
311typedef struct DisplayState DisplayState;
312typedef struct TextConsole TextConsole;
313
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314typedef void (*vga_hw_update_ptr)(void *);
315typedef void (*vga_hw_invalidate_ptr)(void *);
316typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
317
318TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
319 vga_hw_invalidate_ptr invalidate,
320 vga_hw_screen_dump_ptr screen_dump,
321 void *opaque);
322void vga_hw_update(void);
323void vga_hw_invalidate(void);
324void vga_hw_screen_dump(const char *filename);
325
326int is_graphic_console(void);
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327CharDriverState *text_console_init(DisplayState *ds);
328void console_select(unsigned int index);
329
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330/* serial ports */
331
332#define MAX_SERIAL_PORTS 4
333
334extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
335
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336/* parallel ports */
337
338#define MAX_PARALLEL_PORTS 3
339
340extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
341
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342/* VLANs support */
343
344typedef struct VLANClientState VLANClientState;
345
346struct VLANClientState {
347 IOReadHandler *fd_read;
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348 /* Packets may still be sent if this returns zero. It's used to
349 rate-limit the slirp code. */
350 IOCanRWHandler *fd_can_read;
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351 void *opaque;
352 struct VLANClientState *next;
353 struct VLANState *vlan;
354 char info_str[256];
355};
356
357typedef struct VLANState {
358 int id;
359 VLANClientState *first_client;
360 struct VLANState *next;
361} VLANState;
362
363VLANState *qemu_find_vlan(int id);
364VLANClientState *qemu_new_vlan_client(VLANState *vlan,
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365 IOReadHandler *fd_read,
366 IOCanRWHandler *fd_can_read,
367 void *opaque);
368int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 369void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 370void qemu_handler_true(void *opaque);
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371
372void do_info_network(void);
373
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374/* TAP win32 */
375int tap_win32_init(VLANState *vlan, const char *ifname);
7fb843f8 376
7c9d8e07 377/* NIC info */
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378
379#define MAX_NICS 8
380
7c9d8e07 381typedef struct NICInfo {
c4b1fcc0 382 uint8_t macaddr[6];
a41b2ff2 383 const char *model;
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384 VLANState *vlan;
385} NICInfo;
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386
387extern int nb_nics;
7c9d8e07 388extern NICInfo nd_table[MAX_NICS];
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389
390/* timers */
391
392typedef struct QEMUClock QEMUClock;
393typedef struct QEMUTimer QEMUTimer;
394typedef void QEMUTimerCB(void *opaque);
395
396/* The real time clock should be used only for stuff which does not
397 change the virtual machine state, as it is run even if the virtual
69b91039 398 machine is stopped. The real time clock has a frequency of 1000
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399 Hz. */
400extern QEMUClock *rt_clock;
401
e80cfcfc 402/* The virtual clock is only run during the emulation. It is stopped
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403 when the virtual machine is stopped. Virtual timers use a high
404 precision clock, usually cpu cycles (use ticks_per_sec). */
405extern QEMUClock *vm_clock;
406
407int64_t qemu_get_clock(QEMUClock *clock);
408
409QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
410void qemu_free_timer(QEMUTimer *ts);
411void qemu_del_timer(QEMUTimer *ts);
412void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
413int qemu_timer_pending(QEMUTimer *ts);
414
415extern int64_t ticks_per_sec;
416extern int pit_min_timer_count;
417
1dce7c3c 418int64_t cpu_get_ticks(void);
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419void cpu_enable_ticks(void);
420void cpu_disable_ticks(void);
421
422/* VM Load/Save */
423
faea38e7 424typedef struct QEMUFile QEMUFile;
8a7ddc38 425
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426QEMUFile *qemu_fopen(const char *filename, const char *mode);
427void qemu_fflush(QEMUFile *f);
428void qemu_fclose(QEMUFile *f);
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429void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
430void qemu_put_byte(QEMUFile *f, int v);
431void qemu_put_be16(QEMUFile *f, unsigned int v);
432void qemu_put_be32(QEMUFile *f, unsigned int v);
433void qemu_put_be64(QEMUFile *f, uint64_t v);
434int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
435int qemu_get_byte(QEMUFile *f);
436unsigned int qemu_get_be16(QEMUFile *f);
437unsigned int qemu_get_be32(QEMUFile *f);
438uint64_t qemu_get_be64(QEMUFile *f);
439
440static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
441{
442 qemu_put_be64(f, *pv);
443}
444
445static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
446{
447 qemu_put_be32(f, *pv);
448}
449
450static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
451{
452 qemu_put_be16(f, *pv);
453}
454
455static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
456{
457 qemu_put_byte(f, *pv);
458}
459
460static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
461{
462 *pv = qemu_get_be64(f);
463}
464
465static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
466{
467 *pv = qemu_get_be32(f);
468}
469
470static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
471{
472 *pv = qemu_get_be16(f);
473}
474
475static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
476{
477 *pv = qemu_get_byte(f);
478}
479
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480#if TARGET_LONG_BITS == 64
481#define qemu_put_betl qemu_put_be64
482#define qemu_get_betl qemu_get_be64
483#define qemu_put_betls qemu_put_be64s
484#define qemu_get_betls qemu_get_be64s
485#else
486#define qemu_put_betl qemu_put_be32
487#define qemu_get_betl qemu_get_be32
488#define qemu_put_betls qemu_put_be32s
489#define qemu_get_betls qemu_get_be32s
490#endif
491
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492int64_t qemu_ftell(QEMUFile *f);
493int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
494
495typedef void SaveStateHandler(QEMUFile *f, void *opaque);
496typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
497
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498int register_savevm(const char *idstr,
499 int instance_id,
500 int version_id,
501 SaveStateHandler *save_state,
502 LoadStateHandler *load_state,
503 void *opaque);
504void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
505void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 506
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507void cpu_save(QEMUFile *f, void *opaque);
508int cpu_load(QEMUFile *f, void *opaque, int version_id);
509
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510void do_savevm(const char *name);
511void do_loadvm(const char *name);
512void do_delvm(const char *name);
513void do_info_snapshots(void);
514
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515/* bottom halves */
516typedef struct QEMUBH QEMUBH;
517typedef void QEMUBHFunc(void *opaque);
518
519QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
520void qemu_bh_schedule(QEMUBH *bh);
521void qemu_bh_cancel(QEMUBH *bh);
522void qemu_bh_delete(QEMUBH *bh);
6eb5733a 523int qemu_bh_poll(void);
83f64091 524
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525/* block.c */
526typedef struct BlockDriverState BlockDriverState;
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527typedef struct BlockDriver BlockDriver;
528
529extern BlockDriver bdrv_raw;
19cb3738 530extern BlockDriver bdrv_host_device;
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531extern BlockDriver bdrv_cow;
532extern BlockDriver bdrv_qcow;
533extern BlockDriver bdrv_vmdk;
3c56521b 534extern BlockDriver bdrv_cloop;
585d0ed9 535extern BlockDriver bdrv_dmg;
a8753c34 536extern BlockDriver bdrv_bochs;
6a0f9e82 537extern BlockDriver bdrv_vpc;
de167e41 538extern BlockDriver bdrv_vvfat;
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539extern BlockDriver bdrv_qcow2;
540
541typedef struct BlockDriverInfo {
542 /* in bytes, 0 if irrelevant */
543 int cluster_size;
544 /* offset at which the VM state can be saved (0 if not possible) */
545 int64_t vm_state_offset;
546} BlockDriverInfo;
547
548typedef struct QEMUSnapshotInfo {
549 char id_str[128]; /* unique snapshot id */
550 /* the following fields are informative. They are not needed for
551 the consistency of the snapshot */
552 char name[256]; /* user choosen name */
553 uint32_t vm_state_size; /* VM state info size */
554 uint32_t date_sec; /* UTC date of the snapshot */
555 uint32_t date_nsec;
556 uint64_t vm_clock_nsec; /* VM clock relative to boot */
557} QEMUSnapshotInfo;
ea2384d3 558
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559#define BDRV_O_RDONLY 0x0000
560#define BDRV_O_RDWR 0x0002
561#define BDRV_O_ACCESS 0x0003
562#define BDRV_O_CREAT 0x0004 /* create an empty file */
563#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
564#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
565 use a disk image format on top of
566 it (default for
567 bdrv_file_open()) */
568
ea2384d3
FB
569void bdrv_init(void);
570BlockDriver *bdrv_find_format(const char *format_name);
571int bdrv_create(BlockDriver *drv,
572 const char *filename, int64_t size_in_sectors,
573 const char *backing_file, int flags);
c4b1fcc0
FB
574BlockDriverState *bdrv_new(const char *device_name);
575void bdrv_delete(BlockDriverState *bs);
83f64091
FB
576int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
577int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
578int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
ea2384d3 579 BlockDriver *drv);
fc01f7e7
FB
580void bdrv_close(BlockDriverState *bs);
581int bdrv_read(BlockDriverState *bs, int64_t sector_num,
582 uint8_t *buf, int nb_sectors);
583int bdrv_write(BlockDriverState *bs, int64_t sector_num,
584 const uint8_t *buf, int nb_sectors);
83f64091
FB
585int bdrv_pread(BlockDriverState *bs, int64_t offset,
586 void *buf, int count);
587int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
588 const void *buf, int count);
589int bdrv_truncate(BlockDriverState *bs, int64_t offset);
590int64_t bdrv_getlength(BlockDriverState *bs);
fc01f7e7 591void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 592int bdrv_commit(BlockDriverState *bs);
77fef8c1 593void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
83f64091
FB
594/* async block I/O */
595typedef struct BlockDriverAIOCB BlockDriverAIOCB;
596typedef void BlockDriverCompletionFunc(void *opaque, int ret);
597
ce1a14dc
PB
598BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
599 uint8_t *buf, int nb_sectors,
600 BlockDriverCompletionFunc *cb, void *opaque);
601BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
602 const uint8_t *buf, int nb_sectors,
603 BlockDriverCompletionFunc *cb, void *opaque);
83f64091 604void bdrv_aio_cancel(BlockDriverAIOCB *acb);
83f64091
FB
605
606void qemu_aio_init(void);
607void qemu_aio_poll(void);
6192bc37 608void qemu_aio_flush(void);
83f64091
FB
609void qemu_aio_wait_start(void);
610void qemu_aio_wait(void);
611void qemu_aio_wait_end(void);
612
7a6cba61
PB
613/* Ensure contents are flushed to disk. */
614void bdrv_flush(BlockDriverState *bs);
33e3963e 615
c4b1fcc0
FB
616#define BDRV_TYPE_HD 0
617#define BDRV_TYPE_CDROM 1
618#define BDRV_TYPE_FLOPPY 2
4dbb0f50
TS
619#define BIOS_ATA_TRANSLATION_AUTO 0
620#define BIOS_ATA_TRANSLATION_NONE 1
621#define BIOS_ATA_TRANSLATION_LBA 2
622#define BIOS_ATA_TRANSLATION_LARGE 3
623#define BIOS_ATA_TRANSLATION_RECHS 4
c4b1fcc0
FB
624
625void bdrv_set_geometry_hint(BlockDriverState *bs,
626 int cyls, int heads, int secs);
627void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 628void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
c4b1fcc0
FB
629void bdrv_get_geometry_hint(BlockDriverState *bs,
630 int *pcyls, int *pheads, int *psecs);
631int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 632int bdrv_get_translation_hint(BlockDriverState *bs);
c4b1fcc0
FB
633int bdrv_is_removable(BlockDriverState *bs);
634int bdrv_is_read_only(BlockDriverState *bs);
635int bdrv_is_inserted(BlockDriverState *bs);
19cb3738 636int bdrv_media_changed(BlockDriverState *bs);
c4b1fcc0
FB
637int bdrv_is_locked(BlockDriverState *bs);
638void bdrv_set_locked(BlockDriverState *bs, int locked);
19cb3738 639void bdrv_eject(BlockDriverState *bs, int eject_flag);
c4b1fcc0
FB
640void bdrv_set_change_cb(BlockDriverState *bs,
641 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 642void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
c4b1fcc0
FB
643void bdrv_info(void);
644BlockDriverState *bdrv_find(const char *name);
82c643ff 645void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
ea2384d3
FB
646int bdrv_is_encrypted(BlockDriverState *bs);
647int bdrv_set_key(BlockDriverState *bs, const char *key);
648void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
649 void *opaque);
650const char *bdrv_get_device_name(BlockDriverState *bs);
faea38e7
FB
651int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
652 const uint8_t *buf, int nb_sectors);
653int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
c4b1fcc0 654
83f64091
FB
655void bdrv_get_backing_filename(BlockDriverState *bs,
656 char *filename, int filename_size);
faea38e7
FB
657int bdrv_snapshot_create(BlockDriverState *bs,
658 QEMUSnapshotInfo *sn_info);
659int bdrv_snapshot_goto(BlockDriverState *bs,
660 const char *snapshot_id);
661int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
662int bdrv_snapshot_list(BlockDriverState *bs,
663 QEMUSnapshotInfo **psn_info);
664char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
665
666char *get_human_readable_size(char *buf, int buf_size, int64_t size);
83f64091
FB
667int path_is_absolute(const char *path);
668void path_combine(char *dest, int dest_size,
669 const char *base_path,
670 const char *filename);
ea2384d3
FB
671
672#ifndef QEMU_TOOL
54fa5af5
FB
673
674typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
675 int boot_device,
676 DisplayState *ds, const char **fd_filename, int snapshot,
677 const char *kernel_filename, const char *kernel_cmdline,
678 const char *initrd_filename);
679
680typedef struct QEMUMachine {
681 const char *name;
682 const char *desc;
683 QEMUMachineInitFunc *init;
684 struct QEMUMachine *next;
685} QEMUMachine;
686
687int qemu_register_machine(QEMUMachine *m);
688
689typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 690typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 691
26aa7d72
FB
692/* ISA bus */
693
694extern target_phys_addr_t isa_mem_base;
695
696typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
697typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
698
699int register_ioport_read(int start, int length, int size,
700 IOPortReadFunc *func, void *opaque);
701int register_ioport_write(int start, int length, int size,
702 IOPortWriteFunc *func, void *opaque);
69b91039
FB
703void isa_unassign_ioport(int start, int length);
704
aef445bd
PB
705void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
706
69b91039
FB
707/* PCI bus */
708
69b91039
FB
709extern target_phys_addr_t pci_mem_base;
710
46e50e9d 711typedef struct PCIBus PCIBus;
69b91039
FB
712typedef struct PCIDevice PCIDevice;
713
714typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
715 uint32_t address, uint32_t data, int len);
716typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
717 uint32_t address, int len);
718typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
719 uint32_t addr, uint32_t size, int type);
720
721#define PCI_ADDRESS_SPACE_MEM 0x00
722#define PCI_ADDRESS_SPACE_IO 0x01
723#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
724
725typedef struct PCIIORegion {
5768f5ac 726 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
69b91039
FB
727 uint32_t size;
728 uint8_t type;
729 PCIMapIORegionFunc *map_func;
730} PCIIORegion;
731
8a8696a3
FB
732#define PCI_ROM_SLOT 6
733#define PCI_NUM_REGIONS 7
502a5395
PB
734
735#define PCI_DEVICES_MAX 64
736
737#define PCI_VENDOR_ID 0x00 /* 16 bits */
738#define PCI_DEVICE_ID 0x02 /* 16 bits */
739#define PCI_COMMAND 0x04 /* 16 bits */
740#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
741#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
742#define PCI_CLASS_DEVICE 0x0a /* Device class */
743#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
744#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
745#define PCI_MIN_GNT 0x3e /* 8 bits */
746#define PCI_MAX_LAT 0x3f /* 8 bits */
747
69b91039
FB
748struct PCIDevice {
749 /* PCI config space */
750 uint8_t config[256];
751
752 /* the following fields are read only */
46e50e9d 753 PCIBus *bus;
69b91039
FB
754 int devfn;
755 char name[64];
8a8696a3 756 PCIIORegion io_regions[PCI_NUM_REGIONS];
69b91039
FB
757
758 /* do not access the following fields */
759 PCIConfigReadFunc *config_read;
760 PCIConfigWriteFunc *config_write;
502a5395 761 /* ??? This is a PC-specific hack, and should be removed. */
5768f5ac 762 int irq_index;
d2b59317
PB
763
764 /* Current IRQ levels. Used internally by the generic PCI code. */
765 int irq_state[4];
69b91039
FB
766};
767
46e50e9d
FB
768PCIDevice *pci_register_device(PCIBus *bus, const char *name,
769 int instance_size, int devfn,
69b91039
FB
770 PCIConfigReadFunc *config_read,
771 PCIConfigWriteFunc *config_write);
772
773void pci_register_io_region(PCIDevice *pci_dev, int region_num,
774 uint32_t size, int type,
775 PCIMapIORegionFunc *map_func);
776
5768f5ac
FB
777void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
778
779uint32_t pci_default_read_config(PCIDevice *d,
780 uint32_t address, int len);
781void pci_default_write_config(PCIDevice *d,
782 uint32_t address, uint32_t val, int len);
89b6b508
FB
783void pci_device_save(PCIDevice *s, QEMUFile *f);
784int pci_device_load(PCIDevice *s, QEMUFile *f);
5768f5ac 785
d2b59317
PB
786typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
787typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
788PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
80b3ada7 789 void *pic, int devfn_min, int nirq);
502a5395
PB
790
791void pci_nic_init(PCIBus *bus, NICInfo *nd);
792void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
793uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
794int pci_bus_num(PCIBus *s);
80b3ada7 795void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
9995c51f 796
5768f5ac 797void pci_info(void);
80b3ada7
PB
798PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
799 pci_map_irq_fn map_irq, const char *name);
26aa7d72 800
502a5395 801/* prep_pci.c */
46e50e9d 802PCIBus *pci_prep_init(void);
77d4bc34 803
502a5395
PB
804/* grackle_pci.c */
805PCIBus *pci_grackle_init(uint32_t base, void *pic);
806
807/* unin_pci.c */
808PCIBus *pci_pmac_init(void *pic);
809
810/* apb_pci.c */
811PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
812 void *pic);
813
e69954b9 814PCIBus *pci_vpb_init(void *pic, int irq, int realview);
502a5395
PB
815
816/* piix_pci.c */
f00fc47c
FB
817PCIBus *i440fx_init(PCIDevice **pi440fx_state);
818void i440fx_set_smm(PCIDevice *d, int val);
502a5395 819int piix3_init(PCIBus *bus);
f00fc47c 820void i440fx_init_memory_mappings(PCIDevice *d);
a41b2ff2 821
28b9b5af
FB
822/* openpic.c */
823typedef struct openpic_t openpic_t;
54fa5af5 824void openpic_set_irq(void *opaque, int n_IRQ, int level);
7668a27f
FB
825openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
826 CPUState **envp);
28b9b5af 827
54fa5af5
FB
828/* heathrow_pic.c */
829typedef struct HeathrowPICS HeathrowPICS;
830void heathrow_pic_set_irq(void *opaque, int num, int level);
831HeathrowPICS *heathrow_pic_init(int *pmem_index);
832
6a36d84e
FB
833#ifdef HAS_AUDIO
834struct soundhw {
835 const char *name;
836 const char *descr;
837 int enabled;
838 int isa;
839 union {
840 int (*init_isa) (AudioState *s);
841 int (*init_pci) (PCIBus *bus, AudioState *s);
842 } init;
843};
844
845extern struct soundhw soundhw[];
846#endif
847
313aa567
FB
848/* vga.c */
849
74a14f22 850#define VGA_RAM_SIZE (8192 * 1024)
313aa567 851
82c643ff 852struct DisplayState {
313aa567
FB
853 uint8_t *data;
854 int linesize;
855 int depth;
d3079cd2 856 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
82c643ff
FB
857 int width;
858 int height;
24236869
FB
859 void *opaque;
860
313aa567
FB
861 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
862 void (*dpy_resize)(struct DisplayState *s, int w, int h);
863 void (*dpy_refresh)(struct DisplayState *s);
24236869 864 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
82c643ff 865};
313aa567
FB
866
867static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
868{
869 s->dpy_update(s, x, y, w, h);
870}
871
872static inline void dpy_resize(DisplayState *s, int w, int h)
873{
874 s->dpy_resize(s, w, h);
875}
876
89b6b508
FB
877int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
878 unsigned long vga_ram_offset, int vga_ram_size);
879int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
880 unsigned long vga_ram_offset, int vga_ram_size,
881 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 882
d6bfa22f 883/* cirrus_vga.c */
46e50e9d 884void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 885 unsigned long vga_ram_offset, int vga_ram_size);
d6bfa22f
FB
886void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
887 unsigned long vga_ram_offset, int vga_ram_size);
888
313aa567 889/* sdl.c */
d63d307f 890void sdl_display_init(DisplayState *ds, int full_screen);
313aa567 891
da4dbf74
FB
892/* cocoa.m */
893void cocoa_display_init(DisplayState *ds, int full_screen);
894
24236869 895/* vnc.c */
73fc9742 896void vnc_display_init(DisplayState *ds, const char *display);
24236869 897
5391d806
FB
898/* ide.c */
899#define MAX_DISKS 4
900
faea38e7 901extern BlockDriverState *bs_table[MAX_DISKS + 1];
5391d806 902
69b91039
FB
903void isa_ide_init(int iobase, int iobase2, int irq,
904 BlockDriverState *hd0, BlockDriverState *hd1);
54fa5af5
FB
905void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
906 int secondary_ide_enabled);
502a5395 907void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
28b9b5af 908int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 909 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 910
2e5d83bb
PB
911/* cdrom.c */
912int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
913int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
914
1d14ffa9 915/* es1370.c */
c0fe3827 916int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 917
fb065187 918/* sb16.c */
c0fe3827 919int SB16_init (AudioState *s);
fb065187
FB
920
921/* adlib.c */
c0fe3827 922int Adlib_init (AudioState *s);
fb065187
FB
923
924/* gus.c */
c0fe3827 925int GUS_init (AudioState *s);
27503323
FB
926
927/* dma.c */
85571bc7 928typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 929int DMA_get_channel_mode (int nchan);
85571bc7
FB
930int DMA_read_memory (int nchan, void *buf, int pos, int size);
931int DMA_write_memory (int nchan, void *buf, int pos, int size);
27503323
FB
932void DMA_hold_DREQ (int nchan);
933void DMA_release_DREQ (int nchan);
16f62432 934void DMA_schedule(int nchan);
27503323 935void DMA_run (void);
28b9b5af 936void DMA_init (int high_page_enable);
27503323 937void DMA_register_channel (int nchan,
85571bc7
FB
938 DMA_transfer_handler transfer_handler,
939 void *opaque);
7138fcfb
FB
940/* fdc.c */
941#define MAX_FD 2
942extern BlockDriverState *fd_table[MAX_FD];
943
baca51fa
FB
944typedef struct fdctrl_t fdctrl_t;
945
946fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
947 uint32_t io_base,
948 BlockDriverState **fds);
949int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 950
80cabfad
FB
951/* ne2000.c */
952
7c9d8e07
FB
953void isa_ne2000_init(int base, int irq, NICInfo *nd);
954void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
80cabfad 955
a41b2ff2
PB
956/* rtl8139.c */
957
958void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
959
e3c2613f
FB
960/* pcnet.c */
961
962void pci_pcnet_init(PCIBus *bus, NICInfo *nd);
67e999be
FB
963void pcnet_h_reset(void *opaque);
964void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
965
e3c2613f 966
80cabfad
FB
967/* pckbd.c */
968
80cabfad
FB
969void kbd_init(void);
970
971/* mc146818rtc.c */
972
8a7ddc38 973typedef struct RTCState RTCState;
80cabfad 974
8a7ddc38
FB
975RTCState *rtc_init(int base, int irq);
976void rtc_set_memory(RTCState *s, int addr, int val);
977void rtc_set_date(RTCState *s, const struct tm *tm);
80cabfad
FB
978
979/* serial.c */
980
c4b1fcc0 981typedef struct SerialState SerialState;
e5d13e2f
FB
982SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
983 int base, int irq, CharDriverState *chr);
984SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
985 target_ulong base, int it_shift,
986 int irq, CharDriverState *chr);
80cabfad 987
6508fe59
FB
988/* parallel.c */
989
990typedef struct ParallelState ParallelState;
991ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
992
80cabfad
FB
993/* i8259.c */
994
3de388f6
FB
995typedef struct PicState2 PicState2;
996extern PicState2 *isa_pic;
80cabfad 997void pic_set_irq(int irq, int level);
54fa5af5 998void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 999PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
d592d303
FB
1000void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
1001 void *alt_irq_opaque);
3de388f6
FB
1002int pic_read_irq(PicState2 *s);
1003void pic_update_irq(PicState2 *s);
1004uint32_t pic_intack_read(PicState2 *s);
c20709aa 1005void pic_info(void);
4a0fb71e 1006void irq_info(void);
80cabfad 1007
c27004ec 1008/* APIC */
d592d303
FB
1009typedef struct IOAPICState IOAPICState;
1010
c27004ec
FB
1011int apic_init(CPUState *env);
1012int apic_get_interrupt(CPUState *env);
d592d303
FB
1013IOAPICState *ioapic_init(void);
1014void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 1015
80cabfad
FB
1016/* i8254.c */
1017
1018#define PIT_FREQ 1193182
1019
ec844b96
FB
1020typedef struct PITState PITState;
1021
1022PITState *pit_init(int base, int irq);
1023void pit_set_gate(PITState *pit, int channel, int val);
1024int pit_get_gate(PITState *pit, int channel);
fd06c375
FB
1025int pit_get_initial_count(PITState *pit, int channel);
1026int pit_get_mode(PITState *pit, int channel);
ec844b96 1027int pit_get_out(PITState *pit, int channel, int64_t current_time);
80cabfad 1028
fd06c375
FB
1029/* pcspk.c */
1030void pcspk_init(PITState *);
1031int pcspk_audio_init(AudioState *);
1032
6515b203
FB
1033/* acpi.c */
1034extern int acpi_enabled;
502a5395 1035void piix4_pm_init(PCIBus *bus, int devfn);
6515b203
FB
1036void acpi_bios_init(void);
1037
80cabfad 1038/* pc.c */
54fa5af5 1039extern QEMUMachine pc_machine;
3dbbdc25 1040extern QEMUMachine isapc_machine;
52ca8d6a 1041extern int fd_bootchk;
80cabfad 1042
6a00d601
FB
1043void ioport_set_a20(int enable);
1044int ioport_get_a20(void);
1045
26aa7d72 1046/* ppc.c */
54fa5af5
FB
1047extern QEMUMachine prep_machine;
1048extern QEMUMachine core99_machine;
1049extern QEMUMachine heathrow_machine;
1050
6af0bf9c
FB
1051/* mips_r4k.c */
1052extern QEMUMachine mips_machine;
1053
e16fe40c
TS
1054/* mips_timer.c */
1055extern void cpu_mips_clock_init(CPUState *);
1056extern void cpu_mips_irqctrl_init (void);
1057
27c7ca7e
FB
1058/* shix.c */
1059extern QEMUMachine shix_machine;
1060
8cc43fef
FB
1061#ifdef TARGET_PPC
1062ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1063#endif
64201201 1064void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
77d4bc34
FB
1065
1066extern CPUWriteMemoryFunc *PPC_io_write[];
1067extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 1068void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 1069
e95c8d51 1070/* sun4m.c */
54fa5af5 1071extern QEMUMachine sun4m_machine;
ba3c64fb 1072void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
e95c8d51
FB
1073
1074/* iommu.c */
e80cfcfc 1075void *iommu_init(uint32_t addr);
67e999be 1076void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
a917d384 1077 uint8_t *buf, int len, int is_write);
67e999be
FB
1078static inline void sparc_iommu_memory_read(void *opaque,
1079 target_phys_addr_t addr,
1080 uint8_t *buf, int len)
1081{
1082 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1083}
e95c8d51 1084
67e999be
FB
1085static inline void sparc_iommu_memory_write(void *opaque,
1086 target_phys_addr_t addr,
1087 uint8_t *buf, int len)
1088{
1089 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1090}
e95c8d51
FB
1091
1092/* tcx.c */
95219897 1093void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 1094 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
FB
1095
1096/* slavio_intctl.c */
1097void *slavio_intctl_init();
ba3c64fb 1098void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
FB
1099void slavio_pic_info(void *opaque);
1100void slavio_irq_info(void *opaque);
1101void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 1102void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51 1103
5fe141fd
FB
1104/* loader.c */
1105int get_image_size(const char *filename);
1106int load_image(const char *filename, uint8_t *addr);
9ee3c029 1107int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
e80cfcfc
FB
1108int load_aout(const char *filename, uint8_t *addr);
1109
1110/* slavio_timer.c */
ba3c64fb 1111void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 1112
e80cfcfc
FB
1113/* slavio_serial.c */
1114SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1115void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 1116
3475187d
FB
1117/* slavio_misc.c */
1118void *slavio_misc_init(uint32_t base, int irq);
1119void slavio_set_power_fail(void *opaque, int power_failing);
1120
6f7e9aec 1121/* esp.c */
fa1fb14c 1122void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
67e999be
FB
1123void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1124void esp_reset(void *opaque);
1125
1126/* sparc32_dma.c */
1127void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1128 void *intctl);
1129void ledma_set_irq(void *opaque, int isr);
9b94dc32
FB
1130void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1131 uint8_t *buf, int len, int do_bswap);
1132void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1133 uint8_t *buf, int len, int do_bswap);
67e999be
FB
1134void espdma_raise_irq(void *opaque);
1135void espdma_clear_irq(void *opaque);
1136void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1137void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1138void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1139 void *lance_opaque);
6f7e9aec 1140
b8174937
FB
1141/* cs4231.c */
1142void cs_init(target_phys_addr_t base, int irq, void *intctl);
1143
3475187d
FB
1144/* sun4u.c */
1145extern QEMUMachine sun4u_machine;
1146
64201201
FB
1147/* NVRAM helpers */
1148#include "hw/m48t59.h"
1149
1150void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1151uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1152void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1153uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1154void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1155uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1156void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1157 const unsigned char *str, uint32_t max);
1158int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1159void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1160 uint32_t start, uint32_t count);
1161int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1162 const unsigned char *arch,
1163 uint32_t RAM_size, int boot_device,
1164 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 1165 const char *cmdline,
64201201 1166 uint32_t initrd_image, uint32_t initrd_size,
28b9b5af
FB
1167 uint32_t NVRAM_image,
1168 int width, int height, int depth);
64201201 1169
63066f4f
FB
1170/* adb.c */
1171
1172#define MAX_ADB_DEVICES 16
1173
e2733d20 1174#define ADB_MAX_OUT_LEN 16
63066f4f 1175
e2733d20 1176typedef struct ADBDevice ADBDevice;
63066f4f 1177
e2733d20
FB
1178/* buf = NULL means polling */
1179typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1180 const uint8_t *buf, int len);
12c28fed
FB
1181typedef int ADBDeviceReset(ADBDevice *d);
1182
63066f4f
FB
1183struct ADBDevice {
1184 struct ADBBusState *bus;
1185 int devaddr;
1186 int handler;
e2733d20 1187 ADBDeviceRequest *devreq;
12c28fed 1188 ADBDeviceReset *devreset;
63066f4f
FB
1189 void *opaque;
1190};
1191
1192typedef struct ADBBusState {
1193 ADBDevice devices[MAX_ADB_DEVICES];
1194 int nb_devices;
e2733d20 1195 int poll_index;
63066f4f
FB
1196} ADBBusState;
1197
e2733d20
FB
1198int adb_request(ADBBusState *s, uint8_t *buf_out,
1199 const uint8_t *buf, int len);
1200int adb_poll(ADBBusState *s, uint8_t *buf_out);
63066f4f
FB
1201
1202ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 1203 ADBDeviceRequest *devreq,
12c28fed 1204 ADBDeviceReset *devreset,
63066f4f
FB
1205 void *opaque);
1206void adb_kbd_init(ADBBusState *bus);
1207void adb_mouse_init(ADBBusState *bus);
1208
1209/* cuda.c */
1210
1211extern ADBBusState adb_bus;
54fa5af5 1212int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 1213
bb36d470
FB
1214#include "hw/usb.h"
1215
a594cfbf
FB
1216/* usb ports of the VM */
1217
0d92ed30
PB
1218void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1219 usb_attachfn attach);
a594cfbf 1220
0d92ed30 1221#define VM_USB_HUB_SIZE 8
a594cfbf
FB
1222
1223void do_usb_add(const char *devname);
1224void do_usb_del(const char *devname);
1225void usb_info(void);
1226
2e5d83bb 1227/* scsi-disk.c */
4d611c9a
PB
1228enum scsi_reason {
1229 SCSI_REASON_DONE, /* Command complete. */
1230 SCSI_REASON_DATA /* Transfer complete, more data required. */
1231};
1232
2e5d83bb 1233typedef struct SCSIDevice SCSIDevice;
a917d384
PB
1234typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1235 uint32_t arg);
2e5d83bb
PB
1236
1237SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
a917d384 1238 int tcq,
2e5d83bb
PB
1239 scsi_completionfn completion,
1240 void *opaque);
1241void scsi_disk_destroy(SCSIDevice *s);
1242
0fc5c15a 1243int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
4d611c9a
PB
1244/* SCSI data transfers are asynchrnonous. However, unlike the block IO
1245 layer the completion routine may be called directly by
1246 scsi_{read,write}_data. */
a917d384
PB
1247void scsi_read_data(SCSIDevice *s, uint32_t tag);
1248int scsi_write_data(SCSIDevice *s, uint32_t tag);
1249void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1250uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
2e5d83bb 1251
42550fde 1252enum scsi_host_adapters {
fa1fb14c
TS
1253 SCSI_LSI_53C895A,
1254 SCSI_ESP
42550fde
TS
1255};
1256enum scsi_devices {
1257 SCSI_CDROM,
1258 SCSI_DISK,
1259 SCSI_NONE
1260};
1261typedef enum scsi_host_adapters scsi_host_adapters;
1262typedef enum scsi_devices scsi_devices;
1263typedef struct SCSIDiskInfo {
1264 scsi_host_adapters adapter;
1265 int id;
1266 scsi_devices device_type;
1267} SCSIDiskInfo;
1268
1269#define MAX_SCSI_DISKS 7
1270extern BlockDriverState *bs_scsi_table[MAX_SCSI_DISKS];
1271extern SCSIDiskInfo scsi_disks_info[MAX_SCSI_DISKS];
1272
7d8406be
PB
1273/* lsi53c895a.c */
1274void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1275void *lsi_scsi_init(PCIBus *bus, int devfn);
42550fde 1276extern int scsi_hba_lsi; // Count of scsi disks/cdrom using this lsi adapter
7d8406be 1277
b5ff1b31 1278/* integratorcp.c */
40f137e1
PB
1279extern QEMUMachine integratorcp926_machine;
1280extern QEMUMachine integratorcp1026_machine;
b5ff1b31 1281
cdbdb648
PB
1282/* versatilepb.c */
1283extern QEMUMachine versatilepb_machine;
16406950 1284extern QEMUMachine versatileab_machine;
cdbdb648 1285
e69954b9
PB
1286/* realview.c */
1287extern QEMUMachine realview_machine;
1288
daa57963
FB
1289/* ps2.c */
1290void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1291void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1292void ps2_write_mouse(void *, int val);
1293void ps2_write_keyboard(void *, int val);
1294uint32_t ps2_read_data(void *);
1295void ps2_queue(void *, int b);
f94f5d71 1296void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 1297
80337b66
FB
1298/* smc91c111.c */
1299void smc91c111_init(NICInfo *, uint32_t, void *, int);
1300
bdd5003a 1301/* pl110.c */
95219897 1302void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
bdd5003a 1303
cdbdb648
PB
1304/* pl011.c */
1305void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1306
1307/* pl050.c */
1308void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1309
1310/* pl080.c */
e69954b9 1311void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
cdbdb648
PB
1312
1313/* pl190.c */
1314void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1315
1316/* arm-timer.c */
1317void sp804_init(uint32_t base, void *pic, int irq);
1318void icp_pit_init(uint32_t base, void *pic, int irq);
1319
e69954b9
PB
1320/* arm_sysctl.c */
1321void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1322
1323/* arm_gic.c */
1324void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1325
16406950
PB
1326/* arm_boot.c */
1327
1328void arm_load_kernel(int ram_size, const char *kernel_filename,
1329 const char *kernel_cmdline, const char *initrd_filename,
1330 int board_id);
1331
27c7ca7e
FB
1332/* sh7750.c */
1333struct SH7750State;
1334
008a8818 1335struct SH7750State *sh7750_init(CPUState * cpu);
27c7ca7e
FB
1336
1337typedef struct {
1338 /* The callback will be triggered if any of the designated lines change */
1339 uint16_t portamask_trigger;
1340 uint16_t portbmask_trigger;
1341 /* Return 0 if no action was taken */
1342 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1343 uint16_t * periph_pdtra,
1344 uint16_t * periph_portdira,
1345 uint16_t * periph_pdtrb,
1346 uint16_t * periph_portdirb);
1347} sh7750_io_device;
1348
1349int sh7750_register_io_device(struct SH7750State *s,
1350 sh7750_io_device * device);
1351/* tc58128.c */
1352int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1353
29133e9a
FB
1354/* NOR flash devices */
1355typedef struct pflash_t pflash_t;
1356
1357pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1358 BlockDriverState *bs,
1359 target_ulong sector_len, int nb_blocs, int width,
1360 uint16_t id0, uint16_t id1,
1361 uint16_t id2, uint16_t id3);
1362
ea2384d3
FB
1363#endif /* defined(QEMU_TOOL) */
1364
c4b1fcc0 1365/* monitor.c */
82c643ff 1366void monitor_init(CharDriverState *hd, int show_banner);
ea2384d3
FB
1367void term_puts(const char *str);
1368void term_vprintf(const char *fmt, va_list ap);
40c3bac3 1369void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
fef30743 1370void term_print_filename(const char *filename);
c4b1fcc0
FB
1371void term_flush(void);
1372void term_print_help(void);
ea2384d3
FB
1373void monitor_readline(const char *prompt, int is_password,
1374 char *buf, int buf_size);
1375
1376/* readline.c */
1377typedef void ReadLineFunc(void *opaque, const char *str);
1378
1379extern int completion_index;
1380void add_completion(const char *str);
1381void readline_handle_byte(int ch);
1382void readline_find_completion(const char *cmdline);
1383const char *readline_get_history(unsigned int index);
1384void readline_start(const char *prompt, int is_password,
1385 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1386
5e6ad6f9
FB
1387void kqemu_record_dump(void);
1388
fc01f7e7 1389#endif /* VL_H */
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