]> Git Repo - qemu.git/blame - vl.h
Make the tarball's VERSION part overridable from make invocation.
[qemu.git] / vl.h
CommitLineData
fc01f7e7
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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
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35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
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40
41#ifndef O_LARGEFILE
42#define O_LARGEFILE 0
43#endif
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44#ifndef O_BINARY
45#define O_BINARY 0
46#endif
67b915a5 47
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48#ifdef __sun__
49#define ENOMEDIUM 4097
50#endif
51
67b915a5 52#ifdef _WIN32
a18e524a 53#include <windows.h>
ac62f715 54#define fsync _commit
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55#define lseek _lseeki64
56#define ENOTSUP 4096
19cb3738 57#define ENOMEDIUM 4097
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58extern int qemu_ftruncate64(int, int64_t);
59#define ftruncate qemu_ftruncate64
60
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61
62static inline char *realpath(const char *path, char *resolved_path)
63{
64 _fullpath(resolved_path, path, _MAX_PATH);
65 return resolved_path;
66}
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67
68#define PRId64 "I64d"
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69#define PRIx64 "I64x"
70#define PRIu64 "I64u"
71#define PRIo64 "I64o"
67b915a5 72#endif
8a7ddc38 73
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74#ifdef QEMU_TOOL
75
76/* we use QEMU_TOOL in the command line tools which do not depend on
77 the target CPU type */
78#include "config-host.h"
79#include <setjmp.h>
80#include "osdep.h"
81#include "bswap.h"
82
83#else
84
4f209290 85#include "audio/audio.h"
16f62432 86#include "cpu.h"
1fddef4b 87#include "gdbstub.h"
16f62432 88
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89#endif /* !defined(QEMU_TOOL) */
90
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91#ifndef glue
92#define xglue(x, y) x ## y
93#define glue(x, y) xglue(x, y)
94#define stringify(s) tostring(s)
95#define tostring(s) #s
96#endif
97
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98#ifndef MIN
99#define MIN(a, b) (((a) < (b)) ? (a) : (b))
100#endif
101#ifndef MAX
102#define MAX(a, b) (((a) > (b)) ? (a) : (b))
103#endif
104
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105/* cutils.c */
106void pstrcpy(char *buf, int buf_size, const char *str);
107char *pstrcat(char *buf, int buf_size, const char *s);
108int strstart(const char *str, const char *val, const char **ptr);
109int stristart(const char *str, const char *val, const char **ptr);
110
33e3963e 111/* vl.c */
80cabfad 112uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 113
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114void hw_error(const char *fmt, ...);
115
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116extern const char *bios_dir;
117
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118extern int vm_running;
119
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120typedef struct vm_change_state_entry VMChangeStateEntry;
121typedef void VMChangeStateHandler(void *opaque, int running);
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122typedef void VMStopHandler(void *opaque, int reason);
123
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124VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
125 void *opaque);
126void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
127
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128int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
129void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
130
131void vm_start(void);
132void vm_stop(int reason);
133
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134typedef void QEMUResetHandler(void *opaque);
135
136void qemu_register_reset(QEMUResetHandler *func, void *opaque);
137void qemu_system_reset_request(void);
138void qemu_system_shutdown_request(void);
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139void qemu_system_powerdown_request(void);
140#if !defined(TARGET_SPARC)
141// Please implement a power failure function to signal the OS
142#define qemu_system_powerdown() do{}while(0)
143#else
144void qemu_system_powerdown(void);
145#endif
bb0c6722 146
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147void main_loop_wait(int timeout);
148
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149extern int ram_size;
150extern int bios_size;
ee22c2f7 151extern int rtc_utc;
1f04275e 152extern int cirrus_vga_enabled;
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153extern int graphic_width;
154extern int graphic_height;
155extern int graphic_depth;
3d11d0eb 156extern const char *keyboard_layout;
d993e026 157extern int kqemu_allowed;
a09db21f 158extern int win2k_install_hack;
bb36d470 159extern int usb_enabled;
6a00d601 160extern int smp_cpus;
667accab 161extern int no_quit;
8e71621f 162extern int semihosting_enabled;
3c07f8e8 163extern int autostart;
0ced6589 164
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165#define MAX_OPTION_ROMS 16
166extern const char *option_rom[MAX_OPTION_ROMS];
167extern int nb_option_roms;
168
0ced6589 169/* XXX: make it dynamic */
75956cf0 170#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
d5295253 171#define BIOS_SIZE ((512 + 32) * 1024)
6af0bf9c 172#elif defined(TARGET_MIPS)
567daa49 173#define BIOS_SIZE (4 * 1024 * 1024)
0ced6589 174#else
7587cf44 175#define BIOS_SIZE ((256 + 64) * 1024)
0ced6589 176#endif
aaaa7df6 177
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178/* keyboard/mouse support */
179
180#define MOUSE_EVENT_LBUTTON 0x01
181#define MOUSE_EVENT_RBUTTON 0x02
182#define MOUSE_EVENT_MBUTTON 0x04
183
184typedef void QEMUPutKBDEvent(void *opaque, int keycode);
185typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
186
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187typedef struct QEMUPutMouseEntry {
188 QEMUPutMouseEvent *qemu_put_mouse_event;
189 void *qemu_put_mouse_event_opaque;
190 int qemu_put_mouse_event_absolute;
191 char *qemu_put_mouse_event_name;
192
193 /* used internally by qemu for handling mice */
194 struct QEMUPutMouseEntry *next;
195} QEMUPutMouseEntry;
196
63066f4f 197void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
455204eb
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198QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
199 void *opaque, int absolute,
200 const char *name);
201void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
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202
203void kbd_put_keycode(int keycode);
204void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
09b26c5e 205int kbd_mouse_is_absolute(void);
63066f4f 206
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207void do_info_mice(void);
208void do_mouse_set(int index);
209
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210/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
211 constants) */
212#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
213#define QEMU_KEY_BACKSPACE 0x007f
214#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
215#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
216#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
217#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
218#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
219#define QEMU_KEY_END QEMU_KEY_ESC1(4)
220#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
221#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
222#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
223
224#define QEMU_KEY_CTRL_UP 0xe400
225#define QEMU_KEY_CTRL_DOWN 0xe401
226#define QEMU_KEY_CTRL_LEFT 0xe402
227#define QEMU_KEY_CTRL_RIGHT 0xe403
228#define QEMU_KEY_CTRL_HOME 0xe404
229#define QEMU_KEY_CTRL_END 0xe405
230#define QEMU_KEY_CTRL_PAGEUP 0xe406
231#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
232
233void kbd_put_keysym(int keysym);
234
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235/* async I/O support */
236
237typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
238typedef int IOCanRWHandler(void *opaque);
7c9d8e07 239typedef void IOHandler(void *opaque);
c20709aa 240
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241int qemu_set_fd_handler2(int fd,
242 IOCanRWHandler *fd_read_poll,
243 IOHandler *fd_read,
244 IOHandler *fd_write,
245 void *opaque);
246int qemu_set_fd_handler(int fd,
247 IOHandler *fd_read,
248 IOHandler *fd_write,
249 void *opaque);
c20709aa 250
f331110f
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251/* Polling handling */
252
253/* return TRUE if no sleep should be done afterwards */
254typedef int PollingFunc(void *opaque);
255
256int qemu_add_polling_cb(PollingFunc *func, void *opaque);
257void qemu_del_polling_cb(PollingFunc *func, void *opaque);
258
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259#ifdef _WIN32
260/* Wait objects handling */
261typedef void WaitObjectFunc(void *opaque);
262
263int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
264void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
265#endif
266
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267typedef struct QEMUBH QEMUBH;
268
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269/* character device */
270
271#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 272#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
86e94dea 273#define CHR_EVENT_RESET 2 /* new connection established */
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274
275
276#define CHR_IOCTL_SERIAL_SET_PARAMS 1
277typedef struct {
278 int speed;
279 int parity;
280 int data_bits;
281 int stop_bits;
282} QEMUSerialSetParams;
283
284#define CHR_IOCTL_SERIAL_SET_BREAK 2
285
286#define CHR_IOCTL_PP_READ_DATA 3
287#define CHR_IOCTL_PP_WRITE_DATA 4
288#define CHR_IOCTL_PP_READ_CONTROL 5
289#define CHR_IOCTL_PP_WRITE_CONTROL 6
290#define CHR_IOCTL_PP_READ_STATUS 7
291
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292typedef void IOEventHandler(void *opaque, int event);
293
294typedef struct CharDriverState {
295 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
296 void (*chr_add_read_handler)(struct CharDriverState *s,
297 IOCanRWHandler *fd_can_read,
298 IOReadHandler *fd_read, void *opaque);
2122c51a 299 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 300 IOEventHandler *chr_event;
eb45f5fe 301 void (*chr_send_event)(struct CharDriverState *chr, int event);
f331110f 302 void (*chr_close)(struct CharDriverState *chr);
82c643ff 303 void *opaque;
86e94dea 304 QEMUBH *bh;
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305} CharDriverState;
306
5856de80 307CharDriverState *qemu_chr_open(const char *filename);
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308void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
309int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 310void qemu_chr_send_event(CharDriverState *s, int event);
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311void qemu_chr_add_read_handler(CharDriverState *s,
312 IOCanRWHandler *fd_can_read,
313 IOReadHandler *fd_read, void *opaque);
314void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
2122c51a 315int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
86e94dea 316void qemu_chr_reset(CharDriverState *s);
f8d179e3 317
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318/* consoles */
319
320typedef struct DisplayState DisplayState;
321typedef struct TextConsole TextConsole;
322
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323typedef void (*vga_hw_update_ptr)(void *);
324typedef void (*vga_hw_invalidate_ptr)(void *);
325typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
326
327TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
328 vga_hw_invalidate_ptr invalidate,
329 vga_hw_screen_dump_ptr screen_dump,
330 void *opaque);
331void vga_hw_update(void);
332void vga_hw_invalidate(void);
333void vga_hw_screen_dump(const char *filename);
334
335int is_graphic_console(void);
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336CharDriverState *text_console_init(DisplayState *ds);
337void console_select(unsigned int index);
338
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339/* serial ports */
340
341#define MAX_SERIAL_PORTS 4
342
343extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
344
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345/* parallel ports */
346
347#define MAX_PARALLEL_PORTS 3
348
349extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
350
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351/* VLANs support */
352
353typedef struct VLANClientState VLANClientState;
354
355struct VLANClientState {
356 IOReadHandler *fd_read;
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357 /* Packets may still be sent if this returns zero. It's used to
358 rate-limit the slirp code. */
359 IOCanRWHandler *fd_can_read;
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360 void *opaque;
361 struct VLANClientState *next;
362 struct VLANState *vlan;
363 char info_str[256];
364};
365
366typedef struct VLANState {
367 int id;
368 VLANClientState *first_client;
369 struct VLANState *next;
370} VLANState;
371
372VLANState *qemu_find_vlan(int id);
373VLANClientState *qemu_new_vlan_client(VLANState *vlan,
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374 IOReadHandler *fd_read,
375 IOCanRWHandler *fd_can_read,
376 void *opaque);
377int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 378void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 379void qemu_handler_true(void *opaque);
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380
381void do_info_network(void);
382
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383/* TAP win32 */
384int tap_win32_init(VLANState *vlan, const char *ifname);
7fb843f8 385
7c9d8e07 386/* NIC info */
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387
388#define MAX_NICS 8
389
7c9d8e07 390typedef struct NICInfo {
c4b1fcc0 391 uint8_t macaddr[6];
a41b2ff2 392 const char *model;
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393 VLANState *vlan;
394} NICInfo;
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395
396extern int nb_nics;
7c9d8e07 397extern NICInfo nd_table[MAX_NICS];
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398
399/* timers */
400
401typedef struct QEMUClock QEMUClock;
402typedef struct QEMUTimer QEMUTimer;
403typedef void QEMUTimerCB(void *opaque);
404
405/* The real time clock should be used only for stuff which does not
406 change the virtual machine state, as it is run even if the virtual
69b91039 407 machine is stopped. The real time clock has a frequency of 1000
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408 Hz. */
409extern QEMUClock *rt_clock;
410
e80cfcfc 411/* The virtual clock is only run during the emulation. It is stopped
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412 when the virtual machine is stopped. Virtual timers use a high
413 precision clock, usually cpu cycles (use ticks_per_sec). */
414extern QEMUClock *vm_clock;
415
416int64_t qemu_get_clock(QEMUClock *clock);
417
418QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
419void qemu_free_timer(QEMUTimer *ts);
420void qemu_del_timer(QEMUTimer *ts);
421void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
422int qemu_timer_pending(QEMUTimer *ts);
423
424extern int64_t ticks_per_sec;
425extern int pit_min_timer_count;
426
1dce7c3c 427int64_t cpu_get_ticks(void);
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428void cpu_enable_ticks(void);
429void cpu_disable_ticks(void);
430
431/* VM Load/Save */
432
faea38e7 433typedef struct QEMUFile QEMUFile;
8a7ddc38 434
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435QEMUFile *qemu_fopen(const char *filename, const char *mode);
436void qemu_fflush(QEMUFile *f);
437void qemu_fclose(QEMUFile *f);
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438void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
439void qemu_put_byte(QEMUFile *f, int v);
440void qemu_put_be16(QEMUFile *f, unsigned int v);
441void qemu_put_be32(QEMUFile *f, unsigned int v);
442void qemu_put_be64(QEMUFile *f, uint64_t v);
443int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
444int qemu_get_byte(QEMUFile *f);
445unsigned int qemu_get_be16(QEMUFile *f);
446unsigned int qemu_get_be32(QEMUFile *f);
447uint64_t qemu_get_be64(QEMUFile *f);
448
449static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
450{
451 qemu_put_be64(f, *pv);
452}
453
454static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
455{
456 qemu_put_be32(f, *pv);
457}
458
459static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
460{
461 qemu_put_be16(f, *pv);
462}
463
464static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
465{
466 qemu_put_byte(f, *pv);
467}
468
469static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
470{
471 *pv = qemu_get_be64(f);
472}
473
474static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
475{
476 *pv = qemu_get_be32(f);
477}
478
479static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
480{
481 *pv = qemu_get_be16(f);
482}
483
484static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
485{
486 *pv = qemu_get_byte(f);
487}
488
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489#if TARGET_LONG_BITS == 64
490#define qemu_put_betl qemu_put_be64
491#define qemu_get_betl qemu_get_be64
492#define qemu_put_betls qemu_put_be64s
493#define qemu_get_betls qemu_get_be64s
494#else
495#define qemu_put_betl qemu_put_be32
496#define qemu_get_betl qemu_get_be32
497#define qemu_put_betls qemu_put_be32s
498#define qemu_get_betls qemu_get_be32s
499#endif
500
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501int64_t qemu_ftell(QEMUFile *f);
502int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
503
504typedef void SaveStateHandler(QEMUFile *f, void *opaque);
505typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
506
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507int register_savevm(const char *idstr,
508 int instance_id,
509 int version_id,
510 SaveStateHandler *save_state,
511 LoadStateHandler *load_state,
512 void *opaque);
513void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
514void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 515
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516void cpu_save(QEMUFile *f, void *opaque);
517int cpu_load(QEMUFile *f, void *opaque, int version_id);
518
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519void do_savevm(const char *name);
520void do_loadvm(const char *name);
521void do_delvm(const char *name);
522void do_info_snapshots(void);
523
83f64091 524/* bottom halves */
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525typedef void QEMUBHFunc(void *opaque);
526
527QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
528void qemu_bh_schedule(QEMUBH *bh);
529void qemu_bh_cancel(QEMUBH *bh);
530void qemu_bh_delete(QEMUBH *bh);
6eb5733a 531int qemu_bh_poll(void);
83f64091 532
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533/* block.c */
534typedef struct BlockDriverState BlockDriverState;
ea2384d3
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535typedef struct BlockDriver BlockDriver;
536
537extern BlockDriver bdrv_raw;
19cb3738 538extern BlockDriver bdrv_host_device;
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539extern BlockDriver bdrv_cow;
540extern BlockDriver bdrv_qcow;
541extern BlockDriver bdrv_vmdk;
3c56521b 542extern BlockDriver bdrv_cloop;
585d0ed9 543extern BlockDriver bdrv_dmg;
a8753c34 544extern BlockDriver bdrv_bochs;
6a0f9e82 545extern BlockDriver bdrv_vpc;
de167e41 546extern BlockDriver bdrv_vvfat;
faea38e7
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547extern BlockDriver bdrv_qcow2;
548
549typedef struct BlockDriverInfo {
550 /* in bytes, 0 if irrelevant */
551 int cluster_size;
552 /* offset at which the VM state can be saved (0 if not possible) */
553 int64_t vm_state_offset;
554} BlockDriverInfo;
555
556typedef struct QEMUSnapshotInfo {
557 char id_str[128]; /* unique snapshot id */
558 /* the following fields are informative. They are not needed for
559 the consistency of the snapshot */
560 char name[256]; /* user choosen name */
561 uint32_t vm_state_size; /* VM state info size */
562 uint32_t date_sec; /* UTC date of the snapshot */
563 uint32_t date_nsec;
564 uint64_t vm_clock_nsec; /* VM clock relative to boot */
565} QEMUSnapshotInfo;
ea2384d3 566
83f64091
FB
567#define BDRV_O_RDONLY 0x0000
568#define BDRV_O_RDWR 0x0002
569#define BDRV_O_ACCESS 0x0003
570#define BDRV_O_CREAT 0x0004 /* create an empty file */
571#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
572#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
573 use a disk image format on top of
574 it (default for
575 bdrv_file_open()) */
576
ea2384d3
FB
577void bdrv_init(void);
578BlockDriver *bdrv_find_format(const char *format_name);
579int bdrv_create(BlockDriver *drv,
580 const char *filename, int64_t size_in_sectors,
581 const char *backing_file, int flags);
c4b1fcc0
FB
582BlockDriverState *bdrv_new(const char *device_name);
583void bdrv_delete(BlockDriverState *bs);
83f64091
FB
584int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
585int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
586int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
ea2384d3 587 BlockDriver *drv);
fc01f7e7
FB
588void bdrv_close(BlockDriverState *bs);
589int bdrv_read(BlockDriverState *bs, int64_t sector_num,
590 uint8_t *buf, int nb_sectors);
591int bdrv_write(BlockDriverState *bs, int64_t sector_num,
592 const uint8_t *buf, int nb_sectors);
83f64091
FB
593int bdrv_pread(BlockDriverState *bs, int64_t offset,
594 void *buf, int count);
595int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
596 const void *buf, int count);
597int bdrv_truncate(BlockDriverState *bs, int64_t offset);
598int64_t bdrv_getlength(BlockDriverState *bs);
fc01f7e7 599void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 600int bdrv_commit(BlockDriverState *bs);
77fef8c1 601void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
83f64091
FB
602/* async block I/O */
603typedef struct BlockDriverAIOCB BlockDriverAIOCB;
604typedef void BlockDriverCompletionFunc(void *opaque, int ret);
605
ce1a14dc
PB
606BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
607 uint8_t *buf, int nb_sectors,
608 BlockDriverCompletionFunc *cb, void *opaque);
609BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
610 const uint8_t *buf, int nb_sectors,
611 BlockDriverCompletionFunc *cb, void *opaque);
83f64091 612void bdrv_aio_cancel(BlockDriverAIOCB *acb);
83f64091
FB
613
614void qemu_aio_init(void);
615void qemu_aio_poll(void);
6192bc37 616void qemu_aio_flush(void);
83f64091
FB
617void qemu_aio_wait_start(void);
618void qemu_aio_wait(void);
619void qemu_aio_wait_end(void);
620
7a6cba61
PB
621/* Ensure contents are flushed to disk. */
622void bdrv_flush(BlockDriverState *bs);
33e3963e 623
c4b1fcc0
FB
624#define BDRV_TYPE_HD 0
625#define BDRV_TYPE_CDROM 1
626#define BDRV_TYPE_FLOPPY 2
4dbb0f50
TS
627#define BIOS_ATA_TRANSLATION_AUTO 0
628#define BIOS_ATA_TRANSLATION_NONE 1
629#define BIOS_ATA_TRANSLATION_LBA 2
630#define BIOS_ATA_TRANSLATION_LARGE 3
631#define BIOS_ATA_TRANSLATION_RECHS 4
c4b1fcc0
FB
632
633void bdrv_set_geometry_hint(BlockDriverState *bs,
634 int cyls, int heads, int secs);
635void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 636void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
c4b1fcc0
FB
637void bdrv_get_geometry_hint(BlockDriverState *bs,
638 int *pcyls, int *pheads, int *psecs);
639int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 640int bdrv_get_translation_hint(BlockDriverState *bs);
c4b1fcc0
FB
641int bdrv_is_removable(BlockDriverState *bs);
642int bdrv_is_read_only(BlockDriverState *bs);
643int bdrv_is_inserted(BlockDriverState *bs);
19cb3738 644int bdrv_media_changed(BlockDriverState *bs);
c4b1fcc0
FB
645int bdrv_is_locked(BlockDriverState *bs);
646void bdrv_set_locked(BlockDriverState *bs, int locked);
19cb3738 647void bdrv_eject(BlockDriverState *bs, int eject_flag);
c4b1fcc0
FB
648void bdrv_set_change_cb(BlockDriverState *bs,
649 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 650void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
c4b1fcc0
FB
651void bdrv_info(void);
652BlockDriverState *bdrv_find(const char *name);
82c643ff 653void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
ea2384d3
FB
654int bdrv_is_encrypted(BlockDriverState *bs);
655int bdrv_set_key(BlockDriverState *bs, const char *key);
656void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
657 void *opaque);
658const char *bdrv_get_device_name(BlockDriverState *bs);
faea38e7
FB
659int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
660 const uint8_t *buf, int nb_sectors);
661int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
c4b1fcc0 662
83f64091
FB
663void bdrv_get_backing_filename(BlockDriverState *bs,
664 char *filename, int filename_size);
faea38e7
FB
665int bdrv_snapshot_create(BlockDriverState *bs,
666 QEMUSnapshotInfo *sn_info);
667int bdrv_snapshot_goto(BlockDriverState *bs,
668 const char *snapshot_id);
669int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
670int bdrv_snapshot_list(BlockDriverState *bs,
671 QEMUSnapshotInfo **psn_info);
672char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
673
674char *get_human_readable_size(char *buf, int buf_size, int64_t size);
83f64091
FB
675int path_is_absolute(const char *path);
676void path_combine(char *dest, int dest_size,
677 const char *base_path,
678 const char *filename);
ea2384d3
FB
679
680#ifndef QEMU_TOOL
54fa5af5
FB
681
682typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
683 int boot_device,
684 DisplayState *ds, const char **fd_filename, int snapshot,
685 const char *kernel_filename, const char *kernel_cmdline,
686 const char *initrd_filename);
687
688typedef struct QEMUMachine {
689 const char *name;
690 const char *desc;
691 QEMUMachineInitFunc *init;
692 struct QEMUMachine *next;
693} QEMUMachine;
694
695int qemu_register_machine(QEMUMachine *m);
696
697typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 698typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 699
26aa7d72
FB
700/* ISA bus */
701
702extern target_phys_addr_t isa_mem_base;
703
704typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
705typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
706
707int register_ioport_read(int start, int length, int size,
708 IOPortReadFunc *func, void *opaque);
709int register_ioport_write(int start, int length, int size,
710 IOPortWriteFunc *func, void *opaque);
69b91039
FB
711void isa_unassign_ioport(int start, int length);
712
aef445bd
PB
713void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
714
69b91039
FB
715/* PCI bus */
716
69b91039
FB
717extern target_phys_addr_t pci_mem_base;
718
46e50e9d 719typedef struct PCIBus PCIBus;
69b91039
FB
720typedef struct PCIDevice PCIDevice;
721
722typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
723 uint32_t address, uint32_t data, int len);
724typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
725 uint32_t address, int len);
726typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
727 uint32_t addr, uint32_t size, int type);
728
729#define PCI_ADDRESS_SPACE_MEM 0x00
730#define PCI_ADDRESS_SPACE_IO 0x01
731#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
732
733typedef struct PCIIORegion {
5768f5ac 734 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
69b91039
FB
735 uint32_t size;
736 uint8_t type;
737 PCIMapIORegionFunc *map_func;
738} PCIIORegion;
739
8a8696a3
FB
740#define PCI_ROM_SLOT 6
741#define PCI_NUM_REGIONS 7
502a5395
PB
742
743#define PCI_DEVICES_MAX 64
744
745#define PCI_VENDOR_ID 0x00 /* 16 bits */
746#define PCI_DEVICE_ID 0x02 /* 16 bits */
747#define PCI_COMMAND 0x04 /* 16 bits */
748#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
749#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
750#define PCI_CLASS_DEVICE 0x0a /* Device class */
751#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
752#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
753#define PCI_MIN_GNT 0x3e /* 8 bits */
754#define PCI_MAX_LAT 0x3f /* 8 bits */
755
69b91039
FB
756struct PCIDevice {
757 /* PCI config space */
758 uint8_t config[256];
759
760 /* the following fields are read only */
46e50e9d 761 PCIBus *bus;
69b91039
FB
762 int devfn;
763 char name[64];
8a8696a3 764 PCIIORegion io_regions[PCI_NUM_REGIONS];
69b91039
FB
765
766 /* do not access the following fields */
767 PCIConfigReadFunc *config_read;
768 PCIConfigWriteFunc *config_write;
502a5395 769 /* ??? This is a PC-specific hack, and should be removed. */
5768f5ac 770 int irq_index;
d2b59317
PB
771
772 /* Current IRQ levels. Used internally by the generic PCI code. */
773 int irq_state[4];
69b91039
FB
774};
775
46e50e9d
FB
776PCIDevice *pci_register_device(PCIBus *bus, const char *name,
777 int instance_size, int devfn,
69b91039
FB
778 PCIConfigReadFunc *config_read,
779 PCIConfigWriteFunc *config_write);
780
781void pci_register_io_region(PCIDevice *pci_dev, int region_num,
782 uint32_t size, int type,
783 PCIMapIORegionFunc *map_func);
784
5768f5ac
FB
785void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
786
787uint32_t pci_default_read_config(PCIDevice *d,
788 uint32_t address, int len);
789void pci_default_write_config(PCIDevice *d,
790 uint32_t address, uint32_t val, int len);
89b6b508
FB
791void pci_device_save(PCIDevice *s, QEMUFile *f);
792int pci_device_load(PCIDevice *s, QEMUFile *f);
5768f5ac 793
d2b59317
PB
794typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
795typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
796PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
80b3ada7 797 void *pic, int devfn_min, int nirq);
502a5395 798
abcebc7e 799void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn);
502a5395
PB
800void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
801uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
802int pci_bus_num(PCIBus *s);
80b3ada7 803void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
9995c51f 804
5768f5ac 805void pci_info(void);
80b3ada7
PB
806PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
807 pci_map_irq_fn map_irq, const char *name);
26aa7d72 808
502a5395 809/* prep_pci.c */
46e50e9d 810PCIBus *pci_prep_init(void);
77d4bc34 811
502a5395
PB
812/* grackle_pci.c */
813PCIBus *pci_grackle_init(uint32_t base, void *pic);
814
815/* unin_pci.c */
816PCIBus *pci_pmac_init(void *pic);
817
818/* apb_pci.c */
819PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
820 void *pic);
821
e69954b9 822PCIBus *pci_vpb_init(void *pic, int irq, int realview);
502a5395
PB
823
824/* piix_pci.c */
f00fc47c
FB
825PCIBus *i440fx_init(PCIDevice **pi440fx_state);
826void i440fx_set_smm(PCIDevice *d, int val);
8f1c91d8 827int piix3_init(PCIBus *bus, int devfn);
f00fc47c 828void i440fx_init_memory_mappings(PCIDevice *d);
a41b2ff2 829
5856de80
TS
830int piix4_init(PCIBus *bus, int devfn);
831
28b9b5af
FB
832/* openpic.c */
833typedef struct openpic_t openpic_t;
54fa5af5 834void openpic_set_irq(void *opaque, int n_IRQ, int level);
7668a27f
FB
835openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
836 CPUState **envp);
28b9b5af 837
54fa5af5
FB
838/* heathrow_pic.c */
839typedef struct HeathrowPICS HeathrowPICS;
840void heathrow_pic_set_irq(void *opaque, int num, int level);
841HeathrowPICS *heathrow_pic_init(int *pmem_index);
842
fde7d5bd
TS
843/* gt64xxx.c */
844PCIBus *pci_gt64120_init(void *pic);
845
6a36d84e
FB
846#ifdef HAS_AUDIO
847struct soundhw {
848 const char *name;
849 const char *descr;
850 int enabled;
851 int isa;
852 union {
853 int (*init_isa) (AudioState *s);
854 int (*init_pci) (PCIBus *bus, AudioState *s);
855 } init;
856};
857
858extern struct soundhw soundhw[];
859#endif
860
313aa567
FB
861/* vga.c */
862
74a14f22 863#define VGA_RAM_SIZE (8192 * 1024)
313aa567 864
82c643ff 865struct DisplayState {
313aa567
FB
866 uint8_t *data;
867 int linesize;
868 int depth;
d3079cd2 869 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
82c643ff
FB
870 int width;
871 int height;
24236869
FB
872 void *opaque;
873
313aa567
FB
874 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
875 void (*dpy_resize)(struct DisplayState *s, int w, int h);
876 void (*dpy_refresh)(struct DisplayState *s);
24236869 877 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
82c643ff 878};
313aa567
FB
879
880static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
881{
882 s->dpy_update(s, x, y, w, h);
883}
884
885static inline void dpy_resize(DisplayState *s, int w, int h)
886{
887 s->dpy_resize(s, w, h);
888}
889
89b6b508
FB
890int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
891 unsigned long vga_ram_offset, int vga_ram_size);
892int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
893 unsigned long vga_ram_offset, int vga_ram_size,
894 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 895
d6bfa22f 896/* cirrus_vga.c */
46e50e9d 897void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 898 unsigned long vga_ram_offset, int vga_ram_size);
d6bfa22f
FB
899void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
900 unsigned long vga_ram_offset, int vga_ram_size);
901
313aa567 902/* sdl.c */
d63d307f 903void sdl_display_init(DisplayState *ds, int full_screen);
313aa567 904
da4dbf74
FB
905/* cocoa.m */
906void cocoa_display_init(DisplayState *ds, int full_screen);
907
24236869 908/* vnc.c */
73fc9742 909void vnc_display_init(DisplayState *ds, const char *display);
24236869 910
6070dd07
TS
911/* x_keymap.c */
912extern uint8_t _translate_keycode(const int key);
913
5391d806
FB
914/* ide.c */
915#define MAX_DISKS 4
916
faea38e7 917extern BlockDriverState *bs_table[MAX_DISKS + 1];
5391d806 918
69b91039
FB
919void isa_ide_init(int iobase, int iobase2, int irq,
920 BlockDriverState *hd0, BlockDriverState *hd1);
54fa5af5
FB
921void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
922 int secondary_ide_enabled);
502a5395 923void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
28b9b5af 924int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 925 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 926
2e5d83bb
PB
927/* cdrom.c */
928int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
929int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
930
1d14ffa9 931/* es1370.c */
c0fe3827 932int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 933
fb065187 934/* sb16.c */
c0fe3827 935int SB16_init (AudioState *s);
fb065187
FB
936
937/* adlib.c */
c0fe3827 938int Adlib_init (AudioState *s);
fb065187
FB
939
940/* gus.c */
c0fe3827 941int GUS_init (AudioState *s);
27503323
FB
942
943/* dma.c */
85571bc7 944typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 945int DMA_get_channel_mode (int nchan);
85571bc7
FB
946int DMA_read_memory (int nchan, void *buf, int pos, int size);
947int DMA_write_memory (int nchan, void *buf, int pos, int size);
27503323
FB
948void DMA_hold_DREQ (int nchan);
949void DMA_release_DREQ (int nchan);
16f62432 950void DMA_schedule(int nchan);
27503323 951void DMA_run (void);
28b9b5af 952void DMA_init (int high_page_enable);
27503323 953void DMA_register_channel (int nchan,
85571bc7
FB
954 DMA_transfer_handler transfer_handler,
955 void *opaque);
7138fcfb
FB
956/* fdc.c */
957#define MAX_FD 2
958extern BlockDriverState *fd_table[MAX_FD];
959
baca51fa
FB
960typedef struct fdctrl_t fdctrl_t;
961
962fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
963 uint32_t io_base,
964 BlockDriverState **fds);
965int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 966
80cabfad
FB
967/* ne2000.c */
968
7c9d8e07 969void isa_ne2000_init(int base, int irq, NICInfo *nd);
abcebc7e 970void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn);
80cabfad 971
a41b2ff2
PB
972/* rtl8139.c */
973
abcebc7e 974void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn);
a41b2ff2 975
e3c2613f
FB
976/* pcnet.c */
977
abcebc7e 978void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn);
67e999be
FB
979void pcnet_h_reset(void *opaque);
980void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
981
e3c2613f 982
80cabfad
FB
983/* pckbd.c */
984
80cabfad
FB
985void kbd_init(void);
986
987/* mc146818rtc.c */
988
8a7ddc38 989typedef struct RTCState RTCState;
80cabfad 990
8a7ddc38
FB
991RTCState *rtc_init(int base, int irq);
992void rtc_set_memory(RTCState *s, int addr, int val);
993void rtc_set_date(RTCState *s, const struct tm *tm);
80cabfad
FB
994
995/* serial.c */
996
c4b1fcc0 997typedef struct SerialState SerialState;
e5d13e2f
FB
998SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
999 int base, int irq, CharDriverState *chr);
1000SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
1001 target_ulong base, int it_shift,
1002 int irq, CharDriverState *chr);
80cabfad 1003
6508fe59
FB
1004/* parallel.c */
1005
1006typedef struct ParallelState ParallelState;
1007ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
1008
80cabfad
FB
1009/* i8259.c */
1010
3de388f6
FB
1011typedef struct PicState2 PicState2;
1012extern PicState2 *isa_pic;
80cabfad 1013void pic_set_irq(int irq, int level);
54fa5af5 1014void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 1015PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
d592d303
FB
1016void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
1017 void *alt_irq_opaque);
3de388f6
FB
1018int pic_read_irq(PicState2 *s);
1019void pic_update_irq(PicState2 *s);
1020uint32_t pic_intack_read(PicState2 *s);
c20709aa 1021void pic_info(void);
4a0fb71e 1022void irq_info(void);
80cabfad 1023
c27004ec 1024/* APIC */
d592d303
FB
1025typedef struct IOAPICState IOAPICState;
1026
c27004ec
FB
1027int apic_init(CPUState *env);
1028int apic_get_interrupt(CPUState *env);
d592d303
FB
1029IOAPICState *ioapic_init(void);
1030void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 1031
80cabfad
FB
1032/* i8254.c */
1033
1034#define PIT_FREQ 1193182
1035
ec844b96
FB
1036typedef struct PITState PITState;
1037
1038PITState *pit_init(int base, int irq);
1039void pit_set_gate(PITState *pit, int channel, int val);
1040int pit_get_gate(PITState *pit, int channel);
fd06c375
FB
1041int pit_get_initial_count(PITState *pit, int channel);
1042int pit_get_mode(PITState *pit, int channel);
ec844b96 1043int pit_get_out(PITState *pit, int channel, int64_t current_time);
80cabfad 1044
fd06c375
FB
1045/* pcspk.c */
1046void pcspk_init(PITState *);
1047int pcspk_audio_init(AudioState *);
1048
6515b203
FB
1049/* acpi.c */
1050extern int acpi_enabled;
502a5395 1051void piix4_pm_init(PCIBus *bus, int devfn);
6515b203
FB
1052void acpi_bios_init(void);
1053
80cabfad 1054/* pc.c */
54fa5af5 1055extern QEMUMachine pc_machine;
3dbbdc25 1056extern QEMUMachine isapc_machine;
52ca8d6a 1057extern int fd_bootchk;
80cabfad 1058
6a00d601
FB
1059void ioport_set_a20(int enable);
1060int ioport_get_a20(void);
1061
26aa7d72 1062/* ppc.c */
54fa5af5
FB
1063extern QEMUMachine prep_machine;
1064extern QEMUMachine core99_machine;
1065extern QEMUMachine heathrow_machine;
1066
6af0bf9c
FB
1067/* mips_r4k.c */
1068extern QEMUMachine mips_machine;
1069
5856de80
TS
1070/* mips_malta.c */
1071extern QEMUMachine mips_malta_machine;
1072
4de9b249
TS
1073/* mips_int */
1074extern void cpu_mips_irq_request(void *opaque, int irq, int level);
1075
e16fe40c
TS
1076/* mips_timer.c */
1077extern void cpu_mips_clock_init(CPUState *);
1078extern void cpu_mips_irqctrl_init (void);
1079
27c7ca7e
FB
1080/* shix.c */
1081extern QEMUMachine shix_machine;
1082
8cc43fef
FB
1083#ifdef TARGET_PPC
1084ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1085#endif
64201201 1086void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
77d4bc34
FB
1087
1088extern CPUWriteMemoryFunc *PPC_io_write[];
1089extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 1090void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 1091
e95c8d51 1092/* sun4m.c */
54fa5af5 1093extern QEMUMachine sun4m_machine;
ba3c64fb 1094void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
e95c8d51
FB
1095
1096/* iommu.c */
e80cfcfc 1097void *iommu_init(uint32_t addr);
67e999be 1098void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
a917d384 1099 uint8_t *buf, int len, int is_write);
67e999be
FB
1100static inline void sparc_iommu_memory_read(void *opaque,
1101 target_phys_addr_t addr,
1102 uint8_t *buf, int len)
1103{
1104 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1105}
e95c8d51 1106
67e999be
FB
1107static inline void sparc_iommu_memory_write(void *opaque,
1108 target_phys_addr_t addr,
1109 uint8_t *buf, int len)
1110{
1111 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1112}
e95c8d51
FB
1113
1114/* tcx.c */
95219897 1115void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 1116 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
FB
1117
1118/* slavio_intctl.c */
1119void *slavio_intctl_init();
ba3c64fb 1120void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
FB
1121void slavio_pic_info(void *opaque);
1122void slavio_irq_info(void *opaque);
1123void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 1124void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51 1125
5fe141fd
FB
1126/* loader.c */
1127int get_image_size(const char *filename);
1128int load_image(const char *filename, uint8_t *addr);
9ee3c029 1129int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
e80cfcfc
FB
1130int load_aout(const char *filename, uint8_t *addr);
1131
1132/* slavio_timer.c */
ba3c64fb 1133void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 1134
e80cfcfc
FB
1135/* slavio_serial.c */
1136SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1137void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 1138
3475187d
FB
1139/* slavio_misc.c */
1140void *slavio_misc_init(uint32_t base, int irq);
1141void slavio_set_power_fail(void *opaque, int power_failing);
1142
6f7e9aec 1143/* esp.c */
fa1fb14c 1144void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
67e999be
FB
1145void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1146void esp_reset(void *opaque);
1147
1148/* sparc32_dma.c */
1149void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1150 void *intctl);
1151void ledma_set_irq(void *opaque, int isr);
9b94dc32
FB
1152void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1153 uint8_t *buf, int len, int do_bswap);
1154void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1155 uint8_t *buf, int len, int do_bswap);
67e999be
FB
1156void espdma_raise_irq(void *opaque);
1157void espdma_clear_irq(void *opaque);
1158void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1159void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1160void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1161 void *lance_opaque);
6f7e9aec 1162
b8174937
FB
1163/* cs4231.c */
1164void cs_init(target_phys_addr_t base, int irq, void *intctl);
1165
3475187d
FB
1166/* sun4u.c */
1167extern QEMUMachine sun4u_machine;
1168
64201201
FB
1169/* NVRAM helpers */
1170#include "hw/m48t59.h"
1171
1172void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1173uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1174void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1175uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1176void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1177uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1178void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1179 const unsigned char *str, uint32_t max);
1180int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1181void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1182 uint32_t start, uint32_t count);
1183int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1184 const unsigned char *arch,
1185 uint32_t RAM_size, int boot_device,
1186 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 1187 const char *cmdline,
64201201 1188 uint32_t initrd_image, uint32_t initrd_size,
28b9b5af
FB
1189 uint32_t NVRAM_image,
1190 int width, int height, int depth);
64201201 1191
63066f4f
FB
1192/* adb.c */
1193
1194#define MAX_ADB_DEVICES 16
1195
e2733d20 1196#define ADB_MAX_OUT_LEN 16
63066f4f 1197
e2733d20 1198typedef struct ADBDevice ADBDevice;
63066f4f 1199
e2733d20
FB
1200/* buf = NULL means polling */
1201typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1202 const uint8_t *buf, int len);
12c28fed
FB
1203typedef int ADBDeviceReset(ADBDevice *d);
1204
63066f4f
FB
1205struct ADBDevice {
1206 struct ADBBusState *bus;
1207 int devaddr;
1208 int handler;
e2733d20 1209 ADBDeviceRequest *devreq;
12c28fed 1210 ADBDeviceReset *devreset;
63066f4f
FB
1211 void *opaque;
1212};
1213
1214typedef struct ADBBusState {
1215 ADBDevice devices[MAX_ADB_DEVICES];
1216 int nb_devices;
e2733d20 1217 int poll_index;
63066f4f
FB
1218} ADBBusState;
1219
e2733d20
FB
1220int adb_request(ADBBusState *s, uint8_t *buf_out,
1221 const uint8_t *buf, int len);
1222int adb_poll(ADBBusState *s, uint8_t *buf_out);
63066f4f
FB
1223
1224ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 1225 ADBDeviceRequest *devreq,
12c28fed 1226 ADBDeviceReset *devreset,
63066f4f
FB
1227 void *opaque);
1228void adb_kbd_init(ADBBusState *bus);
1229void adb_mouse_init(ADBBusState *bus);
1230
1231/* cuda.c */
1232
1233extern ADBBusState adb_bus;
54fa5af5 1234int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 1235
bb36d470
FB
1236#include "hw/usb.h"
1237
a594cfbf
FB
1238/* usb ports of the VM */
1239
0d92ed30
PB
1240void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1241 usb_attachfn attach);
a594cfbf 1242
0d92ed30 1243#define VM_USB_HUB_SIZE 8
a594cfbf
FB
1244
1245void do_usb_add(const char *devname);
1246void do_usb_del(const char *devname);
1247void usb_info(void);
1248
2e5d83bb 1249/* scsi-disk.c */
4d611c9a
PB
1250enum scsi_reason {
1251 SCSI_REASON_DONE, /* Command complete. */
1252 SCSI_REASON_DATA /* Transfer complete, more data required. */
1253};
1254
2e5d83bb 1255typedef struct SCSIDevice SCSIDevice;
a917d384
PB
1256typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1257 uint32_t arg);
2e5d83bb
PB
1258
1259SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
a917d384 1260 int tcq,
2e5d83bb
PB
1261 scsi_completionfn completion,
1262 void *opaque);
1263void scsi_disk_destroy(SCSIDevice *s);
1264
0fc5c15a 1265int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
4d611c9a
PB
1266/* SCSI data transfers are asynchrnonous. However, unlike the block IO
1267 layer the completion routine may be called directly by
1268 scsi_{read,write}_data. */
a917d384
PB
1269void scsi_read_data(SCSIDevice *s, uint32_t tag);
1270int scsi_write_data(SCSIDevice *s, uint32_t tag);
1271void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1272uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
2e5d83bb 1273
7d8406be
PB
1274/* lsi53c895a.c */
1275void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1276void *lsi_scsi_init(PCIBus *bus, int devfn);
1277
b5ff1b31 1278/* integratorcp.c */
40f137e1
PB
1279extern QEMUMachine integratorcp926_machine;
1280extern QEMUMachine integratorcp1026_machine;
b5ff1b31 1281
cdbdb648
PB
1282/* versatilepb.c */
1283extern QEMUMachine versatilepb_machine;
16406950 1284extern QEMUMachine versatileab_machine;
cdbdb648 1285
e69954b9
PB
1286/* realview.c */
1287extern QEMUMachine realview_machine;
1288
daa57963
FB
1289/* ps2.c */
1290void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1291void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1292void ps2_write_mouse(void *, int val);
1293void ps2_write_keyboard(void *, int val);
1294uint32_t ps2_read_data(void *);
1295void ps2_queue(void *, int b);
f94f5d71 1296void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 1297
80337b66
FB
1298/* smc91c111.c */
1299void smc91c111_init(NICInfo *, uint32_t, void *, int);
1300
bdd5003a 1301/* pl110.c */
95219897 1302void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
bdd5003a 1303
cdbdb648
PB
1304/* pl011.c */
1305void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1306
1307/* pl050.c */
1308void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1309
1310/* pl080.c */
e69954b9 1311void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
cdbdb648
PB
1312
1313/* pl190.c */
1314void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1315
1316/* arm-timer.c */
1317void sp804_init(uint32_t base, void *pic, int irq);
1318void icp_pit_init(uint32_t base, void *pic, int irq);
1319
e69954b9
PB
1320/* arm_sysctl.c */
1321void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1322
1323/* arm_gic.c */
1324void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1325
16406950
PB
1326/* arm_boot.c */
1327
daf90626 1328void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
16406950
PB
1329 const char *kernel_cmdline, const char *initrd_filename,
1330 int board_id);
1331
27c7ca7e
FB
1332/* sh7750.c */
1333struct SH7750State;
1334
008a8818 1335struct SH7750State *sh7750_init(CPUState * cpu);
27c7ca7e
FB
1336
1337typedef struct {
1338 /* The callback will be triggered if any of the designated lines change */
1339 uint16_t portamask_trigger;
1340 uint16_t portbmask_trigger;
1341 /* Return 0 if no action was taken */
1342 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1343 uint16_t * periph_pdtra,
1344 uint16_t * periph_portdira,
1345 uint16_t * periph_pdtrb,
1346 uint16_t * periph_portdirb);
1347} sh7750_io_device;
1348
1349int sh7750_register_io_device(struct SH7750State *s,
1350 sh7750_io_device * device);
1351/* tc58128.c */
1352int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1353
29133e9a
FB
1354/* NOR flash devices */
1355typedef struct pflash_t pflash_t;
1356
1357pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1358 BlockDriverState *bs,
1359 target_ulong sector_len, int nb_blocs, int width,
1360 uint16_t id0, uint16_t id1,
1361 uint16_t id2, uint16_t id3);
1362
ea2384d3
FB
1363#endif /* defined(QEMU_TOOL) */
1364
c4b1fcc0 1365/* monitor.c */
82c643ff 1366void monitor_init(CharDriverState *hd, int show_banner);
ea2384d3
FB
1367void term_puts(const char *str);
1368void term_vprintf(const char *fmt, va_list ap);
40c3bac3 1369void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
fef30743 1370void term_print_filename(const char *filename);
c4b1fcc0
FB
1371void term_flush(void);
1372void term_print_help(void);
ea2384d3
FB
1373void monitor_readline(const char *prompt, int is_password,
1374 char *buf, int buf_size);
1375
1376/* readline.c */
1377typedef void ReadLineFunc(void *opaque, const char *str);
1378
1379extern int completion_index;
1380void add_completion(const char *str);
1381void readline_handle_byte(int ch);
1382void readline_find_completion(const char *cmdline);
1383const char *readline_get_history(unsigned int index);
1384void readline_start(const char *prompt, int is_password,
1385 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1386
5e6ad6f9
FB
1387void kqemu_record_dump(void);
1388
fc01f7e7 1389#endif /* VL_H */
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