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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
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35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
fb065187 40#include "audio/audio.h"
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41
42#ifndef O_LARGEFILE
43#define O_LARGEFILE 0
44#endif
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45#ifndef O_BINARY
46#define O_BINARY 0
47#endif
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48
49#ifdef _WIN32
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50#define lseek _lseeki64
51#define ENOTSUP 4096
52/* XXX: find 64 bit version */
53#define ftruncate chsize
54
55static inline char *realpath(const char *path, char *resolved_path)
56{
57 _fullpath(resolved_path, path, _MAX_PATH);
58 return resolved_path;
59}
67b915a5 60#endif
8a7ddc38 61
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62#ifdef QEMU_TOOL
63
64/* we use QEMU_TOOL in the command line tools which do not depend on
65 the target CPU type */
66#include "config-host.h"
67#include <setjmp.h>
68#include "osdep.h"
69#include "bswap.h"
70
71#else
72
16f62432 73#include "cpu.h"
1fddef4b 74#include "gdbstub.h"
16f62432 75
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76#endif /* !defined(QEMU_TOOL) */
77
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78#ifndef glue
79#define xglue(x, y) x ## y
80#define glue(x, y) xglue(x, y)
81#define stringify(s) tostring(s)
82#define tostring(s) #s
83#endif
84
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85#ifndef MIN
86#define MIN(a, b) (((a) < (b)) ? (a) : (b))
87#endif
88#ifndef MAX
89#define MAX(a, b) (((a) > (b)) ? (a) : (b))
90#endif
91
33e3963e 92/* vl.c */
80cabfad 93uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 94
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95void hw_error(const char *fmt, ...);
96
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97extern const char *bios_dir;
98
99void pstrcpy(char *buf, int buf_size, const char *str);
100char *pstrcat(char *buf, int buf_size, const char *s);
82c643ff 101int strstart(const char *str, const char *val, const char **ptr);
c4b1fcc0 102
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103extern int vm_running;
104
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105typedef struct vm_change_state_entry VMChangeStateEntry;
106typedef void VMChangeStateHandler(void *opaque, int running);
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107typedef void VMStopHandler(void *opaque, int reason);
108
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109VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
110 void *opaque);
111void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
112
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113int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
114void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
115
116void vm_start(void);
117void vm_stop(int reason);
118
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119typedef void QEMUResetHandler(void *opaque);
120
121void qemu_register_reset(QEMUResetHandler *func, void *opaque);
122void qemu_system_reset_request(void);
123void qemu_system_shutdown_request(void);
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124void qemu_system_powerdown_request(void);
125#if !defined(TARGET_SPARC)
126// Please implement a power failure function to signal the OS
127#define qemu_system_powerdown() do{}while(0)
128#else
129void qemu_system_powerdown(void);
130#endif
bb0c6722 131
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132void main_loop_wait(int timeout);
133
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134extern int ram_size;
135extern int bios_size;
ee22c2f7 136extern int rtc_utc;
1f04275e 137extern int cirrus_vga_enabled;
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138extern int graphic_width;
139extern int graphic_height;
140extern int graphic_depth;
3d11d0eb 141extern const char *keyboard_layout;
d993e026 142extern int kqemu_allowed;
a09db21f 143extern int win2k_install_hack;
bb36d470 144extern int usb_enabled;
6a00d601 145extern int smp_cpus;
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146
147/* XXX: make it dynamic */
148#if defined (TARGET_PPC)
d5295253 149#define BIOS_SIZE ((512 + 32) * 1024)
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150#elif defined(TARGET_MIPS)
151#define BIOS_SIZE (128 * 1024)
0ced6589 152#else
7587cf44 153#define BIOS_SIZE ((256 + 64) * 1024)
0ced6589 154#endif
aaaa7df6 155
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156/* keyboard/mouse support */
157
158#define MOUSE_EVENT_LBUTTON 0x01
159#define MOUSE_EVENT_RBUTTON 0x02
160#define MOUSE_EVENT_MBUTTON 0x04
161
162typedef void QEMUPutKBDEvent(void *opaque, int keycode);
163typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
164
165void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
09b26c5e 166void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute);
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167
168void kbd_put_keycode(int keycode);
169void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
09b26c5e 170int kbd_mouse_is_absolute(void);
63066f4f 171
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172/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
173 constants) */
174#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
175#define QEMU_KEY_BACKSPACE 0x007f
176#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
177#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
178#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
179#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
180#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
181#define QEMU_KEY_END QEMU_KEY_ESC1(4)
182#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
183#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
184#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
185
186#define QEMU_KEY_CTRL_UP 0xe400
187#define QEMU_KEY_CTRL_DOWN 0xe401
188#define QEMU_KEY_CTRL_LEFT 0xe402
189#define QEMU_KEY_CTRL_RIGHT 0xe403
190#define QEMU_KEY_CTRL_HOME 0xe404
191#define QEMU_KEY_CTRL_END 0xe405
192#define QEMU_KEY_CTRL_PAGEUP 0xe406
193#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
194
195void kbd_put_keysym(int keysym);
196
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197/* async I/O support */
198
199typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
200typedef int IOCanRWHandler(void *opaque);
7c9d8e07 201typedef void IOHandler(void *opaque);
c20709aa 202
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203int qemu_set_fd_handler2(int fd,
204 IOCanRWHandler *fd_read_poll,
205 IOHandler *fd_read,
206 IOHandler *fd_write,
207 void *opaque);
208int qemu_set_fd_handler(int fd,
209 IOHandler *fd_read,
210 IOHandler *fd_write,
211 void *opaque);
c20709aa 212
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213/* Polling handling */
214
215/* return TRUE if no sleep should be done afterwards */
216typedef int PollingFunc(void *opaque);
217
218int qemu_add_polling_cb(PollingFunc *func, void *opaque);
219void qemu_del_polling_cb(PollingFunc *func, void *opaque);
220
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221/* character device */
222
223#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 224#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
82c643ff 225
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226
227
228#define CHR_IOCTL_SERIAL_SET_PARAMS 1
229typedef struct {
230 int speed;
231 int parity;
232 int data_bits;
233 int stop_bits;
234} QEMUSerialSetParams;
235
236#define CHR_IOCTL_SERIAL_SET_BREAK 2
237
238#define CHR_IOCTL_PP_READ_DATA 3
239#define CHR_IOCTL_PP_WRITE_DATA 4
240#define CHR_IOCTL_PP_READ_CONTROL 5
241#define CHR_IOCTL_PP_WRITE_CONTROL 6
242#define CHR_IOCTL_PP_READ_STATUS 7
243
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244typedef void IOEventHandler(void *opaque, int event);
245
246typedef struct CharDriverState {
247 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
248 void (*chr_add_read_handler)(struct CharDriverState *s,
249 IOCanRWHandler *fd_can_read,
250 IOReadHandler *fd_read, void *opaque);
2122c51a 251 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 252 IOEventHandler *chr_event;
eb45f5fe 253 void (*chr_send_event)(struct CharDriverState *chr, int event);
f331110f 254 void (*chr_close)(struct CharDriverState *chr);
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255 void *opaque;
256} CharDriverState;
257
258void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
259int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 260void qemu_chr_send_event(CharDriverState *s, int event);
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261void qemu_chr_add_read_handler(CharDriverState *s,
262 IOCanRWHandler *fd_can_read,
263 IOReadHandler *fd_read, void *opaque);
264void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
2122c51a 265int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
f8d179e3 266
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267/* consoles */
268
269typedef struct DisplayState DisplayState;
270typedef struct TextConsole TextConsole;
271
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272typedef void (*vga_hw_update_ptr)(void *);
273typedef void (*vga_hw_invalidate_ptr)(void *);
274typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
275
276TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
277 vga_hw_invalidate_ptr invalidate,
278 vga_hw_screen_dump_ptr screen_dump,
279 void *opaque);
280void vga_hw_update(void);
281void vga_hw_invalidate(void);
282void vga_hw_screen_dump(const char *filename);
283
284int is_graphic_console(void);
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285CharDriverState *text_console_init(DisplayState *ds);
286void console_select(unsigned int index);
287
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288/* serial ports */
289
290#define MAX_SERIAL_PORTS 4
291
292extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
293
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294/* parallel ports */
295
296#define MAX_PARALLEL_PORTS 3
297
298extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
299
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300/* VLANs support */
301
302typedef struct VLANClientState VLANClientState;
303
304struct VLANClientState {
305 IOReadHandler *fd_read;
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306 /* Packets may still be sent if this returns zero. It's used to
307 rate-limit the slirp code. */
308 IOCanRWHandler *fd_can_read;
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309 void *opaque;
310 struct VLANClientState *next;
311 struct VLANState *vlan;
312 char info_str[256];
313};
314
315typedef struct VLANState {
316 int id;
317 VLANClientState *first_client;
318 struct VLANState *next;
319} VLANState;
320
321VLANState *qemu_find_vlan(int id);
322VLANClientState *qemu_new_vlan_client(VLANState *vlan,
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323 IOReadHandler *fd_read,
324 IOCanRWHandler *fd_can_read,
325 void *opaque);
326int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 327void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 328void qemu_handler_true(void *opaque);
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329
330void do_info_network(void);
331
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332/* TAP win32 */
333int tap_win32_init(VLANState *vlan, const char *ifname);
334void tap_win32_poll(void);
335
7c9d8e07 336/* NIC info */
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337
338#define MAX_NICS 8
339
7c9d8e07 340typedef struct NICInfo {
c4b1fcc0 341 uint8_t macaddr[6];
a41b2ff2 342 const char *model;
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343 VLANState *vlan;
344} NICInfo;
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345
346extern int nb_nics;
7c9d8e07 347extern NICInfo nd_table[MAX_NICS];
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348
349/* timers */
350
351typedef struct QEMUClock QEMUClock;
352typedef struct QEMUTimer QEMUTimer;
353typedef void QEMUTimerCB(void *opaque);
354
355/* The real time clock should be used only for stuff which does not
356 change the virtual machine state, as it is run even if the virtual
69b91039 357 machine is stopped. The real time clock has a frequency of 1000
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358 Hz. */
359extern QEMUClock *rt_clock;
360
e80cfcfc 361/* The virtual clock is only run during the emulation. It is stopped
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362 when the virtual machine is stopped. Virtual timers use a high
363 precision clock, usually cpu cycles (use ticks_per_sec). */
364extern QEMUClock *vm_clock;
365
366int64_t qemu_get_clock(QEMUClock *clock);
367
368QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
369void qemu_free_timer(QEMUTimer *ts);
370void qemu_del_timer(QEMUTimer *ts);
371void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
372int qemu_timer_pending(QEMUTimer *ts);
373
374extern int64_t ticks_per_sec;
375extern int pit_min_timer_count;
376
377void cpu_enable_ticks(void);
378void cpu_disable_ticks(void);
379
380/* VM Load/Save */
381
382typedef FILE QEMUFile;
383
384void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
385void qemu_put_byte(QEMUFile *f, int v);
386void qemu_put_be16(QEMUFile *f, unsigned int v);
387void qemu_put_be32(QEMUFile *f, unsigned int v);
388void qemu_put_be64(QEMUFile *f, uint64_t v);
389int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
390int qemu_get_byte(QEMUFile *f);
391unsigned int qemu_get_be16(QEMUFile *f);
392unsigned int qemu_get_be32(QEMUFile *f);
393uint64_t qemu_get_be64(QEMUFile *f);
394
395static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
396{
397 qemu_put_be64(f, *pv);
398}
399
400static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
401{
402 qemu_put_be32(f, *pv);
403}
404
405static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
406{
407 qemu_put_be16(f, *pv);
408}
409
410static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
411{
412 qemu_put_byte(f, *pv);
413}
414
415static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
416{
417 *pv = qemu_get_be64(f);
418}
419
420static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
421{
422 *pv = qemu_get_be32(f);
423}
424
425static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
426{
427 *pv = qemu_get_be16(f);
428}
429
430static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
431{
432 *pv = qemu_get_byte(f);
433}
434
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435#if TARGET_LONG_BITS == 64
436#define qemu_put_betl qemu_put_be64
437#define qemu_get_betl qemu_get_be64
438#define qemu_put_betls qemu_put_be64s
439#define qemu_get_betls qemu_get_be64s
440#else
441#define qemu_put_betl qemu_put_be32
442#define qemu_get_betl qemu_get_be32
443#define qemu_put_betls qemu_put_be32s
444#define qemu_get_betls qemu_get_be32s
445#endif
446
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447int64_t qemu_ftell(QEMUFile *f);
448int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
449
450typedef void SaveStateHandler(QEMUFile *f, void *opaque);
451typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
452
453int qemu_loadvm(const char *filename);
454int qemu_savevm(const char *filename);
455int register_savevm(const char *idstr,
456 int instance_id,
457 int version_id,
458 SaveStateHandler *save_state,
459 LoadStateHandler *load_state,
460 void *opaque);
461void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
462void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 463
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464void cpu_save(QEMUFile *f, void *opaque);
465int cpu_load(QEMUFile *f, void *opaque, int version_id);
466
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467/* block.c */
468typedef struct BlockDriverState BlockDriverState;
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469typedef struct BlockDriver BlockDriver;
470
471extern BlockDriver bdrv_raw;
472extern BlockDriver bdrv_cow;
473extern BlockDriver bdrv_qcow;
474extern BlockDriver bdrv_vmdk;
3c56521b 475extern BlockDriver bdrv_cloop;
585d0ed9 476extern BlockDriver bdrv_dmg;
a8753c34 477extern BlockDriver bdrv_bochs;
6a0f9e82 478extern BlockDriver bdrv_vpc;
de167e41 479extern BlockDriver bdrv_vvfat;
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480
481void bdrv_init(void);
482BlockDriver *bdrv_find_format(const char *format_name);
483int bdrv_create(BlockDriver *drv,
484 const char *filename, int64_t size_in_sectors,
485 const char *backing_file, int flags);
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486BlockDriverState *bdrv_new(const char *device_name);
487void bdrv_delete(BlockDriverState *bs);
488int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
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489int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot,
490 BlockDriver *drv);
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491void bdrv_close(BlockDriverState *bs);
492int bdrv_read(BlockDriverState *bs, int64_t sector_num,
493 uint8_t *buf, int nb_sectors);
494int bdrv_write(BlockDriverState *bs, int64_t sector_num,
495 const uint8_t *buf, int nb_sectors);
496void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 497int bdrv_commit(BlockDriverState *bs);
77fef8c1 498void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
33e3963e 499
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500#define BDRV_TYPE_HD 0
501#define BDRV_TYPE_CDROM 1
502#define BDRV_TYPE_FLOPPY 2
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503#define BIOS_ATA_TRANSLATION_AUTO 0
504#define BIOS_ATA_TRANSLATION_NONE 1
505#define BIOS_ATA_TRANSLATION_LBA 2
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506
507void bdrv_set_geometry_hint(BlockDriverState *bs,
508 int cyls, int heads, int secs);
509void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 510void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
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511void bdrv_get_geometry_hint(BlockDriverState *bs,
512 int *pcyls, int *pheads, int *psecs);
513int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 514int bdrv_get_translation_hint(BlockDriverState *bs);
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515int bdrv_is_removable(BlockDriverState *bs);
516int bdrv_is_read_only(BlockDriverState *bs);
517int bdrv_is_inserted(BlockDriverState *bs);
518int bdrv_is_locked(BlockDriverState *bs);
519void bdrv_set_locked(BlockDriverState *bs, int locked);
520void bdrv_set_change_cb(BlockDriverState *bs,
521 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 522void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
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523void bdrv_info(void);
524BlockDriverState *bdrv_find(const char *name);
82c643ff 525void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
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526int bdrv_is_encrypted(BlockDriverState *bs);
527int bdrv_set_key(BlockDriverState *bs, const char *key);
528void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
529 void *opaque);
530const char *bdrv_get_device_name(BlockDriverState *bs);
c4b1fcc0 531
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532int qcow_get_cluster_size(BlockDriverState *bs);
533int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
534 const uint8_t *buf);
535
536#ifndef QEMU_TOOL
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537
538typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
539 int boot_device,
540 DisplayState *ds, const char **fd_filename, int snapshot,
541 const char *kernel_filename, const char *kernel_cmdline,
542 const char *initrd_filename);
543
544typedef struct QEMUMachine {
545 const char *name;
546 const char *desc;
547 QEMUMachineInitFunc *init;
548 struct QEMUMachine *next;
549} QEMUMachine;
550
551int qemu_register_machine(QEMUMachine *m);
552
553typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 554typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 555
26aa7d72
FB
556/* ISA bus */
557
558extern target_phys_addr_t isa_mem_base;
559
560typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
561typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
562
563int register_ioport_read(int start, int length, int size,
564 IOPortReadFunc *func, void *opaque);
565int register_ioport_write(int start, int length, int size,
566 IOPortWriteFunc *func, void *opaque);
69b91039
FB
567void isa_unassign_ioport(int start, int length);
568
569/* PCI bus */
570
69b91039
FB
571extern target_phys_addr_t pci_mem_base;
572
46e50e9d 573typedef struct PCIBus PCIBus;
69b91039
FB
574typedef struct PCIDevice PCIDevice;
575
576typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
577 uint32_t address, uint32_t data, int len);
578typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
579 uint32_t address, int len);
580typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
581 uint32_t addr, uint32_t size, int type);
582
583#define PCI_ADDRESS_SPACE_MEM 0x00
584#define PCI_ADDRESS_SPACE_IO 0x01
585#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
586
587typedef struct PCIIORegion {
5768f5ac 588 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
69b91039
FB
589 uint32_t size;
590 uint8_t type;
591 PCIMapIORegionFunc *map_func;
592} PCIIORegion;
593
8a8696a3
FB
594#define PCI_ROM_SLOT 6
595#define PCI_NUM_REGIONS 7
69b91039
FB
596struct PCIDevice {
597 /* PCI config space */
598 uint8_t config[256];
599
600 /* the following fields are read only */
46e50e9d 601 PCIBus *bus;
69b91039
FB
602 int devfn;
603 char name[64];
8a8696a3 604 PCIIORegion io_regions[PCI_NUM_REGIONS];
69b91039
FB
605
606 /* do not access the following fields */
607 PCIConfigReadFunc *config_read;
608 PCIConfigWriteFunc *config_write;
5768f5ac 609 int irq_index;
69b91039
FB
610};
611
46e50e9d
FB
612PCIDevice *pci_register_device(PCIBus *bus, const char *name,
613 int instance_size, int devfn,
69b91039
FB
614 PCIConfigReadFunc *config_read,
615 PCIConfigWriteFunc *config_write);
616
617void pci_register_io_region(PCIDevice *pci_dev, int region_num,
618 uint32_t size, int type,
619 PCIMapIORegionFunc *map_func);
620
5768f5ac
FB
621void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
622
623uint32_t pci_default_read_config(PCIDevice *d,
624 uint32_t address, int len);
625void pci_default_write_config(PCIDevice *d,
626 uint32_t address, uint32_t val, int len);
30ca2aab
FB
627void generic_pci_save(QEMUFile* f, void *opaque);
628int generic_pci_load(QEMUFile* f, void *opaque, int version_id);
5768f5ac 629
9995c51f
FB
630extern struct PIIX3State *piix3_state;
631
46e50e9d
FB
632PCIBus *i440fx_init(void);
633void piix3_init(PCIBus *bus);
69b91039 634void pci_bios_init(void);
5768f5ac 635void pci_info(void);
26aa7d72 636
77d4bc34 637/* temporary: will be moved in platform specific file */
54fa5af5 638void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque);
46e50e9d 639PCIBus *pci_prep_init(void);
54fa5af5 640PCIBus *pci_grackle_init(uint32_t base);
46e50e9d 641PCIBus *pci_pmac_init(void);
83469015 642PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base);
77d4bc34 643
a41b2ff2
PB
644void pci_nic_init(PCIBus *bus, NICInfo *nd);
645
28b9b5af
FB
646/* openpic.c */
647typedef struct openpic_t openpic_t;
54fa5af5 648void openpic_set_irq(void *opaque, int n_IRQ, int level);
7668a27f
FB
649openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
650 CPUState **envp);
28b9b5af 651
54fa5af5
FB
652/* heathrow_pic.c */
653typedef struct HeathrowPICS HeathrowPICS;
654void heathrow_pic_set_irq(void *opaque, int num, int level);
655HeathrowPICS *heathrow_pic_init(int *pmem_index);
656
6a36d84e
FB
657#ifdef HAS_AUDIO
658struct soundhw {
659 const char *name;
660 const char *descr;
661 int enabled;
662 int isa;
663 union {
664 int (*init_isa) (AudioState *s);
665 int (*init_pci) (PCIBus *bus, AudioState *s);
666 } init;
667};
668
669extern struct soundhw soundhw[];
670#endif
671
313aa567
FB
672/* vga.c */
673
4fa0f5d2 674#define VGA_RAM_SIZE (4096 * 1024)
313aa567 675
82c643ff 676struct DisplayState {
313aa567
FB
677 uint8_t *data;
678 int linesize;
679 int depth;
d3079cd2 680 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
82c643ff
FB
681 int width;
682 int height;
24236869
FB
683 void *opaque;
684
313aa567
FB
685 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
686 void (*dpy_resize)(struct DisplayState *s, int w, int h);
687 void (*dpy_refresh)(struct DisplayState *s);
24236869 688 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
82c643ff 689};
313aa567
FB
690
691static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
692{
693 s->dpy_update(s, x, y, w, h);
694}
695
696static inline void dpy_resize(DisplayState *s, int w, int h)
697{
698 s->dpy_resize(s, w, h);
699}
700
46e50e9d 701int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d5295253
FB
702 unsigned long vga_ram_offset, int vga_ram_size,
703 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 704
d6bfa22f 705/* cirrus_vga.c */
46e50e9d 706void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 707 unsigned long vga_ram_offset, int vga_ram_size);
d6bfa22f
FB
708void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
709 unsigned long vga_ram_offset, int vga_ram_size);
710
313aa567 711/* sdl.c */
d63d307f 712void sdl_display_init(DisplayState *ds, int full_screen);
313aa567 713
da4dbf74
FB
714/* cocoa.m */
715void cocoa_display_init(DisplayState *ds, int full_screen);
716
24236869
FB
717/* vnc.c */
718void vnc_display_init(DisplayState *ds, int display);
719
5391d806
FB
720/* ide.c */
721#define MAX_DISKS 4
722
723extern BlockDriverState *bs_table[MAX_DISKS];
724
69b91039
FB
725void isa_ide_init(int iobase, int iobase2, int irq,
726 BlockDriverState *hd0, BlockDriverState *hd1);
54fa5af5
FB
727void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
728 int secondary_ide_enabled);
46e50e9d 729void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
28b9b5af 730int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 731 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 732
1d14ffa9 733/* es1370.c */
c0fe3827 734int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 735
fb065187 736/* sb16.c */
c0fe3827 737int SB16_init (AudioState *s);
fb065187
FB
738
739/* adlib.c */
c0fe3827 740int Adlib_init (AudioState *s);
fb065187
FB
741
742/* gus.c */
c0fe3827 743int GUS_init (AudioState *s);
27503323
FB
744
745/* dma.c */
85571bc7 746typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 747int DMA_get_channel_mode (int nchan);
85571bc7
FB
748int DMA_read_memory (int nchan, void *buf, int pos, int size);
749int DMA_write_memory (int nchan, void *buf, int pos, int size);
27503323
FB
750void DMA_hold_DREQ (int nchan);
751void DMA_release_DREQ (int nchan);
16f62432 752void DMA_schedule(int nchan);
27503323 753void DMA_run (void);
28b9b5af 754void DMA_init (int high_page_enable);
27503323 755void DMA_register_channel (int nchan,
85571bc7
FB
756 DMA_transfer_handler transfer_handler,
757 void *opaque);
7138fcfb
FB
758/* fdc.c */
759#define MAX_FD 2
760extern BlockDriverState *fd_table[MAX_FD];
761
baca51fa
FB
762typedef struct fdctrl_t fdctrl_t;
763
764fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
765 uint32_t io_base,
766 BlockDriverState **fds);
767int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 768
80cabfad
FB
769/* ne2000.c */
770
7c9d8e07
FB
771void isa_ne2000_init(int base, int irq, NICInfo *nd);
772void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
80cabfad 773
a41b2ff2
PB
774/* rtl8139.c */
775
776void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
777
80cabfad
FB
778/* pckbd.c */
779
80cabfad
FB
780void kbd_init(void);
781
782/* mc146818rtc.c */
783
8a7ddc38 784typedef struct RTCState RTCState;
80cabfad 785
8a7ddc38
FB
786RTCState *rtc_init(int base, int irq);
787void rtc_set_memory(RTCState *s, int addr, int val);
788void rtc_set_date(RTCState *s, const struct tm *tm);
80cabfad
FB
789
790/* serial.c */
791
c4b1fcc0 792typedef struct SerialState SerialState;
e5d13e2f
FB
793SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
794 int base, int irq, CharDriverState *chr);
795SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
796 target_ulong base, int it_shift,
797 int irq, CharDriverState *chr);
80cabfad 798
6508fe59
FB
799/* parallel.c */
800
801typedef struct ParallelState ParallelState;
802ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
803
80cabfad
FB
804/* i8259.c */
805
3de388f6
FB
806typedef struct PicState2 PicState2;
807extern PicState2 *isa_pic;
80cabfad 808void pic_set_irq(int irq, int level);
54fa5af5 809void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 810PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
d592d303
FB
811void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
812 void *alt_irq_opaque);
3de388f6
FB
813int pic_read_irq(PicState2 *s);
814void pic_update_irq(PicState2 *s);
815uint32_t pic_intack_read(PicState2 *s);
c20709aa 816void pic_info(void);
4a0fb71e 817void irq_info(void);
80cabfad 818
c27004ec 819/* APIC */
d592d303
FB
820typedef struct IOAPICState IOAPICState;
821
c27004ec
FB
822int apic_init(CPUState *env);
823int apic_get_interrupt(CPUState *env);
d592d303
FB
824IOAPICState *ioapic_init(void);
825void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 826
80cabfad
FB
827/* i8254.c */
828
829#define PIT_FREQ 1193182
830
ec844b96
FB
831typedef struct PITState PITState;
832
833PITState *pit_init(int base, int irq);
834void pit_set_gate(PITState *pit, int channel, int val);
835int pit_get_gate(PITState *pit, int channel);
fd06c375
FB
836int pit_get_initial_count(PITState *pit, int channel);
837int pit_get_mode(PITState *pit, int channel);
ec844b96 838int pit_get_out(PITState *pit, int channel, int64_t current_time);
80cabfad 839
fd06c375
FB
840/* pcspk.c */
841void pcspk_init(PITState *);
842int pcspk_audio_init(AudioState *);
843
6515b203
FB
844/* acpi.c */
845extern int acpi_enabled;
846void piix4_pm_init(PCIBus *bus);
847void acpi_bios_init(void);
848
80cabfad 849/* pc.c */
54fa5af5 850extern QEMUMachine pc_machine;
3dbbdc25 851extern QEMUMachine isapc_machine;
80cabfad 852
6a00d601
FB
853void ioport_set_a20(int enable);
854int ioport_get_a20(void);
855
26aa7d72 856/* ppc.c */
54fa5af5
FB
857extern QEMUMachine prep_machine;
858extern QEMUMachine core99_machine;
859extern QEMUMachine heathrow_machine;
860
6af0bf9c
FB
861/* mips_r4k.c */
862extern QEMUMachine mips_machine;
863
27c7ca7e
FB
864/* shix.c */
865extern QEMUMachine shix_machine;
866
8cc43fef
FB
867#ifdef TARGET_PPC
868ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
869#endif
64201201 870void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
77d4bc34
FB
871
872extern CPUWriteMemoryFunc *PPC_io_write[];
873extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 874void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 875
e95c8d51 876/* sun4m.c */
54fa5af5 877extern QEMUMachine sun4m_machine;
e80cfcfc 878uint32_t iommu_translate(uint32_t addr);
ba3c64fb 879void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
e95c8d51
FB
880
881/* iommu.c */
e80cfcfc
FB
882void *iommu_init(uint32_t addr);
883uint32_t iommu_translate_local(void *opaque, uint32_t addr);
e95c8d51
FB
884
885/* lance.c */
7c9d8e07 886void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr);
e95c8d51
FB
887
888/* tcx.c */
95219897 889void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 890 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
FB
891
892/* slavio_intctl.c */
893void *slavio_intctl_init();
ba3c64fb 894void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
FB
895void slavio_pic_info(void *opaque);
896void slavio_irq_info(void *opaque);
897void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 898void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51 899
5fe141fd
FB
900/* loader.c */
901int get_image_size(const char *filename);
902int load_image(const char *filename, uint8_t *addr);
9ee3c029 903int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
e80cfcfc
FB
904int load_aout(const char *filename, uint8_t *addr);
905
906/* slavio_timer.c */
ba3c64fb 907void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 908
e80cfcfc
FB
909/* slavio_serial.c */
910SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
911void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 912
3475187d
FB
913/* slavio_misc.c */
914void *slavio_misc_init(uint32_t base, int irq);
915void slavio_set_power_fail(void *opaque, int power_failing);
916
6f7e9aec
FB
917/* esp.c */
918void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr);
919
3475187d
FB
920/* sun4u.c */
921extern QEMUMachine sun4u_machine;
922
64201201
FB
923/* NVRAM helpers */
924#include "hw/m48t59.h"
925
926void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
927uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
928void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
929uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
930void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
931uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
932void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
933 const unsigned char *str, uint32_t max);
934int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
935void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
936 uint32_t start, uint32_t count);
937int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
938 const unsigned char *arch,
939 uint32_t RAM_size, int boot_device,
940 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 941 const char *cmdline,
64201201 942 uint32_t initrd_image, uint32_t initrd_size,
28b9b5af
FB
943 uint32_t NVRAM_image,
944 int width, int height, int depth);
64201201 945
63066f4f
FB
946/* adb.c */
947
948#define MAX_ADB_DEVICES 16
949
e2733d20 950#define ADB_MAX_OUT_LEN 16
63066f4f 951
e2733d20 952typedef struct ADBDevice ADBDevice;
63066f4f 953
e2733d20
FB
954/* buf = NULL means polling */
955typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
956 const uint8_t *buf, int len);
12c28fed
FB
957typedef int ADBDeviceReset(ADBDevice *d);
958
63066f4f
FB
959struct ADBDevice {
960 struct ADBBusState *bus;
961 int devaddr;
962 int handler;
e2733d20 963 ADBDeviceRequest *devreq;
12c28fed 964 ADBDeviceReset *devreset;
63066f4f
FB
965 void *opaque;
966};
967
968typedef struct ADBBusState {
969 ADBDevice devices[MAX_ADB_DEVICES];
970 int nb_devices;
e2733d20 971 int poll_index;
63066f4f
FB
972} ADBBusState;
973
e2733d20
FB
974int adb_request(ADBBusState *s, uint8_t *buf_out,
975 const uint8_t *buf, int len);
976int adb_poll(ADBBusState *s, uint8_t *buf_out);
63066f4f
FB
977
978ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 979 ADBDeviceRequest *devreq,
12c28fed 980 ADBDeviceReset *devreset,
63066f4f
FB
981 void *opaque);
982void adb_kbd_init(ADBBusState *bus);
983void adb_mouse_init(ADBBusState *bus);
984
985/* cuda.c */
986
987extern ADBBusState adb_bus;
54fa5af5 988int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 989
bb36d470
FB
990#include "hw/usb.h"
991
a594cfbf
FB
992/* usb ports of the VM */
993
994#define MAX_VM_USB_PORTS 8
995
996extern USBPort *vm_usb_ports[MAX_VM_USB_PORTS];
997extern USBDevice *vm_usb_hub;
998
999void do_usb_add(const char *devname);
1000void do_usb_del(const char *devname);
1001void usb_info(void);
1002
b5ff1b31 1003/* integratorcp.c */
40f137e1
PB
1004extern QEMUMachine integratorcp926_machine;
1005extern QEMUMachine integratorcp1026_machine;
b5ff1b31 1006
cdbdb648
PB
1007/* versatilepb.c */
1008extern QEMUMachine versatilepb_machine;
16406950 1009extern QEMUMachine versatileab_machine;
cdbdb648 1010
daa57963
FB
1011/* ps2.c */
1012void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1013void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1014void ps2_write_mouse(void *, int val);
1015void ps2_write_keyboard(void *, int val);
1016uint32_t ps2_read_data(void *);
1017void ps2_queue(void *, int b);
f94f5d71 1018void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 1019
80337b66
FB
1020/* smc91c111.c */
1021void smc91c111_init(NICInfo *, uint32_t, void *, int);
1022
bdd5003a 1023/* pl110.c */
95219897 1024void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
bdd5003a 1025
cdbdb648
PB
1026/* pl011.c */
1027void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1028
1029/* pl050.c */
1030void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1031
1032/* pl080.c */
1033void *pl080_init(uint32_t base, void *pic, int irq);
1034
1035/* pl190.c */
1036void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1037
1038/* arm-timer.c */
1039void sp804_init(uint32_t base, void *pic, int irq);
1040void icp_pit_init(uint32_t base, void *pic, int irq);
1041
16406950
PB
1042/* arm_boot.c */
1043
1044void arm_load_kernel(int ram_size, const char *kernel_filename,
1045 const char *kernel_cmdline, const char *initrd_filename,
1046 int board_id);
1047
27c7ca7e
FB
1048/* sh7750.c */
1049struct SH7750State;
1050
008a8818 1051struct SH7750State *sh7750_init(CPUState * cpu);
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FB
1052
1053typedef struct {
1054 /* The callback will be triggered if any of the designated lines change */
1055 uint16_t portamask_trigger;
1056 uint16_t portbmask_trigger;
1057 /* Return 0 if no action was taken */
1058 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1059 uint16_t * periph_pdtra,
1060 uint16_t * periph_portdira,
1061 uint16_t * periph_pdtrb,
1062 uint16_t * periph_portdirb);
1063} sh7750_io_device;
1064
1065int sh7750_register_io_device(struct SH7750State *s,
1066 sh7750_io_device * device);
1067/* tc58128.c */
1068int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1069
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FB
1070#endif /* defined(QEMU_TOOL) */
1071
c4b1fcc0 1072/* monitor.c */
82c643ff 1073void monitor_init(CharDriverState *hd, int show_banner);
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FB
1074void term_puts(const char *str);
1075void term_vprintf(const char *fmt, va_list ap);
40c3bac3 1076void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
c4b1fcc0
FB
1077void term_flush(void);
1078void term_print_help(void);
ea2384d3
FB
1079void monitor_readline(const char *prompt, int is_password,
1080 char *buf, int buf_size);
1081
1082/* readline.c */
1083typedef void ReadLineFunc(void *opaque, const char *str);
1084
1085extern int completion_index;
1086void add_completion(const char *str);
1087void readline_handle_byte(int ch);
1088void readline_find_completion(const char *cmdline);
1089const char *readline_get_history(unsigned int index);
1090void readline_start(const char *prompt, int is_password,
1091 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1092
5e6ad6f9
FB
1093void kqemu_record_dump(void);
1094
fc01f7e7 1095#endif /* VL_H */
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