]> Git Repo - qemu.git/blame - vl.h
Great PowerPC emulation code resynchronisation and improvments:
[qemu.git] / vl.h
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fc01f7e7
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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
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35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
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40
41#ifndef O_LARGEFILE
42#define O_LARGEFILE 0
43#endif
40c3bac3
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44#ifndef O_BINARY
45#define O_BINARY 0
46#endif
67b915a5 47
71c2fd5c
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48#ifndef ENOMEDIUM
49#define ENOMEDIUM ENODEV
50#endif
2e9671da 51
67b915a5 52#ifdef _WIN32
a18e524a 53#include <windows.h>
ac62f715 54#define fsync _commit
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55#define lseek _lseeki64
56#define ENOTSUP 4096
beac80cd
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57extern int qemu_ftruncate64(int, int64_t);
58#define ftruncate qemu_ftruncate64
59
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60
61static inline char *realpath(const char *path, char *resolved_path)
62{
63 _fullpath(resolved_path, path, _MAX_PATH);
64 return resolved_path;
65}
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66
67#define PRId64 "I64d"
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68#define PRIx64 "I64x"
69#define PRIu64 "I64u"
70#define PRIo64 "I64o"
67b915a5 71#endif
8a7ddc38 72
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73#ifdef QEMU_TOOL
74
75/* we use QEMU_TOOL in the command line tools which do not depend on
76 the target CPU type */
77#include "config-host.h"
78#include <setjmp.h>
79#include "osdep.h"
80#include "bswap.h"
81
82#else
83
4f209290 84#include "audio/audio.h"
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85#include "cpu.h"
86
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87#endif /* !defined(QEMU_TOOL) */
88
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89#ifndef glue
90#define xglue(x, y) x ## y
91#define glue(x, y) xglue(x, y)
92#define stringify(s) tostring(s)
93#define tostring(s) #s
94#endif
95
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96#ifndef MIN
97#define MIN(a, b) (((a) < (b)) ? (a) : (b))
98#endif
99#ifndef MAX
100#define MAX(a, b) (((a) > (b)) ? (a) : (b))
101#endif
102
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103/* cutils.c */
104void pstrcpy(char *buf, int buf_size, const char *str);
105char *pstrcat(char *buf, int buf_size, const char *s);
106int strstart(const char *str, const char *val, const char **ptr);
107int stristart(const char *str, const char *val, const char **ptr);
108
33e3963e 109/* vl.c */
80cabfad 110uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 111
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112void hw_error(const char *fmt, ...);
113
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114extern const char *bios_dir;
115
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116extern int vm_running;
117
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118typedef struct vm_change_state_entry VMChangeStateEntry;
119typedef void VMChangeStateHandler(void *opaque, int running);
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120typedef void VMStopHandler(void *opaque, int reason);
121
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122VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
123 void *opaque);
124void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
125
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126int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
127void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
128
129void vm_start(void);
130void vm_stop(int reason);
131
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132typedef void QEMUResetHandler(void *opaque);
133
134void qemu_register_reset(QEMUResetHandler *func, void *opaque);
135void qemu_system_reset_request(void);
136void qemu_system_shutdown_request(void);
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137void qemu_system_powerdown_request(void);
138#if !defined(TARGET_SPARC)
139// Please implement a power failure function to signal the OS
140#define qemu_system_powerdown() do{}while(0)
141#else
142void qemu_system_powerdown(void);
143#endif
bb0c6722 144
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145void main_loop_wait(int timeout);
146
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147extern int ram_size;
148extern int bios_size;
ee22c2f7 149extern int rtc_utc;
1f04275e 150extern int cirrus_vga_enabled;
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151extern int graphic_width;
152extern int graphic_height;
153extern int graphic_depth;
3d11d0eb 154extern const char *keyboard_layout;
d993e026 155extern int kqemu_allowed;
a09db21f 156extern int win2k_install_hack;
bb36d470 157extern int usb_enabled;
6a00d601 158extern int smp_cpus;
667accab 159extern int no_quit;
8e71621f 160extern int semihosting_enabled;
3c07f8e8 161extern int autostart;
47d5d01a 162extern const char *bootp_filename;
0ced6589 163
9ae02555
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164#define MAX_OPTION_ROMS 16
165extern const char *option_rom[MAX_OPTION_ROMS];
166extern int nb_option_roms;
167
0ced6589 168/* XXX: make it dynamic */
970ac5a3 169#define MAX_BIOS_SIZE (4 * 1024 * 1024)
75956cf0 170#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
d5295253 171#define BIOS_SIZE ((512 + 32) * 1024)
6af0bf9c 172#elif defined(TARGET_MIPS)
567daa49 173#define BIOS_SIZE (4 * 1024 * 1024)
0ced6589 174#endif
aaaa7df6 175
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176/* keyboard/mouse support */
177
178#define MOUSE_EVENT_LBUTTON 0x01
179#define MOUSE_EVENT_RBUTTON 0x02
180#define MOUSE_EVENT_MBUTTON 0x04
181
182typedef void QEMUPutKBDEvent(void *opaque, int keycode);
183typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
184
455204eb
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185typedef struct QEMUPutMouseEntry {
186 QEMUPutMouseEvent *qemu_put_mouse_event;
187 void *qemu_put_mouse_event_opaque;
188 int qemu_put_mouse_event_absolute;
189 char *qemu_put_mouse_event_name;
190
191 /* used internally by qemu for handling mice */
192 struct QEMUPutMouseEntry *next;
193} QEMUPutMouseEntry;
194
63066f4f 195void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
455204eb
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196QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
197 void *opaque, int absolute,
198 const char *name);
199void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
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200
201void kbd_put_keycode(int keycode);
202void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
09b26c5e 203int kbd_mouse_is_absolute(void);
63066f4f 204
455204eb
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205void do_info_mice(void);
206void do_mouse_set(int index);
207
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208/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
209 constants) */
210#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
211#define QEMU_KEY_BACKSPACE 0x007f
212#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
213#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
214#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
215#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
216#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
217#define QEMU_KEY_END QEMU_KEY_ESC1(4)
218#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
219#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
220#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
221
222#define QEMU_KEY_CTRL_UP 0xe400
223#define QEMU_KEY_CTRL_DOWN 0xe401
224#define QEMU_KEY_CTRL_LEFT 0xe402
225#define QEMU_KEY_CTRL_RIGHT 0xe403
226#define QEMU_KEY_CTRL_HOME 0xe404
227#define QEMU_KEY_CTRL_END 0xe405
228#define QEMU_KEY_CTRL_PAGEUP 0xe406
229#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
230
231void kbd_put_keysym(int keysym);
232
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233/* async I/O support */
234
235typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
236typedef int IOCanRWHandler(void *opaque);
7c9d8e07 237typedef void IOHandler(void *opaque);
c20709aa 238
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239int qemu_set_fd_handler2(int fd,
240 IOCanRWHandler *fd_read_poll,
241 IOHandler *fd_read,
242 IOHandler *fd_write,
243 void *opaque);
244int qemu_set_fd_handler(int fd,
245 IOHandler *fd_read,
246 IOHandler *fd_write,
247 void *opaque);
c20709aa 248
f331110f
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249/* Polling handling */
250
251/* return TRUE if no sleep should be done afterwards */
252typedef int PollingFunc(void *opaque);
253
254int qemu_add_polling_cb(PollingFunc *func, void *opaque);
255void qemu_del_polling_cb(PollingFunc *func, void *opaque);
256
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257#ifdef _WIN32
258/* Wait objects handling */
259typedef void WaitObjectFunc(void *opaque);
260
261int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
262void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
263#endif
264
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265typedef struct QEMUBH QEMUBH;
266
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267/* character device */
268
269#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 270#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
86e94dea 271#define CHR_EVENT_RESET 2 /* new connection established */
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272
273
274#define CHR_IOCTL_SERIAL_SET_PARAMS 1
275typedef struct {
276 int speed;
277 int parity;
278 int data_bits;
279 int stop_bits;
280} QEMUSerialSetParams;
281
282#define CHR_IOCTL_SERIAL_SET_BREAK 2
283
284#define CHR_IOCTL_PP_READ_DATA 3
285#define CHR_IOCTL_PP_WRITE_DATA 4
286#define CHR_IOCTL_PP_READ_CONTROL 5
287#define CHR_IOCTL_PP_WRITE_CONTROL 6
288#define CHR_IOCTL_PP_READ_STATUS 7
5867c88a
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289#define CHR_IOCTL_PP_EPP_READ_ADDR 8
290#define CHR_IOCTL_PP_EPP_READ 9
291#define CHR_IOCTL_PP_EPP_WRITE_ADDR 10
292#define CHR_IOCTL_PP_EPP_WRITE 11
2122c51a 293
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294typedef void IOEventHandler(void *opaque, int event);
295
296typedef struct CharDriverState {
297 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
e5b0bc44 298 void (*chr_update_read_handler)(struct CharDriverState *s);
2122c51a 299 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 300 IOEventHandler *chr_event;
e5b0bc44
PB
301 IOCanRWHandler *chr_can_read;
302 IOReadHandler *chr_read;
303 void *handler_opaque;
eb45f5fe 304 void (*chr_send_event)(struct CharDriverState *chr, int event);
f331110f 305 void (*chr_close)(struct CharDriverState *chr);
82c643ff 306 void *opaque;
20d8a3ed 307 int focus;
86e94dea 308 QEMUBH *bh;
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309} CharDriverState;
310
5856de80 311CharDriverState *qemu_chr_open(const char *filename);
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312void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
313int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 314void qemu_chr_send_event(CharDriverState *s, int event);
e5b0bc44
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315void qemu_chr_add_handlers(CharDriverState *s,
316 IOCanRWHandler *fd_can_read,
317 IOReadHandler *fd_read,
318 IOEventHandler *fd_event,
319 void *opaque);
2122c51a 320int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
86e94dea 321void qemu_chr_reset(CharDriverState *s);
e5b0bc44
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322int qemu_chr_can_read(CharDriverState *s);
323void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
f8d179e3 324
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325/* consoles */
326
327typedef struct DisplayState DisplayState;
328typedef struct TextConsole TextConsole;
329
95219897
PB
330typedef void (*vga_hw_update_ptr)(void *);
331typedef void (*vga_hw_invalidate_ptr)(void *);
332typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
333
334TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
335 vga_hw_invalidate_ptr invalidate,
336 vga_hw_screen_dump_ptr screen_dump,
337 void *opaque);
338void vga_hw_update(void);
339void vga_hw_invalidate(void);
340void vga_hw_screen_dump(const char *filename);
341
342int is_graphic_console(void);
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343CharDriverState *text_console_init(DisplayState *ds);
344void console_select(unsigned int index);
345
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346/* serial ports */
347
348#define MAX_SERIAL_PORTS 4
349
350extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
351
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352/* parallel ports */
353
354#define MAX_PARALLEL_PORTS 3
355
356extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
357
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358struct ParallelIOArg {
359 void *buffer;
360 int count;
361};
362
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363/* VLANs support */
364
365typedef struct VLANClientState VLANClientState;
366
367struct VLANClientState {
368 IOReadHandler *fd_read;
d861b05e
PB
369 /* Packets may still be sent if this returns zero. It's used to
370 rate-limit the slirp code. */
371 IOCanRWHandler *fd_can_read;
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372 void *opaque;
373 struct VLANClientState *next;
374 struct VLANState *vlan;
375 char info_str[256];
376};
377
378typedef struct VLANState {
379 int id;
380 VLANClientState *first_client;
381 struct VLANState *next;
382} VLANState;
383
384VLANState *qemu_find_vlan(int id);
385VLANClientState *qemu_new_vlan_client(VLANState *vlan,
d861b05e
PB
386 IOReadHandler *fd_read,
387 IOCanRWHandler *fd_can_read,
388 void *opaque);
389int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 390void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 391void qemu_handler_true(void *opaque);
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392
393void do_info_network(void);
394
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395/* TAP win32 */
396int tap_win32_init(VLANState *vlan, const char *ifname);
7fb843f8 397
7c9d8e07 398/* NIC info */
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399
400#define MAX_NICS 8
401
7c9d8e07 402typedef struct NICInfo {
c4b1fcc0 403 uint8_t macaddr[6];
a41b2ff2 404 const char *model;
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405 VLANState *vlan;
406} NICInfo;
c4b1fcc0
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407
408extern int nb_nics;
7c9d8e07 409extern NICInfo nd_table[MAX_NICS];
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410
411/* timers */
412
413typedef struct QEMUClock QEMUClock;
414typedef struct QEMUTimer QEMUTimer;
415typedef void QEMUTimerCB(void *opaque);
416
417/* The real time clock should be used only for stuff which does not
418 change the virtual machine state, as it is run even if the virtual
69b91039 419 machine is stopped. The real time clock has a frequency of 1000
8a7ddc38
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420 Hz. */
421extern QEMUClock *rt_clock;
422
e80cfcfc 423/* The virtual clock is only run during the emulation. It is stopped
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424 when the virtual machine is stopped. Virtual timers use a high
425 precision clock, usually cpu cycles (use ticks_per_sec). */
426extern QEMUClock *vm_clock;
427
428int64_t qemu_get_clock(QEMUClock *clock);
429
430QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
431void qemu_free_timer(QEMUTimer *ts);
432void qemu_del_timer(QEMUTimer *ts);
433void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
434int qemu_timer_pending(QEMUTimer *ts);
435
436extern int64_t ticks_per_sec;
437extern int pit_min_timer_count;
438
1dce7c3c 439int64_t cpu_get_ticks(void);
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440void cpu_enable_ticks(void);
441void cpu_disable_ticks(void);
442
443/* VM Load/Save */
444
faea38e7 445typedef struct QEMUFile QEMUFile;
8a7ddc38 446
faea38e7
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447QEMUFile *qemu_fopen(const char *filename, const char *mode);
448void qemu_fflush(QEMUFile *f);
449void qemu_fclose(QEMUFile *f);
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450void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
451void qemu_put_byte(QEMUFile *f, int v);
452void qemu_put_be16(QEMUFile *f, unsigned int v);
453void qemu_put_be32(QEMUFile *f, unsigned int v);
454void qemu_put_be64(QEMUFile *f, uint64_t v);
455int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
456int qemu_get_byte(QEMUFile *f);
457unsigned int qemu_get_be16(QEMUFile *f);
458unsigned int qemu_get_be32(QEMUFile *f);
459uint64_t qemu_get_be64(QEMUFile *f);
460
461static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
462{
463 qemu_put_be64(f, *pv);
464}
465
466static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
467{
468 qemu_put_be32(f, *pv);
469}
470
471static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
472{
473 qemu_put_be16(f, *pv);
474}
475
476static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
477{
478 qemu_put_byte(f, *pv);
479}
480
481static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
482{
483 *pv = qemu_get_be64(f);
484}
485
486static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
487{
488 *pv = qemu_get_be32(f);
489}
490
491static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
492{
493 *pv = qemu_get_be16(f);
494}
495
496static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
497{
498 *pv = qemu_get_byte(f);
499}
500
c27004ec
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501#if TARGET_LONG_BITS == 64
502#define qemu_put_betl qemu_put_be64
503#define qemu_get_betl qemu_get_be64
504#define qemu_put_betls qemu_put_be64s
505#define qemu_get_betls qemu_get_be64s
506#else
507#define qemu_put_betl qemu_put_be32
508#define qemu_get_betl qemu_get_be32
509#define qemu_put_betls qemu_put_be32s
510#define qemu_get_betls qemu_get_be32s
511#endif
512
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513int64_t qemu_ftell(QEMUFile *f);
514int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
515
516typedef void SaveStateHandler(QEMUFile *f, void *opaque);
517typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
518
8a7ddc38
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519int register_savevm(const char *idstr,
520 int instance_id,
521 int version_id,
522 SaveStateHandler *save_state,
523 LoadStateHandler *load_state,
524 void *opaque);
525void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
526void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 527
6a00d601
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528void cpu_save(QEMUFile *f, void *opaque);
529int cpu_load(QEMUFile *f, void *opaque, int version_id);
530
faea38e7
FB
531void do_savevm(const char *name);
532void do_loadvm(const char *name);
533void do_delvm(const char *name);
534void do_info_snapshots(void);
535
83f64091 536/* bottom halves */
83f64091
FB
537typedef void QEMUBHFunc(void *opaque);
538
539QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
540void qemu_bh_schedule(QEMUBH *bh);
541void qemu_bh_cancel(QEMUBH *bh);
542void qemu_bh_delete(QEMUBH *bh);
6eb5733a 543int qemu_bh_poll(void);
83f64091 544
fc01f7e7
FB
545/* block.c */
546typedef struct BlockDriverState BlockDriverState;
ea2384d3
FB
547typedef struct BlockDriver BlockDriver;
548
549extern BlockDriver bdrv_raw;
19cb3738 550extern BlockDriver bdrv_host_device;
ea2384d3
FB
551extern BlockDriver bdrv_cow;
552extern BlockDriver bdrv_qcow;
553extern BlockDriver bdrv_vmdk;
3c56521b 554extern BlockDriver bdrv_cloop;
585d0ed9 555extern BlockDriver bdrv_dmg;
a8753c34 556extern BlockDriver bdrv_bochs;
6a0f9e82 557extern BlockDriver bdrv_vpc;
de167e41 558extern BlockDriver bdrv_vvfat;
faea38e7
FB
559extern BlockDriver bdrv_qcow2;
560
561typedef struct BlockDriverInfo {
562 /* in bytes, 0 if irrelevant */
563 int cluster_size;
564 /* offset at which the VM state can be saved (0 if not possible) */
565 int64_t vm_state_offset;
566} BlockDriverInfo;
567
568typedef struct QEMUSnapshotInfo {
569 char id_str[128]; /* unique snapshot id */
570 /* the following fields are informative. They are not needed for
571 the consistency of the snapshot */
572 char name[256]; /* user choosen name */
573 uint32_t vm_state_size; /* VM state info size */
574 uint32_t date_sec; /* UTC date of the snapshot */
575 uint32_t date_nsec;
576 uint64_t vm_clock_nsec; /* VM clock relative to boot */
577} QEMUSnapshotInfo;
ea2384d3 578
83f64091
FB
579#define BDRV_O_RDONLY 0x0000
580#define BDRV_O_RDWR 0x0002
581#define BDRV_O_ACCESS 0x0003
582#define BDRV_O_CREAT 0x0004 /* create an empty file */
583#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
584#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
585 use a disk image format on top of
586 it (default for
587 bdrv_file_open()) */
588
ea2384d3
FB
589void bdrv_init(void);
590BlockDriver *bdrv_find_format(const char *format_name);
591int bdrv_create(BlockDriver *drv,
592 const char *filename, int64_t size_in_sectors,
593 const char *backing_file, int flags);
c4b1fcc0
FB
594BlockDriverState *bdrv_new(const char *device_name);
595void bdrv_delete(BlockDriverState *bs);
83f64091
FB
596int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
597int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
598int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
ea2384d3 599 BlockDriver *drv);
fc01f7e7
FB
600void bdrv_close(BlockDriverState *bs);
601int bdrv_read(BlockDriverState *bs, int64_t sector_num,
602 uint8_t *buf, int nb_sectors);
603int bdrv_write(BlockDriverState *bs, int64_t sector_num,
604 const uint8_t *buf, int nb_sectors);
83f64091
FB
605int bdrv_pread(BlockDriverState *bs, int64_t offset,
606 void *buf, int count);
607int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
608 const void *buf, int count);
609int bdrv_truncate(BlockDriverState *bs, int64_t offset);
610int64_t bdrv_getlength(BlockDriverState *bs);
fc01f7e7 611void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 612int bdrv_commit(BlockDriverState *bs);
77fef8c1 613void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
83f64091
FB
614/* async block I/O */
615typedef struct BlockDriverAIOCB BlockDriverAIOCB;
616typedef void BlockDriverCompletionFunc(void *opaque, int ret);
617
ce1a14dc
PB
618BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
619 uint8_t *buf, int nb_sectors,
620 BlockDriverCompletionFunc *cb, void *opaque);
621BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
622 const uint8_t *buf, int nb_sectors,
623 BlockDriverCompletionFunc *cb, void *opaque);
83f64091 624void bdrv_aio_cancel(BlockDriverAIOCB *acb);
83f64091
FB
625
626void qemu_aio_init(void);
627void qemu_aio_poll(void);
6192bc37 628void qemu_aio_flush(void);
83f64091
FB
629void qemu_aio_wait_start(void);
630void qemu_aio_wait(void);
631void qemu_aio_wait_end(void);
632
7a6cba61
PB
633/* Ensure contents are flushed to disk. */
634void bdrv_flush(BlockDriverState *bs);
33e3963e 635
c4b1fcc0
FB
636#define BDRV_TYPE_HD 0
637#define BDRV_TYPE_CDROM 1
638#define BDRV_TYPE_FLOPPY 2
4dbb0f50
TS
639#define BIOS_ATA_TRANSLATION_AUTO 0
640#define BIOS_ATA_TRANSLATION_NONE 1
641#define BIOS_ATA_TRANSLATION_LBA 2
642#define BIOS_ATA_TRANSLATION_LARGE 3
643#define BIOS_ATA_TRANSLATION_RECHS 4
c4b1fcc0
FB
644
645void bdrv_set_geometry_hint(BlockDriverState *bs,
646 int cyls, int heads, int secs);
647void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 648void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
c4b1fcc0
FB
649void bdrv_get_geometry_hint(BlockDriverState *bs,
650 int *pcyls, int *pheads, int *psecs);
651int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 652int bdrv_get_translation_hint(BlockDriverState *bs);
c4b1fcc0
FB
653int bdrv_is_removable(BlockDriverState *bs);
654int bdrv_is_read_only(BlockDriverState *bs);
655int bdrv_is_inserted(BlockDriverState *bs);
19cb3738 656int bdrv_media_changed(BlockDriverState *bs);
c4b1fcc0
FB
657int bdrv_is_locked(BlockDriverState *bs);
658void bdrv_set_locked(BlockDriverState *bs, int locked);
19cb3738 659void bdrv_eject(BlockDriverState *bs, int eject_flag);
c4b1fcc0
FB
660void bdrv_set_change_cb(BlockDriverState *bs,
661 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 662void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
c4b1fcc0
FB
663void bdrv_info(void);
664BlockDriverState *bdrv_find(const char *name);
82c643ff 665void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
ea2384d3
FB
666int bdrv_is_encrypted(BlockDriverState *bs);
667int bdrv_set_key(BlockDriverState *bs, const char *key);
668void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
669 void *opaque);
670const char *bdrv_get_device_name(BlockDriverState *bs);
faea38e7
FB
671int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
672 const uint8_t *buf, int nb_sectors);
673int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
c4b1fcc0 674
83f64091
FB
675void bdrv_get_backing_filename(BlockDriverState *bs,
676 char *filename, int filename_size);
faea38e7
FB
677int bdrv_snapshot_create(BlockDriverState *bs,
678 QEMUSnapshotInfo *sn_info);
679int bdrv_snapshot_goto(BlockDriverState *bs,
680 const char *snapshot_id);
681int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
682int bdrv_snapshot_list(BlockDriverState *bs,
683 QEMUSnapshotInfo **psn_info);
684char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
685
686char *get_human_readable_size(char *buf, int buf_size, int64_t size);
83f64091
FB
687int path_is_absolute(const char *path);
688void path_combine(char *dest, int dest_size,
689 const char *base_path,
690 const char *filename);
ea2384d3
FB
691
692#ifndef QEMU_TOOL
54fa5af5
FB
693
694typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
695 int boot_device,
696 DisplayState *ds, const char **fd_filename, int snapshot,
697 const char *kernel_filename, const char *kernel_cmdline,
94fc95cd 698 const char *initrd_filename, const char *cpu_model);
54fa5af5
FB
699
700typedef struct QEMUMachine {
701 const char *name;
702 const char *desc;
703 QEMUMachineInitFunc *init;
704 struct QEMUMachine *next;
705} QEMUMachine;
706
707int qemu_register_machine(QEMUMachine *m);
708
709typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 710typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 711
94fc95cd
JM
712#if defined(TARGET_PPC)
713void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
714#endif
715
26aa7d72
FB
716/* ISA bus */
717
718extern target_phys_addr_t isa_mem_base;
719
720typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
721typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
722
723int register_ioport_read(int start, int length, int size,
724 IOPortReadFunc *func, void *opaque);
725int register_ioport_write(int start, int length, int size,
726 IOPortWriteFunc *func, void *opaque);
69b91039
FB
727void isa_unassign_ioport(int start, int length);
728
aef445bd
PB
729void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
730
69b91039
FB
731/* PCI bus */
732
69b91039
FB
733extern target_phys_addr_t pci_mem_base;
734
46e50e9d 735typedef struct PCIBus PCIBus;
69b91039
FB
736typedef struct PCIDevice PCIDevice;
737
738typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
739 uint32_t address, uint32_t data, int len);
740typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
741 uint32_t address, int len);
742typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
743 uint32_t addr, uint32_t size, int type);
744
745#define PCI_ADDRESS_SPACE_MEM 0x00
746#define PCI_ADDRESS_SPACE_IO 0x01
747#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
748
749typedef struct PCIIORegion {
5768f5ac 750 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
69b91039
FB
751 uint32_t size;
752 uint8_t type;
753 PCIMapIORegionFunc *map_func;
754} PCIIORegion;
755
8a8696a3
FB
756#define PCI_ROM_SLOT 6
757#define PCI_NUM_REGIONS 7
502a5395
PB
758
759#define PCI_DEVICES_MAX 64
760
761#define PCI_VENDOR_ID 0x00 /* 16 bits */
762#define PCI_DEVICE_ID 0x02 /* 16 bits */
763#define PCI_COMMAND 0x04 /* 16 bits */
764#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
765#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
766#define PCI_CLASS_DEVICE 0x0a /* Device class */
767#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
768#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
769#define PCI_MIN_GNT 0x3e /* 8 bits */
770#define PCI_MAX_LAT 0x3f /* 8 bits */
771
69b91039
FB
772struct PCIDevice {
773 /* PCI config space */
774 uint8_t config[256];
775
776 /* the following fields are read only */
46e50e9d 777 PCIBus *bus;
69b91039
FB
778 int devfn;
779 char name[64];
8a8696a3 780 PCIIORegion io_regions[PCI_NUM_REGIONS];
69b91039
FB
781
782 /* do not access the following fields */
783 PCIConfigReadFunc *config_read;
784 PCIConfigWriteFunc *config_write;
502a5395 785 /* ??? This is a PC-specific hack, and should be removed. */
5768f5ac 786 int irq_index;
d2b59317
PB
787
788 /* Current IRQ levels. Used internally by the generic PCI code. */
789 int irq_state[4];
69b91039
FB
790};
791
46e50e9d
FB
792PCIDevice *pci_register_device(PCIBus *bus, const char *name,
793 int instance_size, int devfn,
69b91039
FB
794 PCIConfigReadFunc *config_read,
795 PCIConfigWriteFunc *config_write);
796
797void pci_register_io_region(PCIDevice *pci_dev, int region_num,
798 uint32_t size, int type,
799 PCIMapIORegionFunc *map_func);
800
5768f5ac
FB
801void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
802
803uint32_t pci_default_read_config(PCIDevice *d,
804 uint32_t address, int len);
805void pci_default_write_config(PCIDevice *d,
806 uint32_t address, uint32_t val, int len);
89b6b508
FB
807void pci_device_save(PCIDevice *s, QEMUFile *f);
808int pci_device_load(PCIDevice *s, QEMUFile *f);
5768f5ac 809
d2b59317
PB
810typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
811typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
812PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
80b3ada7 813 void *pic, int devfn_min, int nirq);
502a5395 814
abcebc7e 815void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn);
502a5395
PB
816void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
817uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
818int pci_bus_num(PCIBus *s);
80b3ada7 819void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
9995c51f 820
5768f5ac 821void pci_info(void);
80b3ada7
PB
822PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
823 pci_map_irq_fn map_irq, const char *name);
26aa7d72 824
502a5395 825/* prep_pci.c */
46e50e9d 826PCIBus *pci_prep_init(void);
77d4bc34 827
502a5395
PB
828/* grackle_pci.c */
829PCIBus *pci_grackle_init(uint32_t base, void *pic);
830
831/* unin_pci.c */
832PCIBus *pci_pmac_init(void *pic);
833
834/* apb_pci.c */
835PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
836 void *pic);
837
e69954b9 838PCIBus *pci_vpb_init(void *pic, int irq, int realview);
502a5395
PB
839
840/* piix_pci.c */
f00fc47c
FB
841PCIBus *i440fx_init(PCIDevice **pi440fx_state);
842void i440fx_set_smm(PCIDevice *d, int val);
8f1c91d8 843int piix3_init(PCIBus *bus, int devfn);
f00fc47c 844void i440fx_init_memory_mappings(PCIDevice *d);
a41b2ff2 845
5856de80
TS
846int piix4_init(PCIBus *bus, int devfn);
847
28b9b5af
FB
848/* openpic.c */
849typedef struct openpic_t openpic_t;
54fa5af5 850void openpic_set_irq(void *opaque, int n_IRQ, int level);
7668a27f
FB
851openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
852 CPUState **envp);
28b9b5af 853
54fa5af5
FB
854/* heathrow_pic.c */
855typedef struct HeathrowPICS HeathrowPICS;
856void heathrow_pic_set_irq(void *opaque, int num, int level);
857HeathrowPICS *heathrow_pic_init(int *pmem_index);
858
fde7d5bd
TS
859/* gt64xxx.c */
860PCIBus *pci_gt64120_init(void *pic);
861
6a36d84e
FB
862#ifdef HAS_AUDIO
863struct soundhw {
864 const char *name;
865 const char *descr;
866 int enabled;
867 int isa;
868 union {
869 int (*init_isa) (AudioState *s);
870 int (*init_pci) (PCIBus *bus, AudioState *s);
871 } init;
872};
873
874extern struct soundhw soundhw[];
875#endif
876
313aa567
FB
877/* vga.c */
878
74a14f22 879#define VGA_RAM_SIZE (8192 * 1024)
313aa567 880
82c643ff 881struct DisplayState {
313aa567
FB
882 uint8_t *data;
883 int linesize;
884 int depth;
d3079cd2 885 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
82c643ff
FB
886 int width;
887 int height;
24236869
FB
888 void *opaque;
889
313aa567
FB
890 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
891 void (*dpy_resize)(struct DisplayState *s, int w, int h);
892 void (*dpy_refresh)(struct DisplayState *s);
24236869 893 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
82c643ff 894};
313aa567
FB
895
896static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
897{
898 s->dpy_update(s, x, y, w, h);
899}
900
901static inline void dpy_resize(DisplayState *s, int w, int h)
902{
903 s->dpy_resize(s, w, h);
904}
905
89b6b508
FB
906int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
907 unsigned long vga_ram_offset, int vga_ram_size);
908int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
909 unsigned long vga_ram_offset, int vga_ram_size,
910 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 911
d6bfa22f 912/* cirrus_vga.c */
46e50e9d 913void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 914 unsigned long vga_ram_offset, int vga_ram_size);
d6bfa22f
FB
915void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
916 unsigned long vga_ram_offset, int vga_ram_size);
917
313aa567 918/* sdl.c */
43523e93 919void sdl_display_init(DisplayState *ds, int full_screen, int no_frame);
313aa567 920
da4dbf74
FB
921/* cocoa.m */
922void cocoa_display_init(DisplayState *ds, int full_screen);
923
24236869 924/* vnc.c */
73fc9742 925void vnc_display_init(DisplayState *ds, const char *display);
a9ce8590 926void do_info_vnc(void);
24236869 927
6070dd07
TS
928/* x_keymap.c */
929extern uint8_t _translate_keycode(const int key);
930
5391d806
FB
931/* ide.c */
932#define MAX_DISKS 4
933
faea38e7 934extern BlockDriverState *bs_table[MAX_DISKS + 1];
5391d806 935
69b91039
FB
936void isa_ide_init(int iobase, int iobase2, int irq,
937 BlockDriverState *hd0, BlockDriverState *hd1);
54fa5af5
FB
938void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
939 int secondary_ide_enabled);
502a5395 940void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
28b9b5af 941int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 942 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 943
2e5d83bb
PB
944/* cdrom.c */
945int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
946int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
947
9542611a
TS
948/* ds1225y.c */
949typedef struct ds1225y_t ds1225y_t;
950ds1225y_t *ds1225y_init(target_ulong mem_base, const char *filename);
951
1d14ffa9 952/* es1370.c */
c0fe3827 953int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 954
fb065187 955/* sb16.c */
c0fe3827 956int SB16_init (AudioState *s);
fb065187
FB
957
958/* adlib.c */
c0fe3827 959int Adlib_init (AudioState *s);
fb065187
FB
960
961/* gus.c */
c0fe3827 962int GUS_init (AudioState *s);
27503323
FB
963
964/* dma.c */
85571bc7 965typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 966int DMA_get_channel_mode (int nchan);
85571bc7
FB
967int DMA_read_memory (int nchan, void *buf, int pos, int size);
968int DMA_write_memory (int nchan, void *buf, int pos, int size);
27503323
FB
969void DMA_hold_DREQ (int nchan);
970void DMA_release_DREQ (int nchan);
16f62432 971void DMA_schedule(int nchan);
27503323 972void DMA_run (void);
28b9b5af 973void DMA_init (int high_page_enable);
27503323 974void DMA_register_channel (int nchan,
85571bc7
FB
975 DMA_transfer_handler transfer_handler,
976 void *opaque);
7138fcfb
FB
977/* fdc.c */
978#define MAX_FD 2
979extern BlockDriverState *fd_table[MAX_FD];
980
baca51fa
FB
981typedef struct fdctrl_t fdctrl_t;
982
983fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
984 uint32_t io_base,
985 BlockDriverState **fds);
986int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 987
80cabfad
FB
988/* ne2000.c */
989
7c9d8e07 990void isa_ne2000_init(int base, int irq, NICInfo *nd);
abcebc7e 991void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn);
80cabfad 992
a41b2ff2
PB
993/* rtl8139.c */
994
abcebc7e 995void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn);
a41b2ff2 996
e3c2613f
FB
997/* pcnet.c */
998
abcebc7e 999void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn);
67e999be
FB
1000void pcnet_h_reset(void *opaque);
1001void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
1002
e3c2613f 1003
80cabfad
FB
1004/* pckbd.c */
1005
80cabfad
FB
1006void kbd_init(void);
1007
1008/* mc146818rtc.c */
1009
8a7ddc38 1010typedef struct RTCState RTCState;
80cabfad 1011
8a7ddc38
FB
1012RTCState *rtc_init(int base, int irq);
1013void rtc_set_memory(RTCState *s, int addr, int val);
1014void rtc_set_date(RTCState *s, const struct tm *tm);
80cabfad
FB
1015
1016/* serial.c */
1017
c4b1fcc0 1018typedef struct SerialState SerialState;
e5d13e2f
FB
1019SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
1020 int base, int irq, CharDriverState *chr);
1021SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
1022 target_ulong base, int it_shift,
1023 int irq, CharDriverState *chr);
80cabfad 1024
6508fe59
FB
1025/* parallel.c */
1026
1027typedef struct ParallelState ParallelState;
1028ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
1029
80cabfad
FB
1030/* i8259.c */
1031
3de388f6
FB
1032typedef struct PicState2 PicState2;
1033extern PicState2 *isa_pic;
80cabfad 1034void pic_set_irq(int irq, int level);
54fa5af5 1035void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 1036PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
d592d303
FB
1037void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
1038 void *alt_irq_opaque);
3de388f6
FB
1039int pic_read_irq(PicState2 *s);
1040void pic_update_irq(PicState2 *s);
1041uint32_t pic_intack_read(PicState2 *s);
c20709aa 1042void pic_info(void);
4a0fb71e 1043void irq_info(void);
80cabfad 1044
c27004ec 1045/* APIC */
d592d303
FB
1046typedef struct IOAPICState IOAPICState;
1047
c27004ec
FB
1048int apic_init(CPUState *env);
1049int apic_get_interrupt(CPUState *env);
d592d303
FB
1050IOAPICState *ioapic_init(void);
1051void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 1052
80cabfad
FB
1053/* i8254.c */
1054
1055#define PIT_FREQ 1193182
1056
ec844b96
FB
1057typedef struct PITState PITState;
1058
1059PITState *pit_init(int base, int irq);
1060void pit_set_gate(PITState *pit, int channel, int val);
1061int pit_get_gate(PITState *pit, int channel);
fd06c375
FB
1062int pit_get_initial_count(PITState *pit, int channel);
1063int pit_get_mode(PITState *pit, int channel);
ec844b96 1064int pit_get_out(PITState *pit, int channel, int64_t current_time);
80cabfad 1065
fd06c375
FB
1066/* pcspk.c */
1067void pcspk_init(PITState *);
1068int pcspk_audio_init(AudioState *);
1069
3fffc223
TS
1070#include "hw/smbus.h"
1071
6515b203
FB
1072/* acpi.c */
1073extern int acpi_enabled;
502a5395 1074void piix4_pm_init(PCIBus *bus, int devfn);
3fffc223 1075void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
6515b203
FB
1076void acpi_bios_init(void);
1077
3fffc223
TS
1078/* smbus_eeprom.c */
1079SMBusDevice *smbus_eeprom_device_init(uint8_t addr, uint8_t *buf);
1080
80cabfad 1081/* pc.c */
54fa5af5 1082extern QEMUMachine pc_machine;
3dbbdc25 1083extern QEMUMachine isapc_machine;
52ca8d6a 1084extern int fd_bootchk;
80cabfad 1085
6a00d601
FB
1086void ioport_set_a20(int enable);
1087int ioport_get_a20(void);
1088
26aa7d72 1089/* ppc.c */
54fa5af5
FB
1090extern QEMUMachine prep_machine;
1091extern QEMUMachine core99_machine;
1092extern QEMUMachine heathrow_machine;
1093
6af0bf9c
FB
1094/* mips_r4k.c */
1095extern QEMUMachine mips_machine;
1096
5856de80
TS
1097/* mips_malta.c */
1098extern QEMUMachine mips_malta_machine;
1099
4de9b249
TS
1100/* mips_int */
1101extern void cpu_mips_irq_request(void *opaque, int irq, int level);
1102
e16fe40c
TS
1103/* mips_timer.c */
1104extern void cpu_mips_clock_init(CPUState *);
1105extern void cpu_mips_irqctrl_init (void);
1106
27c7ca7e
FB
1107/* shix.c */
1108extern QEMUMachine shix_machine;
1109
8cc43fef
FB
1110#ifdef TARGET_PPC
1111ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1112#endif
64201201 1113void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
77d4bc34
FB
1114
1115extern CPUWriteMemoryFunc *PPC_io_write[];
1116extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 1117void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 1118
e95c8d51 1119/* sun4m.c */
54fa5af5 1120extern QEMUMachine sun4m_machine;
ba3c64fb 1121void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
e95c8d51
FB
1122
1123/* iommu.c */
e80cfcfc 1124void *iommu_init(uint32_t addr);
67e999be 1125void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
a917d384 1126 uint8_t *buf, int len, int is_write);
67e999be
FB
1127static inline void sparc_iommu_memory_read(void *opaque,
1128 target_phys_addr_t addr,
1129 uint8_t *buf, int len)
1130{
1131 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1132}
e95c8d51 1133
67e999be
FB
1134static inline void sparc_iommu_memory_write(void *opaque,
1135 target_phys_addr_t addr,
1136 uint8_t *buf, int len)
1137{
1138 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1139}
e95c8d51
FB
1140
1141/* tcx.c */
95219897 1142void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 1143 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
FB
1144
1145/* slavio_intctl.c */
1146void *slavio_intctl_init();
ba3c64fb 1147void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
FB
1148void slavio_pic_info(void *opaque);
1149void slavio_irq_info(void *opaque);
1150void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 1151void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51 1152
5fe141fd
FB
1153/* loader.c */
1154int get_image_size(const char *filename);
1155int load_image(const char *filename, uint8_t *addr);
9ee3c029 1156int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
e80cfcfc 1157int load_aout(const char *filename, uint8_t *addr);
1c7b3754 1158int load_uboot(const char *filename, target_ulong *ep, int *is_linux);
e80cfcfc
FB
1159
1160/* slavio_timer.c */
ba3c64fb 1161void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 1162
e80cfcfc
FB
1163/* slavio_serial.c */
1164SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1165void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 1166
3475187d
FB
1167/* slavio_misc.c */
1168void *slavio_misc_init(uint32_t base, int irq);
1169void slavio_set_power_fail(void *opaque, int power_failing);
1170
6f7e9aec 1171/* esp.c */
fa1fb14c 1172void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
67e999be
FB
1173void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1174void esp_reset(void *opaque);
1175
1176/* sparc32_dma.c */
1177void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1178 void *intctl);
1179void ledma_set_irq(void *opaque, int isr);
9b94dc32
FB
1180void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1181 uint8_t *buf, int len, int do_bswap);
1182void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1183 uint8_t *buf, int len, int do_bswap);
67e999be
FB
1184void espdma_raise_irq(void *opaque);
1185void espdma_clear_irq(void *opaque);
1186void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1187void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1188void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1189 void *lance_opaque);
6f7e9aec 1190
b8174937
FB
1191/* cs4231.c */
1192void cs_init(target_phys_addr_t base, int irq, void *intctl);
1193
3475187d
FB
1194/* sun4u.c */
1195extern QEMUMachine sun4u_machine;
1196
64201201
FB
1197/* NVRAM helpers */
1198#include "hw/m48t59.h"
1199
1200void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1201uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1202void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1203uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1204void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1205uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1206void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1207 const unsigned char *str, uint32_t max);
1208int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1209void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1210 uint32_t start, uint32_t count);
1211int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1212 const unsigned char *arch,
1213 uint32_t RAM_size, int boot_device,
1214 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 1215 const char *cmdline,
64201201 1216 uint32_t initrd_image, uint32_t initrd_size,
28b9b5af
FB
1217 uint32_t NVRAM_image,
1218 int width, int height, int depth);
64201201 1219
63066f4f
FB
1220/* adb.c */
1221
1222#define MAX_ADB_DEVICES 16
1223
e2733d20 1224#define ADB_MAX_OUT_LEN 16
63066f4f 1225
e2733d20 1226typedef struct ADBDevice ADBDevice;
63066f4f 1227
e2733d20
FB
1228/* buf = NULL means polling */
1229typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1230 const uint8_t *buf, int len);
12c28fed
FB
1231typedef int ADBDeviceReset(ADBDevice *d);
1232
63066f4f
FB
1233struct ADBDevice {
1234 struct ADBBusState *bus;
1235 int devaddr;
1236 int handler;
e2733d20 1237 ADBDeviceRequest *devreq;
12c28fed 1238 ADBDeviceReset *devreset;
63066f4f
FB
1239 void *opaque;
1240};
1241
1242typedef struct ADBBusState {
1243 ADBDevice devices[MAX_ADB_DEVICES];
1244 int nb_devices;
e2733d20 1245 int poll_index;
63066f4f
FB
1246} ADBBusState;
1247
e2733d20
FB
1248int adb_request(ADBBusState *s, uint8_t *buf_out,
1249 const uint8_t *buf, int len);
1250int adb_poll(ADBBusState *s, uint8_t *buf_out);
63066f4f
FB
1251
1252ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 1253 ADBDeviceRequest *devreq,
12c28fed 1254 ADBDeviceReset *devreset,
63066f4f
FB
1255 void *opaque);
1256void adb_kbd_init(ADBBusState *bus);
1257void adb_mouse_init(ADBBusState *bus);
1258
1259/* cuda.c */
1260
1261extern ADBBusState adb_bus;
54fa5af5 1262int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 1263
bb36d470
FB
1264#include "hw/usb.h"
1265
a594cfbf
FB
1266/* usb ports of the VM */
1267
0d92ed30
PB
1268void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1269 usb_attachfn attach);
a594cfbf 1270
0d92ed30 1271#define VM_USB_HUB_SIZE 8
a594cfbf
FB
1272
1273void do_usb_add(const char *devname);
1274void do_usb_del(const char *devname);
1275void usb_info(void);
1276
2e5d83bb 1277/* scsi-disk.c */
4d611c9a
PB
1278enum scsi_reason {
1279 SCSI_REASON_DONE, /* Command complete. */
1280 SCSI_REASON_DATA /* Transfer complete, more data required. */
1281};
1282
2e5d83bb 1283typedef struct SCSIDevice SCSIDevice;
a917d384
PB
1284typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1285 uint32_t arg);
2e5d83bb
PB
1286
1287SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
a917d384 1288 int tcq,
2e5d83bb
PB
1289 scsi_completionfn completion,
1290 void *opaque);
1291void scsi_disk_destroy(SCSIDevice *s);
1292
0fc5c15a 1293int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
4d611c9a
PB
1294/* SCSI data transfers are asynchrnonous. However, unlike the block IO
1295 layer the completion routine may be called directly by
1296 scsi_{read,write}_data. */
a917d384
PB
1297void scsi_read_data(SCSIDevice *s, uint32_t tag);
1298int scsi_write_data(SCSIDevice *s, uint32_t tag);
1299void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1300uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
2e5d83bb 1301
7d8406be
PB
1302/* lsi53c895a.c */
1303void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1304void *lsi_scsi_init(PCIBus *bus, int devfn);
1305
b5ff1b31 1306/* integratorcp.c */
40f137e1
PB
1307extern QEMUMachine integratorcp926_machine;
1308extern QEMUMachine integratorcp1026_machine;
b5ff1b31 1309
cdbdb648
PB
1310/* versatilepb.c */
1311extern QEMUMachine versatilepb_machine;
16406950 1312extern QEMUMachine versatileab_machine;
cdbdb648 1313
e69954b9
PB
1314/* realview.c */
1315extern QEMUMachine realview_machine;
1316
daa57963
FB
1317/* ps2.c */
1318void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1319void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1320void ps2_write_mouse(void *, int val);
1321void ps2_write_keyboard(void *, int val);
1322uint32_t ps2_read_data(void *);
1323void ps2_queue(void *, int b);
f94f5d71 1324void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 1325
80337b66
FB
1326/* smc91c111.c */
1327void smc91c111_init(NICInfo *, uint32_t, void *, int);
1328
bdd5003a 1329/* pl110.c */
95219897 1330void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
bdd5003a 1331
cdbdb648
PB
1332/* pl011.c */
1333void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1334
1335/* pl050.c */
1336void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1337
1338/* pl080.c */
e69954b9 1339void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
cdbdb648
PB
1340
1341/* pl190.c */
1342void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1343
1344/* arm-timer.c */
1345void sp804_init(uint32_t base, void *pic, int irq);
1346void icp_pit_init(uint32_t base, void *pic, int irq);
1347
e69954b9
PB
1348/* arm_sysctl.c */
1349void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1350
1351/* arm_gic.c */
1352void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1353
16406950
PB
1354/* arm_boot.c */
1355
daf90626 1356void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
16406950
PB
1357 const char *kernel_cmdline, const char *initrd_filename,
1358 int board_id);
1359
27c7ca7e
FB
1360/* sh7750.c */
1361struct SH7750State;
1362
008a8818 1363struct SH7750State *sh7750_init(CPUState * cpu);
27c7ca7e
FB
1364
1365typedef struct {
1366 /* The callback will be triggered if any of the designated lines change */
1367 uint16_t portamask_trigger;
1368 uint16_t portbmask_trigger;
1369 /* Return 0 if no action was taken */
1370 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1371 uint16_t * periph_pdtra,
1372 uint16_t * periph_portdira,
1373 uint16_t * periph_pdtrb,
1374 uint16_t * periph_portdirb);
1375} sh7750_io_device;
1376
1377int sh7750_register_io_device(struct SH7750State *s,
1378 sh7750_io_device * device);
1379/* tc58128.c */
1380int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1381
29133e9a
FB
1382/* NOR flash devices */
1383typedef struct pflash_t pflash_t;
1384
1385pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1386 BlockDriverState *bs,
1387 target_ulong sector_len, int nb_blocs, int width,
1388 uint16_t id0, uint16_t id1,
1389 uint16_t id2, uint16_t id3);
1390
4046d913
PB
1391#include "gdbstub.h"
1392
ea2384d3
FB
1393#endif /* defined(QEMU_TOOL) */
1394
c4b1fcc0 1395/* monitor.c */
82c643ff 1396void monitor_init(CharDriverState *hd, int show_banner);
ea2384d3
FB
1397void term_puts(const char *str);
1398void term_vprintf(const char *fmt, va_list ap);
40c3bac3 1399void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
fef30743 1400void term_print_filename(const char *filename);
c4b1fcc0
FB
1401void term_flush(void);
1402void term_print_help(void);
ea2384d3
FB
1403void monitor_readline(const char *prompt, int is_password,
1404 char *buf, int buf_size);
1405
1406/* readline.c */
1407typedef void ReadLineFunc(void *opaque, const char *str);
1408
1409extern int completion_index;
1410void add_completion(const char *str);
1411void readline_handle_byte(int ch);
1412void readline_find_completion(const char *cmdline);
1413const char *readline_get_history(unsigned int index);
1414void readline_start(const char *prompt, int is_password,
1415 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1416
5e6ad6f9
FB
1417void kqemu_record_dump(void);
1418
fc01f7e7 1419#endif /* VL_H */
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