]> Git Repo - qemu.git/blame_incremental - vl.h
audio/ossaudio.c for OpenBSD, by Todd T. Fries.
[qemu.git] / vl.h
... / ...
CommitLineData
1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
33#include <limits.h>
34#include <time.h>
35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
39#include <sys/stat.h>
40
41#ifndef O_LARGEFILE
42#define O_LARGEFILE 0
43#endif
44#ifndef O_BINARY
45#define O_BINARY 0
46#endif
47
48#ifndef ENOMEDIUM
49#define ENOMEDIUM ENODEV
50#endif
51
52#ifdef _WIN32
53#include <windows.h>
54#define fsync _commit
55#define lseek _lseeki64
56#define ENOTSUP 4096
57extern int qemu_ftruncate64(int, int64_t);
58#define ftruncate qemu_ftruncate64
59
60
61static inline char *realpath(const char *path, char *resolved_path)
62{
63 _fullpath(resolved_path, path, _MAX_PATH);
64 return resolved_path;
65}
66
67#define PRId64 "I64d"
68#define PRIx64 "I64x"
69#define PRIu64 "I64u"
70#define PRIo64 "I64o"
71#endif
72
73#ifdef QEMU_TOOL
74
75/* we use QEMU_TOOL in the command line tools which do not depend on
76 the target CPU type */
77#include "config-host.h"
78#include <setjmp.h>
79#include "osdep.h"
80#include "bswap.h"
81
82#else
83
84#include "audio/audio.h"
85#include "cpu.h"
86
87#endif /* !defined(QEMU_TOOL) */
88
89#ifndef glue
90#define xglue(x, y) x ## y
91#define glue(x, y) xglue(x, y)
92#define stringify(s) tostring(s)
93#define tostring(s) #s
94#endif
95
96#ifndef MIN
97#define MIN(a, b) (((a) < (b)) ? (a) : (b))
98#endif
99#ifndef MAX
100#define MAX(a, b) (((a) > (b)) ? (a) : (b))
101#endif
102
103/* cutils.c */
104void pstrcpy(char *buf, int buf_size, const char *str);
105char *pstrcat(char *buf, int buf_size, const char *s);
106int strstart(const char *str, const char *val, const char **ptr);
107int stristart(const char *str, const char *val, const char **ptr);
108
109/* vl.c */
110uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
111
112void hw_error(const char *fmt, ...);
113
114extern const char *bios_dir;
115
116extern int vm_running;
117extern const char *qemu_name;
118
119typedef struct vm_change_state_entry VMChangeStateEntry;
120typedef void VMChangeStateHandler(void *opaque, int running);
121typedef void VMStopHandler(void *opaque, int reason);
122
123VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
124 void *opaque);
125void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
126
127int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
128void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
129
130void vm_start(void);
131void vm_stop(int reason);
132
133typedef void QEMUResetHandler(void *opaque);
134
135void qemu_register_reset(QEMUResetHandler *func, void *opaque);
136void qemu_system_reset_request(void);
137void qemu_system_shutdown_request(void);
138void qemu_system_powerdown_request(void);
139#if !defined(TARGET_SPARC)
140// Please implement a power failure function to signal the OS
141#define qemu_system_powerdown() do{}while(0)
142#else
143void qemu_system_powerdown(void);
144#endif
145
146void main_loop_wait(int timeout);
147
148extern int ram_size;
149extern int bios_size;
150extern int rtc_utc;
151extern int cirrus_vga_enabled;
152extern int vmsvga_enabled;
153extern int graphic_width;
154extern int graphic_height;
155extern int graphic_depth;
156extern const char *keyboard_layout;
157extern int kqemu_allowed;
158extern int win2k_install_hack;
159extern int usb_enabled;
160extern int smp_cpus;
161extern int no_quit;
162extern int semihosting_enabled;
163extern int autostart;
164extern const char *bootp_filename;
165
166#define MAX_OPTION_ROMS 16
167extern const char *option_rom[MAX_OPTION_ROMS];
168extern int nb_option_roms;
169
170/* XXX: make it dynamic */
171#define MAX_BIOS_SIZE (4 * 1024 * 1024)
172#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
173#define BIOS_SIZE ((512 + 32) * 1024)
174#elif defined(TARGET_MIPS)
175#define BIOS_SIZE (4 * 1024 * 1024)
176#endif
177
178/* keyboard/mouse support */
179
180#define MOUSE_EVENT_LBUTTON 0x01
181#define MOUSE_EVENT_RBUTTON 0x02
182#define MOUSE_EVENT_MBUTTON 0x04
183
184typedef void QEMUPutKBDEvent(void *opaque, int keycode);
185typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
186
187typedef struct QEMUPutMouseEntry {
188 QEMUPutMouseEvent *qemu_put_mouse_event;
189 void *qemu_put_mouse_event_opaque;
190 int qemu_put_mouse_event_absolute;
191 char *qemu_put_mouse_event_name;
192
193 /* used internally by qemu for handling mice */
194 struct QEMUPutMouseEntry *next;
195} QEMUPutMouseEntry;
196
197void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
198QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
199 void *opaque, int absolute,
200 const char *name);
201void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
202
203void kbd_put_keycode(int keycode);
204void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
205int kbd_mouse_is_absolute(void);
206
207void do_info_mice(void);
208void do_mouse_set(int index);
209
210/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
211 constants) */
212#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
213#define QEMU_KEY_BACKSPACE 0x007f
214#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
215#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
216#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
217#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
218#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
219#define QEMU_KEY_END QEMU_KEY_ESC1(4)
220#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
221#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
222#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
223
224#define QEMU_KEY_CTRL_UP 0xe400
225#define QEMU_KEY_CTRL_DOWN 0xe401
226#define QEMU_KEY_CTRL_LEFT 0xe402
227#define QEMU_KEY_CTRL_RIGHT 0xe403
228#define QEMU_KEY_CTRL_HOME 0xe404
229#define QEMU_KEY_CTRL_END 0xe405
230#define QEMU_KEY_CTRL_PAGEUP 0xe406
231#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
232
233void kbd_put_keysym(int keysym);
234
235/* async I/O support */
236
237typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
238typedef int IOCanRWHandler(void *opaque);
239typedef void IOHandler(void *opaque);
240
241int qemu_set_fd_handler2(int fd,
242 IOCanRWHandler *fd_read_poll,
243 IOHandler *fd_read,
244 IOHandler *fd_write,
245 void *opaque);
246int qemu_set_fd_handler(int fd,
247 IOHandler *fd_read,
248 IOHandler *fd_write,
249 void *opaque);
250
251/* Polling handling */
252
253/* return TRUE if no sleep should be done afterwards */
254typedef int PollingFunc(void *opaque);
255
256int qemu_add_polling_cb(PollingFunc *func, void *opaque);
257void qemu_del_polling_cb(PollingFunc *func, void *opaque);
258
259#ifdef _WIN32
260/* Wait objects handling */
261typedef void WaitObjectFunc(void *opaque);
262
263int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
264void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
265#endif
266
267typedef struct QEMUBH QEMUBH;
268
269/* character device */
270
271#define CHR_EVENT_BREAK 0 /* serial break char */
272#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
273#define CHR_EVENT_RESET 2 /* new connection established */
274
275
276#define CHR_IOCTL_SERIAL_SET_PARAMS 1
277typedef struct {
278 int speed;
279 int parity;
280 int data_bits;
281 int stop_bits;
282} QEMUSerialSetParams;
283
284#define CHR_IOCTL_SERIAL_SET_BREAK 2
285
286#define CHR_IOCTL_PP_READ_DATA 3
287#define CHR_IOCTL_PP_WRITE_DATA 4
288#define CHR_IOCTL_PP_READ_CONTROL 5
289#define CHR_IOCTL_PP_WRITE_CONTROL 6
290#define CHR_IOCTL_PP_READ_STATUS 7
291#define CHR_IOCTL_PP_EPP_READ_ADDR 8
292#define CHR_IOCTL_PP_EPP_READ 9
293#define CHR_IOCTL_PP_EPP_WRITE_ADDR 10
294#define CHR_IOCTL_PP_EPP_WRITE 11
295
296typedef void IOEventHandler(void *opaque, int event);
297
298typedef struct CharDriverState {
299 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
300 void (*chr_update_read_handler)(struct CharDriverState *s);
301 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
302 IOEventHandler *chr_event;
303 IOCanRWHandler *chr_can_read;
304 IOReadHandler *chr_read;
305 void *handler_opaque;
306 void (*chr_send_event)(struct CharDriverState *chr, int event);
307 void (*chr_close)(struct CharDriverState *chr);
308 void *opaque;
309 int focus;
310 QEMUBH *bh;
311} CharDriverState;
312
313CharDriverState *qemu_chr_open(const char *filename);
314void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
315int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
316void qemu_chr_send_event(CharDriverState *s, int event);
317void qemu_chr_add_handlers(CharDriverState *s,
318 IOCanRWHandler *fd_can_read,
319 IOReadHandler *fd_read,
320 IOEventHandler *fd_event,
321 void *opaque);
322int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
323void qemu_chr_reset(CharDriverState *s);
324int qemu_chr_can_read(CharDriverState *s);
325void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
326
327/* consoles */
328
329typedef struct DisplayState DisplayState;
330typedef struct TextConsole TextConsole;
331
332typedef void (*vga_hw_update_ptr)(void *);
333typedef void (*vga_hw_invalidate_ptr)(void *);
334typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
335
336TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
337 vga_hw_invalidate_ptr invalidate,
338 vga_hw_screen_dump_ptr screen_dump,
339 void *opaque);
340void vga_hw_update(void);
341void vga_hw_invalidate(void);
342void vga_hw_screen_dump(const char *filename);
343
344int is_graphic_console(void);
345CharDriverState *text_console_init(DisplayState *ds);
346void console_select(unsigned int index);
347
348/* serial ports */
349
350#define MAX_SERIAL_PORTS 4
351
352extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
353
354/* parallel ports */
355
356#define MAX_PARALLEL_PORTS 3
357
358extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
359
360struct ParallelIOArg {
361 void *buffer;
362 int count;
363};
364
365/* VLANs support */
366
367typedef struct VLANClientState VLANClientState;
368
369struct VLANClientState {
370 IOReadHandler *fd_read;
371 /* Packets may still be sent if this returns zero. It's used to
372 rate-limit the slirp code. */
373 IOCanRWHandler *fd_can_read;
374 void *opaque;
375 struct VLANClientState *next;
376 struct VLANState *vlan;
377 char info_str[256];
378};
379
380typedef struct VLANState {
381 int id;
382 VLANClientState *first_client;
383 struct VLANState *next;
384} VLANState;
385
386VLANState *qemu_find_vlan(int id);
387VLANClientState *qemu_new_vlan_client(VLANState *vlan,
388 IOReadHandler *fd_read,
389 IOCanRWHandler *fd_can_read,
390 void *opaque);
391int qemu_can_send_packet(VLANClientState *vc);
392void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
393void qemu_handler_true(void *opaque);
394
395void do_info_network(void);
396
397/* TAP win32 */
398int tap_win32_init(VLANState *vlan, const char *ifname);
399
400/* NIC info */
401
402#define MAX_NICS 8
403
404typedef struct NICInfo {
405 uint8_t macaddr[6];
406 const char *model;
407 VLANState *vlan;
408} NICInfo;
409
410extern int nb_nics;
411extern NICInfo nd_table[MAX_NICS];
412
413/* timers */
414
415typedef struct QEMUClock QEMUClock;
416typedef struct QEMUTimer QEMUTimer;
417typedef void QEMUTimerCB(void *opaque);
418
419/* The real time clock should be used only for stuff which does not
420 change the virtual machine state, as it is run even if the virtual
421 machine is stopped. The real time clock has a frequency of 1000
422 Hz. */
423extern QEMUClock *rt_clock;
424
425/* The virtual clock is only run during the emulation. It is stopped
426 when the virtual machine is stopped. Virtual timers use a high
427 precision clock, usually cpu cycles (use ticks_per_sec). */
428extern QEMUClock *vm_clock;
429
430int64_t qemu_get_clock(QEMUClock *clock);
431
432QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
433void qemu_free_timer(QEMUTimer *ts);
434void qemu_del_timer(QEMUTimer *ts);
435void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
436int qemu_timer_pending(QEMUTimer *ts);
437
438extern int64_t ticks_per_sec;
439extern int pit_min_timer_count;
440
441int64_t cpu_get_ticks(void);
442void cpu_enable_ticks(void);
443void cpu_disable_ticks(void);
444
445/* VM Load/Save */
446
447typedef struct QEMUFile QEMUFile;
448
449QEMUFile *qemu_fopen(const char *filename, const char *mode);
450void qemu_fflush(QEMUFile *f);
451void qemu_fclose(QEMUFile *f);
452void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
453void qemu_put_byte(QEMUFile *f, int v);
454void qemu_put_be16(QEMUFile *f, unsigned int v);
455void qemu_put_be32(QEMUFile *f, unsigned int v);
456void qemu_put_be64(QEMUFile *f, uint64_t v);
457int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
458int qemu_get_byte(QEMUFile *f);
459unsigned int qemu_get_be16(QEMUFile *f);
460unsigned int qemu_get_be32(QEMUFile *f);
461uint64_t qemu_get_be64(QEMUFile *f);
462
463static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
464{
465 qemu_put_be64(f, *pv);
466}
467
468static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
469{
470 qemu_put_be32(f, *pv);
471}
472
473static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
474{
475 qemu_put_be16(f, *pv);
476}
477
478static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
479{
480 qemu_put_byte(f, *pv);
481}
482
483static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
484{
485 *pv = qemu_get_be64(f);
486}
487
488static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
489{
490 *pv = qemu_get_be32(f);
491}
492
493static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
494{
495 *pv = qemu_get_be16(f);
496}
497
498static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
499{
500 *pv = qemu_get_byte(f);
501}
502
503#if TARGET_LONG_BITS == 64
504#define qemu_put_betl qemu_put_be64
505#define qemu_get_betl qemu_get_be64
506#define qemu_put_betls qemu_put_be64s
507#define qemu_get_betls qemu_get_be64s
508#else
509#define qemu_put_betl qemu_put_be32
510#define qemu_get_betl qemu_get_be32
511#define qemu_put_betls qemu_put_be32s
512#define qemu_get_betls qemu_get_be32s
513#endif
514
515int64_t qemu_ftell(QEMUFile *f);
516int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
517
518typedef void SaveStateHandler(QEMUFile *f, void *opaque);
519typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
520
521int register_savevm(const char *idstr,
522 int instance_id,
523 int version_id,
524 SaveStateHandler *save_state,
525 LoadStateHandler *load_state,
526 void *opaque);
527void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
528void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
529
530void cpu_save(QEMUFile *f, void *opaque);
531int cpu_load(QEMUFile *f, void *opaque, int version_id);
532
533void do_savevm(const char *name);
534void do_loadvm(const char *name);
535void do_delvm(const char *name);
536void do_info_snapshots(void);
537
538/* bottom halves */
539typedef void QEMUBHFunc(void *opaque);
540
541QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
542void qemu_bh_schedule(QEMUBH *bh);
543void qemu_bh_cancel(QEMUBH *bh);
544void qemu_bh_delete(QEMUBH *bh);
545int qemu_bh_poll(void);
546
547/* block.c */
548typedef struct BlockDriverState BlockDriverState;
549typedef struct BlockDriver BlockDriver;
550
551extern BlockDriver bdrv_raw;
552extern BlockDriver bdrv_host_device;
553extern BlockDriver bdrv_cow;
554extern BlockDriver bdrv_qcow;
555extern BlockDriver bdrv_vmdk;
556extern BlockDriver bdrv_cloop;
557extern BlockDriver bdrv_dmg;
558extern BlockDriver bdrv_bochs;
559extern BlockDriver bdrv_vpc;
560extern BlockDriver bdrv_vvfat;
561extern BlockDriver bdrv_qcow2;
562
563typedef struct BlockDriverInfo {
564 /* in bytes, 0 if irrelevant */
565 int cluster_size;
566 /* offset at which the VM state can be saved (0 if not possible) */
567 int64_t vm_state_offset;
568} BlockDriverInfo;
569
570typedef struct QEMUSnapshotInfo {
571 char id_str[128]; /* unique snapshot id */
572 /* the following fields are informative. They are not needed for
573 the consistency of the snapshot */
574 char name[256]; /* user choosen name */
575 uint32_t vm_state_size; /* VM state info size */
576 uint32_t date_sec; /* UTC date of the snapshot */
577 uint32_t date_nsec;
578 uint64_t vm_clock_nsec; /* VM clock relative to boot */
579} QEMUSnapshotInfo;
580
581#define BDRV_O_RDONLY 0x0000
582#define BDRV_O_RDWR 0x0002
583#define BDRV_O_ACCESS 0x0003
584#define BDRV_O_CREAT 0x0004 /* create an empty file */
585#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
586#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
587 use a disk image format on top of
588 it (default for
589 bdrv_file_open()) */
590
591void bdrv_init(void);
592BlockDriver *bdrv_find_format(const char *format_name);
593int bdrv_create(BlockDriver *drv,
594 const char *filename, int64_t size_in_sectors,
595 const char *backing_file, int flags);
596BlockDriverState *bdrv_new(const char *device_name);
597void bdrv_delete(BlockDriverState *bs);
598int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
599int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
600int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
601 BlockDriver *drv);
602void bdrv_close(BlockDriverState *bs);
603int bdrv_read(BlockDriverState *bs, int64_t sector_num,
604 uint8_t *buf, int nb_sectors);
605int bdrv_write(BlockDriverState *bs, int64_t sector_num,
606 const uint8_t *buf, int nb_sectors);
607int bdrv_pread(BlockDriverState *bs, int64_t offset,
608 void *buf, int count);
609int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
610 const void *buf, int count);
611int bdrv_truncate(BlockDriverState *bs, int64_t offset);
612int64_t bdrv_getlength(BlockDriverState *bs);
613void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
614int bdrv_commit(BlockDriverState *bs);
615void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
616/* async block I/O */
617typedef struct BlockDriverAIOCB BlockDriverAIOCB;
618typedef void BlockDriverCompletionFunc(void *opaque, int ret);
619
620BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
621 uint8_t *buf, int nb_sectors,
622 BlockDriverCompletionFunc *cb, void *opaque);
623BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
624 const uint8_t *buf, int nb_sectors,
625 BlockDriverCompletionFunc *cb, void *opaque);
626void bdrv_aio_cancel(BlockDriverAIOCB *acb);
627
628void qemu_aio_init(void);
629void qemu_aio_poll(void);
630void qemu_aio_flush(void);
631void qemu_aio_wait_start(void);
632void qemu_aio_wait(void);
633void qemu_aio_wait_end(void);
634
635/* Ensure contents are flushed to disk. */
636void bdrv_flush(BlockDriverState *bs);
637
638#define BDRV_TYPE_HD 0
639#define BDRV_TYPE_CDROM 1
640#define BDRV_TYPE_FLOPPY 2
641#define BIOS_ATA_TRANSLATION_AUTO 0
642#define BIOS_ATA_TRANSLATION_NONE 1
643#define BIOS_ATA_TRANSLATION_LBA 2
644#define BIOS_ATA_TRANSLATION_LARGE 3
645#define BIOS_ATA_TRANSLATION_RECHS 4
646
647void bdrv_set_geometry_hint(BlockDriverState *bs,
648 int cyls, int heads, int secs);
649void bdrv_set_type_hint(BlockDriverState *bs, int type);
650void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
651void bdrv_get_geometry_hint(BlockDriverState *bs,
652 int *pcyls, int *pheads, int *psecs);
653int bdrv_get_type_hint(BlockDriverState *bs);
654int bdrv_get_translation_hint(BlockDriverState *bs);
655int bdrv_is_removable(BlockDriverState *bs);
656int bdrv_is_read_only(BlockDriverState *bs);
657int bdrv_is_inserted(BlockDriverState *bs);
658int bdrv_media_changed(BlockDriverState *bs);
659int bdrv_is_locked(BlockDriverState *bs);
660void bdrv_set_locked(BlockDriverState *bs, int locked);
661void bdrv_eject(BlockDriverState *bs, int eject_flag);
662void bdrv_set_change_cb(BlockDriverState *bs,
663 void (*change_cb)(void *opaque), void *opaque);
664void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
665void bdrv_info(void);
666BlockDriverState *bdrv_find(const char *name);
667void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
668int bdrv_is_encrypted(BlockDriverState *bs);
669int bdrv_set_key(BlockDriverState *bs, const char *key);
670void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
671 void *opaque);
672const char *bdrv_get_device_name(BlockDriverState *bs);
673int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
674 const uint8_t *buf, int nb_sectors);
675int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
676
677void bdrv_get_backing_filename(BlockDriverState *bs,
678 char *filename, int filename_size);
679int bdrv_snapshot_create(BlockDriverState *bs,
680 QEMUSnapshotInfo *sn_info);
681int bdrv_snapshot_goto(BlockDriverState *bs,
682 const char *snapshot_id);
683int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
684int bdrv_snapshot_list(BlockDriverState *bs,
685 QEMUSnapshotInfo **psn_info);
686char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
687
688char *get_human_readable_size(char *buf, int buf_size, int64_t size);
689int path_is_absolute(const char *path);
690void path_combine(char *dest, int dest_size,
691 const char *base_path,
692 const char *filename);
693
694#ifndef QEMU_TOOL
695
696typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
697 int boot_device,
698 DisplayState *ds, const char **fd_filename, int snapshot,
699 const char *kernel_filename, const char *kernel_cmdline,
700 const char *initrd_filename, const char *cpu_model);
701
702typedef struct QEMUMachine {
703 const char *name;
704 const char *desc;
705 QEMUMachineInitFunc *init;
706 struct QEMUMachine *next;
707} QEMUMachine;
708
709int qemu_register_machine(QEMUMachine *m);
710
711typedef void SetIRQFunc(void *opaque, int irq_num, int level);
712typedef void IRQRequestFunc(void *opaque, int level);
713
714#if defined(TARGET_PPC)
715void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
716#endif
717
718#if defined(TARGET_MIPS)
719void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
720#endif
721
722/* ISA bus */
723
724extern target_phys_addr_t isa_mem_base;
725
726typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
727typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
728
729int register_ioport_read(int start, int length, int size,
730 IOPortReadFunc *func, void *opaque);
731int register_ioport_write(int start, int length, int size,
732 IOPortWriteFunc *func, void *opaque);
733void isa_unassign_ioport(int start, int length);
734
735void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
736
737/* PCI bus */
738
739extern target_phys_addr_t pci_mem_base;
740
741typedef struct PCIBus PCIBus;
742typedef struct PCIDevice PCIDevice;
743
744typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
745 uint32_t address, uint32_t data, int len);
746typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
747 uint32_t address, int len);
748typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
749 uint32_t addr, uint32_t size, int type);
750
751#define PCI_ADDRESS_SPACE_MEM 0x00
752#define PCI_ADDRESS_SPACE_IO 0x01
753#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
754
755typedef struct PCIIORegion {
756 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
757 uint32_t size;
758 uint8_t type;
759 PCIMapIORegionFunc *map_func;
760} PCIIORegion;
761
762#define PCI_ROM_SLOT 6
763#define PCI_NUM_REGIONS 7
764
765#define PCI_DEVICES_MAX 64
766
767#define PCI_VENDOR_ID 0x00 /* 16 bits */
768#define PCI_DEVICE_ID 0x02 /* 16 bits */
769#define PCI_COMMAND 0x04 /* 16 bits */
770#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
771#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
772#define PCI_CLASS_DEVICE 0x0a /* Device class */
773#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
774#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
775#define PCI_MIN_GNT 0x3e /* 8 bits */
776#define PCI_MAX_LAT 0x3f /* 8 bits */
777
778struct PCIDevice {
779 /* PCI config space */
780 uint8_t config[256];
781
782 /* the following fields are read only */
783 PCIBus *bus;
784 int devfn;
785 char name[64];
786 PCIIORegion io_regions[PCI_NUM_REGIONS];
787
788 /* do not access the following fields */
789 PCIConfigReadFunc *config_read;
790 PCIConfigWriteFunc *config_write;
791 /* ??? This is a PC-specific hack, and should be removed. */
792 int irq_index;
793
794 /* Current IRQ levels. Used internally by the generic PCI code. */
795 int irq_state[4];
796};
797
798PCIDevice *pci_register_device(PCIBus *bus, const char *name,
799 int instance_size, int devfn,
800 PCIConfigReadFunc *config_read,
801 PCIConfigWriteFunc *config_write);
802
803void pci_register_io_region(PCIDevice *pci_dev, int region_num,
804 uint32_t size, int type,
805 PCIMapIORegionFunc *map_func);
806
807void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
808
809uint32_t pci_default_read_config(PCIDevice *d,
810 uint32_t address, int len);
811void pci_default_write_config(PCIDevice *d,
812 uint32_t address, uint32_t val, int len);
813void pci_device_save(PCIDevice *s, QEMUFile *f);
814int pci_device_load(PCIDevice *s, QEMUFile *f);
815
816typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
817typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
818PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
819 void *pic, int devfn_min, int nirq);
820
821void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn);
822void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
823uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
824int pci_bus_num(PCIBus *s);
825void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
826
827void pci_info(void);
828PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
829 pci_map_irq_fn map_irq, const char *name);
830
831/* prep_pci.c */
832PCIBus *pci_prep_init(void);
833
834/* grackle_pci.c */
835PCIBus *pci_grackle_init(uint32_t base, void *pic);
836
837/* unin_pci.c */
838PCIBus *pci_pmac_init(void *pic);
839
840/* apb_pci.c */
841PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
842 void *pic);
843
844PCIBus *pci_vpb_init(void *pic, int irq, int realview);
845
846/* piix_pci.c */
847PCIBus *i440fx_init(PCIDevice **pi440fx_state);
848void i440fx_set_smm(PCIDevice *d, int val);
849int piix3_init(PCIBus *bus, int devfn);
850void i440fx_init_memory_mappings(PCIDevice *d);
851
852int piix4_init(PCIBus *bus, int devfn);
853
854/* openpic.c */
855typedef struct openpic_t openpic_t;
856enum {
857 OPENPIC_EVT_INT = 0, /* IRQ */
858 OPENPIC_EVT_CINT, /* critical IRQ */
859 OPENPIC_EVT_MCK, /* Machine check event */
860 OPENPIC_EVT_DEBUG, /* Inconditional debug event */
861 OPENPIC_EVT_RESET, /* Core reset event */
862};
863void openpic_set_irq(void *opaque, int n_IRQ, int level);
864openpic_t *openpic_init (PCIBus *bus, SetIRQFunc *set_irq,
865 int *pmem_index, int nb_cpus,
866 struct CPUState **envp);
867
868/* heathrow_pic.c */
869typedef struct HeathrowPICS HeathrowPICS;
870void heathrow_pic_set_irq(void *opaque, int num, int level);
871HeathrowPICS *heathrow_pic_init(int *pmem_index);
872
873/* gt64xxx.c */
874PCIBus *pci_gt64120_init(void *pic);
875
876#ifdef HAS_AUDIO
877struct soundhw {
878 const char *name;
879 const char *descr;
880 int enabled;
881 int isa;
882 union {
883 int (*init_isa) (AudioState *s);
884 int (*init_pci) (PCIBus *bus, AudioState *s);
885 } init;
886};
887
888extern struct soundhw soundhw[];
889#endif
890
891/* vga.c */
892
893#define VGA_RAM_SIZE (8192 * 1024)
894
895struct DisplayState {
896 uint8_t *data;
897 int linesize;
898 int depth;
899 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
900 int width;
901 int height;
902 void *opaque;
903
904 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
905 void (*dpy_resize)(struct DisplayState *s, int w, int h);
906 void (*dpy_refresh)(struct DisplayState *s);
907 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y,
908 int dst_x, int dst_y, int w, int h);
909 void (*dpy_fill)(struct DisplayState *s, int x, int y,
910 int w, int h, uint32_t c);
911 void (*mouse_set)(int x, int y, int on);
912 void (*cursor_define)(int width, int height, int bpp, int hot_x, int hot_y,
913 uint8_t *image, uint8_t *mask);
914};
915
916static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
917{
918 s->dpy_update(s, x, y, w, h);
919}
920
921static inline void dpy_resize(DisplayState *s, int w, int h)
922{
923 s->dpy_resize(s, w, h);
924}
925
926int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
927 unsigned long vga_ram_offset, int vga_ram_size);
928int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
929 unsigned long vga_ram_offset, int vga_ram_size,
930 unsigned long vga_bios_offset, int vga_bios_size);
931
932/* cirrus_vga.c */
933void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
934 unsigned long vga_ram_offset, int vga_ram_size);
935void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
936 unsigned long vga_ram_offset, int vga_ram_size);
937
938/* vmware_vga.c */
939void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
940 unsigned long vga_ram_offset, int vga_ram_size);
941
942/* sdl.c */
943void sdl_display_init(DisplayState *ds, int full_screen, int no_frame);
944
945/* cocoa.m */
946void cocoa_display_init(DisplayState *ds, int full_screen);
947
948/* vnc.c */
949void vnc_display_init(DisplayState *ds, const char *display);
950void do_info_vnc(void);
951
952/* x_keymap.c */
953extern uint8_t _translate_keycode(const int key);
954
955/* ide.c */
956#define MAX_DISKS 4
957
958extern BlockDriverState *bs_table[MAX_DISKS + 1];
959
960void isa_ide_init(int iobase, int iobase2, int irq,
961 BlockDriverState *hd0, BlockDriverState *hd1);
962void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
963 int secondary_ide_enabled);
964void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
965int pmac_ide_init (BlockDriverState **hd_table,
966 SetIRQFunc *set_irq, void *irq_opaque, int irq);
967
968/* cdrom.c */
969int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
970int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
971
972/* ds1225y.c */
973typedef struct ds1225y_t ds1225y_t;
974ds1225y_t *ds1225y_init(target_ulong mem_base, const char *filename);
975
976/* es1370.c */
977int es1370_init (PCIBus *bus, AudioState *s);
978
979/* sb16.c */
980int SB16_init (AudioState *s);
981
982/* adlib.c */
983int Adlib_init (AudioState *s);
984
985/* gus.c */
986int GUS_init (AudioState *s);
987
988/* dma.c */
989typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
990int DMA_get_channel_mode (int nchan);
991int DMA_read_memory (int nchan, void *buf, int pos, int size);
992int DMA_write_memory (int nchan, void *buf, int pos, int size);
993void DMA_hold_DREQ (int nchan);
994void DMA_release_DREQ (int nchan);
995void DMA_schedule(int nchan);
996void DMA_run (void);
997void DMA_init (int high_page_enable);
998void DMA_register_channel (int nchan,
999 DMA_transfer_handler transfer_handler,
1000 void *opaque);
1001/* fdc.c */
1002#define MAX_FD 2
1003extern BlockDriverState *fd_table[MAX_FD];
1004
1005typedef struct fdctrl_t fdctrl_t;
1006
1007fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
1008 uint32_t io_base,
1009 BlockDriverState **fds);
1010int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
1011
1012/* ne2000.c */
1013
1014void isa_ne2000_init(int base, int irq, NICInfo *nd);
1015void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn);
1016
1017/* rtl8139.c */
1018
1019void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn);
1020
1021/* pcnet.c */
1022
1023void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn);
1024void pcnet_h_reset(void *opaque);
1025void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
1026
1027/* vmmouse.c */
1028void *vmmouse_init(void *m);
1029
1030/* pckbd.c */
1031
1032void kbd_init(void);
1033
1034/* mc146818rtc.c */
1035
1036typedef struct RTCState RTCState;
1037
1038RTCState *rtc_init(int base, int irq);
1039void rtc_set_memory(RTCState *s, int addr, int val);
1040void rtc_set_date(RTCState *s, const struct tm *tm);
1041
1042/* serial.c */
1043
1044typedef struct SerialState SerialState;
1045SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
1046 int base, int irq, CharDriverState *chr);
1047SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
1048 target_ulong base, int it_shift,
1049 int irq, CharDriverState *chr,
1050 int ioregister);
1051uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr);
1052void serial_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value);
1053uint32_t serial_mm_readw (void *opaque, target_phys_addr_t addr);
1054void serial_mm_writew (void *opaque, target_phys_addr_t addr, uint32_t value);
1055uint32_t serial_mm_readl (void *opaque, target_phys_addr_t addr);
1056void serial_mm_writel (void *opaque, target_phys_addr_t addr, uint32_t value);
1057
1058/* parallel.c */
1059
1060typedef struct ParallelState ParallelState;
1061ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
1062
1063/* i8259.c */
1064
1065typedef struct PicState2 PicState2;
1066extern PicState2 *isa_pic;
1067void pic_set_irq(int irq, int level);
1068void pic_set_irq_new(void *opaque, int irq, int level);
1069PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
1070void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
1071 void *alt_irq_opaque);
1072int pic_read_irq(PicState2 *s);
1073void pic_update_irq(PicState2 *s);
1074uint32_t pic_intack_read(PicState2 *s);
1075void pic_info(void);
1076void irq_info(void);
1077
1078/* APIC */
1079typedef struct IOAPICState IOAPICState;
1080
1081int apic_init(CPUState *env);
1082int apic_get_interrupt(CPUState *env);
1083IOAPICState *ioapic_init(void);
1084void ioapic_set_irq(void *opaque, int vector, int level);
1085
1086/* i8254.c */
1087
1088#define PIT_FREQ 1193182
1089
1090typedef struct PITState PITState;
1091
1092PITState *pit_init(int base, int irq);
1093void pit_set_gate(PITState *pit, int channel, int val);
1094int pit_get_gate(PITState *pit, int channel);
1095int pit_get_initial_count(PITState *pit, int channel);
1096int pit_get_mode(PITState *pit, int channel);
1097int pit_get_out(PITState *pit, int channel, int64_t current_time);
1098
1099/* pcspk.c */
1100void pcspk_init(PITState *);
1101int pcspk_audio_init(AudioState *);
1102
1103#include "hw/smbus.h"
1104
1105/* acpi.c */
1106extern int acpi_enabled;
1107void piix4_pm_init(PCIBus *bus, int devfn);
1108void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
1109void acpi_bios_init(void);
1110
1111/* smbus_eeprom.c */
1112SMBusDevice *smbus_eeprom_device_init(uint8_t addr, uint8_t *buf);
1113
1114/* pc.c */
1115extern QEMUMachine pc_machine;
1116extern QEMUMachine isapc_machine;
1117extern int fd_bootchk;
1118
1119void ioport_set_a20(int enable);
1120int ioport_get_a20(void);
1121
1122/* ppc.c */
1123extern QEMUMachine prep_machine;
1124extern QEMUMachine core99_machine;
1125extern QEMUMachine heathrow_machine;
1126
1127/* mips_r4k.c */
1128extern QEMUMachine mips_machine;
1129
1130/* mips_malta.c */
1131extern QEMUMachine mips_malta_machine;
1132
1133/* mips_int */
1134extern void cpu_mips_irq_request(void *opaque, int irq, int level);
1135
1136/* mips_timer.c */
1137extern void cpu_mips_clock_init(CPUState *);
1138extern void cpu_mips_irqctrl_init (void);
1139
1140/* shix.c */
1141extern QEMUMachine shix_machine;
1142
1143#ifdef TARGET_PPC
1144/* PowerPC hardware exceptions management helpers */
1145void ppc_set_irq (void *opaque, int n_IRQ, int level);
1146void ppc_openpic_irq (void *opaque, int n_IRQ, int level);
1147int ppc_hw_interrupt (CPUState *env);
1148ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1149#endif
1150void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
1151
1152extern CPUWriteMemoryFunc *PPC_io_write[];
1153extern CPUReadMemoryFunc *PPC_io_read[];
1154void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
1155
1156/* sun4m.c */
1157extern QEMUMachine ss5_machine, ss10_machine;
1158
1159/* iommu.c */
1160void *iommu_init(uint32_t addr);
1161void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
1162 uint8_t *buf, int len, int is_write);
1163static inline void sparc_iommu_memory_read(void *opaque,
1164 target_phys_addr_t addr,
1165 uint8_t *buf, int len)
1166{
1167 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1168}
1169
1170static inline void sparc_iommu_memory_write(void *opaque,
1171 target_phys_addr_t addr,
1172 uint8_t *buf, int len)
1173{
1174 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1175}
1176
1177/* tcx.c */
1178void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
1179 unsigned long vram_offset, int vram_size, int width, int height);
1180
1181/* slavio_intctl.c */
1182void pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
1183void *slavio_intctl_init(uint32_t addr, uint32_t addrg,
1184 const uint32_t *intbit_to_level);
1185void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
1186void slavio_pic_info(void *opaque);
1187void slavio_irq_info(void *opaque);
1188void slavio_pic_set_irq(void *opaque, int irq, int level);
1189void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
1190
1191/* loader.c */
1192int get_image_size(const char *filename);
1193int load_image(const char *filename, uint8_t *addr);
1194int load_elf(const char *filename, int64_t virt_to_phys_addend,
1195 uint64_t *pentry, uint64_t *lowaddr, uint64_t *highaddr);
1196int load_aout(const char *filename, uint8_t *addr);
1197int load_uboot(const char *filename, target_ulong *ep, int *is_linux);
1198
1199/* slavio_timer.c */
1200void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu,
1201 void *intctl);
1202
1203/* slavio_serial.c */
1204SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1,
1205 CharDriverState *chr2, void *intctl);
1206void slavio_serial_ms_kbd_init(int base, int irq, void *intctl);
1207
1208/* slavio_misc.c */
1209void *slavio_misc_init(uint32_t base, int irq, void *intctl);
1210void slavio_set_power_fail(void *opaque, int power_failing);
1211
1212/* esp.c */
1213void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1214void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1215void esp_reset(void *opaque);
1216
1217/* sparc32_dma.c */
1218void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1219 void *intctl);
1220void ledma_set_irq(void *opaque, int isr);
1221void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1222 uint8_t *buf, int len, int do_bswap);
1223void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1224 uint8_t *buf, int len, int do_bswap);
1225void espdma_raise_irq(void *opaque);
1226void espdma_clear_irq(void *opaque);
1227void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1228void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1229void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1230 void *lance_opaque);
1231
1232/* cs4231.c */
1233void cs_init(target_phys_addr_t base, int irq, void *intctl);
1234
1235/* sun4u.c */
1236extern QEMUMachine sun4u_machine;
1237
1238/* NVRAM helpers */
1239#include "hw/m48t59.h"
1240
1241void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1242uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1243void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1244uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1245void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1246uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1247void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1248 const unsigned char *str, uint32_t max);
1249int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1250void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1251 uint32_t start, uint32_t count);
1252int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1253 const unsigned char *arch,
1254 uint32_t RAM_size, int boot_device,
1255 uint32_t kernel_image, uint32_t kernel_size,
1256 const char *cmdline,
1257 uint32_t initrd_image, uint32_t initrd_size,
1258 uint32_t NVRAM_image,
1259 int width, int height, int depth);
1260
1261/* adb.c */
1262
1263#define MAX_ADB_DEVICES 16
1264
1265#define ADB_MAX_OUT_LEN 16
1266
1267typedef struct ADBDevice ADBDevice;
1268
1269/* buf = NULL means polling */
1270typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1271 const uint8_t *buf, int len);
1272typedef int ADBDeviceReset(ADBDevice *d);
1273
1274struct ADBDevice {
1275 struct ADBBusState *bus;
1276 int devaddr;
1277 int handler;
1278 ADBDeviceRequest *devreq;
1279 ADBDeviceReset *devreset;
1280 void *opaque;
1281};
1282
1283typedef struct ADBBusState {
1284 ADBDevice devices[MAX_ADB_DEVICES];
1285 int nb_devices;
1286 int poll_index;
1287} ADBBusState;
1288
1289int adb_request(ADBBusState *s, uint8_t *buf_out,
1290 const uint8_t *buf, int len);
1291int adb_poll(ADBBusState *s, uint8_t *buf_out);
1292
1293ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
1294 ADBDeviceRequest *devreq,
1295 ADBDeviceReset *devreset,
1296 void *opaque);
1297void adb_kbd_init(ADBBusState *bus);
1298void adb_mouse_init(ADBBusState *bus);
1299
1300/* cuda.c */
1301
1302extern ADBBusState adb_bus;
1303int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
1304
1305#include "hw/usb.h"
1306
1307/* usb ports of the VM */
1308
1309void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1310 usb_attachfn attach);
1311
1312#define VM_USB_HUB_SIZE 8
1313
1314void do_usb_add(const char *devname);
1315void do_usb_del(const char *devname);
1316void usb_info(void);
1317
1318/* scsi-disk.c */
1319enum scsi_reason {
1320 SCSI_REASON_DONE, /* Command complete. */
1321 SCSI_REASON_DATA /* Transfer complete, more data required. */
1322};
1323
1324typedef struct SCSIDevice SCSIDevice;
1325typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1326 uint32_t arg);
1327
1328SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1329 int tcq,
1330 scsi_completionfn completion,
1331 void *opaque);
1332void scsi_disk_destroy(SCSIDevice *s);
1333
1334int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
1335/* SCSI data transfers are asynchrnonous. However, unlike the block IO
1336 layer the completion routine may be called directly by
1337 scsi_{read,write}_data. */
1338void scsi_read_data(SCSIDevice *s, uint32_t tag);
1339int scsi_write_data(SCSIDevice *s, uint32_t tag);
1340void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1341uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
1342
1343/* lsi53c895a.c */
1344void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1345void *lsi_scsi_init(PCIBus *bus, int devfn);
1346
1347/* integratorcp.c */
1348extern QEMUMachine integratorcp_machine;
1349
1350/* versatilepb.c */
1351extern QEMUMachine versatilepb_machine;
1352extern QEMUMachine versatileab_machine;
1353
1354/* realview.c */
1355extern QEMUMachine realview_machine;
1356
1357/* ps2.c */
1358void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1359void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1360void ps2_write_mouse(void *, int val);
1361void ps2_write_keyboard(void *, int val);
1362uint32_t ps2_read_data(void *);
1363void ps2_queue(void *, int b);
1364void ps2_keyboard_set_translation(void *opaque, int mode);
1365void ps2_mouse_fake_event(void *opaque);
1366
1367/* smc91c111.c */
1368void smc91c111_init(NICInfo *, uint32_t, void *, int);
1369
1370/* pl110.c */
1371void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
1372
1373/* pl011.c */
1374void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1375
1376/* pl050.c */
1377void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1378
1379/* pl080.c */
1380void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
1381
1382/* pl190.c */
1383void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1384
1385/* arm-timer.c */
1386void sp804_init(uint32_t base, void *pic, int irq);
1387void icp_pit_init(uint32_t base, void *pic, int irq);
1388
1389/* arm_sysctl.c */
1390void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1391
1392/* arm_gic.c */
1393void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1394
1395/* arm_boot.c */
1396
1397void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
1398 const char *kernel_cmdline, const char *initrd_filename,
1399 int board_id);
1400
1401/* sh7750.c */
1402struct SH7750State;
1403
1404struct SH7750State *sh7750_init(CPUState * cpu);
1405
1406typedef struct {
1407 /* The callback will be triggered if any of the designated lines change */
1408 uint16_t portamask_trigger;
1409 uint16_t portbmask_trigger;
1410 /* Return 0 if no action was taken */
1411 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1412 uint16_t * periph_pdtra,
1413 uint16_t * periph_portdira,
1414 uint16_t * periph_pdtrb,
1415 uint16_t * periph_portdirb);
1416} sh7750_io_device;
1417
1418int sh7750_register_io_device(struct SH7750State *s,
1419 sh7750_io_device * device);
1420/* tc58128.c */
1421int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1422
1423/* NOR flash devices */
1424typedef struct pflash_t pflash_t;
1425
1426pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1427 BlockDriverState *bs,
1428 target_ulong sector_len, int nb_blocs, int width,
1429 uint16_t id0, uint16_t id1,
1430 uint16_t id2, uint16_t id3);
1431
1432#include "gdbstub.h"
1433
1434#endif /* defined(QEMU_TOOL) */
1435
1436/* monitor.c */
1437void monitor_init(CharDriverState *hd, int show_banner);
1438void term_puts(const char *str);
1439void term_vprintf(const char *fmt, va_list ap);
1440void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
1441void term_print_filename(const char *filename);
1442void term_flush(void);
1443void term_print_help(void);
1444void monitor_readline(const char *prompt, int is_password,
1445 char *buf, int buf_size);
1446
1447/* readline.c */
1448typedef void ReadLineFunc(void *opaque, const char *str);
1449
1450extern int completion_index;
1451void add_completion(const char *str);
1452void readline_handle_byte(int ch);
1453void readline_find_completion(const char *cmdline);
1454const char *readline_get_history(unsigned int index);
1455void readline_start(const char *prompt, int is_password,
1456 ReadLineFunc *readline_func, void *opaque);
1457
1458void kqemu_record_dump(void);
1459
1460#endif /* VL_H */
This page took 0.038721 seconds and 4 git commands to generate.