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[qemu.git] / accel / tcg / cpu-exec.c
CommitLineData
7d13299d 1/*
e965fc38 2 * emulator main execution loop
5fafdf24 3 *
66321a11 4 * Copyright (c) 2003-2005 Fabrice Bellard
7d13299d 5 *
3ef693a0
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
fb0343d5 9 * version 2.1 of the License, or (at your option) any later version.
7d13299d 10 *
3ef693a0
FB
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
3ef693a0 16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d 18 */
a8d25326 19
7b31bbc2 20#include "qemu/osdep.h"
a8d25326 21#include "qemu-common.h"
740b1759 22#include "qemu/qemu-print.h"
78271684 23#include "hw/core/tcg-cpu-ops.h"
d9bb58e5 24#include "trace.h"
76cad711 25#include "disas/disas.h"
63c91552 26#include "exec/exec-all.h"
dcb32f1d 27#include "tcg/tcg.h"
1de7afc9 28#include "qemu/atomic.h"
c905a368 29#include "qemu/compiler.h"
c2aa5f81 30#include "qemu/timer.h"
79e2b9ae 31#include "qemu/rcu.h"
e1b89321 32#include "exec/tb-hash.h"
f6bb84d5 33#include "exec/tb-lookup.h"
508127e2 34#include "exec/log.h"
8d04fb55 35#include "qemu/main-loop.h"
6220e900
PD
36#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
37#include "hw/i386/apic.h"
38#endif
d2528bdc 39#include "sysemu/cpus.h"
740b1759
CF
40#include "exec/cpu-all.h"
41#include "sysemu/cpu-timers.h"
6f060969 42#include "sysemu/replay.h"
c03f041f 43#include "internal.h"
c2aa5f81
ST
44
45/* -icount align implementation. */
46
47typedef struct SyncClocks {
48 int64_t diff_clk;
49 int64_t last_cpu_icount;
7f7bc144 50 int64_t realtime_clock;
c2aa5f81
ST
51} SyncClocks;
52
53#if !defined(CONFIG_USER_ONLY)
54/* Allow the guest to have a max 3ms advance.
55 * The difference between the 2 clocks could therefore
56 * oscillate around 0.
57 */
58#define VM_CLOCK_ADVANCE 3000000
7f7bc144
ST
59#define THRESHOLD_REDUCE 1.5
60#define MAX_DELAY_PRINT_RATE 2000000000LL
61#define MAX_NB_PRINTS 100
c2aa5f81 62
740b1759
CF
63static int64_t max_delay;
64static int64_t max_advance;
65
5e140196 66static void align_clocks(SyncClocks *sc, CPUState *cpu)
c2aa5f81
ST
67{
68 int64_t cpu_icount;
69
70 if (!icount_align_option) {
71 return;
72 }
73
5e140196 74 cpu_icount = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
8191d368 75 sc->diff_clk += icount_to_ns(sc->last_cpu_icount - cpu_icount);
c2aa5f81
ST
76 sc->last_cpu_icount = cpu_icount;
77
78 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
79#ifndef _WIN32
80 struct timespec sleep_delay, rem_delay;
81 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
82 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
83 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
a498d0ef 84 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
c2aa5f81
ST
85 } else {
86 sc->diff_clk = 0;
87 }
88#else
89 Sleep(sc->diff_clk / SCALE_MS);
90 sc->diff_clk = 0;
91#endif
92 }
93}
94
7f7bc144
ST
95static void print_delay(const SyncClocks *sc)
96{
97 static float threshold_delay;
98 static int64_t last_realtime_clock;
99 static int nb_prints;
100
101 if (icount_align_option &&
102 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
103 nb_prints < MAX_NB_PRINTS) {
104 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
105 (-sc->diff_clk / (float)1000000000LL <
106 (threshold_delay - THRESHOLD_REDUCE))) {
107 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
740b1759
CF
108 qemu_printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
109 threshold_delay - 1,
110 threshold_delay);
7f7bc144
ST
111 nb_prints++;
112 last_realtime_clock = sc->realtime_clock;
113 }
114 }
115}
116
5e140196 117static void init_delay_params(SyncClocks *sc, CPUState *cpu)
c2aa5f81
ST
118{
119 if (!icount_align_option) {
120 return;
121 }
2e91cc62
PB
122 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
123 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
5e140196
RH
124 sc->last_cpu_icount
125 = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
27498bef
ST
126 if (sc->diff_clk < max_delay) {
127 max_delay = sc->diff_clk;
128 }
129 if (sc->diff_clk > max_advance) {
130 max_advance = sc->diff_clk;
131 }
7f7bc144
ST
132
133 /* Print every 2s max if the guest is late. We limit the number
134 of printed messages to NB_PRINT_MAX(currently 100) */
135 print_delay(sc);
c2aa5f81
ST
136}
137#else
138static void align_clocks(SyncClocks *sc, const CPUState *cpu)
139{
140}
141
142static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
143{
144}
145#endif /* CONFIG USER ONLY */
7d13299d 146
77211379 147/* Execute a TB, and fix up the CPU state afterwards if necessary */
c905a368
DB
148/*
149 * Disable CFI checks.
150 * TCG creates binary blobs at runtime, with the transformed code.
151 * A TB is a blob of binary code, created at runtime and called with an
152 * indirect function call. Since such function did not exist at compile time,
153 * the CFI runtime has no way to verify its signature and would fail.
154 * TCG is not considered a security-sensitive part of QEMU so this does not
155 * affect the impact of CFI in environment with high security requirements
156 */
eba40358
RH
157static inline TranslationBlock * QEMU_DISABLE_CFI
158cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int *tb_exit)
77211379
PM
159{
160 CPUArchState *env = cpu->env_ptr;
819af24b
SF
161 uintptr_t ret;
162 TranslationBlock *last_tb;
db0c51a3 163 const void *tb_ptr = itb->tc.ptr;
1a830635 164
d977e1c2 165 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
4fad446b
PB
166 "Trace %d: %p ["
167 TARGET_FMT_lx "/" TARGET_FMT_lx "/%#x] %s\n",
168 cpu->cpu_index, itb->tc.ptr,
169 itb->cs_base, itb->pc, itb->flags,
4426f83a 170 lookup_symbol(itb->pc));
03afa5f8
RH
171
172#if defined(DEBUG_DISAS)
be2208e2
RH
173 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
174 && qemu_log_in_addr_range(itb->pc)) {
fc59d2d8 175 FILE *logfile = qemu_log_lock();
ae765180
PM
176 int flags = 0;
177 if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) {
178 flags |= CPU_DUMP_FPU;
179 }
03afa5f8 180#if defined(TARGET_I386)
ae765180 181 flags |= CPU_DUMP_CCOP;
03afa5f8 182#endif
ae765180 183 log_cpu_state(cpu, flags);
fc59d2d8 184 qemu_log_unlock(logfile);
03afa5f8
RH
185 }
186#endif /* DEBUG_DISAS */
187
653b87eb 188 qemu_thread_jit_execute();
819af24b 189 ret = tcg_qemu_tb_exec(env, tb_ptr);
626cf8f4 190 cpu->can_do_io = 1;
eba40358
RH
191 /*
192 * TODO: Delay swapping back to the read-write region of the TB
193 * until we actually need to modify the TB. The read-only copy,
194 * coming from the rx region, shares the same host TLB entry as
195 * the code that executed the exit_tb opcode that arrived here.
196 * If we insist on touching both the RX and the RW pages, we
197 * double the host TLB pressure.
198 */
199 last_tb = tcg_splitwx_to_rw((void *)(ret & ~TB_EXIT_MASK));
200 *tb_exit = ret & TB_EXIT_MASK;
201
202 trace_exec_tb_exit(last_tb, *tb_exit);
6db8b538 203
eba40358 204 if (*tb_exit > TB_EXIT_IDX1) {
77211379
PM
205 /* We didn't start executing this TB (eg because the instruction
206 * counter hit zero); we must restore the guest PC to the address
207 * of the start of the TB.
208 */
bdf7ae5b 209 CPUClass *cc = CPU_GET_CLASS(cpu);
819af24b 210 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
d977e1c2
AB
211 "Stopped execution of TB chain before %p ["
212 TARGET_FMT_lx "] %s\n",
e7e168f4 213 last_tb->tc.ptr, last_tb->pc,
819af24b 214 lookup_symbol(last_tb->pc));
78271684
CF
215 if (cc->tcg_ops->synchronize_from_tb) {
216 cc->tcg_ops->synchronize_from_tb(cpu, last_tb);
bdf7ae5b
AF
217 } else {
218 assert(cc->set_pc);
819af24b 219 cc->set_pc(cpu, last_tb->pc);
bdf7ae5b 220 }
77211379 221 }
eba40358 222 return last_tb;
77211379
PM
223}
224
2e70f6ef 225
035ba06c
EH
226static void cpu_exec_enter(CPUState *cpu)
227{
228 CPUClass *cc = CPU_GET_CLASS(cpu);
229
78271684
CF
230 if (cc->tcg_ops->cpu_exec_enter) {
231 cc->tcg_ops->cpu_exec_enter(cpu);
80c4750b 232 }
035ba06c
EH
233}
234
235static void cpu_exec_exit(CPUState *cpu)
fdbc2b57 236{
08e73c48 237 CPUClass *cc = CPU_GET_CLASS(cpu);
035ba06c 238
78271684
CF
239 if (cc->tcg_ops->cpu_exec_exit) {
240 cc->tcg_ops->cpu_exec_exit(cpu);
80c4750b 241 }
035ba06c
EH
242}
243
244void cpu_exec_step_atomic(CPUState *cpu)
245{
6f04cb1c 246 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
fdbc2b57
RH
247 TranslationBlock *tb;
248 target_ulong cs_base, pc;
249 uint32_t flags;
c0ae396a 250 uint32_t cflags = (curr_cflags(cpu) & ~CF_PARALLEL) | 1;
eba40358 251 int tb_exit;
fdbc2b57 252
08e73c48 253 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
886cc689 254 start_exclusive();
bfff072c
DC
255 g_assert(cpu == current_cpu);
256 g_assert(!cpu->running);
257 cpu->running = true;
886cc689 258
6f04cb1c 259 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
c0ae396a 260 tb = tb_lookup(cpu, pc, cs_base, flags, cflags);
6f04cb1c 261
4e2ca83e
EC
262 if (tb == NULL) {
263 mmap_lock();
95590e24 264 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
4e2ca83e
EC
265 mmap_unlock();
266 }
08e73c48 267
035ba06c 268 cpu_exec_enter(cpu);
08e73c48 269 /* execute the generated code */
4e2ca83e 270 trace_exec_tb(tb, pc);
eba40358 271 cpu_tb_exec(cpu, tb, &tb_exit);
035ba06c 272 cpu_exec_exit(cpu);
08e73c48 273 } else {
0ac20318 274 /*
08e73c48
PK
275 * The mmap_lock is dropped by tb_gen_code if it runs out of
276 * memory.
277 */
278#ifndef CONFIG_SOFTMMU
279 tcg_debug_assert(!have_mmap_lock());
280#endif
6aaa24f9
EC
281 if (qemu_mutex_iothread_locked()) {
282 qemu_mutex_unlock_iothread();
283 }
faa9372c 284 assert_no_pages_locked();
e6d86bed 285 qemu_plugin_disable_mem_helpers(cpu);
08e73c48 286 }
426eeecd 287
886cc689
AB
288
289 /*
290 * As we start the exclusive region before codegen we must still
291 * be in the region if we longjump out of either the codegen or
292 * the execution.
293 */
294 g_assert(cpu_in_exclusive_context(cpu));
bfff072c 295 cpu->running = false;
886cc689 296 end_exclusive();
fdbc2b57
RH
297}
298
909eaac9
EC
299struct tb_desc {
300 target_ulong pc;
301 target_ulong cs_base;
302 CPUArchState *env;
303 tb_page_addr_t phys_page1;
304 uint32_t flags;
bf253ac6 305 uint32_t cflags;
61a67f71 306 uint32_t trace_vcpu_dstate;
909eaac9
EC
307};
308
61b8cef1 309static bool tb_lookup_cmp(const void *p, const void *d)
909eaac9
EC
310{
311 const TranslationBlock *tb = p;
312 const struct tb_desc *desc = d;
313
314 if (tb->pc == desc->pc &&
315 tb->page_addr[0] == desc->phys_page1 &&
316 tb->cs_base == desc->cs_base &&
6d21e420 317 tb->flags == desc->flags &&
61a67f71 318 tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
bf253ac6 319 tb_cflags(tb) == desc->cflags) {
909eaac9
EC
320 /* check next page if needed */
321 if (tb->page_addr[1] == -1) {
322 return true;
323 } else {
324 tb_page_addr_t phys_page2;
325 target_ulong virt_page2;
326
327 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
328 phys_page2 = get_page_addr_code(desc->env, virt_page2);
329 if (tb->page_addr[1] == phys_page2) {
330 return true;
331 }
332 }
333 }
334 return false;
335}
336
cedbcb01 337TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
4e2ca83e 338 target_ulong cs_base, uint32_t flags,
bf253ac6 339 uint32_t cflags)
8a40a180 340{
909eaac9
EC
341 tb_page_addr_t phys_pc;
342 struct tb_desc desc;
42bd3228 343 uint32_t h;
3b46e624 344
909eaac9
EC
345 desc.env = (CPUArchState *)cpu->env_ptr;
346 desc.cs_base = cs_base;
347 desc.flags = flags;
bf253ac6 348 desc.cflags = cflags;
61a67f71 349 desc.trace_vcpu_dstate = *cpu->trace_dstate;
909eaac9
EC
350 desc.pc = pc;
351 phys_pc = get_page_addr_code(desc.env, pc);
7252f2de
PM
352 if (phys_pc == -1) {
353 return NULL;
354 }
909eaac9 355 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
bf253ac6 356 h = tb_hash_func(phys_pc, pc, flags, cflags, *cpu->trace_dstate);
61b8cef1 357 return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
9fd1a948
PB
358}
359
a8583393
RH
360void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr)
361{
362 if (TCG_TARGET_HAS_direct_jump) {
363 uintptr_t offset = tb->jmp_target_arg[n];
e7e168f4 364 uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr;
1acbad0f
RH
365 uintptr_t jmp_rx = tc_ptr + offset;
366 uintptr_t jmp_rw = jmp_rx - tcg_splitwx_diff;
367 tb_target_set_jmp_target(tc_ptr, jmp_rx, jmp_rw, addr);
a8583393
RH
368 } else {
369 tb->jmp_target_arg[n] = addr;
370 }
371}
372
a8583393
RH
373static inline void tb_add_jump(TranslationBlock *tb, int n,
374 TranslationBlock *tb_next)
375{
194125e3
EC
376 uintptr_t old;
377
653b87eb 378 qemu_thread_jit_write();
a8583393 379 assert(n < ARRAY_SIZE(tb->jmp_list_next));
194125e3
EC
380 qemu_spin_lock(&tb_next->jmp_lock);
381
382 /* make sure the destination TB is valid */
383 if (tb_next->cflags & CF_INVALID) {
384 goto out_unlock_next;
385 }
386 /* Atomically claim the jump destination slot only if it was NULL */
d73415a3
SH
387 old = qatomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL,
388 (uintptr_t)tb_next);
194125e3
EC
389 if (old) {
390 goto out_unlock_next;
a8583393 391 }
194125e3
EC
392
393 /* patch the native jump address */
394 tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr);
395
396 /* add in TB jmp list */
397 tb->jmp_list_next[n] = tb_next->jmp_list_head;
398 tb_next->jmp_list_head = (uintptr_t)tb | n;
399
400 qemu_spin_unlock(&tb_next->jmp_lock);
401
a8583393
RH
402 qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
403 "Linking TBs %p [" TARGET_FMT_lx
404 "] index %d -> %p [" TARGET_FMT_lx "]\n",
e7e168f4
EC
405 tb->tc.ptr, tb->pc, n,
406 tb_next->tc.ptr, tb_next->pc);
194125e3 407 return;
a8583393 408
194125e3
EC
409 out_unlock_next:
410 qemu_spin_unlock(&tb_next->jmp_lock);
411 return;
a8583393
RH
412}
413
bd2710d5
SF
414static inline TranslationBlock *tb_find(CPUState *cpu,
415 TranslationBlock *last_tb,
bf253ac6 416 int tb_exit, uint32_t cflags)
8a40a180 417{
6f04cb1c 418 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
8a40a180
FB
419 TranslationBlock *tb;
420 target_ulong cs_base, pc;
89fee74a 421 uint32_t flags;
8a40a180 422
6f04cb1c
AB
423 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
424
bf253ac6 425 tb = tb_lookup(cpu, pc, cs_base, flags, cflags);
f6bb84d5 426 if (tb == NULL) {
f6bb84d5 427 mmap_lock();
bf253ac6 428 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
f6bb84d5 429 mmap_unlock();
bd2710d5 430 /* We add the TB in the virtual pc hash table for the fast lookup */
d73415a3 431 qatomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
8a40a180 432 }
c88c67e5
SF
433#ifndef CONFIG_USER_ONLY
434 /* We don't take care of direct jumps when address mapping changes in
435 * system emulation. So it's not safe to make a direct jump to a TB
436 * spanning two pages because the mapping for the second page can change.
437 */
438 if (tb->page_addr[1] != -1) {
4b7e6950 439 last_tb = NULL;
c88c67e5
SF
440 }
441#endif
a0522c7a 442 /* See if we can patch the calling TB. */
d7f425fd 443 if (last_tb) {
194125e3 444 tb_add_jump(last_tb, tb_exit, tb);
74d356dd 445 }
8a40a180
FB
446 return tb;
447}
448
8b2d34e9
SF
449static inline bool cpu_handle_halt(CPUState *cpu)
450{
451 if (cpu->halted) {
452#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
4084893d 453 if (cpu->interrupt_request & CPU_INTERRUPT_POLL) {
8b2d34e9 454 X86CPU *x86_cpu = X86_CPU(cpu);
8d04fb55 455 qemu_mutex_lock_iothread();
8b2d34e9
SF
456 apic_poll_irq(x86_cpu->apic_state);
457 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
8d04fb55 458 qemu_mutex_unlock_iothread();
8b2d34e9
SF
459 }
460#endif
461 if (!cpu_has_work(cpu)) {
8b2d34e9
SF
462 return true;
463 }
464
465 cpu->halted = 0;
466 }
467
468 return false;
469}
470
ea284766 471static inline void cpu_handle_debug_exception(CPUState *cpu)
1009d2ed 472{
86025ee4 473 CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed
JK
474 CPUWatchpoint *wp;
475
ff4700b0
AF
476 if (!cpu->watchpoint_hit) {
477 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed
JK
478 wp->flags &= ~BP_WATCHPOINT_HIT;
479 }
480 }
86025ee4 481
78271684
CF
482 if (cc->tcg_ops->debug_excp_handler) {
483 cc->tcg_ops->debug_excp_handler(cpu);
710384d0 484 }
1009d2ed
JK
485}
486
ea284766
SF
487static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
488{
17b50b0c
PD
489 if (cpu->exception_index < 0) {
490#ifndef CONFIG_USER_ONLY
491 if (replay_has_exception()
5e140196 492 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0) {
a11bbb6a 493 /* Execute just one insn to trigger exception pending in the log */
c0ae396a 494 cpu->cflags_next_tb = (curr_cflags(cpu) & ~CF_USE_ICOUNT) | 1;
17b50b0c
PD
495 }
496#endif
a11bbb6a 497 return false;
17b50b0c 498 }
17b50b0c
PD
499 if (cpu->exception_index >= EXCP_INTERRUPT) {
500 /* exit request from the cpu execution loop */
501 *ret = cpu->exception_index;
502 if (*ret == EXCP_DEBUG) {
503 cpu_handle_debug_exception(cpu);
504 }
505 cpu->exception_index = -1;
506 return true;
507 } else {
ea284766 508#if defined(CONFIG_USER_ONLY)
17b50b0c
PD
509 /* if user mode only, we simulate a fake exception
510 which will be handled outside the cpu execution
511 loop */
ea284766 512#if defined(TARGET_I386)
17b50b0c 513 CPUClass *cc = CPU_GET_CLASS(cpu);
78271684 514 cc->tcg_ops->do_interrupt(cpu);
17b50b0c
PD
515#endif
516 *ret = cpu->exception_index;
517 cpu->exception_index = -1;
518 return true;
519#else
520 if (replay_exception()) {
ea284766 521 CPUClass *cc = CPU_GET_CLASS(cpu);
17b50b0c 522 qemu_mutex_lock_iothread();
78271684 523 cc->tcg_ops->do_interrupt(cpu);
17b50b0c 524 qemu_mutex_unlock_iothread();
ea284766 525 cpu->exception_index = -1;
a7ba744f
LM
526
527 if (unlikely(cpu->singlestep_enabled)) {
528 /*
529 * After processing the exception, ensure an EXCP_DEBUG is
530 * raised when single-stepping so that GDB doesn't miss the
531 * next instruction.
532 */
533 *ret = EXCP_DEBUG;
534 cpu_handle_debug_exception(cpu);
535 return true;
536 }
17b50b0c
PD
537 } else if (!replay_has_interrupt()) {
538 /* give a chance to iothread in replay mode */
539 *ret = EXCP_INTERRUPT;
ea284766 540 return true;
ea284766 541 }
ea284766
SF
542#endif
543 }
544
545 return false;
546}
547
4084893d
PD
548/*
549 * CPU_INTERRUPT_POLL is a virtual event which gets converted into a
550 * "real" interrupt event later. It does not need to be recorded for
551 * replay purposes.
552 */
553static inline bool need_replay_interrupt(int interrupt_request)
554{
555#if defined(TARGET_I386)
556 return !(interrupt_request & CPU_INTERRUPT_POLL);
557#else
558 return true;
559#endif
560}
561
209b71b6 562static inline bool cpu_handle_interrupt(CPUState *cpu,
c385e6e4
SF
563 TranslationBlock **last_tb)
564{
565 CPUClass *cc = CPU_GET_CLASS(cpu);
17b50b0c
PD
566
567 /* Clear the interrupt flag now since we're processing
568 * cpu->interrupt_request and cpu->exit_request.
d84be02d
DH
569 * Ensure zeroing happens before reading cpu->exit_request or
570 * cpu->interrupt_request (see also smp_wmb in cpu_exit())
17b50b0c 571 */
d73415a3 572 qatomic_mb_set(&cpu_neg(cpu)->icount_decr.u16.high, 0);
c385e6e4 573
d73415a3 574 if (unlikely(qatomic_read(&cpu->interrupt_request))) {
8d04fb55
JK
575 int interrupt_request;
576 qemu_mutex_lock_iothread();
577 interrupt_request = cpu->interrupt_request;
c385e6e4
SF
578 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
579 /* Mask out external interrupts for this step. */
580 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
581 }
582 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
583 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
584 cpu->exception_index = EXCP_DEBUG;
8d04fb55 585 qemu_mutex_unlock_iothread();
209b71b6 586 return true;
c385e6e4
SF
587 }
588 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
589 /* Do nothing */
590 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
591 replay_interrupt();
592 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
593 cpu->halted = 1;
594 cpu->exception_index = EXCP_HLT;
8d04fb55 595 qemu_mutex_unlock_iothread();
209b71b6 596 return true;
c385e6e4
SF
597 }
598#if defined(TARGET_I386)
599 else if (interrupt_request & CPU_INTERRUPT_INIT) {
600 X86CPU *x86_cpu = X86_CPU(cpu);
601 CPUArchState *env = &x86_cpu->env;
602 replay_interrupt();
65c9d60a 603 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
c385e6e4
SF
604 do_cpu_init(x86_cpu);
605 cpu->exception_index = EXCP_HALTED;
8d04fb55 606 qemu_mutex_unlock_iothread();
209b71b6 607 return true;
c385e6e4
SF
608 }
609#else
610 else if (interrupt_request & CPU_INTERRUPT_RESET) {
611 replay_interrupt();
612 cpu_reset(cpu);
8d04fb55 613 qemu_mutex_unlock_iothread();
209b71b6 614 return true;
c385e6e4
SF
615 }
616#endif
617 /* The target hook has 3 exit conditions:
618 False when the interrupt isn't processed,
619 True when it is, and we should restart on a new TB,
620 and via longjmp via cpu_loop_exit. */
621 else {
78271684
CF
622 if (cc->tcg_ops->cpu_exec_interrupt &&
623 cc->tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) {
4084893d
PD
624 if (need_replay_interrupt(interrupt_request)) {
625 replay_interrupt();
626 }
ba3c35d9
RH
627 /*
628 * After processing the interrupt, ensure an EXCP_DEBUG is
629 * raised when single-stepping so that GDB doesn't miss the
630 * next instruction.
631 */
632 cpu->exception_index =
633 (cpu->singlestep_enabled ? EXCP_DEBUG : -1);
c385e6e4
SF
634 *last_tb = NULL;
635 }
8b1fe3f4
SF
636 /* The target hook may have updated the 'cpu->interrupt_request';
637 * reload the 'interrupt_request' value */
638 interrupt_request = cpu->interrupt_request;
c385e6e4 639 }
8b1fe3f4 640 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
c385e6e4
SF
641 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
642 /* ensure that no TB jump will be modified as
643 the program flow was changed */
644 *last_tb = NULL;
645 }
8d04fb55
JK
646
647 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */
648 qemu_mutex_unlock_iothread();
c385e6e4 649 }
8d04fb55 650
cfb2d02b 651 /* Finally, check if we need to exit to the main loop. */
d73415a3 652 if (unlikely(qatomic_read(&cpu->exit_request))
740b1759 653 || (icount_enabled()
a11bbb6a 654 && (cpu->cflags_next_tb == -1 || cpu->cflags_next_tb & CF_USE_ICOUNT)
5e140196 655 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0)) {
d73415a3 656 qatomic_set(&cpu->exit_request, 0);
5f3bdfd4
PD
657 if (cpu->exception_index == -1) {
658 cpu->exception_index = EXCP_INTERRUPT;
659 }
209b71b6 660 return true;
c385e6e4 661 }
209b71b6
PB
662
663 return false;
c385e6e4
SF
664}
665
928de9ee 666static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
cfb2d02b 667 TranslationBlock **last_tb, int *tb_exit)
928de9ee 668{
1aab16c2 669 int32_t insns_left;
928de9ee
SF
670
671 trace_exec_tb(tb, tb->pc);
eba40358 672 tb = cpu_tb_exec(cpu, tb, tb_exit);
1aab16c2
PB
673 if (*tb_exit != TB_EXIT_REQUESTED) {
674 *last_tb = tb;
675 return;
676 }
677
678 *last_tb = NULL;
d73415a3 679 insns_left = qatomic_read(&cpu_neg(cpu)->icount_decr.u32);
1aab16c2 680 if (insns_left < 0) {
e5143e30
AB
681 /* Something asked us to stop executing chained TBs; just
682 * continue round the main loop. Whatever requested the exit
30f3dda2 683 * will also have set something else (eg exit_request or
17b50b0c
PD
684 * interrupt_request) which will be handled by
685 * cpu_handle_interrupt. cpu_handle_interrupt will also
686 * clear cpu->icount_decr.u16.high.
928de9ee 687 */
1aab16c2 688 return;
928de9ee 689 }
1aab16c2
PB
690
691 /* Instruction counter expired. */
740b1759 692 assert(icount_enabled());
1aab16c2 693#ifndef CONFIG_USER_ONLY
eda5f7c6 694 /* Ensure global icount has gone forward */
8191d368 695 icount_update(cpu);
eda5f7c6 696 /* Refill decrementer and continue execution. */
bc662a33 697 insns_left = MIN(CF_COUNT_MASK, cpu->icount_budget);
5e140196 698 cpu_neg(cpu)->icount_decr.u16.low = insns_left;
eda5f7c6 699 cpu->icount_extra = cpu->icount_budget - insns_left;
bc662a33
AB
700
701 /*
702 * If the next tb has more instructions than we have left to
703 * execute we need to ensure we find/generate a TB with exactly
704 * insns_left instructions in it.
705 */
706 if (!cpu->icount_extra && insns_left > 0 && insns_left < tb->icount) {
707 cpu->cflags_next_tb = (tb->cflags & ~CF_COUNT_MASK) | insns_left;
928de9ee 708 }
1aab16c2 709#endif
928de9ee
SF
710}
711
7d13299d
FB
712/* main execution loop */
713
ea3e9847 714int cpu_exec(CPUState *cpu)
7d13299d 715{
97a8ea5a 716 CPUClass *cc = CPU_GET_CLASS(cpu);
c385e6e4 717 int ret;
cfb2d02b 718 SyncClocks sc = { 0 };
c2aa5f81 719
6f060969
PD
720 /* replay_interrupt may need current_cpu */
721 current_cpu = cpu;
722
8b2d34e9
SF
723 if (cpu_handle_halt(cpu)) {
724 return EXCP_HALTED;
eda48c34 725 }
5a1e3cfc 726
79e2b9ae
PB
727 rcu_read_lock();
728
035ba06c 729 cpu_exec_enter(cpu);
9d27abd9 730
c2aa5f81
ST
731 /* Calculate difference between guest clock and host clock.
732 * This delay includes the delay of the last cycle, so
733 * what we have to do is sleep until it is 0. As for the
734 * advance/delay we gain here, we try to fix it next time.
735 */
736 init_delay_params(&sc, cpu);
737
4515e58d
PB
738 /* prepare setjmp context for exception handling */
739 if (sigsetjmp(cpu->jmp_env, 0) != 0) {
19a84318 740#if defined(__clang__)
e6a41a04
PM
741 /*
742 * Some compilers wrongly smash all local variables after
743 * siglongjmp (the spec requires that only non-volatile locals
744 * which are changed between the sigsetjmp and siglongjmp are
745 * permitted to be trashed). There were bug reports for gcc
746 * 4.5.0 and clang. The bug is fixed in all versions of gcc
747 * that we support, but is still unfixed in clang:
748 * https://bugs.llvm.org/show_bug.cgi?id=21183
749 *
4515e58d 750 * Reload essential local variables here for those compilers.
e6a41a04
PM
751 * Newer versions of gcc would complain about this code (-Wclobbered),
752 * so we only perform the workaround for clang.
753 */
4515e58d
PB
754 cpu = current_cpu;
755 cc = CPU_GET_CLASS(cpu);
e6a41a04
PM
756#else
757 /*
758 * Non-buggy compilers preserve these locals; assert that
759 * they have the correct value.
760 */
4515e58d
PB
761 g_assert(cpu == current_cpu);
762 g_assert(cc == CPU_GET_CLASS(cpu));
e6a41a04
PM
763#endif
764
0ac20318
EC
765#ifndef CONFIG_SOFTMMU
766 tcg_debug_assert(!have_mmap_lock());
767#endif
8d04fb55
JK
768 if (qemu_mutex_iothread_locked()) {
769 qemu_mutex_unlock_iothread();
770 }
e6d86bed
EC
771 qemu_plugin_disable_mem_helpers(cpu);
772
8fd3a9b8 773 assert_no_pages_locked();
4515e58d
PB
774 }
775
776 /* if an exception is pending, we execute it here */
777 while (!cpu_handle_exception(cpu, &ret)) {
778 TranslationBlock *last_tb = NULL;
779 int tb_exit = 0;
780
781 while (!cpu_handle_interrupt(cpu, &last_tb)) {
9b990ee5
RH
782 uint32_t cflags = cpu->cflags_next_tb;
783 TranslationBlock *tb;
784
785 /* When requested, use an exact setting for cflags for the next
786 execution. This is used for icount, precise smc, and stop-
787 after-access watchpoints. Since this request should never
788 have CF_INVALID set, -1 is a convenient invalid value that
789 does not require tcg headers for cpu_common_reset. */
790 if (cflags == -1) {
c0ae396a 791 cflags = curr_cflags(cpu);
9b990ee5
RH
792 } else {
793 cpu->cflags_next_tb = -1;
794 }
795
796 tb = tb_find(cpu, last_tb, tb_exit, cflags);
cfb2d02b 797 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit);
4515e58d
PB
798 /* Try to align the host and virtual clocks
799 if the guest is in advance */
800 align_clocks(&sc, cpu);
7d13299d 801 }
4515e58d 802 }
3fb2ded1 803
035ba06c 804 cpu_exec_exit(cpu);
79e2b9ae 805 rcu_read_unlock();
1057eaa7 806
7d13299d
FB
807 return ret;
808}
740b1759 809
7df5e3d6
CF
810void tcg_exec_realizefn(CPUState *cpu, Error **errp)
811{
812 static bool tcg_target_initialized;
813 CPUClass *cc = CPU_GET_CLASS(cpu);
814
815 if (!tcg_target_initialized) {
78271684 816 cc->tcg_ops->initialize();
7df5e3d6
CF
817 tcg_target_initialized = true;
818 }
819 tlb_init(cpu);
820 qemu_plugin_vcpu_init_hook(cpu);
821
822#ifndef CONFIG_USER_ONLY
823 tcg_iommu_init_notifier_list(cpu);
824#endif /* !CONFIG_USER_ONLY */
825}
826
827/* undo the initializations in reverse order */
828void tcg_exec_unrealizefn(CPUState *cpu)
829{
830#ifndef CONFIG_USER_ONLY
831 tcg_iommu_free_notifier_list(cpu);
832#endif /* !CONFIG_USER_ONLY */
833
834 qemu_plugin_vcpu_exit_hook(cpu);
835 tlb_destroy(cpu);
836}
837
740b1759
CF
838#ifndef CONFIG_USER_ONLY
839
840void dump_drift_info(void)
841{
842 if (!icount_enabled()) {
843 return;
844 }
845
846 qemu_printf("Host - Guest clock %"PRIi64" ms\n",
8191d368 847 (cpu_get_clock() - icount_get()) / SCALE_MS);
740b1759
CF
848 if (icount_align_option) {
849 qemu_printf("Max guest delay %"PRIi64" ms\n",
850 -max_delay / SCALE_MS);
851 qemu_printf("Max guest advance %"PRIi64" ms\n",
852 max_advance / SCALE_MS);
853 } else {
854 qemu_printf("Max guest delay NA\n");
855 qemu_printf("Max guest advance NA\n");
856 }
857}
858
859#endif /* !CONFIG_USER_ONLY */
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