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7d13299d 1/*
e965fc38 2 * emulator main execution loop
5fafdf24 3 *
66321a11 4 * Copyright (c) 2003-2005 Fabrice Bellard
7d13299d 5 *
3ef693a0
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
fb0343d5 9 * version 2.1 of the License, or (at your option) any later version.
7d13299d 10 *
3ef693a0
FB
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
3ef693a0 16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d 18 */
7b31bbc2 19#include "qemu/osdep.h"
cea5f9a2 20#include "cpu.h"
d9bb58e5 21#include "trace.h"
76cad711 22#include "disas/disas.h"
63c91552 23#include "exec/exec-all.h"
7cb69cae 24#include "tcg.h"
1de7afc9 25#include "qemu/atomic.h"
9c17d615 26#include "sysemu/qtest.h"
c2aa5f81 27#include "qemu/timer.h"
79e2b9ae 28#include "qemu/rcu.h"
e1b89321 29#include "exec/tb-hash.h"
f6bb84d5 30#include "exec/tb-lookup.h"
508127e2 31#include "exec/log.h"
8d04fb55 32#include "qemu/main-loop.h"
6220e900
PD
33#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
34#include "hw/i386/apic.h"
35#endif
d2528bdc 36#include "sysemu/cpus.h"
6f060969 37#include "sysemu/replay.h"
c2aa5f81
ST
38
39/* -icount align implementation. */
40
41typedef struct SyncClocks {
42 int64_t diff_clk;
43 int64_t last_cpu_icount;
7f7bc144 44 int64_t realtime_clock;
c2aa5f81
ST
45} SyncClocks;
46
47#if !defined(CONFIG_USER_ONLY)
48/* Allow the guest to have a max 3ms advance.
49 * The difference between the 2 clocks could therefore
50 * oscillate around 0.
51 */
52#define VM_CLOCK_ADVANCE 3000000
7f7bc144
ST
53#define THRESHOLD_REDUCE 1.5
54#define MAX_DELAY_PRINT_RATE 2000000000LL
55#define MAX_NB_PRINTS 100
c2aa5f81 56
5e140196 57static void align_clocks(SyncClocks *sc, CPUState *cpu)
c2aa5f81
ST
58{
59 int64_t cpu_icount;
60
61 if (!icount_align_option) {
62 return;
63 }
64
5e140196 65 cpu_icount = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
c2aa5f81
ST
66 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
67 sc->last_cpu_icount = cpu_icount;
68
69 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
70#ifndef _WIN32
71 struct timespec sleep_delay, rem_delay;
72 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
73 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
74 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
a498d0ef 75 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
c2aa5f81
ST
76 } else {
77 sc->diff_clk = 0;
78 }
79#else
80 Sleep(sc->diff_clk / SCALE_MS);
81 sc->diff_clk = 0;
82#endif
83 }
84}
85
7f7bc144
ST
86static void print_delay(const SyncClocks *sc)
87{
88 static float threshold_delay;
89 static int64_t last_realtime_clock;
90 static int nb_prints;
91
92 if (icount_align_option &&
93 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
94 nb_prints < MAX_NB_PRINTS) {
95 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
96 (-sc->diff_clk / (float)1000000000LL <
97 (threshold_delay - THRESHOLD_REDUCE))) {
98 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
99 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
100 threshold_delay - 1,
101 threshold_delay);
102 nb_prints++;
103 last_realtime_clock = sc->realtime_clock;
104 }
105 }
106}
107
5e140196 108static void init_delay_params(SyncClocks *sc, CPUState *cpu)
c2aa5f81
ST
109{
110 if (!icount_align_option) {
111 return;
112 }
2e91cc62
PB
113 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
114 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
5e140196
RH
115 sc->last_cpu_icount
116 = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
27498bef
ST
117 if (sc->diff_clk < max_delay) {
118 max_delay = sc->diff_clk;
119 }
120 if (sc->diff_clk > max_advance) {
121 max_advance = sc->diff_clk;
122 }
7f7bc144
ST
123
124 /* Print every 2s max if the guest is late. We limit the number
125 of printed messages to NB_PRINT_MAX(currently 100) */
126 print_delay(sc);
c2aa5f81
ST
127}
128#else
129static void align_clocks(SyncClocks *sc, const CPUState *cpu)
130{
131}
132
133static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
134{
135}
136#endif /* CONFIG USER ONLY */
7d13299d 137
77211379 138/* Execute a TB, and fix up the CPU state afterwards if necessary */
1a830635 139static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
77211379
PM
140{
141 CPUArchState *env = cpu->env_ptr;
819af24b
SF
142 uintptr_t ret;
143 TranslationBlock *last_tb;
144 int tb_exit;
e7e168f4 145 uint8_t *tb_ptr = itb->tc.ptr;
1a830635 146
d977e1c2 147 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
4fad446b
PB
148 "Trace %d: %p ["
149 TARGET_FMT_lx "/" TARGET_FMT_lx "/%#x] %s\n",
150 cpu->cpu_index, itb->tc.ptr,
151 itb->cs_base, itb->pc, itb->flags,
4426f83a 152 lookup_symbol(itb->pc));
03afa5f8
RH
153
154#if defined(DEBUG_DISAS)
be2208e2
RH
155 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
156 && qemu_log_in_addr_range(itb->pc)) {
1ee73216 157 qemu_log_lock();
ae765180
PM
158 int flags = 0;
159 if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) {
160 flags |= CPU_DUMP_FPU;
161 }
03afa5f8 162#if defined(TARGET_I386)
ae765180 163 flags |= CPU_DUMP_CCOP;
03afa5f8 164#endif
ae765180 165 log_cpu_state(cpu, flags);
1ee73216 166 qemu_log_unlock();
03afa5f8
RH
167 }
168#endif /* DEBUG_DISAS */
169
414b15c9 170 cpu->can_do_io = !use_icount;
819af24b 171 ret = tcg_qemu_tb_exec(env, tb_ptr);
626cf8f4 172 cpu->can_do_io = 1;
819af24b
SF
173 last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
174 tb_exit = ret & TB_EXIT_MASK;
175 trace_exec_tb_exit(last_tb, tb_exit);
6db8b538 176
819af24b 177 if (tb_exit > TB_EXIT_IDX1) {
77211379
PM
178 /* We didn't start executing this TB (eg because the instruction
179 * counter hit zero); we must restore the guest PC to the address
180 * of the start of the TB.
181 */
bdf7ae5b 182 CPUClass *cc = CPU_GET_CLASS(cpu);
819af24b 183 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
d977e1c2
AB
184 "Stopped execution of TB chain before %p ["
185 TARGET_FMT_lx "] %s\n",
e7e168f4 186 last_tb->tc.ptr, last_tb->pc,
819af24b 187 lookup_symbol(last_tb->pc));
bdf7ae5b 188 if (cc->synchronize_from_tb) {
819af24b 189 cc->synchronize_from_tb(cpu, last_tb);
bdf7ae5b
AF
190 } else {
191 assert(cc->set_pc);
819af24b 192 cc->set_pc(cpu, last_tb->pc);
bdf7ae5b 193 }
77211379 194 }
819af24b 195 return ret;
77211379
PM
196}
197
7687bf52 198#ifndef CONFIG_USER_ONLY
2e70f6ef
PB
199/* Execute the code without caching the generated code. An interpreter
200 could be used if available. */
ea3e9847 201static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
56c0269a 202 TranslationBlock *orig_tb, bool ignore_icount)
2e70f6ef 203{
2e70f6ef 204 TranslationBlock *tb;
416986d3
RH
205 uint32_t cflags = curr_cflags() | CF_NOCACHE;
206
207 if (ignore_icount) {
208 cflags &= ~CF_USE_ICOUNT;
209 }
2e70f6ef
PB
210
211 /* Should never happen.
212 We only end up here when an existing TB is too long. */
416986d3 213 cflags |= MIN(max_cycles, CF_COUNT_MASK);
2e70f6ef 214
0ac20318 215 mmap_lock();
416986d3
RH
216 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base,
217 orig_tb->flags, cflags);
3359baad 218 tb->orig_tb = orig_tb;
0ac20318 219 mmap_unlock();
a5e99826 220
2e70f6ef 221 /* execute the generated code */
6db8b538 222 trace_exec_tb_nocache(tb, tb->pc);
1a830635 223 cpu_tb_exec(cpu, tb);
a5e99826 224
0ac20318 225 mmap_lock();
2e70f6ef 226 tb_phys_invalidate(tb, -1);
0ac20318 227 mmap_unlock();
be2cdc5e 228 tcg_tb_remove(tb);
2e70f6ef 229}
7687bf52 230#endif
2e70f6ef 231
ac03ee53 232void cpu_exec_step_atomic(CPUState *cpu)
fdbc2b57 233{
08e73c48 234 CPUClass *cc = CPU_GET_CLASS(cpu);
fdbc2b57
RH
235 TranslationBlock *tb;
236 target_ulong cs_base, pc;
237 uint32_t flags;
416986d3 238 uint32_t cflags = 1;
ac03ee53 239 uint32_t cf_mask = cflags & CF_HASH_MASK;
426eeecd
PM
240 /* volatile because we modify it between setjmp and longjmp */
241 volatile bool in_exclusive_region = false;
fdbc2b57 242
08e73c48 243 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
ac03ee53 244 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
4e2ca83e
EC
245 if (tb == NULL) {
246 mmap_lock();
95590e24 247 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
4e2ca83e
EC
248 mmap_unlock();
249 }
08e73c48 250
ac03ee53
EC
251 start_exclusive();
252
253 /* Since we got here, we know that parallel_cpus must be true. */
254 parallel_cpus = false;
426eeecd 255 in_exclusive_region = true;
08e73c48
PK
256 cc->cpu_exec_enter(cpu);
257 /* execute the generated code */
4e2ca83e 258 trace_exec_tb(tb, pc);
08e73c48
PK
259 cpu_tb_exec(cpu, tb);
260 cc->cpu_exec_exit(cpu);
08e73c48 261 } else {
0ac20318 262 /*
08e73c48
PK
263 * The mmap_lock is dropped by tb_gen_code if it runs out of
264 * memory.
265 */
266#ifndef CONFIG_SOFTMMU
267 tcg_debug_assert(!have_mmap_lock());
268#endif
6aaa24f9
EC
269 if (qemu_mutex_iothread_locked()) {
270 qemu_mutex_unlock_iothread();
271 }
faa9372c 272 assert_no_pages_locked();
08e73c48 273 }
426eeecd
PM
274
275 if (in_exclusive_region) {
276 /* We might longjump out of either the codegen or the
277 * execution, so must make sure we only end the exclusive
278 * region if we started it.
279 */
280 parallel_cpus = true;
281 end_exclusive();
282 }
fdbc2b57
RH
283}
284
909eaac9
EC
285struct tb_desc {
286 target_ulong pc;
287 target_ulong cs_base;
288 CPUArchState *env;
289 tb_page_addr_t phys_page1;
290 uint32_t flags;
4e2ca83e 291 uint32_t cf_mask;
61a67f71 292 uint32_t trace_vcpu_dstate;
909eaac9
EC
293};
294
61b8cef1 295static bool tb_lookup_cmp(const void *p, const void *d)
909eaac9
EC
296{
297 const TranslationBlock *tb = p;
298 const struct tb_desc *desc = d;
299
300 if (tb->pc == desc->pc &&
301 tb->page_addr[0] == desc->phys_page1 &&
302 tb->cs_base == desc->cs_base &&
6d21e420 303 tb->flags == desc->flags &&
61a67f71 304 tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
4e2ca83e 305 (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == desc->cf_mask) {
909eaac9
EC
306 /* check next page if needed */
307 if (tb->page_addr[1] == -1) {
308 return true;
309 } else {
310 tb_page_addr_t phys_page2;
311 target_ulong virt_page2;
312
313 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
314 phys_page2 = get_page_addr_code(desc->env, virt_page2);
315 if (tb->page_addr[1] == phys_page2) {
316 return true;
317 }
318 }
319 }
320 return false;
321}
322
cedbcb01 323TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
4e2ca83e
EC
324 target_ulong cs_base, uint32_t flags,
325 uint32_t cf_mask)
8a40a180 326{
909eaac9
EC
327 tb_page_addr_t phys_pc;
328 struct tb_desc desc;
42bd3228 329 uint32_t h;
3b46e624 330
909eaac9
EC
331 desc.env = (CPUArchState *)cpu->env_ptr;
332 desc.cs_base = cs_base;
333 desc.flags = flags;
4e2ca83e 334 desc.cf_mask = cf_mask;
61a67f71 335 desc.trace_vcpu_dstate = *cpu->trace_dstate;
909eaac9
EC
336 desc.pc = pc;
337 phys_pc = get_page_addr_code(desc.env, pc);
7252f2de
PM
338 if (phys_pc == -1) {
339 return NULL;
340 }
909eaac9 341 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
4e2ca83e 342 h = tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate);
61b8cef1 343 return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
9fd1a948
PB
344}
345
a8583393
RH
346void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr)
347{
348 if (TCG_TARGET_HAS_direct_jump) {
349 uintptr_t offset = tb->jmp_target_arg[n];
e7e168f4 350 uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr;
a8583393
RH
351 tb_target_set_jmp_target(tc_ptr, tc_ptr + offset, addr);
352 } else {
353 tb->jmp_target_arg[n] = addr;
354 }
355}
356
a8583393
RH
357static inline void tb_add_jump(TranslationBlock *tb, int n,
358 TranslationBlock *tb_next)
359{
194125e3
EC
360 uintptr_t old;
361
a8583393 362 assert(n < ARRAY_SIZE(tb->jmp_list_next));
194125e3
EC
363 qemu_spin_lock(&tb_next->jmp_lock);
364
365 /* make sure the destination TB is valid */
366 if (tb_next->cflags & CF_INVALID) {
367 goto out_unlock_next;
368 }
369 /* Atomically claim the jump destination slot only if it was NULL */
370 old = atomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL, (uintptr_t)tb_next);
371 if (old) {
372 goto out_unlock_next;
a8583393 373 }
194125e3
EC
374
375 /* patch the native jump address */
376 tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr);
377
378 /* add in TB jmp list */
379 tb->jmp_list_next[n] = tb_next->jmp_list_head;
380 tb_next->jmp_list_head = (uintptr_t)tb | n;
381
382 qemu_spin_unlock(&tb_next->jmp_lock);
383
a8583393
RH
384 qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
385 "Linking TBs %p [" TARGET_FMT_lx
386 "] index %d -> %p [" TARGET_FMT_lx "]\n",
e7e168f4
EC
387 tb->tc.ptr, tb->pc, n,
388 tb_next->tc.ptr, tb_next->pc);
194125e3 389 return;
a8583393 390
194125e3
EC
391 out_unlock_next:
392 qemu_spin_unlock(&tb_next->jmp_lock);
393 return;
a8583393
RH
394}
395
bd2710d5
SF
396static inline TranslationBlock *tb_find(CPUState *cpu,
397 TranslationBlock *last_tb,
9b990ee5 398 int tb_exit, uint32_t cf_mask)
8a40a180
FB
399{
400 TranslationBlock *tb;
401 target_ulong cs_base, pc;
89fee74a 402 uint32_t flags;
8a40a180 403
4e2ca83e 404 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
f6bb84d5 405 if (tb == NULL) {
f6bb84d5 406 mmap_lock();
95590e24 407 tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask);
f6bb84d5 408 mmap_unlock();
bd2710d5
SF
409 /* We add the TB in the virtual pc hash table for the fast lookup */
410 atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
8a40a180 411 }
c88c67e5
SF
412#ifndef CONFIG_USER_ONLY
413 /* We don't take care of direct jumps when address mapping changes in
414 * system emulation. So it's not safe to make a direct jump to a TB
415 * spanning two pages because the mapping for the second page can change.
416 */
417 if (tb->page_addr[1] != -1) {
4b7e6950 418 last_tb = NULL;
c88c67e5
SF
419 }
420#endif
a0522c7a 421 /* See if we can patch the calling TB. */
d7f425fd 422 if (last_tb) {
194125e3 423 tb_add_jump(last_tb, tb_exit, tb);
74d356dd 424 }
8a40a180
FB
425 return tb;
426}
427
8b2d34e9
SF
428static inline bool cpu_handle_halt(CPUState *cpu)
429{
430 if (cpu->halted) {
431#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
432 if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
433 && replay_interrupt()) {
434 X86CPU *x86_cpu = X86_CPU(cpu);
8d04fb55 435 qemu_mutex_lock_iothread();
8b2d34e9
SF
436 apic_poll_irq(x86_cpu->apic_state);
437 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
8d04fb55 438 qemu_mutex_unlock_iothread();
8b2d34e9
SF
439 }
440#endif
441 if (!cpu_has_work(cpu)) {
8b2d34e9
SF
442 return true;
443 }
444
445 cpu->halted = 0;
446 }
447
448 return false;
449}
450
ea284766 451static inline void cpu_handle_debug_exception(CPUState *cpu)
1009d2ed 452{
86025ee4 453 CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed
JK
454 CPUWatchpoint *wp;
455
ff4700b0
AF
456 if (!cpu->watchpoint_hit) {
457 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed
JK
458 wp->flags &= ~BP_WATCHPOINT_HIT;
459 }
460 }
86025ee4
PM
461
462 cc->debug_excp_handler(cpu);
1009d2ed
JK
463}
464
ea284766
SF
465static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
466{
17b50b0c
PD
467 if (cpu->exception_index < 0) {
468#ifndef CONFIG_USER_ONLY
469 if (replay_has_exception()
5e140196 470 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0) {
17b50b0c
PD
471 /* try to cause an exception pending in the log */
472 cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0, curr_cflags()), true);
473 }
474#endif
475 if (cpu->exception_index < 0) {
476 return false;
477 }
478 }
479
480 if (cpu->exception_index >= EXCP_INTERRUPT) {
481 /* exit request from the cpu execution loop */
482 *ret = cpu->exception_index;
483 if (*ret == EXCP_DEBUG) {
484 cpu_handle_debug_exception(cpu);
485 }
486 cpu->exception_index = -1;
487 return true;
488 } else {
ea284766 489#if defined(CONFIG_USER_ONLY)
17b50b0c
PD
490 /* if user mode only, we simulate a fake exception
491 which will be handled outside the cpu execution
492 loop */
ea284766 493#if defined(TARGET_I386)
17b50b0c
PD
494 CPUClass *cc = CPU_GET_CLASS(cpu);
495 cc->do_interrupt(cpu);
496#endif
497 *ret = cpu->exception_index;
498 cpu->exception_index = -1;
499 return true;
500#else
501 if (replay_exception()) {
ea284766 502 CPUClass *cc = CPU_GET_CLASS(cpu);
17b50b0c 503 qemu_mutex_lock_iothread();
ea284766 504 cc->do_interrupt(cpu);
17b50b0c 505 qemu_mutex_unlock_iothread();
ea284766 506 cpu->exception_index = -1;
17b50b0c
PD
507 } else if (!replay_has_interrupt()) {
508 /* give a chance to iothread in replay mode */
509 *ret = EXCP_INTERRUPT;
ea284766 510 return true;
ea284766 511 }
ea284766
SF
512#endif
513 }
514
515 return false;
516}
517
209b71b6 518static inline bool cpu_handle_interrupt(CPUState *cpu,
c385e6e4
SF
519 TranslationBlock **last_tb)
520{
521 CPUClass *cc = CPU_GET_CLASS(cpu);
17b50b0c
PD
522
523 /* Clear the interrupt flag now since we're processing
524 * cpu->interrupt_request and cpu->exit_request.
d84be02d
DH
525 * Ensure zeroing happens before reading cpu->exit_request or
526 * cpu->interrupt_request (see also smp_wmb in cpu_exit())
17b50b0c 527 */
5e140196 528 atomic_mb_set(&cpu_neg(cpu)->icount_decr.u16.high, 0);
c385e6e4 529
8d04fb55
JK
530 if (unlikely(atomic_read(&cpu->interrupt_request))) {
531 int interrupt_request;
532 qemu_mutex_lock_iothread();
533 interrupt_request = cpu->interrupt_request;
c385e6e4
SF
534 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
535 /* Mask out external interrupts for this step. */
536 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
537 }
538 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
539 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
540 cpu->exception_index = EXCP_DEBUG;
8d04fb55 541 qemu_mutex_unlock_iothread();
209b71b6 542 return true;
c385e6e4
SF
543 }
544 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
545 /* Do nothing */
546 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
547 replay_interrupt();
548 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
549 cpu->halted = 1;
550 cpu->exception_index = EXCP_HLT;
8d04fb55 551 qemu_mutex_unlock_iothread();
209b71b6 552 return true;
c385e6e4
SF
553 }
554#if defined(TARGET_I386)
555 else if (interrupt_request & CPU_INTERRUPT_INIT) {
556 X86CPU *x86_cpu = X86_CPU(cpu);
557 CPUArchState *env = &x86_cpu->env;
558 replay_interrupt();
65c9d60a 559 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
c385e6e4
SF
560 do_cpu_init(x86_cpu);
561 cpu->exception_index = EXCP_HALTED;
8d04fb55 562 qemu_mutex_unlock_iothread();
209b71b6 563 return true;
c385e6e4
SF
564 }
565#else
566 else if (interrupt_request & CPU_INTERRUPT_RESET) {
567 replay_interrupt();
568 cpu_reset(cpu);
8d04fb55 569 qemu_mutex_unlock_iothread();
209b71b6 570 return true;
c385e6e4
SF
571 }
572#endif
573 /* The target hook has 3 exit conditions:
574 False when the interrupt isn't processed,
575 True when it is, and we should restart on a new TB,
576 and via longjmp via cpu_loop_exit. */
577 else {
c385e6e4 578 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
d718b14b 579 replay_interrupt();
5f3bdfd4 580 cpu->exception_index = -1;
c385e6e4
SF
581 *last_tb = NULL;
582 }
8b1fe3f4
SF
583 /* The target hook may have updated the 'cpu->interrupt_request';
584 * reload the 'interrupt_request' value */
585 interrupt_request = cpu->interrupt_request;
c385e6e4 586 }
8b1fe3f4 587 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
c385e6e4
SF
588 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
589 /* ensure that no TB jump will be modified as
590 the program flow was changed */
591 *last_tb = NULL;
592 }
8d04fb55
JK
593
594 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */
595 qemu_mutex_unlock_iothread();
c385e6e4 596 }
8d04fb55 597
cfb2d02b 598 /* Finally, check if we need to exit to the main loop. */
5e140196
RH
599 if (unlikely(atomic_read(&cpu->exit_request))
600 || (use_icount
601 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0)) {
027d9a7d 602 atomic_set(&cpu->exit_request, 0);
5f3bdfd4
PD
603 if (cpu->exception_index == -1) {
604 cpu->exception_index = EXCP_INTERRUPT;
605 }
209b71b6 606 return true;
c385e6e4 607 }
209b71b6
PB
608
609 return false;
c385e6e4
SF
610}
611
928de9ee 612static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
cfb2d02b 613 TranslationBlock **last_tb, int *tb_exit)
928de9ee
SF
614{
615 uintptr_t ret;
1aab16c2 616 int32_t insns_left;
928de9ee
SF
617
618 trace_exec_tb(tb, tb->pc);
619 ret = cpu_tb_exec(cpu, tb);
43d70ddf 620 tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
928de9ee 621 *tb_exit = ret & TB_EXIT_MASK;
1aab16c2
PB
622 if (*tb_exit != TB_EXIT_REQUESTED) {
623 *last_tb = tb;
624 return;
625 }
626
627 *last_tb = NULL;
5e140196 628 insns_left = atomic_read(&cpu_neg(cpu)->icount_decr.u32);
1aab16c2 629 if (insns_left < 0) {
e5143e30
AB
630 /* Something asked us to stop executing chained TBs; just
631 * continue round the main loop. Whatever requested the exit
30f3dda2 632 * will also have set something else (eg exit_request or
17b50b0c
PD
633 * interrupt_request) which will be handled by
634 * cpu_handle_interrupt. cpu_handle_interrupt will also
635 * clear cpu->icount_decr.u16.high.
928de9ee 636 */
1aab16c2 637 return;
928de9ee 638 }
1aab16c2
PB
639
640 /* Instruction counter expired. */
641 assert(use_icount);
642#ifndef CONFIG_USER_ONLY
eda5f7c6
AB
643 /* Ensure global icount has gone forward */
644 cpu_update_icount(cpu);
645 /* Refill decrementer and continue execution. */
646 insns_left = MIN(0xffff, cpu->icount_budget);
5e140196 647 cpu_neg(cpu)->icount_decr.u16.low = insns_left;
eda5f7c6
AB
648 cpu->icount_extra = cpu->icount_budget - insns_left;
649 if (!cpu->icount_extra) {
1aab16c2
PB
650 /* Execute any remaining instructions, then let the main loop
651 * handle the next event.
652 */
653 if (insns_left > 0) {
654 cpu_exec_nocache(cpu, insns_left, tb, false);
1aab16c2 655 }
928de9ee 656 }
1aab16c2 657#endif
928de9ee
SF
658}
659
7d13299d
FB
660/* main execution loop */
661
ea3e9847 662int cpu_exec(CPUState *cpu)
7d13299d 663{
97a8ea5a 664 CPUClass *cc = CPU_GET_CLASS(cpu);
c385e6e4 665 int ret;
cfb2d02b 666 SyncClocks sc = { 0 };
c2aa5f81 667
6f060969
PD
668 /* replay_interrupt may need current_cpu */
669 current_cpu = cpu;
670
8b2d34e9
SF
671 if (cpu_handle_halt(cpu)) {
672 return EXCP_HALTED;
eda48c34 673 }
5a1e3cfc 674
79e2b9ae
PB
675 rcu_read_lock();
676
cffe7b32 677 cc->cpu_exec_enter(cpu);
9d27abd9 678
c2aa5f81
ST
679 /* Calculate difference between guest clock and host clock.
680 * This delay includes the delay of the last cycle, so
681 * what we have to do is sleep until it is 0. As for the
682 * advance/delay we gain here, we try to fix it next time.
683 */
684 init_delay_params(&sc, cpu);
685
4515e58d
PB
686 /* prepare setjmp context for exception handling */
687 if (sigsetjmp(cpu->jmp_env, 0) != 0) {
0448f5f8 688#if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
4515e58d
PB
689 /* Some compilers wrongly smash all local variables after
690 * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
691 * Reload essential local variables here for those compilers.
692 * Newer versions of gcc would complain about this code (-Wclobbered). */
693 cpu = current_cpu;
694 cc = CPU_GET_CLASS(cpu);
0448f5f8 695#else /* buggy compiler */
4515e58d
PB
696 /* Assert that the compiler does not smash local variables. */
697 g_assert(cpu == current_cpu);
698 g_assert(cc == CPU_GET_CLASS(cpu));
0448f5f8 699#endif /* buggy compiler */
0ac20318
EC
700#ifndef CONFIG_SOFTMMU
701 tcg_debug_assert(!have_mmap_lock());
702#endif
8d04fb55
JK
703 if (qemu_mutex_iothread_locked()) {
704 qemu_mutex_unlock_iothread();
705 }
8fd3a9b8 706 assert_no_pages_locked();
4515e58d
PB
707 }
708
709 /* if an exception is pending, we execute it here */
710 while (!cpu_handle_exception(cpu, &ret)) {
711 TranslationBlock *last_tb = NULL;
712 int tb_exit = 0;
713
714 while (!cpu_handle_interrupt(cpu, &last_tb)) {
9b990ee5
RH
715 uint32_t cflags = cpu->cflags_next_tb;
716 TranslationBlock *tb;
717
718 /* When requested, use an exact setting for cflags for the next
719 execution. This is used for icount, precise smc, and stop-
720 after-access watchpoints. Since this request should never
721 have CF_INVALID set, -1 is a convenient invalid value that
722 does not require tcg headers for cpu_common_reset. */
723 if (cflags == -1) {
724 cflags = curr_cflags();
725 } else {
726 cpu->cflags_next_tb = -1;
727 }
728
729 tb = tb_find(cpu, last_tb, tb_exit, cflags);
cfb2d02b 730 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit);
4515e58d
PB
731 /* Try to align the host and virtual clocks
732 if the guest is in advance */
733 align_clocks(&sc, cpu);
7d13299d 734 }
4515e58d 735 }
3fb2ded1 736
cffe7b32 737 cc->cpu_exec_exit(cpu);
79e2b9ae 738 rcu_read_unlock();
1057eaa7 739
7d13299d
FB
740 return ret;
741}
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