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Commit | Line | Data |
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7d13299d | 1 | /* |
e965fc38 | 2 | * emulator main execution loop |
5fafdf24 | 3 | * |
66321a11 | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
7d13299d | 5 | * |
3ef693a0 FB |
6 | * This library is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
7d13299d | 10 | * |
3ef693a0 FB |
11 | * This library is distributed in the hope that it will be useful, |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
7d13299d | 15 | * |
3ef693a0 | 16 | * You should have received a copy of the GNU Lesser General Public |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
7d13299d | 18 | */ |
7b31bbc2 | 19 | #include "qemu/osdep.h" |
cea5f9a2 | 20 | #include "cpu.h" |
d9bb58e5 | 21 | #include "trace.h" |
76cad711 | 22 | #include "disas/disas.h" |
63c91552 | 23 | #include "exec/exec-all.h" |
7cb69cae | 24 | #include "tcg.h" |
1de7afc9 | 25 | #include "qemu/atomic.h" |
9c17d615 | 26 | #include "sysemu/qtest.h" |
c2aa5f81 | 27 | #include "qemu/timer.h" |
79e2b9ae | 28 | #include "qemu/rcu.h" |
e1b89321 | 29 | #include "exec/tb-hash.h" |
f6bb84d5 | 30 | #include "exec/tb-lookup.h" |
508127e2 | 31 | #include "exec/log.h" |
8d04fb55 | 32 | #include "qemu/main-loop.h" |
6220e900 PD |
33 | #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) |
34 | #include "hw/i386/apic.h" | |
35 | #endif | |
d2528bdc | 36 | #include "sysemu/cpus.h" |
6f060969 | 37 | #include "sysemu/replay.h" |
c2aa5f81 ST |
38 | |
39 | /* -icount align implementation. */ | |
40 | ||
41 | typedef struct SyncClocks { | |
42 | int64_t diff_clk; | |
43 | int64_t last_cpu_icount; | |
7f7bc144 | 44 | int64_t realtime_clock; |
c2aa5f81 ST |
45 | } SyncClocks; |
46 | ||
47 | #if !defined(CONFIG_USER_ONLY) | |
48 | /* Allow the guest to have a max 3ms advance. | |
49 | * The difference between the 2 clocks could therefore | |
50 | * oscillate around 0. | |
51 | */ | |
52 | #define VM_CLOCK_ADVANCE 3000000 | |
7f7bc144 ST |
53 | #define THRESHOLD_REDUCE 1.5 |
54 | #define MAX_DELAY_PRINT_RATE 2000000000LL | |
55 | #define MAX_NB_PRINTS 100 | |
c2aa5f81 ST |
56 | |
57 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
58 | { | |
59 | int64_t cpu_icount; | |
60 | ||
61 | if (!icount_align_option) { | |
62 | return; | |
63 | } | |
64 | ||
65 | cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; | |
66 | sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount); | |
67 | sc->last_cpu_icount = cpu_icount; | |
68 | ||
69 | if (sc->diff_clk > VM_CLOCK_ADVANCE) { | |
70 | #ifndef _WIN32 | |
71 | struct timespec sleep_delay, rem_delay; | |
72 | sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; | |
73 | sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; | |
74 | if (nanosleep(&sleep_delay, &rem_delay) < 0) { | |
a498d0ef | 75 | sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec; |
c2aa5f81 ST |
76 | } else { |
77 | sc->diff_clk = 0; | |
78 | } | |
79 | #else | |
80 | Sleep(sc->diff_clk / SCALE_MS); | |
81 | sc->diff_clk = 0; | |
82 | #endif | |
83 | } | |
84 | } | |
85 | ||
7f7bc144 ST |
86 | static void print_delay(const SyncClocks *sc) |
87 | { | |
88 | static float threshold_delay; | |
89 | static int64_t last_realtime_clock; | |
90 | static int nb_prints; | |
91 | ||
92 | if (icount_align_option && | |
93 | sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && | |
94 | nb_prints < MAX_NB_PRINTS) { | |
95 | if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || | |
96 | (-sc->diff_clk / (float)1000000000LL < | |
97 | (threshold_delay - THRESHOLD_REDUCE))) { | |
98 | threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; | |
99 | printf("Warning: The guest is now late by %.1f to %.1f seconds\n", | |
100 | threshold_delay - 1, | |
101 | threshold_delay); | |
102 | nb_prints++; | |
103 | last_realtime_clock = sc->realtime_clock; | |
104 | } | |
105 | } | |
106 | } | |
107 | ||
c2aa5f81 ST |
108 | static void init_delay_params(SyncClocks *sc, |
109 | const CPUState *cpu) | |
110 | { | |
111 | if (!icount_align_option) { | |
112 | return; | |
113 | } | |
2e91cc62 PB |
114 | sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); |
115 | sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock; | |
c2aa5f81 | 116 | sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; |
27498bef ST |
117 | if (sc->diff_clk < max_delay) { |
118 | max_delay = sc->diff_clk; | |
119 | } | |
120 | if (sc->diff_clk > max_advance) { | |
121 | max_advance = sc->diff_clk; | |
122 | } | |
7f7bc144 ST |
123 | |
124 | /* Print every 2s max if the guest is late. We limit the number | |
125 | of printed messages to NB_PRINT_MAX(currently 100) */ | |
126 | print_delay(sc); | |
c2aa5f81 ST |
127 | } |
128 | #else | |
129 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
130 | { | |
131 | } | |
132 | ||
133 | static void init_delay_params(SyncClocks *sc, const CPUState *cpu) | |
134 | { | |
135 | } | |
136 | #endif /* CONFIG USER ONLY */ | |
7d13299d | 137 | |
77211379 | 138 | /* Execute a TB, and fix up the CPU state afterwards if necessary */ |
1a830635 | 139 | static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb) |
77211379 PM |
140 | { |
141 | CPUArchState *env = cpu->env_ptr; | |
819af24b SF |
142 | uintptr_t ret; |
143 | TranslationBlock *last_tb; | |
144 | int tb_exit; | |
e7e168f4 | 145 | uint8_t *tb_ptr = itb->tc.ptr; |
1a830635 | 146 | |
d977e1c2 | 147 | qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc, |
4fad446b PB |
148 | "Trace %d: %p [" |
149 | TARGET_FMT_lx "/" TARGET_FMT_lx "/%#x] %s\n", | |
150 | cpu->cpu_index, itb->tc.ptr, | |
151 | itb->cs_base, itb->pc, itb->flags, | |
4426f83a | 152 | lookup_symbol(itb->pc)); |
03afa5f8 RH |
153 | |
154 | #if defined(DEBUG_DISAS) | |
be2208e2 RH |
155 | if (qemu_loglevel_mask(CPU_LOG_TB_CPU) |
156 | && qemu_log_in_addr_range(itb->pc)) { | |
1ee73216 | 157 | qemu_log_lock(); |
ae765180 PM |
158 | int flags = 0; |
159 | if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) { | |
160 | flags |= CPU_DUMP_FPU; | |
161 | } | |
03afa5f8 | 162 | #if defined(TARGET_I386) |
ae765180 | 163 | flags |= CPU_DUMP_CCOP; |
03afa5f8 | 164 | #endif |
ae765180 | 165 | log_cpu_state(cpu, flags); |
1ee73216 | 166 | qemu_log_unlock(); |
03afa5f8 RH |
167 | } |
168 | #endif /* DEBUG_DISAS */ | |
169 | ||
414b15c9 | 170 | cpu->can_do_io = !use_icount; |
819af24b | 171 | ret = tcg_qemu_tb_exec(env, tb_ptr); |
626cf8f4 | 172 | cpu->can_do_io = 1; |
819af24b SF |
173 | last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); |
174 | tb_exit = ret & TB_EXIT_MASK; | |
175 | trace_exec_tb_exit(last_tb, tb_exit); | |
6db8b538 | 176 | |
819af24b | 177 | if (tb_exit > TB_EXIT_IDX1) { |
77211379 PM |
178 | /* We didn't start executing this TB (eg because the instruction |
179 | * counter hit zero); we must restore the guest PC to the address | |
180 | * of the start of the TB. | |
181 | */ | |
bdf7ae5b | 182 | CPUClass *cc = CPU_GET_CLASS(cpu); |
819af24b | 183 | qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc, |
d977e1c2 AB |
184 | "Stopped execution of TB chain before %p [" |
185 | TARGET_FMT_lx "] %s\n", | |
e7e168f4 | 186 | last_tb->tc.ptr, last_tb->pc, |
819af24b | 187 | lookup_symbol(last_tb->pc)); |
bdf7ae5b | 188 | if (cc->synchronize_from_tb) { |
819af24b | 189 | cc->synchronize_from_tb(cpu, last_tb); |
bdf7ae5b AF |
190 | } else { |
191 | assert(cc->set_pc); | |
819af24b | 192 | cc->set_pc(cpu, last_tb->pc); |
bdf7ae5b | 193 | } |
77211379 | 194 | } |
819af24b | 195 | return ret; |
77211379 PM |
196 | } |
197 | ||
7687bf52 | 198 | #ifndef CONFIG_USER_ONLY |
2e70f6ef PB |
199 | /* Execute the code without caching the generated code. An interpreter |
200 | could be used if available. */ | |
ea3e9847 | 201 | static void cpu_exec_nocache(CPUState *cpu, int max_cycles, |
56c0269a | 202 | TranslationBlock *orig_tb, bool ignore_icount) |
2e70f6ef | 203 | { |
2e70f6ef | 204 | TranslationBlock *tb; |
416986d3 RH |
205 | uint32_t cflags = curr_cflags() | CF_NOCACHE; |
206 | ||
207 | if (ignore_icount) { | |
208 | cflags &= ~CF_USE_ICOUNT; | |
209 | } | |
2e70f6ef PB |
210 | |
211 | /* Should never happen. | |
212 | We only end up here when an existing TB is too long. */ | |
416986d3 | 213 | cflags |= MIN(max_cycles, CF_COUNT_MASK); |
2e70f6ef | 214 | |
a5e99826 | 215 | tb_lock(); |
416986d3 RH |
216 | tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, |
217 | orig_tb->flags, cflags); | |
3359baad | 218 | tb->orig_tb = orig_tb; |
a5e99826 FK |
219 | tb_unlock(); |
220 | ||
2e70f6ef | 221 | /* execute the generated code */ |
6db8b538 | 222 | trace_exec_tb_nocache(tb, tb->pc); |
1a830635 | 223 | cpu_tb_exec(cpu, tb); |
a5e99826 FK |
224 | |
225 | tb_lock(); | |
2e70f6ef | 226 | tb_phys_invalidate(tb, -1); |
be2cdc5e | 227 | tcg_tb_remove(tb); |
a5e99826 | 228 | tb_unlock(); |
2e70f6ef | 229 | } |
7687bf52 | 230 | #endif |
2e70f6ef | 231 | |
ac03ee53 | 232 | void cpu_exec_step_atomic(CPUState *cpu) |
fdbc2b57 | 233 | { |
08e73c48 | 234 | CPUClass *cc = CPU_GET_CLASS(cpu); |
fdbc2b57 RH |
235 | TranslationBlock *tb; |
236 | target_ulong cs_base, pc; | |
237 | uint32_t flags; | |
416986d3 | 238 | uint32_t cflags = 1; |
ac03ee53 | 239 | uint32_t cf_mask = cflags & CF_HASH_MASK; |
426eeecd PM |
240 | /* volatile because we modify it between setjmp and longjmp */ |
241 | volatile bool in_exclusive_region = false; | |
fdbc2b57 | 242 | |
08e73c48 | 243 | if (sigsetjmp(cpu->jmp_env, 0) == 0) { |
ac03ee53 | 244 | tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); |
4e2ca83e EC |
245 | if (tb == NULL) { |
246 | mmap_lock(); | |
247 | tb_lock(); | |
ac03ee53 EC |
248 | tb = tb_htable_lookup(cpu, pc, cs_base, flags, cf_mask); |
249 | if (likely(tb == NULL)) { | |
250 | tb = tb_gen_code(cpu, pc, cs_base, flags, cflags); | |
251 | } | |
4e2ca83e EC |
252 | tb_unlock(); |
253 | mmap_unlock(); | |
254 | } | |
08e73c48 | 255 | |
ac03ee53 EC |
256 | start_exclusive(); |
257 | ||
258 | /* Since we got here, we know that parallel_cpus must be true. */ | |
259 | parallel_cpus = false; | |
426eeecd | 260 | in_exclusive_region = true; |
08e73c48 PK |
261 | cc->cpu_exec_enter(cpu); |
262 | /* execute the generated code */ | |
4e2ca83e | 263 | trace_exec_tb(tb, pc); |
08e73c48 PK |
264 | cpu_tb_exec(cpu, tb); |
265 | cc->cpu_exec_exit(cpu); | |
08e73c48 PK |
266 | } else { |
267 | /* We may have exited due to another problem here, so we need | |
268 | * to reset any tb_locks we may have taken but didn't release. | |
269 | * The mmap_lock is dropped by tb_gen_code if it runs out of | |
270 | * memory. | |
271 | */ | |
272 | #ifndef CONFIG_SOFTMMU | |
273 | tcg_debug_assert(!have_mmap_lock()); | |
274 | #endif | |
275 | tb_lock_reset(); | |
faa9372c | 276 | assert_no_pages_locked(); |
08e73c48 | 277 | } |
426eeecd PM |
278 | |
279 | if (in_exclusive_region) { | |
280 | /* We might longjump out of either the codegen or the | |
281 | * execution, so must make sure we only end the exclusive | |
282 | * region if we started it. | |
283 | */ | |
284 | parallel_cpus = true; | |
285 | end_exclusive(); | |
286 | } | |
fdbc2b57 RH |
287 | } |
288 | ||
909eaac9 EC |
289 | struct tb_desc { |
290 | target_ulong pc; | |
291 | target_ulong cs_base; | |
292 | CPUArchState *env; | |
293 | tb_page_addr_t phys_page1; | |
294 | uint32_t flags; | |
4e2ca83e | 295 | uint32_t cf_mask; |
61a67f71 | 296 | uint32_t trace_vcpu_dstate; |
909eaac9 EC |
297 | }; |
298 | ||
61b8cef1 | 299 | static bool tb_lookup_cmp(const void *p, const void *d) |
909eaac9 EC |
300 | { |
301 | const TranslationBlock *tb = p; | |
302 | const struct tb_desc *desc = d; | |
303 | ||
304 | if (tb->pc == desc->pc && | |
305 | tb->page_addr[0] == desc->phys_page1 && | |
306 | tb->cs_base == desc->cs_base && | |
6d21e420 | 307 | tb->flags == desc->flags && |
61a67f71 | 308 | tb->trace_vcpu_dstate == desc->trace_vcpu_dstate && |
4e2ca83e | 309 | (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == desc->cf_mask) { |
909eaac9 EC |
310 | /* check next page if needed */ |
311 | if (tb->page_addr[1] == -1) { | |
312 | return true; | |
313 | } else { | |
314 | tb_page_addr_t phys_page2; | |
315 | target_ulong virt_page2; | |
316 | ||
317 | virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; | |
318 | phys_page2 = get_page_addr_code(desc->env, virt_page2); | |
319 | if (tb->page_addr[1] == phys_page2) { | |
320 | return true; | |
321 | } | |
322 | } | |
323 | } | |
324 | return false; | |
325 | } | |
326 | ||
cedbcb01 | 327 | TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, |
4e2ca83e EC |
328 | target_ulong cs_base, uint32_t flags, |
329 | uint32_t cf_mask) | |
8a40a180 | 330 | { |
909eaac9 EC |
331 | tb_page_addr_t phys_pc; |
332 | struct tb_desc desc; | |
42bd3228 | 333 | uint32_t h; |
3b46e624 | 334 | |
909eaac9 EC |
335 | desc.env = (CPUArchState *)cpu->env_ptr; |
336 | desc.cs_base = cs_base; | |
337 | desc.flags = flags; | |
4e2ca83e | 338 | desc.cf_mask = cf_mask; |
61a67f71 | 339 | desc.trace_vcpu_dstate = *cpu->trace_dstate; |
909eaac9 EC |
340 | desc.pc = pc; |
341 | phys_pc = get_page_addr_code(desc.env, pc); | |
342 | desc.phys_page1 = phys_pc & TARGET_PAGE_MASK; | |
4e2ca83e | 343 | h = tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate); |
61b8cef1 | 344 | return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp); |
9fd1a948 PB |
345 | } |
346 | ||
a8583393 RH |
347 | void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr) |
348 | { | |
349 | if (TCG_TARGET_HAS_direct_jump) { | |
350 | uintptr_t offset = tb->jmp_target_arg[n]; | |
e7e168f4 | 351 | uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr; |
a8583393 RH |
352 | tb_target_set_jmp_target(tc_ptr, tc_ptr + offset, addr); |
353 | } else { | |
354 | tb->jmp_target_arg[n] = addr; | |
355 | } | |
356 | } | |
357 | ||
358 | /* Called with tb_lock held. */ | |
359 | static inline void tb_add_jump(TranslationBlock *tb, int n, | |
360 | TranslationBlock *tb_next) | |
361 | { | |
362 | assert(n < ARRAY_SIZE(tb->jmp_list_next)); | |
363 | if (tb->jmp_list_next[n]) { | |
364 | /* Another thread has already done this while we were | |
365 | * outside of the lock; nothing to do in this case */ | |
366 | return; | |
367 | } | |
368 | qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc, | |
369 | "Linking TBs %p [" TARGET_FMT_lx | |
370 | "] index %d -> %p [" TARGET_FMT_lx "]\n", | |
e7e168f4 EC |
371 | tb->tc.ptr, tb->pc, n, |
372 | tb_next->tc.ptr, tb_next->pc); | |
a8583393 RH |
373 | |
374 | /* patch the native jump address */ | |
e7e168f4 | 375 | tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr); |
a8583393 RH |
376 | |
377 | /* add in TB jmp circular list */ | |
378 | tb->jmp_list_next[n] = tb_next->jmp_list_first; | |
379 | tb_next->jmp_list_first = (uintptr_t)tb | n; | |
380 | } | |
381 | ||
bd2710d5 SF |
382 | static inline TranslationBlock *tb_find(CPUState *cpu, |
383 | TranslationBlock *last_tb, | |
9b990ee5 | 384 | int tb_exit, uint32_t cf_mask) |
8a40a180 FB |
385 | { |
386 | TranslationBlock *tb; | |
387 | target_ulong cs_base, pc; | |
89fee74a | 388 | uint32_t flags; |
841710c7 | 389 | bool acquired_tb_lock = false; |
8a40a180 | 390 | |
4e2ca83e | 391 | tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); |
f6bb84d5 EC |
392 | if (tb == NULL) { |
393 | /* mmap_lock is needed by tb_gen_code, and mmap_lock must be | |
394 | * taken outside tb_lock. As system emulation is currently | |
395 | * single threaded the locks are NOPs. | |
396 | */ | |
397 | mmap_lock(); | |
398 | tb_lock(); | |
399 | acquired_tb_lock = true; | |
bd2710d5 | 400 | |
f6bb84d5 EC |
401 | /* There's a chance that our desired tb has been translated while |
402 | * taking the locks so we check again inside the lock. | |
403 | */ | |
4e2ca83e | 404 | tb = tb_htable_lookup(cpu, pc, cs_base, flags, cf_mask); |
f6bb84d5 EC |
405 | if (likely(tb == NULL)) { |
406 | /* if no translated code available, then translate it now */ | |
4e2ca83e | 407 | tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask); |
bd2710d5 SF |
408 | } |
409 | ||
f6bb84d5 | 410 | mmap_unlock(); |
bd2710d5 SF |
411 | /* We add the TB in the virtual pc hash table for the fast lookup */ |
412 | atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb); | |
8a40a180 | 413 | } |
c88c67e5 SF |
414 | #ifndef CONFIG_USER_ONLY |
415 | /* We don't take care of direct jumps when address mapping changes in | |
416 | * system emulation. So it's not safe to make a direct jump to a TB | |
417 | * spanning two pages because the mapping for the second page can change. | |
418 | */ | |
419 | if (tb->page_addr[1] != -1) { | |
4b7e6950 | 420 | last_tb = NULL; |
c88c67e5 SF |
421 | } |
422 | #endif | |
a0522c7a | 423 | /* See if we can patch the calling TB. */ |
4b7e6950 | 424 | if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { |
841710c7 | 425 | if (!acquired_tb_lock) { |
74d356dd | 426 | tb_lock(); |
841710c7 | 427 | acquired_tb_lock = true; |
74d356dd | 428 | } |
84f1c148 | 429 | if (!(tb->cflags & CF_INVALID)) { |
118b0730 SF |
430 | tb_add_jump(last_tb, tb_exit, tb); |
431 | } | |
74d356dd | 432 | } |
841710c7 | 433 | if (acquired_tb_lock) { |
518615c6 | 434 | tb_unlock(); |
a0522c7a | 435 | } |
8a40a180 FB |
436 | return tb; |
437 | } | |
438 | ||
8b2d34e9 SF |
439 | static inline bool cpu_handle_halt(CPUState *cpu) |
440 | { | |
441 | if (cpu->halted) { | |
442 | #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) | |
443 | if ((cpu->interrupt_request & CPU_INTERRUPT_POLL) | |
444 | && replay_interrupt()) { | |
445 | X86CPU *x86_cpu = X86_CPU(cpu); | |
8d04fb55 | 446 | qemu_mutex_lock_iothread(); |
8b2d34e9 SF |
447 | apic_poll_irq(x86_cpu->apic_state); |
448 | cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); | |
8d04fb55 | 449 | qemu_mutex_unlock_iothread(); |
8b2d34e9 SF |
450 | } |
451 | #endif | |
452 | if (!cpu_has_work(cpu)) { | |
8b2d34e9 SF |
453 | return true; |
454 | } | |
455 | ||
456 | cpu->halted = 0; | |
457 | } | |
458 | ||
459 | return false; | |
460 | } | |
461 | ||
ea284766 | 462 | static inline void cpu_handle_debug_exception(CPUState *cpu) |
1009d2ed | 463 | { |
86025ee4 | 464 | CPUClass *cc = CPU_GET_CLASS(cpu); |
1009d2ed JK |
465 | CPUWatchpoint *wp; |
466 | ||
ff4700b0 AF |
467 | if (!cpu->watchpoint_hit) { |
468 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { | |
1009d2ed JK |
469 | wp->flags &= ~BP_WATCHPOINT_HIT; |
470 | } | |
471 | } | |
86025ee4 PM |
472 | |
473 | cc->debug_excp_handler(cpu); | |
1009d2ed JK |
474 | } |
475 | ||
ea284766 SF |
476 | static inline bool cpu_handle_exception(CPUState *cpu, int *ret) |
477 | { | |
17b50b0c PD |
478 | if (cpu->exception_index < 0) { |
479 | #ifndef CONFIG_USER_ONLY | |
480 | if (replay_has_exception() | |
481 | && cpu->icount_decr.u16.low + cpu->icount_extra == 0) { | |
482 | /* try to cause an exception pending in the log */ | |
483 | cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0, curr_cflags()), true); | |
484 | } | |
485 | #endif | |
486 | if (cpu->exception_index < 0) { | |
487 | return false; | |
488 | } | |
489 | } | |
490 | ||
491 | if (cpu->exception_index >= EXCP_INTERRUPT) { | |
492 | /* exit request from the cpu execution loop */ | |
493 | *ret = cpu->exception_index; | |
494 | if (*ret == EXCP_DEBUG) { | |
495 | cpu_handle_debug_exception(cpu); | |
496 | } | |
497 | cpu->exception_index = -1; | |
498 | return true; | |
499 | } else { | |
ea284766 | 500 | #if defined(CONFIG_USER_ONLY) |
17b50b0c PD |
501 | /* if user mode only, we simulate a fake exception |
502 | which will be handled outside the cpu execution | |
503 | loop */ | |
ea284766 | 504 | #if defined(TARGET_I386) |
17b50b0c PD |
505 | CPUClass *cc = CPU_GET_CLASS(cpu); |
506 | cc->do_interrupt(cpu); | |
507 | #endif | |
508 | *ret = cpu->exception_index; | |
509 | cpu->exception_index = -1; | |
510 | return true; | |
511 | #else | |
512 | if (replay_exception()) { | |
ea284766 | 513 | CPUClass *cc = CPU_GET_CLASS(cpu); |
17b50b0c | 514 | qemu_mutex_lock_iothread(); |
ea284766 | 515 | cc->do_interrupt(cpu); |
17b50b0c | 516 | qemu_mutex_unlock_iothread(); |
ea284766 | 517 | cpu->exception_index = -1; |
17b50b0c PD |
518 | } else if (!replay_has_interrupt()) { |
519 | /* give a chance to iothread in replay mode */ | |
520 | *ret = EXCP_INTERRUPT; | |
ea284766 | 521 | return true; |
ea284766 | 522 | } |
ea284766 SF |
523 | #endif |
524 | } | |
525 | ||
526 | return false; | |
527 | } | |
528 | ||
209b71b6 | 529 | static inline bool cpu_handle_interrupt(CPUState *cpu, |
c385e6e4 SF |
530 | TranslationBlock **last_tb) |
531 | { | |
532 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
17b50b0c PD |
533 | |
534 | /* Clear the interrupt flag now since we're processing | |
535 | * cpu->interrupt_request and cpu->exit_request. | |
d84be02d DH |
536 | * Ensure zeroing happens before reading cpu->exit_request or |
537 | * cpu->interrupt_request (see also smp_wmb in cpu_exit()) | |
17b50b0c | 538 | */ |
d84be02d | 539 | atomic_mb_set(&cpu->icount_decr.u16.high, 0); |
c385e6e4 | 540 | |
8d04fb55 JK |
541 | if (unlikely(atomic_read(&cpu->interrupt_request))) { |
542 | int interrupt_request; | |
543 | qemu_mutex_lock_iothread(); | |
544 | interrupt_request = cpu->interrupt_request; | |
c385e6e4 SF |
545 | if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { |
546 | /* Mask out external interrupts for this step. */ | |
547 | interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; | |
548 | } | |
549 | if (interrupt_request & CPU_INTERRUPT_DEBUG) { | |
550 | cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; | |
551 | cpu->exception_index = EXCP_DEBUG; | |
8d04fb55 | 552 | qemu_mutex_unlock_iothread(); |
209b71b6 | 553 | return true; |
c385e6e4 SF |
554 | } |
555 | if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) { | |
556 | /* Do nothing */ | |
557 | } else if (interrupt_request & CPU_INTERRUPT_HALT) { | |
558 | replay_interrupt(); | |
559 | cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; | |
560 | cpu->halted = 1; | |
561 | cpu->exception_index = EXCP_HLT; | |
8d04fb55 | 562 | qemu_mutex_unlock_iothread(); |
209b71b6 | 563 | return true; |
c385e6e4 SF |
564 | } |
565 | #if defined(TARGET_I386) | |
566 | else if (interrupt_request & CPU_INTERRUPT_INIT) { | |
567 | X86CPU *x86_cpu = X86_CPU(cpu); | |
568 | CPUArchState *env = &x86_cpu->env; | |
569 | replay_interrupt(); | |
65c9d60a | 570 | cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0); |
c385e6e4 SF |
571 | do_cpu_init(x86_cpu); |
572 | cpu->exception_index = EXCP_HALTED; | |
8d04fb55 | 573 | qemu_mutex_unlock_iothread(); |
209b71b6 | 574 | return true; |
c385e6e4 SF |
575 | } |
576 | #else | |
577 | else if (interrupt_request & CPU_INTERRUPT_RESET) { | |
578 | replay_interrupt(); | |
579 | cpu_reset(cpu); | |
8d04fb55 | 580 | qemu_mutex_unlock_iothread(); |
209b71b6 | 581 | return true; |
c385e6e4 SF |
582 | } |
583 | #endif | |
584 | /* The target hook has 3 exit conditions: | |
585 | False when the interrupt isn't processed, | |
586 | True when it is, and we should restart on a new TB, | |
587 | and via longjmp via cpu_loop_exit. */ | |
588 | else { | |
c385e6e4 | 589 | if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { |
d718b14b | 590 | replay_interrupt(); |
5f3bdfd4 | 591 | cpu->exception_index = -1; |
c385e6e4 SF |
592 | *last_tb = NULL; |
593 | } | |
8b1fe3f4 SF |
594 | /* The target hook may have updated the 'cpu->interrupt_request'; |
595 | * reload the 'interrupt_request' value */ | |
596 | interrupt_request = cpu->interrupt_request; | |
c385e6e4 | 597 | } |
8b1fe3f4 | 598 | if (interrupt_request & CPU_INTERRUPT_EXITTB) { |
c385e6e4 SF |
599 | cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; |
600 | /* ensure that no TB jump will be modified as | |
601 | the program flow was changed */ | |
602 | *last_tb = NULL; | |
603 | } | |
8d04fb55 JK |
604 | |
605 | /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */ | |
606 | qemu_mutex_unlock_iothread(); | |
c385e6e4 | 607 | } |
8d04fb55 | 608 | |
cfb2d02b PD |
609 | /* Finally, check if we need to exit to the main loop. */ |
610 | if (unlikely(atomic_read(&cpu->exit_request) | |
611 | || (use_icount && cpu->icount_decr.u16.low + cpu->icount_extra == 0))) { | |
027d9a7d | 612 | atomic_set(&cpu->exit_request, 0); |
5f3bdfd4 PD |
613 | if (cpu->exception_index == -1) { |
614 | cpu->exception_index = EXCP_INTERRUPT; | |
615 | } | |
209b71b6 | 616 | return true; |
c385e6e4 | 617 | } |
209b71b6 PB |
618 | |
619 | return false; | |
c385e6e4 SF |
620 | } |
621 | ||
928de9ee | 622 | static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, |
cfb2d02b | 623 | TranslationBlock **last_tb, int *tb_exit) |
928de9ee SF |
624 | { |
625 | uintptr_t ret; | |
1aab16c2 | 626 | int32_t insns_left; |
928de9ee SF |
627 | |
628 | trace_exec_tb(tb, tb->pc); | |
629 | ret = cpu_tb_exec(cpu, tb); | |
43d70ddf | 630 | tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); |
928de9ee | 631 | *tb_exit = ret & TB_EXIT_MASK; |
1aab16c2 PB |
632 | if (*tb_exit != TB_EXIT_REQUESTED) { |
633 | *last_tb = tb; | |
634 | return; | |
635 | } | |
636 | ||
637 | *last_tb = NULL; | |
638 | insns_left = atomic_read(&cpu->icount_decr.u32); | |
1aab16c2 | 639 | if (insns_left < 0) { |
e5143e30 AB |
640 | /* Something asked us to stop executing chained TBs; just |
641 | * continue round the main loop. Whatever requested the exit | |
30f3dda2 | 642 | * will also have set something else (eg exit_request or |
17b50b0c PD |
643 | * interrupt_request) which will be handled by |
644 | * cpu_handle_interrupt. cpu_handle_interrupt will also | |
645 | * clear cpu->icount_decr.u16.high. | |
928de9ee | 646 | */ |
1aab16c2 | 647 | return; |
928de9ee | 648 | } |
1aab16c2 PB |
649 | |
650 | /* Instruction counter expired. */ | |
651 | assert(use_icount); | |
652 | #ifndef CONFIG_USER_ONLY | |
eda5f7c6 AB |
653 | /* Ensure global icount has gone forward */ |
654 | cpu_update_icount(cpu); | |
655 | /* Refill decrementer and continue execution. */ | |
656 | insns_left = MIN(0xffff, cpu->icount_budget); | |
657 | cpu->icount_decr.u16.low = insns_left; | |
658 | cpu->icount_extra = cpu->icount_budget - insns_left; | |
659 | if (!cpu->icount_extra) { | |
1aab16c2 PB |
660 | /* Execute any remaining instructions, then let the main loop |
661 | * handle the next event. | |
662 | */ | |
663 | if (insns_left > 0) { | |
664 | cpu_exec_nocache(cpu, insns_left, tb, false); | |
1aab16c2 | 665 | } |
928de9ee | 666 | } |
1aab16c2 | 667 | #endif |
928de9ee SF |
668 | } |
669 | ||
7d13299d FB |
670 | /* main execution loop */ |
671 | ||
ea3e9847 | 672 | int cpu_exec(CPUState *cpu) |
7d13299d | 673 | { |
97a8ea5a | 674 | CPUClass *cc = CPU_GET_CLASS(cpu); |
c385e6e4 | 675 | int ret; |
cfb2d02b | 676 | SyncClocks sc = { 0 }; |
c2aa5f81 | 677 | |
6f060969 PD |
678 | /* replay_interrupt may need current_cpu */ |
679 | current_cpu = cpu; | |
680 | ||
8b2d34e9 SF |
681 | if (cpu_handle_halt(cpu)) { |
682 | return EXCP_HALTED; | |
eda48c34 | 683 | } |
5a1e3cfc | 684 | |
79e2b9ae PB |
685 | rcu_read_lock(); |
686 | ||
cffe7b32 | 687 | cc->cpu_exec_enter(cpu); |
9d27abd9 | 688 | |
c2aa5f81 ST |
689 | /* Calculate difference between guest clock and host clock. |
690 | * This delay includes the delay of the last cycle, so | |
691 | * what we have to do is sleep until it is 0. As for the | |
692 | * advance/delay we gain here, we try to fix it next time. | |
693 | */ | |
694 | init_delay_params(&sc, cpu); | |
695 | ||
4515e58d PB |
696 | /* prepare setjmp context for exception handling */ |
697 | if (sigsetjmp(cpu->jmp_env, 0) != 0) { | |
0448f5f8 | 698 | #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6) |
4515e58d PB |
699 | /* Some compilers wrongly smash all local variables after |
700 | * siglongjmp. There were bug reports for gcc 4.5.0 and clang. | |
701 | * Reload essential local variables here for those compilers. | |
702 | * Newer versions of gcc would complain about this code (-Wclobbered). */ | |
703 | cpu = current_cpu; | |
704 | cc = CPU_GET_CLASS(cpu); | |
0448f5f8 | 705 | #else /* buggy compiler */ |
4515e58d PB |
706 | /* Assert that the compiler does not smash local variables. */ |
707 | g_assert(cpu == current_cpu); | |
708 | g_assert(cc == CPU_GET_CLASS(cpu)); | |
0448f5f8 | 709 | #endif /* buggy compiler */ |
4515e58d | 710 | tb_lock_reset(); |
8d04fb55 JK |
711 | if (qemu_mutex_iothread_locked()) { |
712 | qemu_mutex_unlock_iothread(); | |
713 | } | |
4515e58d PB |
714 | } |
715 | ||
716 | /* if an exception is pending, we execute it here */ | |
717 | while (!cpu_handle_exception(cpu, &ret)) { | |
718 | TranslationBlock *last_tb = NULL; | |
719 | int tb_exit = 0; | |
720 | ||
721 | while (!cpu_handle_interrupt(cpu, &last_tb)) { | |
9b990ee5 RH |
722 | uint32_t cflags = cpu->cflags_next_tb; |
723 | TranslationBlock *tb; | |
724 | ||
725 | /* When requested, use an exact setting for cflags for the next | |
726 | execution. This is used for icount, precise smc, and stop- | |
727 | after-access watchpoints. Since this request should never | |
728 | have CF_INVALID set, -1 is a convenient invalid value that | |
729 | does not require tcg headers for cpu_common_reset. */ | |
730 | if (cflags == -1) { | |
731 | cflags = curr_cflags(); | |
732 | } else { | |
733 | cpu->cflags_next_tb = -1; | |
734 | } | |
735 | ||
736 | tb = tb_find(cpu, last_tb, tb_exit, cflags); | |
cfb2d02b | 737 | cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit); |
4515e58d PB |
738 | /* Try to align the host and virtual clocks |
739 | if the guest is in advance */ | |
740 | align_clocks(&sc, cpu); | |
7d13299d | 741 | } |
4515e58d | 742 | } |
3fb2ded1 | 743 | |
cffe7b32 | 744 | cc->cpu_exec_exit(cpu); |
79e2b9ae | 745 | rcu_read_unlock(); |
1057eaa7 | 746 | |
7d13299d FB |
747 | return ret; |
748 | } |