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Commit | Line | Data |
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7d13299d | 1 | /* |
e965fc38 | 2 | * emulator main execution loop |
5fafdf24 | 3 | * |
66321a11 | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
7d13299d | 5 | * |
3ef693a0 FB |
6 | * This library is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
7d13299d | 10 | * |
3ef693a0 FB |
11 | * This library is distributed in the hope that it will be useful, |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
7d13299d | 15 | * |
3ef693a0 | 16 | * You should have received a copy of the GNU Lesser General Public |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
7d13299d | 18 | */ |
7b31bbc2 | 19 | #include "qemu/osdep.h" |
cea5f9a2 | 20 | #include "cpu.h" |
d9bb58e5 | 21 | #include "trace.h" |
76cad711 | 22 | #include "disas/disas.h" |
63c91552 | 23 | #include "exec/exec-all.h" |
7cb69cae | 24 | #include "tcg.h" |
1de7afc9 | 25 | #include "qemu/atomic.h" |
9c17d615 | 26 | #include "sysemu/qtest.h" |
c2aa5f81 | 27 | #include "qemu/timer.h" |
9d82b5a7 | 28 | #include "exec/address-spaces.h" |
79e2b9ae | 29 | #include "qemu/rcu.h" |
e1b89321 | 30 | #include "exec/tb-hash.h" |
f6bb84d5 | 31 | #include "exec/tb-lookup.h" |
508127e2 | 32 | #include "exec/log.h" |
8d04fb55 | 33 | #include "qemu/main-loop.h" |
6220e900 PD |
34 | #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) |
35 | #include "hw/i386/apic.h" | |
36 | #endif | |
d2528bdc | 37 | #include "sysemu/cpus.h" |
6f060969 | 38 | #include "sysemu/replay.h" |
c2aa5f81 ST |
39 | |
40 | /* -icount align implementation. */ | |
41 | ||
42 | typedef struct SyncClocks { | |
43 | int64_t diff_clk; | |
44 | int64_t last_cpu_icount; | |
7f7bc144 | 45 | int64_t realtime_clock; |
c2aa5f81 ST |
46 | } SyncClocks; |
47 | ||
48 | #if !defined(CONFIG_USER_ONLY) | |
49 | /* Allow the guest to have a max 3ms advance. | |
50 | * The difference between the 2 clocks could therefore | |
51 | * oscillate around 0. | |
52 | */ | |
53 | #define VM_CLOCK_ADVANCE 3000000 | |
7f7bc144 ST |
54 | #define THRESHOLD_REDUCE 1.5 |
55 | #define MAX_DELAY_PRINT_RATE 2000000000LL | |
56 | #define MAX_NB_PRINTS 100 | |
c2aa5f81 ST |
57 | |
58 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
59 | { | |
60 | int64_t cpu_icount; | |
61 | ||
62 | if (!icount_align_option) { | |
63 | return; | |
64 | } | |
65 | ||
66 | cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; | |
67 | sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount); | |
68 | sc->last_cpu_icount = cpu_icount; | |
69 | ||
70 | if (sc->diff_clk > VM_CLOCK_ADVANCE) { | |
71 | #ifndef _WIN32 | |
72 | struct timespec sleep_delay, rem_delay; | |
73 | sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; | |
74 | sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; | |
75 | if (nanosleep(&sleep_delay, &rem_delay) < 0) { | |
a498d0ef | 76 | sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec; |
c2aa5f81 ST |
77 | } else { |
78 | sc->diff_clk = 0; | |
79 | } | |
80 | #else | |
81 | Sleep(sc->diff_clk / SCALE_MS); | |
82 | sc->diff_clk = 0; | |
83 | #endif | |
84 | } | |
85 | } | |
86 | ||
7f7bc144 ST |
87 | static void print_delay(const SyncClocks *sc) |
88 | { | |
89 | static float threshold_delay; | |
90 | static int64_t last_realtime_clock; | |
91 | static int nb_prints; | |
92 | ||
93 | if (icount_align_option && | |
94 | sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && | |
95 | nb_prints < MAX_NB_PRINTS) { | |
96 | if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || | |
97 | (-sc->diff_clk / (float)1000000000LL < | |
98 | (threshold_delay - THRESHOLD_REDUCE))) { | |
99 | threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; | |
100 | printf("Warning: The guest is now late by %.1f to %.1f seconds\n", | |
101 | threshold_delay - 1, | |
102 | threshold_delay); | |
103 | nb_prints++; | |
104 | last_realtime_clock = sc->realtime_clock; | |
105 | } | |
106 | } | |
107 | } | |
108 | ||
c2aa5f81 ST |
109 | static void init_delay_params(SyncClocks *sc, |
110 | const CPUState *cpu) | |
111 | { | |
112 | if (!icount_align_option) { | |
113 | return; | |
114 | } | |
2e91cc62 PB |
115 | sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); |
116 | sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock; | |
c2aa5f81 | 117 | sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; |
27498bef ST |
118 | if (sc->diff_clk < max_delay) { |
119 | max_delay = sc->diff_clk; | |
120 | } | |
121 | if (sc->diff_clk > max_advance) { | |
122 | max_advance = sc->diff_clk; | |
123 | } | |
7f7bc144 ST |
124 | |
125 | /* Print every 2s max if the guest is late. We limit the number | |
126 | of printed messages to NB_PRINT_MAX(currently 100) */ | |
127 | print_delay(sc); | |
c2aa5f81 ST |
128 | } |
129 | #else | |
130 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
131 | { | |
132 | } | |
133 | ||
134 | static void init_delay_params(SyncClocks *sc, const CPUState *cpu) | |
135 | { | |
136 | } | |
137 | #endif /* CONFIG USER ONLY */ | |
7d13299d | 138 | |
77211379 | 139 | /* Execute a TB, and fix up the CPU state afterwards if necessary */ |
1a830635 | 140 | static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb) |
77211379 PM |
141 | { |
142 | CPUArchState *env = cpu->env_ptr; | |
819af24b SF |
143 | uintptr_t ret; |
144 | TranslationBlock *last_tb; | |
145 | int tb_exit; | |
e7e168f4 | 146 | uint8_t *tb_ptr = itb->tc.ptr; |
1a830635 | 147 | |
d977e1c2 | 148 | qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc, |
4426f83a | 149 | "Trace %p [%d: " TARGET_FMT_lx "] %s\n", |
e7e168f4 | 150 | itb->tc.ptr, cpu->cpu_index, itb->pc, |
4426f83a | 151 | lookup_symbol(itb->pc)); |
03afa5f8 RH |
152 | |
153 | #if defined(DEBUG_DISAS) | |
be2208e2 RH |
154 | if (qemu_loglevel_mask(CPU_LOG_TB_CPU) |
155 | && qemu_log_in_addr_range(itb->pc)) { | |
1ee73216 | 156 | qemu_log_lock(); |
03afa5f8 RH |
157 | #if defined(TARGET_I386) |
158 | log_cpu_state(cpu, CPU_DUMP_CCOP); | |
03afa5f8 RH |
159 | #else |
160 | log_cpu_state(cpu, 0); | |
161 | #endif | |
1ee73216 | 162 | qemu_log_unlock(); |
03afa5f8 RH |
163 | } |
164 | #endif /* DEBUG_DISAS */ | |
165 | ||
414b15c9 | 166 | cpu->can_do_io = !use_icount; |
819af24b | 167 | ret = tcg_qemu_tb_exec(env, tb_ptr); |
626cf8f4 | 168 | cpu->can_do_io = 1; |
819af24b SF |
169 | last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); |
170 | tb_exit = ret & TB_EXIT_MASK; | |
171 | trace_exec_tb_exit(last_tb, tb_exit); | |
6db8b538 | 172 | |
819af24b | 173 | if (tb_exit > TB_EXIT_IDX1) { |
77211379 PM |
174 | /* We didn't start executing this TB (eg because the instruction |
175 | * counter hit zero); we must restore the guest PC to the address | |
176 | * of the start of the TB. | |
177 | */ | |
bdf7ae5b | 178 | CPUClass *cc = CPU_GET_CLASS(cpu); |
819af24b | 179 | qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc, |
d977e1c2 AB |
180 | "Stopped execution of TB chain before %p [" |
181 | TARGET_FMT_lx "] %s\n", | |
e7e168f4 | 182 | last_tb->tc.ptr, last_tb->pc, |
819af24b | 183 | lookup_symbol(last_tb->pc)); |
bdf7ae5b | 184 | if (cc->synchronize_from_tb) { |
819af24b | 185 | cc->synchronize_from_tb(cpu, last_tb); |
bdf7ae5b AF |
186 | } else { |
187 | assert(cc->set_pc); | |
819af24b | 188 | cc->set_pc(cpu, last_tb->pc); |
bdf7ae5b | 189 | } |
77211379 | 190 | } |
819af24b | 191 | return ret; |
77211379 PM |
192 | } |
193 | ||
7687bf52 | 194 | #ifndef CONFIG_USER_ONLY |
2e70f6ef PB |
195 | /* Execute the code without caching the generated code. An interpreter |
196 | could be used if available. */ | |
ea3e9847 | 197 | static void cpu_exec_nocache(CPUState *cpu, int max_cycles, |
56c0269a | 198 | TranslationBlock *orig_tb, bool ignore_icount) |
2e70f6ef | 199 | { |
2e70f6ef | 200 | TranslationBlock *tb; |
416986d3 RH |
201 | uint32_t cflags = curr_cflags() | CF_NOCACHE; |
202 | ||
203 | if (ignore_icount) { | |
204 | cflags &= ~CF_USE_ICOUNT; | |
205 | } | |
2e70f6ef PB |
206 | |
207 | /* Should never happen. | |
208 | We only end up here when an existing TB is too long. */ | |
416986d3 | 209 | cflags |= MIN(max_cycles, CF_COUNT_MASK); |
2e70f6ef | 210 | |
a5e99826 | 211 | tb_lock(); |
416986d3 RH |
212 | tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, |
213 | orig_tb->flags, cflags); | |
3359baad | 214 | tb->orig_tb = orig_tb; |
a5e99826 FK |
215 | tb_unlock(); |
216 | ||
2e70f6ef | 217 | /* execute the generated code */ |
6db8b538 | 218 | trace_exec_tb_nocache(tb, tb->pc); |
1a830635 | 219 | cpu_tb_exec(cpu, tb); |
a5e99826 FK |
220 | |
221 | tb_lock(); | |
2e70f6ef | 222 | tb_phys_invalidate(tb, -1); |
be1e0117 | 223 | tb_remove(tb); |
a5e99826 | 224 | tb_unlock(); |
2e70f6ef | 225 | } |
7687bf52 | 226 | #endif |
2e70f6ef | 227 | |
ac03ee53 | 228 | void cpu_exec_step_atomic(CPUState *cpu) |
fdbc2b57 | 229 | { |
08e73c48 | 230 | CPUClass *cc = CPU_GET_CLASS(cpu); |
fdbc2b57 RH |
231 | TranslationBlock *tb; |
232 | target_ulong cs_base, pc; | |
233 | uint32_t flags; | |
416986d3 | 234 | uint32_t cflags = 1; |
ac03ee53 | 235 | uint32_t cf_mask = cflags & CF_HASH_MASK; |
426eeecd PM |
236 | /* volatile because we modify it between setjmp and longjmp */ |
237 | volatile bool in_exclusive_region = false; | |
fdbc2b57 | 238 | |
08e73c48 | 239 | if (sigsetjmp(cpu->jmp_env, 0) == 0) { |
ac03ee53 | 240 | tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); |
4e2ca83e EC |
241 | if (tb == NULL) { |
242 | mmap_lock(); | |
243 | tb_lock(); | |
ac03ee53 EC |
244 | tb = tb_htable_lookup(cpu, pc, cs_base, flags, cf_mask); |
245 | if (likely(tb == NULL)) { | |
246 | tb = tb_gen_code(cpu, pc, cs_base, flags, cflags); | |
247 | } | |
4e2ca83e EC |
248 | tb_unlock(); |
249 | mmap_unlock(); | |
250 | } | |
08e73c48 | 251 | |
ac03ee53 EC |
252 | start_exclusive(); |
253 | ||
254 | /* Since we got here, we know that parallel_cpus must be true. */ | |
255 | parallel_cpus = false; | |
426eeecd | 256 | in_exclusive_region = true; |
08e73c48 PK |
257 | cc->cpu_exec_enter(cpu); |
258 | /* execute the generated code */ | |
4e2ca83e | 259 | trace_exec_tb(tb, pc); |
08e73c48 PK |
260 | cpu_tb_exec(cpu, tb); |
261 | cc->cpu_exec_exit(cpu); | |
08e73c48 PK |
262 | } else { |
263 | /* We may have exited due to another problem here, so we need | |
264 | * to reset any tb_locks we may have taken but didn't release. | |
265 | * The mmap_lock is dropped by tb_gen_code if it runs out of | |
266 | * memory. | |
267 | */ | |
268 | #ifndef CONFIG_SOFTMMU | |
269 | tcg_debug_assert(!have_mmap_lock()); | |
270 | #endif | |
271 | tb_lock_reset(); | |
272 | } | |
426eeecd PM |
273 | |
274 | if (in_exclusive_region) { | |
275 | /* We might longjump out of either the codegen or the | |
276 | * execution, so must make sure we only end the exclusive | |
277 | * region if we started it. | |
278 | */ | |
279 | parallel_cpus = true; | |
280 | end_exclusive(); | |
281 | } | |
fdbc2b57 RH |
282 | } |
283 | ||
909eaac9 EC |
284 | struct tb_desc { |
285 | target_ulong pc; | |
286 | target_ulong cs_base; | |
287 | CPUArchState *env; | |
288 | tb_page_addr_t phys_page1; | |
289 | uint32_t flags; | |
4e2ca83e | 290 | uint32_t cf_mask; |
61a67f71 | 291 | uint32_t trace_vcpu_dstate; |
909eaac9 EC |
292 | }; |
293 | ||
294 | static bool tb_cmp(const void *p, const void *d) | |
295 | { | |
296 | const TranslationBlock *tb = p; | |
297 | const struct tb_desc *desc = d; | |
298 | ||
299 | if (tb->pc == desc->pc && | |
300 | tb->page_addr[0] == desc->phys_page1 && | |
301 | tb->cs_base == desc->cs_base && | |
6d21e420 | 302 | tb->flags == desc->flags && |
61a67f71 | 303 | tb->trace_vcpu_dstate == desc->trace_vcpu_dstate && |
4e2ca83e | 304 | (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == desc->cf_mask) { |
909eaac9 EC |
305 | /* check next page if needed */ |
306 | if (tb->page_addr[1] == -1) { | |
307 | return true; | |
308 | } else { | |
309 | tb_page_addr_t phys_page2; | |
310 | target_ulong virt_page2; | |
311 | ||
312 | virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; | |
313 | phys_page2 = get_page_addr_code(desc->env, virt_page2); | |
314 | if (tb->page_addr[1] == phys_page2) { | |
315 | return true; | |
316 | } | |
317 | } | |
318 | } | |
319 | return false; | |
320 | } | |
321 | ||
cedbcb01 | 322 | TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, |
4e2ca83e EC |
323 | target_ulong cs_base, uint32_t flags, |
324 | uint32_t cf_mask) | |
8a40a180 | 325 | { |
909eaac9 EC |
326 | tb_page_addr_t phys_pc; |
327 | struct tb_desc desc; | |
42bd3228 | 328 | uint32_t h; |
3b46e624 | 329 | |
909eaac9 EC |
330 | desc.env = (CPUArchState *)cpu->env_ptr; |
331 | desc.cs_base = cs_base; | |
332 | desc.flags = flags; | |
4e2ca83e | 333 | desc.cf_mask = cf_mask; |
61a67f71 | 334 | desc.trace_vcpu_dstate = *cpu->trace_dstate; |
909eaac9 EC |
335 | desc.pc = pc; |
336 | phys_pc = get_page_addr_code(desc.env, pc); | |
337 | desc.phys_page1 = phys_pc & TARGET_PAGE_MASK; | |
4e2ca83e | 338 | h = tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate); |
44ded3d0 | 339 | return qht_lookup(&tb_ctx.htable, tb_cmp, &desc, h); |
9fd1a948 PB |
340 | } |
341 | ||
a8583393 RH |
342 | void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr) |
343 | { | |
344 | if (TCG_TARGET_HAS_direct_jump) { | |
345 | uintptr_t offset = tb->jmp_target_arg[n]; | |
e7e168f4 | 346 | uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr; |
a8583393 RH |
347 | tb_target_set_jmp_target(tc_ptr, tc_ptr + offset, addr); |
348 | } else { | |
349 | tb->jmp_target_arg[n] = addr; | |
350 | } | |
351 | } | |
352 | ||
353 | /* Called with tb_lock held. */ | |
354 | static inline void tb_add_jump(TranslationBlock *tb, int n, | |
355 | TranslationBlock *tb_next) | |
356 | { | |
357 | assert(n < ARRAY_SIZE(tb->jmp_list_next)); | |
358 | if (tb->jmp_list_next[n]) { | |
359 | /* Another thread has already done this while we were | |
360 | * outside of the lock; nothing to do in this case */ | |
361 | return; | |
362 | } | |
363 | qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc, | |
364 | "Linking TBs %p [" TARGET_FMT_lx | |
365 | "] index %d -> %p [" TARGET_FMT_lx "]\n", | |
e7e168f4 EC |
366 | tb->tc.ptr, tb->pc, n, |
367 | tb_next->tc.ptr, tb_next->pc); | |
a8583393 RH |
368 | |
369 | /* patch the native jump address */ | |
e7e168f4 | 370 | tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr); |
a8583393 RH |
371 | |
372 | /* add in TB jmp circular list */ | |
373 | tb->jmp_list_next[n] = tb_next->jmp_list_first; | |
374 | tb_next->jmp_list_first = (uintptr_t)tb | n; | |
375 | } | |
376 | ||
bd2710d5 SF |
377 | static inline TranslationBlock *tb_find(CPUState *cpu, |
378 | TranslationBlock *last_tb, | |
9b990ee5 | 379 | int tb_exit, uint32_t cf_mask) |
8a40a180 FB |
380 | { |
381 | TranslationBlock *tb; | |
382 | target_ulong cs_base, pc; | |
89fee74a | 383 | uint32_t flags; |
841710c7 | 384 | bool acquired_tb_lock = false; |
8a40a180 | 385 | |
4e2ca83e | 386 | tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); |
f6bb84d5 EC |
387 | if (tb == NULL) { |
388 | /* mmap_lock is needed by tb_gen_code, and mmap_lock must be | |
389 | * taken outside tb_lock. As system emulation is currently | |
390 | * single threaded the locks are NOPs. | |
391 | */ | |
392 | mmap_lock(); | |
393 | tb_lock(); | |
394 | acquired_tb_lock = true; | |
bd2710d5 | 395 | |
f6bb84d5 EC |
396 | /* There's a chance that our desired tb has been translated while |
397 | * taking the locks so we check again inside the lock. | |
398 | */ | |
4e2ca83e | 399 | tb = tb_htable_lookup(cpu, pc, cs_base, flags, cf_mask); |
f6bb84d5 EC |
400 | if (likely(tb == NULL)) { |
401 | /* if no translated code available, then translate it now */ | |
4e2ca83e | 402 | tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask); |
bd2710d5 SF |
403 | } |
404 | ||
f6bb84d5 | 405 | mmap_unlock(); |
bd2710d5 SF |
406 | /* We add the TB in the virtual pc hash table for the fast lookup */ |
407 | atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb); | |
8a40a180 | 408 | } |
c88c67e5 SF |
409 | #ifndef CONFIG_USER_ONLY |
410 | /* We don't take care of direct jumps when address mapping changes in | |
411 | * system emulation. So it's not safe to make a direct jump to a TB | |
412 | * spanning two pages because the mapping for the second page can change. | |
413 | */ | |
414 | if (tb->page_addr[1] != -1) { | |
4b7e6950 | 415 | last_tb = NULL; |
c88c67e5 SF |
416 | } |
417 | #endif | |
a0522c7a | 418 | /* See if we can patch the calling TB. */ |
4b7e6950 | 419 | if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { |
841710c7 | 420 | if (!acquired_tb_lock) { |
74d356dd | 421 | tb_lock(); |
841710c7 | 422 | acquired_tb_lock = true; |
74d356dd | 423 | } |
84f1c148 | 424 | if (!(tb->cflags & CF_INVALID)) { |
118b0730 SF |
425 | tb_add_jump(last_tb, tb_exit, tb); |
426 | } | |
74d356dd | 427 | } |
841710c7 | 428 | if (acquired_tb_lock) { |
518615c6 | 429 | tb_unlock(); |
a0522c7a | 430 | } |
8a40a180 FB |
431 | return tb; |
432 | } | |
433 | ||
8b2d34e9 SF |
434 | static inline bool cpu_handle_halt(CPUState *cpu) |
435 | { | |
436 | if (cpu->halted) { | |
437 | #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) | |
438 | if ((cpu->interrupt_request & CPU_INTERRUPT_POLL) | |
439 | && replay_interrupt()) { | |
440 | X86CPU *x86_cpu = X86_CPU(cpu); | |
8d04fb55 | 441 | qemu_mutex_lock_iothread(); |
8b2d34e9 SF |
442 | apic_poll_irq(x86_cpu->apic_state); |
443 | cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); | |
8d04fb55 | 444 | qemu_mutex_unlock_iothread(); |
8b2d34e9 SF |
445 | } |
446 | #endif | |
447 | if (!cpu_has_work(cpu)) { | |
8b2d34e9 SF |
448 | return true; |
449 | } | |
450 | ||
451 | cpu->halted = 0; | |
452 | } | |
453 | ||
454 | return false; | |
455 | } | |
456 | ||
ea284766 | 457 | static inline void cpu_handle_debug_exception(CPUState *cpu) |
1009d2ed | 458 | { |
86025ee4 | 459 | CPUClass *cc = CPU_GET_CLASS(cpu); |
1009d2ed JK |
460 | CPUWatchpoint *wp; |
461 | ||
ff4700b0 AF |
462 | if (!cpu->watchpoint_hit) { |
463 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { | |
1009d2ed JK |
464 | wp->flags &= ~BP_WATCHPOINT_HIT; |
465 | } | |
466 | } | |
86025ee4 PM |
467 | |
468 | cc->debug_excp_handler(cpu); | |
1009d2ed JK |
469 | } |
470 | ||
ea284766 SF |
471 | static inline bool cpu_handle_exception(CPUState *cpu, int *ret) |
472 | { | |
473 | if (cpu->exception_index >= 0) { | |
474 | if (cpu->exception_index >= EXCP_INTERRUPT) { | |
475 | /* exit request from the cpu execution loop */ | |
476 | *ret = cpu->exception_index; | |
477 | if (*ret == EXCP_DEBUG) { | |
478 | cpu_handle_debug_exception(cpu); | |
479 | } | |
480 | cpu->exception_index = -1; | |
481 | return true; | |
482 | } else { | |
483 | #if defined(CONFIG_USER_ONLY) | |
484 | /* if user mode only, we simulate a fake exception | |
485 | which will be handled outside the cpu execution | |
486 | loop */ | |
487 | #if defined(TARGET_I386) | |
488 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
489 | cc->do_interrupt(cpu); | |
490 | #endif | |
491 | *ret = cpu->exception_index; | |
492 | cpu->exception_index = -1; | |
493 | return true; | |
494 | #else | |
495 | if (replay_exception()) { | |
496 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
8d04fb55 | 497 | qemu_mutex_lock_iothread(); |
ea284766 | 498 | cc->do_interrupt(cpu); |
8d04fb55 | 499 | qemu_mutex_unlock_iothread(); |
ea284766 SF |
500 | cpu->exception_index = -1; |
501 | } else if (!replay_has_interrupt()) { | |
502 | /* give a chance to iothread in replay mode */ | |
503 | *ret = EXCP_INTERRUPT; | |
504 | return true; | |
505 | } | |
506 | #endif | |
507 | } | |
508 | #ifndef CONFIG_USER_ONLY | |
509 | } else if (replay_has_exception() | |
510 | && cpu->icount_decr.u16.low + cpu->icount_extra == 0) { | |
511 | /* try to cause an exception pending in the log */ | |
9b990ee5 | 512 | cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0, curr_cflags()), true); |
ea284766 SF |
513 | *ret = -1; |
514 | return true; | |
515 | #endif | |
516 | } | |
517 | ||
518 | return false; | |
519 | } | |
520 | ||
209b71b6 | 521 | static inline bool cpu_handle_interrupt(CPUState *cpu, |
c385e6e4 SF |
522 | TranslationBlock **last_tb) |
523 | { | |
524 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
c385e6e4 | 525 | |
8d04fb55 JK |
526 | if (unlikely(atomic_read(&cpu->interrupt_request))) { |
527 | int interrupt_request; | |
528 | qemu_mutex_lock_iothread(); | |
529 | interrupt_request = cpu->interrupt_request; | |
c385e6e4 SF |
530 | if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { |
531 | /* Mask out external interrupts for this step. */ | |
532 | interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; | |
533 | } | |
534 | if (interrupt_request & CPU_INTERRUPT_DEBUG) { | |
535 | cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; | |
536 | cpu->exception_index = EXCP_DEBUG; | |
8d04fb55 | 537 | qemu_mutex_unlock_iothread(); |
209b71b6 | 538 | return true; |
c385e6e4 SF |
539 | } |
540 | if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) { | |
541 | /* Do nothing */ | |
542 | } else if (interrupt_request & CPU_INTERRUPT_HALT) { | |
543 | replay_interrupt(); | |
544 | cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; | |
545 | cpu->halted = 1; | |
546 | cpu->exception_index = EXCP_HLT; | |
8d04fb55 | 547 | qemu_mutex_unlock_iothread(); |
209b71b6 | 548 | return true; |
c385e6e4 SF |
549 | } |
550 | #if defined(TARGET_I386) | |
551 | else if (interrupt_request & CPU_INTERRUPT_INIT) { | |
552 | X86CPU *x86_cpu = X86_CPU(cpu); | |
553 | CPUArchState *env = &x86_cpu->env; | |
554 | replay_interrupt(); | |
65c9d60a | 555 | cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0); |
c385e6e4 SF |
556 | do_cpu_init(x86_cpu); |
557 | cpu->exception_index = EXCP_HALTED; | |
8d04fb55 | 558 | qemu_mutex_unlock_iothread(); |
209b71b6 | 559 | return true; |
c385e6e4 SF |
560 | } |
561 | #else | |
562 | else if (interrupt_request & CPU_INTERRUPT_RESET) { | |
563 | replay_interrupt(); | |
564 | cpu_reset(cpu); | |
8d04fb55 | 565 | qemu_mutex_unlock_iothread(); |
209b71b6 | 566 | return true; |
c385e6e4 SF |
567 | } |
568 | #endif | |
569 | /* The target hook has 3 exit conditions: | |
570 | False when the interrupt isn't processed, | |
571 | True when it is, and we should restart on a new TB, | |
572 | and via longjmp via cpu_loop_exit. */ | |
573 | else { | |
c385e6e4 | 574 | if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { |
d718b14b | 575 | replay_interrupt(); |
c385e6e4 SF |
576 | *last_tb = NULL; |
577 | } | |
8b1fe3f4 SF |
578 | /* The target hook may have updated the 'cpu->interrupt_request'; |
579 | * reload the 'interrupt_request' value */ | |
580 | interrupt_request = cpu->interrupt_request; | |
c385e6e4 | 581 | } |
8b1fe3f4 | 582 | if (interrupt_request & CPU_INTERRUPT_EXITTB) { |
c385e6e4 SF |
583 | cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; |
584 | /* ensure that no TB jump will be modified as | |
585 | the program flow was changed */ | |
586 | *last_tb = NULL; | |
587 | } | |
8d04fb55 JK |
588 | |
589 | /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */ | |
590 | qemu_mutex_unlock_iothread(); | |
c385e6e4 | 591 | } |
8d04fb55 | 592 | |
cfb2d02b PD |
593 | /* Finally, check if we need to exit to the main loop. */ |
594 | if (unlikely(atomic_read(&cpu->exit_request) | |
595 | || (use_icount && cpu->icount_decr.u16.low + cpu->icount_extra == 0))) { | |
027d9a7d | 596 | atomic_set(&cpu->exit_request, 0); |
e01cecab PD |
597 | if (cpu->exception_index == -1) { |
598 | cpu->exception_index = EXCP_INTERRUPT; | |
599 | } | |
209b71b6 | 600 | return true; |
c385e6e4 | 601 | } |
209b71b6 PB |
602 | |
603 | return false; | |
c385e6e4 SF |
604 | } |
605 | ||
928de9ee | 606 | static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, |
cfb2d02b | 607 | TranslationBlock **last_tb, int *tb_exit) |
928de9ee SF |
608 | { |
609 | uintptr_t ret; | |
1aab16c2 | 610 | int32_t insns_left; |
928de9ee SF |
611 | |
612 | trace_exec_tb(tb, tb->pc); | |
613 | ret = cpu_tb_exec(cpu, tb); | |
43d70ddf | 614 | tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); |
928de9ee | 615 | *tb_exit = ret & TB_EXIT_MASK; |
1aab16c2 PB |
616 | if (*tb_exit != TB_EXIT_REQUESTED) { |
617 | *last_tb = tb; | |
618 | return; | |
619 | } | |
620 | ||
621 | *last_tb = NULL; | |
622 | insns_left = atomic_read(&cpu->icount_decr.u32); | |
623 | atomic_set(&cpu->icount_decr.u16.high, 0); | |
624 | if (insns_left < 0) { | |
e5143e30 AB |
625 | /* Something asked us to stop executing chained TBs; just |
626 | * continue round the main loop. Whatever requested the exit | |
30f3dda2 PB |
627 | * will also have set something else (eg exit_request or |
628 | * interrupt_request) which we will handle next time around | |
629 | * the loop. But we need to ensure the zeroing of icount_decr | |
928de9ee SF |
630 | * comes before the next read of cpu->exit_request |
631 | * or cpu->interrupt_request. | |
632 | */ | |
a70fe14b | 633 | smp_mb(); |
1aab16c2 | 634 | return; |
928de9ee | 635 | } |
1aab16c2 PB |
636 | |
637 | /* Instruction counter expired. */ | |
638 | assert(use_icount); | |
639 | #ifndef CONFIG_USER_ONLY | |
eda5f7c6 AB |
640 | /* Ensure global icount has gone forward */ |
641 | cpu_update_icount(cpu); | |
642 | /* Refill decrementer and continue execution. */ | |
643 | insns_left = MIN(0xffff, cpu->icount_budget); | |
644 | cpu->icount_decr.u16.low = insns_left; | |
645 | cpu->icount_extra = cpu->icount_budget - insns_left; | |
646 | if (!cpu->icount_extra) { | |
1aab16c2 PB |
647 | /* Execute any remaining instructions, then let the main loop |
648 | * handle the next event. | |
649 | */ | |
650 | if (insns_left > 0) { | |
651 | cpu_exec_nocache(cpu, insns_left, tb, false); | |
1aab16c2 | 652 | } |
928de9ee | 653 | } |
1aab16c2 | 654 | #endif |
928de9ee SF |
655 | } |
656 | ||
7d13299d FB |
657 | /* main execution loop */ |
658 | ||
ea3e9847 | 659 | int cpu_exec(CPUState *cpu) |
7d13299d | 660 | { |
97a8ea5a | 661 | CPUClass *cc = CPU_GET_CLASS(cpu); |
c385e6e4 | 662 | int ret; |
cfb2d02b | 663 | SyncClocks sc = { 0 }; |
c2aa5f81 | 664 | |
6f060969 PD |
665 | /* replay_interrupt may need current_cpu */ |
666 | current_cpu = cpu; | |
667 | ||
8b2d34e9 SF |
668 | if (cpu_handle_halt(cpu)) { |
669 | return EXCP_HALTED; | |
eda48c34 | 670 | } |
5a1e3cfc | 671 | |
79e2b9ae PB |
672 | rcu_read_lock(); |
673 | ||
cffe7b32 | 674 | cc->cpu_exec_enter(cpu); |
9d27abd9 | 675 | |
c2aa5f81 ST |
676 | /* Calculate difference between guest clock and host clock. |
677 | * This delay includes the delay of the last cycle, so | |
678 | * what we have to do is sleep until it is 0. As for the | |
679 | * advance/delay we gain here, we try to fix it next time. | |
680 | */ | |
681 | init_delay_params(&sc, cpu); | |
682 | ||
4515e58d PB |
683 | /* prepare setjmp context for exception handling */ |
684 | if (sigsetjmp(cpu->jmp_env, 0) != 0) { | |
0448f5f8 | 685 | #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6) |
4515e58d PB |
686 | /* Some compilers wrongly smash all local variables after |
687 | * siglongjmp. There were bug reports for gcc 4.5.0 and clang. | |
688 | * Reload essential local variables here for those compilers. | |
689 | * Newer versions of gcc would complain about this code (-Wclobbered). */ | |
690 | cpu = current_cpu; | |
691 | cc = CPU_GET_CLASS(cpu); | |
0448f5f8 | 692 | #else /* buggy compiler */ |
4515e58d PB |
693 | /* Assert that the compiler does not smash local variables. */ |
694 | g_assert(cpu == current_cpu); | |
695 | g_assert(cc == CPU_GET_CLASS(cpu)); | |
0448f5f8 | 696 | #endif /* buggy compiler */ |
4515e58d PB |
697 | cpu->can_do_io = 1; |
698 | tb_lock_reset(); | |
8d04fb55 JK |
699 | if (qemu_mutex_iothread_locked()) { |
700 | qemu_mutex_unlock_iothread(); | |
701 | } | |
4515e58d PB |
702 | } |
703 | ||
704 | /* if an exception is pending, we execute it here */ | |
705 | while (!cpu_handle_exception(cpu, &ret)) { | |
706 | TranslationBlock *last_tb = NULL; | |
707 | int tb_exit = 0; | |
708 | ||
709 | while (!cpu_handle_interrupt(cpu, &last_tb)) { | |
9b990ee5 RH |
710 | uint32_t cflags = cpu->cflags_next_tb; |
711 | TranslationBlock *tb; | |
712 | ||
713 | /* When requested, use an exact setting for cflags for the next | |
714 | execution. This is used for icount, precise smc, and stop- | |
715 | after-access watchpoints. Since this request should never | |
716 | have CF_INVALID set, -1 is a convenient invalid value that | |
717 | does not require tcg headers for cpu_common_reset. */ | |
718 | if (cflags == -1) { | |
719 | cflags = curr_cflags(); | |
720 | } else { | |
721 | cpu->cflags_next_tb = -1; | |
722 | } | |
723 | ||
724 | tb = tb_find(cpu, last_tb, tb_exit, cflags); | |
cfb2d02b | 725 | cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit); |
4515e58d PB |
726 | /* Try to align the host and virtual clocks |
727 | if the guest is in advance */ | |
728 | align_clocks(&sc, cpu); | |
7d13299d | 729 | } |
4515e58d | 730 | } |
3fb2ded1 | 731 | |
cffe7b32 | 732 | cc->cpu_exec_exit(cpu); |
79e2b9ae | 733 | rcu_read_unlock(); |
1057eaa7 | 734 | |
7d13299d FB |
735 | return ret; |
736 | } |