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Commit | Line | Data |
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7d13299d | 1 | /* |
e965fc38 | 2 | * emulator main execution loop |
5fafdf24 | 3 | * |
66321a11 | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
7d13299d | 5 | * |
3ef693a0 FB |
6 | * This library is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
7d13299d | 10 | * |
3ef693a0 FB |
11 | * This library is distributed in the hope that it will be useful, |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
7d13299d | 15 | * |
3ef693a0 | 16 | * You should have received a copy of the GNU Lesser General Public |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
7d13299d | 18 | */ |
7b31bbc2 | 19 | #include "qemu/osdep.h" |
cea5f9a2 | 20 | #include "cpu.h" |
6db8b538 | 21 | #include "trace.h" |
76cad711 | 22 | #include "disas/disas.h" |
7cb69cae | 23 | #include "tcg.h" |
1de7afc9 | 24 | #include "qemu/atomic.h" |
9c17d615 | 25 | #include "sysemu/qtest.h" |
c2aa5f81 | 26 | #include "qemu/timer.h" |
9d82b5a7 | 27 | #include "exec/address-spaces.h" |
79e2b9ae | 28 | #include "qemu/rcu.h" |
e1b89321 | 29 | #include "exec/tb-hash.h" |
508127e2 | 30 | #include "exec/log.h" |
6220e900 PD |
31 | #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) |
32 | #include "hw/i386/apic.h" | |
33 | #endif | |
6f060969 | 34 | #include "sysemu/replay.h" |
c2aa5f81 ST |
35 | |
36 | /* -icount align implementation. */ | |
37 | ||
38 | typedef struct SyncClocks { | |
39 | int64_t diff_clk; | |
40 | int64_t last_cpu_icount; | |
7f7bc144 | 41 | int64_t realtime_clock; |
c2aa5f81 ST |
42 | } SyncClocks; |
43 | ||
44 | #if !defined(CONFIG_USER_ONLY) | |
45 | /* Allow the guest to have a max 3ms advance. | |
46 | * The difference between the 2 clocks could therefore | |
47 | * oscillate around 0. | |
48 | */ | |
49 | #define VM_CLOCK_ADVANCE 3000000 | |
7f7bc144 ST |
50 | #define THRESHOLD_REDUCE 1.5 |
51 | #define MAX_DELAY_PRINT_RATE 2000000000LL | |
52 | #define MAX_NB_PRINTS 100 | |
c2aa5f81 ST |
53 | |
54 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
55 | { | |
56 | int64_t cpu_icount; | |
57 | ||
58 | if (!icount_align_option) { | |
59 | return; | |
60 | } | |
61 | ||
62 | cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; | |
63 | sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount); | |
64 | sc->last_cpu_icount = cpu_icount; | |
65 | ||
66 | if (sc->diff_clk > VM_CLOCK_ADVANCE) { | |
67 | #ifndef _WIN32 | |
68 | struct timespec sleep_delay, rem_delay; | |
69 | sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; | |
70 | sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; | |
71 | if (nanosleep(&sleep_delay, &rem_delay) < 0) { | |
a498d0ef | 72 | sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec; |
c2aa5f81 ST |
73 | } else { |
74 | sc->diff_clk = 0; | |
75 | } | |
76 | #else | |
77 | Sleep(sc->diff_clk / SCALE_MS); | |
78 | sc->diff_clk = 0; | |
79 | #endif | |
80 | } | |
81 | } | |
82 | ||
7f7bc144 ST |
83 | static void print_delay(const SyncClocks *sc) |
84 | { | |
85 | static float threshold_delay; | |
86 | static int64_t last_realtime_clock; | |
87 | static int nb_prints; | |
88 | ||
89 | if (icount_align_option && | |
90 | sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && | |
91 | nb_prints < MAX_NB_PRINTS) { | |
92 | if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || | |
93 | (-sc->diff_clk / (float)1000000000LL < | |
94 | (threshold_delay - THRESHOLD_REDUCE))) { | |
95 | threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; | |
96 | printf("Warning: The guest is now late by %.1f to %.1f seconds\n", | |
97 | threshold_delay - 1, | |
98 | threshold_delay); | |
99 | nb_prints++; | |
100 | last_realtime_clock = sc->realtime_clock; | |
101 | } | |
102 | } | |
103 | } | |
104 | ||
c2aa5f81 ST |
105 | static void init_delay_params(SyncClocks *sc, |
106 | const CPUState *cpu) | |
107 | { | |
108 | if (!icount_align_option) { | |
109 | return; | |
110 | } | |
2e91cc62 PB |
111 | sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); |
112 | sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock; | |
c2aa5f81 | 113 | sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; |
27498bef ST |
114 | if (sc->diff_clk < max_delay) { |
115 | max_delay = sc->diff_clk; | |
116 | } | |
117 | if (sc->diff_clk > max_advance) { | |
118 | max_advance = sc->diff_clk; | |
119 | } | |
7f7bc144 ST |
120 | |
121 | /* Print every 2s max if the guest is late. We limit the number | |
122 | of printed messages to NB_PRINT_MAX(currently 100) */ | |
123 | print_delay(sc); | |
c2aa5f81 ST |
124 | } |
125 | #else | |
126 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
127 | { | |
128 | } | |
129 | ||
130 | static void init_delay_params(SyncClocks *sc, const CPUState *cpu) | |
131 | { | |
132 | } | |
133 | #endif /* CONFIG USER ONLY */ | |
7d13299d | 134 | |
77211379 | 135 | /* Execute a TB, and fix up the CPU state afterwards if necessary */ |
1a830635 | 136 | static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb) |
77211379 PM |
137 | { |
138 | CPUArchState *env = cpu->env_ptr; | |
03afa5f8 | 139 | uintptr_t next_tb; |
1a830635 PM |
140 | uint8_t *tb_ptr = itb->tc_ptr; |
141 | ||
142 | qemu_log_mask(CPU_LOG_EXEC, "Trace %p [" TARGET_FMT_lx "] %s\n", | |
143 | itb->tc_ptr, itb->pc, lookup_symbol(itb->pc)); | |
03afa5f8 RH |
144 | |
145 | #if defined(DEBUG_DISAS) | |
146 | if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) { | |
147 | #if defined(TARGET_I386) | |
148 | log_cpu_state(cpu, CPU_DUMP_CCOP); | |
149 | #elif defined(TARGET_M68K) | |
150 | /* ??? Should not modify env state for dumping. */ | |
151 | cpu_m68k_flush_flags(env, env->cc_op); | |
152 | env->cc_op = CC_OP_FLAGS; | |
153 | env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4); | |
154 | log_cpu_state(cpu, 0); | |
155 | #else | |
156 | log_cpu_state(cpu, 0); | |
157 | #endif | |
158 | } | |
159 | #endif /* DEBUG_DISAS */ | |
160 | ||
414b15c9 | 161 | cpu->can_do_io = !use_icount; |
03afa5f8 | 162 | next_tb = tcg_qemu_tb_exec(env, tb_ptr); |
626cf8f4 | 163 | cpu->can_do_io = 1; |
6db8b538 AB |
164 | trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK), |
165 | next_tb & TB_EXIT_MASK); | |
166 | ||
77211379 PM |
167 | if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) { |
168 | /* We didn't start executing this TB (eg because the instruction | |
169 | * counter hit zero); we must restore the guest PC to the address | |
170 | * of the start of the TB. | |
171 | */ | |
bdf7ae5b | 172 | CPUClass *cc = CPU_GET_CLASS(cpu); |
77211379 | 173 | TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); |
1a830635 PM |
174 | qemu_log_mask(CPU_LOG_EXEC, |
175 | "Stopped execution of TB chain before %p [" | |
176 | TARGET_FMT_lx "] %s\n", | |
177 | itb->tc_ptr, itb->pc, lookup_symbol(itb->pc)); | |
bdf7ae5b AF |
178 | if (cc->synchronize_from_tb) { |
179 | cc->synchronize_from_tb(cpu, tb); | |
180 | } else { | |
181 | assert(cc->set_pc); | |
182 | cc->set_pc(cpu, tb->pc); | |
183 | } | |
77211379 | 184 | } |
378df4b2 PM |
185 | if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) { |
186 | /* We were asked to stop executing TBs (probably a pending | |
187 | * interrupt. We've now stopped, so clear the flag. | |
188 | */ | |
189 | cpu->tcg_exit_req = 0; | |
190 | } | |
77211379 PM |
191 | return next_tb; |
192 | } | |
193 | ||
2e70f6ef PB |
194 | /* Execute the code without caching the generated code. An interpreter |
195 | could be used if available. */ | |
ea3e9847 | 196 | static void cpu_exec_nocache(CPUState *cpu, int max_cycles, |
56c0269a | 197 | TranslationBlock *orig_tb, bool ignore_icount) |
2e70f6ef | 198 | { |
2e70f6ef PB |
199 | TranslationBlock *tb; |
200 | ||
201 | /* Should never happen. | |
202 | We only end up here when an existing TB is too long. */ | |
203 | if (max_cycles > CF_COUNT_MASK) | |
204 | max_cycles = CF_COUNT_MASK; | |
205 | ||
02d57ea1 | 206 | tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags, |
56c0269a PD |
207 | max_cycles | CF_NOCACHE |
208 | | (ignore_icount ? CF_IGNORE_ICOUNT : 0)); | |
02d57ea1 | 209 | tb->orig_tb = tcg_ctx.tb_ctx.tb_invalidated_flag ? NULL : orig_tb; |
d77953b9 | 210 | cpu->current_tb = tb; |
2e70f6ef | 211 | /* execute the generated code */ |
6db8b538 | 212 | trace_exec_tb_nocache(tb, tb->pc); |
1a830635 | 213 | cpu_tb_exec(cpu, tb); |
d77953b9 | 214 | cpu->current_tb = NULL; |
2e70f6ef PB |
215 | tb_phys_invalidate(tb, -1); |
216 | tb_free(tb); | |
217 | } | |
218 | ||
9fd1a948 PB |
219 | static TranslationBlock *tb_find_physical(CPUState *cpu, |
220 | target_ulong pc, | |
221 | target_ulong cs_base, | |
222 | uint64_t flags) | |
8a40a180 | 223 | { |
ea3e9847 | 224 | CPUArchState *env = (CPUArchState *)cpu->env_ptr; |
8a40a180 | 225 | TranslationBlock *tb, **ptb1; |
8a40a180 | 226 | unsigned int h; |
337fc758 | 227 | tb_page_addr_t phys_pc, phys_page1; |
41c1b1c9 | 228 | target_ulong virt_page2; |
3b46e624 | 229 | |
5e5f07e0 | 230 | tcg_ctx.tb_ctx.tb_invalidated_flag = 0; |
3b46e624 | 231 | |
8a40a180 | 232 | /* find translated block using physical mappings */ |
41c1b1c9 | 233 | phys_pc = get_page_addr_code(env, pc); |
8a40a180 | 234 | phys_page1 = phys_pc & TARGET_PAGE_MASK; |
8a40a180 | 235 | h = tb_phys_hash_func(phys_pc); |
5e5f07e0 | 236 | ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h]; |
8a40a180 FB |
237 | for(;;) { |
238 | tb = *ptb1; | |
9fd1a948 PB |
239 | if (!tb) { |
240 | return NULL; | |
241 | } | |
5fafdf24 | 242 | if (tb->pc == pc && |
8a40a180 | 243 | tb->page_addr[0] == phys_page1 && |
5fafdf24 | 244 | tb->cs_base == cs_base && |
8a40a180 FB |
245 | tb->flags == flags) { |
246 | /* check next page if needed */ | |
247 | if (tb->page_addr[1] != -1) { | |
337fc758 BS |
248 | tb_page_addr_t phys_page2; |
249 | ||
5fafdf24 | 250 | virt_page2 = (pc & TARGET_PAGE_MASK) + |
8a40a180 | 251 | TARGET_PAGE_SIZE; |
41c1b1c9 | 252 | phys_page2 = get_page_addr_code(env, virt_page2); |
9fd1a948 PB |
253 | if (tb->page_addr[1] == phys_page2) { |
254 | break; | |
255 | } | |
8a40a180 | 256 | } else { |
9fd1a948 | 257 | break; |
8a40a180 FB |
258 | } |
259 | } | |
260 | ptb1 = &tb->phys_hash_next; | |
261 | } | |
3b46e624 | 262 | |
9fd1a948 PB |
263 | /* Move the TB to the head of the list */ |
264 | *ptb1 = tb->phys_hash_next; | |
265 | tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h]; | |
266 | tcg_ctx.tb_ctx.tb_phys_hash[h] = tb; | |
267 | return tb; | |
268 | } | |
269 | ||
270 | static TranslationBlock *tb_find_slow(CPUState *cpu, | |
271 | target_ulong pc, | |
272 | target_ulong cs_base, | |
273 | uint64_t flags) | |
274 | { | |
275 | TranslationBlock *tb; | |
276 | ||
277 | tb = tb_find_physical(cpu, pc, cs_base, flags); | |
278 | if (tb) { | |
279 | goto found; | |
280 | } | |
281 | ||
282 | #ifdef CONFIG_USER_ONLY | |
283 | /* mmap_lock is needed by tb_gen_code, and mmap_lock must be | |
284 | * taken outside tb_lock. Since we're momentarily dropping | |
285 | * tb_lock, there's a chance that our desired tb has been | |
286 | * translated. | |
287 | */ | |
288 | tb_unlock(); | |
289 | mmap_lock(); | |
290 | tb_lock(); | |
291 | tb = tb_find_physical(cpu, pc, cs_base, flags); | |
292 | if (tb) { | |
293 | mmap_unlock(); | |
294 | goto found; | |
2c90fe2b | 295 | } |
9fd1a948 PB |
296 | #endif |
297 | ||
298 | /* if no translated code available, then translate it now */ | |
299 | tb = tb_gen_code(cpu, pc, cs_base, flags, 0); | |
300 | ||
301 | #ifdef CONFIG_USER_ONLY | |
302 | mmap_unlock(); | |
303 | #endif | |
304 | ||
305 | found: | |
8a40a180 | 306 | /* we add the TB in the virtual pc hash table */ |
8cd70437 | 307 | cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb; |
8a40a180 FB |
308 | return tb; |
309 | } | |
310 | ||
ea3e9847 | 311 | static inline TranslationBlock *tb_find_fast(CPUState *cpu) |
8a40a180 | 312 | { |
ea3e9847 | 313 | CPUArchState *env = (CPUArchState *)cpu->env_ptr; |
8a40a180 FB |
314 | TranslationBlock *tb; |
315 | target_ulong cs_base, pc; | |
6b917547 | 316 | int flags; |
8a40a180 FB |
317 | |
318 | /* we record a subset of the CPU state. It will | |
319 | always be the same before a given translated block | |
320 | is executed. */ | |
6b917547 | 321 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); |
8cd70437 | 322 | tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]; |
551bd27f TS |
323 | if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base || |
324 | tb->flags != flags)) { | |
ea3e9847 | 325 | tb = tb_find_slow(cpu, pc, cs_base, flags); |
8a40a180 FB |
326 | } |
327 | return tb; | |
328 | } | |
329 | ||
ea3e9847 | 330 | static void cpu_handle_debug_exception(CPUState *cpu) |
1009d2ed | 331 | { |
86025ee4 | 332 | CPUClass *cc = CPU_GET_CLASS(cpu); |
1009d2ed JK |
333 | CPUWatchpoint *wp; |
334 | ||
ff4700b0 AF |
335 | if (!cpu->watchpoint_hit) { |
336 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { | |
1009d2ed JK |
337 | wp->flags &= ~BP_WATCHPOINT_HIT; |
338 | } | |
339 | } | |
86025ee4 PM |
340 | |
341 | cc->debug_excp_handler(cpu); | |
1009d2ed JK |
342 | } |
343 | ||
7d13299d FB |
344 | /* main execution loop */ |
345 | ||
ea3e9847 | 346 | int cpu_exec(CPUState *cpu) |
7d13299d | 347 | { |
97a8ea5a | 348 | CPUClass *cc = CPU_GET_CLASS(cpu); |
693fa551 AF |
349 | #ifdef TARGET_I386 |
350 | X86CPU *x86_cpu = X86_CPU(cpu); | |
ea3e9847 | 351 | CPUArchState *env = &x86_cpu->env; |
97a8ea5a | 352 | #endif |
8a40a180 | 353 | int ret, interrupt_request; |
8a40a180 | 354 | TranslationBlock *tb; |
3e9bd63a | 355 | uintptr_t next_tb; |
c2aa5f81 ST |
356 | SyncClocks sc; |
357 | ||
6f060969 PD |
358 | /* replay_interrupt may need current_cpu */ |
359 | current_cpu = cpu; | |
360 | ||
259186a7 | 361 | if (cpu->halted) { |
6220e900 | 362 | #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) |
6f060969 PD |
363 | if ((cpu->interrupt_request & CPU_INTERRUPT_POLL) |
364 | && replay_interrupt()) { | |
6220e900 PD |
365 | apic_poll_irq(x86_cpu->apic_state); |
366 | cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); | |
367 | } | |
368 | #endif | |
3993c6bd | 369 | if (!cpu_has_work(cpu)) { |
6f060969 | 370 | current_cpu = NULL; |
eda48c34 PB |
371 | return EXCP_HALTED; |
372 | } | |
373 | ||
259186a7 | 374 | cpu->halted = 0; |
eda48c34 | 375 | } |
5a1e3cfc | 376 | |
9373e632 | 377 | atomic_mb_set(&tcg_current_cpu, cpu); |
79e2b9ae PB |
378 | rcu_read_lock(); |
379 | ||
aed807c8 | 380 | if (unlikely(atomic_mb_read(&exit_request))) { |
fcd7d003 | 381 | cpu->exit_request = 1; |
1a28cac3 MT |
382 | } |
383 | ||
cffe7b32 | 384 | cc->cpu_exec_enter(cpu); |
9d27abd9 | 385 | |
c2aa5f81 ST |
386 | /* Calculate difference between guest clock and host clock. |
387 | * This delay includes the delay of the last cycle, so | |
388 | * what we have to do is sleep until it is 0. As for the | |
389 | * advance/delay we gain here, we try to fix it next time. | |
390 | */ | |
391 | init_delay_params(&sc, cpu); | |
392 | ||
7d13299d | 393 | /* prepare setjmp context for exception handling */ |
3fb2ded1 | 394 | for(;;) { |
6f03bef0 | 395 | if (sigsetjmp(cpu->jmp_env, 0) == 0) { |
3fb2ded1 | 396 | /* if an exception is pending, we execute it here */ |
27103424 AF |
397 | if (cpu->exception_index >= 0) { |
398 | if (cpu->exception_index >= EXCP_INTERRUPT) { | |
3fb2ded1 | 399 | /* exit request from the cpu execution loop */ |
27103424 | 400 | ret = cpu->exception_index; |
1009d2ed | 401 | if (ret == EXCP_DEBUG) { |
ea3e9847 | 402 | cpu_handle_debug_exception(cpu); |
1009d2ed | 403 | } |
e511b4d7 | 404 | cpu->exception_index = -1; |
3fb2ded1 | 405 | break; |
72d239ed AJ |
406 | } else { |
407 | #if defined(CONFIG_USER_ONLY) | |
3fb2ded1 | 408 | /* if user mode only, we simulate a fake exception |
9f083493 | 409 | which will be handled outside the cpu execution |
3fb2ded1 | 410 | loop */ |
83479e77 | 411 | #if defined(TARGET_I386) |
97a8ea5a | 412 | cc->do_interrupt(cpu); |
83479e77 | 413 | #endif |
27103424 | 414 | ret = cpu->exception_index; |
e511b4d7 | 415 | cpu->exception_index = -1; |
3fb2ded1 | 416 | break; |
72d239ed | 417 | #else |
6f060969 PD |
418 | if (replay_exception()) { |
419 | cc->do_interrupt(cpu); | |
420 | cpu->exception_index = -1; | |
421 | } else if (!replay_has_interrupt()) { | |
422 | /* give a chance to iothread in replay mode */ | |
423 | ret = EXCP_INTERRUPT; | |
424 | break; | |
425 | } | |
83479e77 | 426 | #endif |
3fb2ded1 | 427 | } |
6f060969 PD |
428 | } else if (replay_has_exception() |
429 | && cpu->icount_decr.u16.low + cpu->icount_extra == 0) { | |
430 | /* try to cause an exception pending in the log */ | |
431 | cpu_exec_nocache(cpu, 1, tb_find_fast(cpu), true); | |
432 | ret = -1; | |
433 | break; | |
5fafdf24 | 434 | } |
9df217a3 | 435 | |
b5fc09ae | 436 | next_tb = 0; /* force lookup of first TB */ |
3fb2ded1 | 437 | for(;;) { |
259186a7 | 438 | interrupt_request = cpu->interrupt_request; |
e1638bd8 | 439 | if (unlikely(interrupt_request)) { |
ed2803da | 440 | if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { |
e1638bd8 | 441 | /* Mask out external interrupts for this step. */ |
3125f763 | 442 | interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; |
e1638bd8 | 443 | } |
6658ffb8 | 444 | if (interrupt_request & CPU_INTERRUPT_DEBUG) { |
259186a7 | 445 | cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; |
27103424 | 446 | cpu->exception_index = EXCP_DEBUG; |
5638d180 | 447 | cpu_loop_exit(cpu); |
6658ffb8 | 448 | } |
6f060969 PD |
449 | if (replay_mode == REPLAY_MODE_PLAY |
450 | && !replay_has_interrupt()) { | |
451 | /* Do nothing */ | |
452 | } else if (interrupt_request & CPU_INTERRUPT_HALT) { | |
453 | replay_interrupt(); | |
259186a7 AF |
454 | cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; |
455 | cpu->halted = 1; | |
27103424 | 456 | cpu->exception_index = EXCP_HLT; |
5638d180 | 457 | cpu_loop_exit(cpu); |
a90b7318 | 458 | } |
4a92a558 | 459 | #if defined(TARGET_I386) |
6f060969 PD |
460 | else if (interrupt_request & CPU_INTERRUPT_INIT) { |
461 | replay_interrupt(); | |
4a92a558 PB |
462 | cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0); |
463 | do_cpu_init(x86_cpu); | |
464 | cpu->exception_index = EXCP_HALTED; | |
465 | cpu_loop_exit(cpu); | |
466 | } | |
467 | #else | |
6f060969 PD |
468 | else if (interrupt_request & CPU_INTERRUPT_RESET) { |
469 | replay_interrupt(); | |
4a92a558 | 470 | cpu_reset(cpu); |
6f060969 | 471 | cpu_loop_exit(cpu); |
4a92a558 | 472 | } |
68a79315 | 473 | #endif |
9585db68 RH |
474 | /* The target hook has 3 exit conditions: |
475 | False when the interrupt isn't processed, | |
476 | True when it is, and we should restart on a new TB, | |
477 | and via longjmp via cpu_loop_exit. */ | |
6f060969 PD |
478 | else { |
479 | replay_interrupt(); | |
480 | if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { | |
481 | next_tb = 0; | |
482 | } | |
9585db68 RH |
483 | } |
484 | /* Don't use the cached interrupt_request value, | |
485 | do_interrupt may have updated the EXITTB flag. */ | |
259186a7 AF |
486 | if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) { |
487 | cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; | |
bf3e8bf1 FB |
488 | /* ensure that no TB jump will be modified as |
489 | the program flow was changed */ | |
b5fc09ae | 490 | next_tb = 0; |
bf3e8bf1 | 491 | } |
be214e6c | 492 | } |
6f060969 PD |
493 | if (unlikely(cpu->exit_request |
494 | || replay_has_interrupt())) { | |
fcd7d003 | 495 | cpu->exit_request = 0; |
27103424 | 496 | cpu->exception_index = EXCP_INTERRUPT; |
5638d180 | 497 | cpu_loop_exit(cpu); |
3fb2ded1 | 498 | } |
677ef623 | 499 | tb_lock(); |
ea3e9847 | 500 | tb = tb_find_fast(cpu); |
d5975363 PB |
501 | /* Note: we do it here to avoid a gcc bug on Mac OS X when |
502 | doing it in tb_find_slow */ | |
5e5f07e0 | 503 | if (tcg_ctx.tb_ctx.tb_invalidated_flag) { |
d5975363 PB |
504 | /* as some TB could have been invalidated because |
505 | of memory exceptions while generating the code, we | |
506 | must recompute the hash index here */ | |
507 | next_tb = 0; | |
5e5f07e0 | 508 | tcg_ctx.tb_ctx.tb_invalidated_flag = 0; |
d5975363 | 509 | } |
8a40a180 FB |
510 | /* see if we can patch the calling TB. When the TB |
511 | spans two pages, we cannot safely do a direct | |
512 | jump. */ | |
89a82cd4 RH |
513 | if (next_tb != 0 && tb->page_addr[1] == -1 |
514 | && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { | |
0980011b PM |
515 | tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK), |
516 | next_tb & TB_EXIT_MASK, tb); | |
3fb2ded1 | 517 | } |
677ef623 | 518 | tb_unlock(); |
fcd7d003 | 519 | if (likely(!cpu->exit_request)) { |
6db8b538 | 520 | trace_exec_tb(tb, tb->pc); |
e965fc38 | 521 | /* execute the generated code */ |
b0a46fa7 | 522 | cpu->current_tb = tb; |
1a830635 | 523 | next_tb = cpu_tb_exec(cpu, tb); |
b0a46fa7 | 524 | cpu->current_tb = NULL; |
378df4b2 PM |
525 | switch (next_tb & TB_EXIT_MASK) { |
526 | case TB_EXIT_REQUESTED: | |
527 | /* Something asked us to stop executing | |
528 | * chained TBs; just continue round the main | |
529 | * loop. Whatever requested the exit will also | |
530 | * have set something else (eg exit_request or | |
531 | * interrupt_request) which we will handle | |
ab096a75 PB |
532 | * next time around the loop. But we need to |
533 | * ensure the tcg_exit_req read in generated code | |
534 | * comes before the next read of cpu->exit_request | |
535 | * or cpu->interrupt_request. | |
378df4b2 | 536 | */ |
ab096a75 | 537 | smp_rmb(); |
378df4b2 PM |
538 | next_tb = 0; |
539 | break; | |
540 | case TB_EXIT_ICOUNT_EXPIRED: | |
541 | { | |
bf20dc07 | 542 | /* Instruction counter expired. */ |
52851b7e | 543 | int insns_left = cpu->icount_decr.u32; |
efee7340 | 544 | if (cpu->icount_extra && insns_left >= 0) { |
2e70f6ef | 545 | /* Refill decrementer and continue execution. */ |
efee7340 | 546 | cpu->icount_extra += insns_left; |
52851b7e | 547 | insns_left = MIN(0xffff, cpu->icount_extra); |
efee7340 | 548 | cpu->icount_extra -= insns_left; |
28ecfd7a | 549 | cpu->icount_decr.u16.low = insns_left; |
2e70f6ef PB |
550 | } else { |
551 | if (insns_left > 0) { | |
552 | /* Execute remaining instructions. */ | |
52851b7e | 553 | tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); |
56c0269a | 554 | cpu_exec_nocache(cpu, insns_left, tb, false); |
c2aa5f81 | 555 | align_clocks(&sc, cpu); |
2e70f6ef | 556 | } |
27103424 | 557 | cpu->exception_index = EXCP_INTERRUPT; |
2e70f6ef | 558 | next_tb = 0; |
5638d180 | 559 | cpu_loop_exit(cpu); |
2e70f6ef | 560 | } |
378df4b2 PM |
561 | break; |
562 | } | |
563 | default: | |
564 | break; | |
2e70f6ef PB |
565 | } |
566 | } | |
c2aa5f81 ST |
567 | /* Try to align the host and virtual clocks |
568 | if the guest is in advance */ | |
569 | align_clocks(&sc, cpu); | |
4cbf74b6 FB |
570 | /* reset soft MMU for next block (it can currently |
571 | only be set by a memory fault) */ | |
50a518e3 | 572 | } /* for(;;) */ |
0d101938 | 573 | } else { |
0448f5f8 SW |
574 | #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6) |
575 | /* Some compilers wrongly smash all local variables after | |
576 | * siglongjmp. There were bug reports for gcc 4.5.0 and clang. | |
577 | * Reload essential local variables here for those compilers. | |
578 | * Newer versions of gcc would complain about this code (-Wclobbered). */ | |
4917cf44 | 579 | cpu = current_cpu; |
6c78f29a | 580 | cc = CPU_GET_CLASS(cpu); |
693fa551 AF |
581 | #ifdef TARGET_I386 |
582 | x86_cpu = X86_CPU(cpu); | |
ea3e9847 | 583 | env = &x86_cpu->env; |
6c78f29a | 584 | #endif |
0448f5f8 SW |
585 | #else /* buggy compiler */ |
586 | /* Assert that the compiler does not smash local variables. */ | |
587 | g_assert(cpu == current_cpu); | |
588 | g_assert(cc == CPU_GET_CLASS(cpu)); | |
589 | #ifdef TARGET_I386 | |
590 | g_assert(x86_cpu == X86_CPU(cpu)); | |
591 | g_assert(env == &x86_cpu->env); | |
592 | #endif | |
593 | #endif /* buggy compiler */ | |
594 | cpu->can_do_io = 1; | |
677ef623 | 595 | tb_lock_reset(); |
7d13299d | 596 | } |
3fb2ded1 FB |
597 | } /* for(;;) */ |
598 | ||
cffe7b32 | 599 | cc->cpu_exec_exit(cpu); |
79e2b9ae | 600 | rcu_read_unlock(); |
1057eaa7 | 601 | |
4917cf44 AF |
602 | /* fail safe : never use current_cpu outside cpu_exec() */ |
603 | current_cpu = NULL; | |
9373e632 PB |
604 | |
605 | /* Does not need atomic_mb_set because a spurious wakeup is okay. */ | |
606 | atomic_set(&tcg_current_cpu, NULL); | |
7d13299d FB |
607 | return ret; |
608 | } |