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Commit | Line | Data |
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7d13299d | 1 | /* |
e965fc38 | 2 | * emulator main execution loop |
5fafdf24 | 3 | * |
66321a11 | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
7d13299d | 5 | * |
3ef693a0 FB |
6 | * This library is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
7d13299d | 10 | * |
3ef693a0 FB |
11 | * This library is distributed in the hope that it will be useful, |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
7d13299d | 15 | * |
3ef693a0 | 16 | * You should have received a copy of the GNU Lesser General Public |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
7d13299d | 18 | */ |
e4533c7a | 19 | #include "config.h" |
cea5f9a2 | 20 | #include "cpu.h" |
6db8b538 | 21 | #include "trace.h" |
76cad711 | 22 | #include "disas/disas.h" |
7cb69cae | 23 | #include "tcg.h" |
1de7afc9 | 24 | #include "qemu/atomic.h" |
9c17d615 | 25 | #include "sysemu/qtest.h" |
c2aa5f81 | 26 | #include "qemu/timer.h" |
9d82b5a7 PB |
27 | #include "exec/address-spaces.h" |
28 | #include "exec/memory-internal.h" | |
79e2b9ae | 29 | #include "qemu/rcu.h" |
e1b89321 | 30 | #include "exec/tb-hash.h" |
c2aa5f81 ST |
31 | |
32 | /* -icount align implementation. */ | |
33 | ||
34 | typedef struct SyncClocks { | |
35 | int64_t diff_clk; | |
36 | int64_t last_cpu_icount; | |
7f7bc144 | 37 | int64_t realtime_clock; |
c2aa5f81 ST |
38 | } SyncClocks; |
39 | ||
40 | #if !defined(CONFIG_USER_ONLY) | |
41 | /* Allow the guest to have a max 3ms advance. | |
42 | * The difference between the 2 clocks could therefore | |
43 | * oscillate around 0. | |
44 | */ | |
45 | #define VM_CLOCK_ADVANCE 3000000 | |
7f7bc144 ST |
46 | #define THRESHOLD_REDUCE 1.5 |
47 | #define MAX_DELAY_PRINT_RATE 2000000000LL | |
48 | #define MAX_NB_PRINTS 100 | |
c2aa5f81 ST |
49 | |
50 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
51 | { | |
52 | int64_t cpu_icount; | |
53 | ||
54 | if (!icount_align_option) { | |
55 | return; | |
56 | } | |
57 | ||
58 | cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; | |
59 | sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount); | |
60 | sc->last_cpu_icount = cpu_icount; | |
61 | ||
62 | if (sc->diff_clk > VM_CLOCK_ADVANCE) { | |
63 | #ifndef _WIN32 | |
64 | struct timespec sleep_delay, rem_delay; | |
65 | sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; | |
66 | sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; | |
67 | if (nanosleep(&sleep_delay, &rem_delay) < 0) { | |
a498d0ef | 68 | sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec; |
c2aa5f81 ST |
69 | } else { |
70 | sc->diff_clk = 0; | |
71 | } | |
72 | #else | |
73 | Sleep(sc->diff_clk / SCALE_MS); | |
74 | sc->diff_clk = 0; | |
75 | #endif | |
76 | } | |
77 | } | |
78 | ||
7f7bc144 ST |
79 | static void print_delay(const SyncClocks *sc) |
80 | { | |
81 | static float threshold_delay; | |
82 | static int64_t last_realtime_clock; | |
83 | static int nb_prints; | |
84 | ||
85 | if (icount_align_option && | |
86 | sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && | |
87 | nb_prints < MAX_NB_PRINTS) { | |
88 | if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || | |
89 | (-sc->diff_clk / (float)1000000000LL < | |
90 | (threshold_delay - THRESHOLD_REDUCE))) { | |
91 | threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; | |
92 | printf("Warning: The guest is now late by %.1f to %.1f seconds\n", | |
93 | threshold_delay - 1, | |
94 | threshold_delay); | |
95 | nb_prints++; | |
96 | last_realtime_clock = sc->realtime_clock; | |
97 | } | |
98 | } | |
99 | } | |
100 | ||
c2aa5f81 ST |
101 | static void init_delay_params(SyncClocks *sc, |
102 | const CPUState *cpu) | |
103 | { | |
104 | if (!icount_align_option) { | |
105 | return; | |
106 | } | |
2e91cc62 PB |
107 | sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); |
108 | sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock; | |
c2aa5f81 | 109 | sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; |
27498bef ST |
110 | if (sc->diff_clk < max_delay) { |
111 | max_delay = sc->diff_clk; | |
112 | } | |
113 | if (sc->diff_clk > max_advance) { | |
114 | max_advance = sc->diff_clk; | |
115 | } | |
7f7bc144 ST |
116 | |
117 | /* Print every 2s max if the guest is late. We limit the number | |
118 | of printed messages to NB_PRINT_MAX(currently 100) */ | |
119 | print_delay(sc); | |
c2aa5f81 ST |
120 | } |
121 | #else | |
122 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
123 | { | |
124 | } | |
125 | ||
126 | static void init_delay_params(SyncClocks *sc, const CPUState *cpu) | |
127 | { | |
128 | } | |
129 | #endif /* CONFIG USER ONLY */ | |
7d13299d | 130 | |
5638d180 | 131 | void cpu_loop_exit(CPUState *cpu) |
e4533c7a | 132 | { |
d77953b9 | 133 | cpu->current_tb = NULL; |
6f03bef0 | 134 | siglongjmp(cpu->jmp_env, 1); |
e4533c7a | 135 | } |
bfed01fc | 136 | |
fbf9eeb3 FB |
137 | /* exit the current TB from a signal handler. The host registers are |
138 | restored in a state compatible with the CPU emulator | |
139 | */ | |
9eff14f3 | 140 | #if defined(CONFIG_SOFTMMU) |
0ea8cb88 | 141 | void cpu_resume_from_signal(CPUState *cpu, void *puc) |
9eff14f3 | 142 | { |
9eff14f3 BS |
143 | /* XXX: restore cpu registers saved in host registers */ |
144 | ||
27103424 | 145 | cpu->exception_index = -1; |
6f03bef0 | 146 | siglongjmp(cpu->jmp_env, 1); |
9eff14f3 | 147 | } |
76e5c76f PB |
148 | |
149 | void cpu_reload_memory_map(CPUState *cpu) | |
150 | { | |
79e2b9ae PB |
151 | AddressSpaceDispatch *d; |
152 | ||
153 | if (qemu_in_vcpu_thread()) { | |
154 | /* Do not let the guest prolong the critical section as much as it | |
155 | * as it desires. | |
156 | * | |
157 | * Currently, this is prevented by the I/O thread's periodinc kicking | |
158 | * of the VCPU thread (iothread_requesting_mutex, qemu_cpu_kick_thread) | |
159 | * but this will go away once TCG's execution moves out of the global | |
160 | * mutex. | |
161 | * | |
162 | * This pair matches cpu_exec's rcu_read_lock()/rcu_read_unlock(), which | |
163 | * only protects cpu->as->dispatch. Since we reload it below, we can | |
164 | * split the critical section. | |
165 | */ | |
166 | rcu_read_unlock(); | |
167 | rcu_read_lock(); | |
168 | } | |
169 | ||
9d82b5a7 | 170 | /* The CPU and TLB are protected by the iothread lock. */ |
79e2b9ae | 171 | d = atomic_rcu_read(&cpu->as->dispatch); |
9d82b5a7 | 172 | cpu->memory_dispatch = d; |
76e5c76f PB |
173 | tlb_flush(cpu, 1); |
174 | } | |
9eff14f3 | 175 | #endif |
fbf9eeb3 | 176 | |
77211379 PM |
177 | /* Execute a TB, and fix up the CPU state afterwards if necessary */ |
178 | static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr) | |
179 | { | |
180 | CPUArchState *env = cpu->env_ptr; | |
03afa5f8 RH |
181 | uintptr_t next_tb; |
182 | ||
183 | #if defined(DEBUG_DISAS) | |
184 | if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) { | |
185 | #if defined(TARGET_I386) | |
186 | log_cpu_state(cpu, CPU_DUMP_CCOP); | |
187 | #elif defined(TARGET_M68K) | |
188 | /* ??? Should not modify env state for dumping. */ | |
189 | cpu_m68k_flush_flags(env, env->cc_op); | |
190 | env->cc_op = CC_OP_FLAGS; | |
191 | env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4); | |
192 | log_cpu_state(cpu, 0); | |
193 | #else | |
194 | log_cpu_state(cpu, 0); | |
195 | #endif | |
196 | } | |
197 | #endif /* DEBUG_DISAS */ | |
198 | ||
626cf8f4 | 199 | cpu->can_do_io = 0; |
03afa5f8 | 200 | next_tb = tcg_qemu_tb_exec(env, tb_ptr); |
626cf8f4 | 201 | cpu->can_do_io = 1; |
6db8b538 AB |
202 | trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK), |
203 | next_tb & TB_EXIT_MASK); | |
204 | ||
77211379 PM |
205 | if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) { |
206 | /* We didn't start executing this TB (eg because the instruction | |
207 | * counter hit zero); we must restore the guest PC to the address | |
208 | * of the start of the TB. | |
209 | */ | |
bdf7ae5b | 210 | CPUClass *cc = CPU_GET_CLASS(cpu); |
77211379 | 211 | TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); |
bdf7ae5b AF |
212 | if (cc->synchronize_from_tb) { |
213 | cc->synchronize_from_tb(cpu, tb); | |
214 | } else { | |
215 | assert(cc->set_pc); | |
216 | cc->set_pc(cpu, tb->pc); | |
217 | } | |
77211379 | 218 | } |
378df4b2 PM |
219 | if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) { |
220 | /* We were asked to stop executing TBs (probably a pending | |
221 | * interrupt. We've now stopped, so clear the flag. | |
222 | */ | |
223 | cpu->tcg_exit_req = 0; | |
224 | } | |
77211379 PM |
225 | return next_tb; |
226 | } | |
227 | ||
2e70f6ef PB |
228 | /* Execute the code without caching the generated code. An interpreter |
229 | could be used if available. */ | |
9349b4f9 | 230 | static void cpu_exec_nocache(CPUArchState *env, int max_cycles, |
cea5f9a2 | 231 | TranslationBlock *orig_tb) |
2e70f6ef | 232 | { |
d77953b9 | 233 | CPUState *cpu = ENV_GET_CPU(env); |
2e70f6ef | 234 | TranslationBlock *tb; |
b4ac20b4 PD |
235 | target_ulong pc = orig_tb->pc; |
236 | target_ulong cs_base = orig_tb->cs_base; | |
237 | uint64_t flags = orig_tb->flags; | |
2e70f6ef PB |
238 | |
239 | /* Should never happen. | |
240 | We only end up here when an existing TB is too long. */ | |
241 | if (max_cycles > CF_COUNT_MASK) | |
242 | max_cycles = CF_COUNT_MASK; | |
243 | ||
b4ac20b4 PD |
244 | /* tb_gen_code can flush our orig_tb, invalidate it now */ |
245 | tb_phys_invalidate(orig_tb, -1); | |
246 | tb = tb_gen_code(cpu, pc, cs_base, flags, | |
d8a499f1 | 247 | max_cycles | CF_NOCACHE); |
d77953b9 | 248 | cpu->current_tb = tb; |
2e70f6ef | 249 | /* execute the generated code */ |
6db8b538 | 250 | trace_exec_tb_nocache(tb, tb->pc); |
77211379 | 251 | cpu_tb_exec(cpu, tb->tc_ptr); |
d77953b9 | 252 | cpu->current_tb = NULL; |
2e70f6ef PB |
253 | tb_phys_invalidate(tb, -1); |
254 | tb_free(tb); | |
255 | } | |
256 | ||
9349b4f9 | 257 | static TranslationBlock *tb_find_slow(CPUArchState *env, |
cea5f9a2 | 258 | target_ulong pc, |
8a40a180 | 259 | target_ulong cs_base, |
c068688b | 260 | uint64_t flags) |
8a40a180 | 261 | { |
8cd70437 | 262 | CPUState *cpu = ENV_GET_CPU(env); |
8a40a180 | 263 | TranslationBlock *tb, **ptb1; |
8a40a180 | 264 | unsigned int h; |
337fc758 | 265 | tb_page_addr_t phys_pc, phys_page1; |
41c1b1c9 | 266 | target_ulong virt_page2; |
3b46e624 | 267 | |
5e5f07e0 | 268 | tcg_ctx.tb_ctx.tb_invalidated_flag = 0; |
3b46e624 | 269 | |
8a40a180 | 270 | /* find translated block using physical mappings */ |
41c1b1c9 | 271 | phys_pc = get_page_addr_code(env, pc); |
8a40a180 | 272 | phys_page1 = phys_pc & TARGET_PAGE_MASK; |
8a40a180 | 273 | h = tb_phys_hash_func(phys_pc); |
5e5f07e0 | 274 | ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h]; |
8a40a180 FB |
275 | for(;;) { |
276 | tb = *ptb1; | |
277 | if (!tb) | |
278 | goto not_found; | |
5fafdf24 | 279 | if (tb->pc == pc && |
8a40a180 | 280 | tb->page_addr[0] == phys_page1 && |
5fafdf24 | 281 | tb->cs_base == cs_base && |
8a40a180 FB |
282 | tb->flags == flags) { |
283 | /* check next page if needed */ | |
284 | if (tb->page_addr[1] != -1) { | |
337fc758 BS |
285 | tb_page_addr_t phys_page2; |
286 | ||
5fafdf24 | 287 | virt_page2 = (pc & TARGET_PAGE_MASK) + |
8a40a180 | 288 | TARGET_PAGE_SIZE; |
41c1b1c9 | 289 | phys_page2 = get_page_addr_code(env, virt_page2); |
8a40a180 FB |
290 | if (tb->page_addr[1] == phys_page2) |
291 | goto found; | |
292 | } else { | |
293 | goto found; | |
294 | } | |
295 | } | |
296 | ptb1 = &tb->phys_hash_next; | |
297 | } | |
298 | not_found: | |
2e70f6ef | 299 | /* if no translated code available, then translate it now */ |
648f034c | 300 | tb = tb_gen_code(cpu, pc, cs_base, flags, 0); |
3b46e624 | 301 | |
8a40a180 | 302 | found: |
2c90fe2b KB |
303 | /* Move the last found TB to the head of the list */ |
304 | if (likely(*ptb1)) { | |
305 | *ptb1 = tb->phys_hash_next; | |
5e5f07e0 EV |
306 | tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h]; |
307 | tcg_ctx.tb_ctx.tb_phys_hash[h] = tb; | |
2c90fe2b | 308 | } |
8a40a180 | 309 | /* we add the TB in the virtual pc hash table */ |
8cd70437 | 310 | cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb; |
8a40a180 FB |
311 | return tb; |
312 | } | |
313 | ||
9349b4f9 | 314 | static inline TranslationBlock *tb_find_fast(CPUArchState *env) |
8a40a180 | 315 | { |
8cd70437 | 316 | CPUState *cpu = ENV_GET_CPU(env); |
8a40a180 FB |
317 | TranslationBlock *tb; |
318 | target_ulong cs_base, pc; | |
6b917547 | 319 | int flags; |
8a40a180 FB |
320 | |
321 | /* we record a subset of the CPU state. It will | |
322 | always be the same before a given translated block | |
323 | is executed. */ | |
6b917547 | 324 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); |
8cd70437 | 325 | tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]; |
551bd27f TS |
326 | if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base || |
327 | tb->flags != flags)) { | |
cea5f9a2 | 328 | tb = tb_find_slow(env, pc, cs_base, flags); |
8a40a180 FB |
329 | } |
330 | return tb; | |
331 | } | |
332 | ||
9349b4f9 | 333 | static void cpu_handle_debug_exception(CPUArchState *env) |
1009d2ed | 334 | { |
ff4700b0 | 335 | CPUState *cpu = ENV_GET_CPU(env); |
86025ee4 | 336 | CPUClass *cc = CPU_GET_CLASS(cpu); |
1009d2ed JK |
337 | CPUWatchpoint *wp; |
338 | ||
ff4700b0 AF |
339 | if (!cpu->watchpoint_hit) { |
340 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { | |
1009d2ed JK |
341 | wp->flags &= ~BP_WATCHPOINT_HIT; |
342 | } | |
343 | } | |
86025ee4 PM |
344 | |
345 | cc->debug_excp_handler(cpu); | |
1009d2ed JK |
346 | } |
347 | ||
7d13299d FB |
348 | /* main execution loop */ |
349 | ||
1a28cac3 MT |
350 | volatile sig_atomic_t exit_request; |
351 | ||
9349b4f9 | 352 | int cpu_exec(CPUArchState *env) |
7d13299d | 353 | { |
c356a1bc | 354 | CPUState *cpu = ENV_GET_CPU(env); |
97a8ea5a | 355 | CPUClass *cc = CPU_GET_CLASS(cpu); |
693fa551 AF |
356 | #ifdef TARGET_I386 |
357 | X86CPU *x86_cpu = X86_CPU(cpu); | |
97a8ea5a | 358 | #endif |
8a40a180 | 359 | int ret, interrupt_request; |
8a40a180 | 360 | TranslationBlock *tb; |
c27004ec | 361 | uint8_t *tc_ptr; |
3e9bd63a | 362 | uintptr_t next_tb; |
c2aa5f81 ST |
363 | SyncClocks sc; |
364 | ||
bae2c270 PM |
365 | /* This must be volatile so it is not trashed by longjmp() */ |
366 | volatile bool have_tb_lock = false; | |
8c6939c0 | 367 | |
259186a7 | 368 | if (cpu->halted) { |
3993c6bd | 369 | if (!cpu_has_work(cpu)) { |
eda48c34 PB |
370 | return EXCP_HALTED; |
371 | } | |
372 | ||
259186a7 | 373 | cpu->halted = 0; |
eda48c34 | 374 | } |
5a1e3cfc | 375 | |
4917cf44 | 376 | current_cpu = cpu; |
e4533c7a | 377 | |
4917cf44 | 378 | /* As long as current_cpu is null, up to the assignment just above, |
ec9bd89f OH |
379 | * requests by other threads to exit the execution loop are expected to |
380 | * be issued using the exit_request global. We must make sure that our | |
4917cf44 | 381 | * evaluation of the global value is performed past the current_cpu |
ec9bd89f OH |
382 | * value transition point, which requires a memory barrier as well as |
383 | * an instruction scheduling constraint on modern architectures. */ | |
384 | smp_mb(); | |
385 | ||
79e2b9ae PB |
386 | rcu_read_lock(); |
387 | ||
c629a4bc | 388 | if (unlikely(exit_request)) { |
fcd7d003 | 389 | cpu->exit_request = 1; |
1a28cac3 MT |
390 | } |
391 | ||
cffe7b32 | 392 | cc->cpu_exec_enter(cpu); |
9d27abd9 | 393 | |
c2aa5f81 ST |
394 | /* Calculate difference between guest clock and host clock. |
395 | * This delay includes the delay of the last cycle, so | |
396 | * what we have to do is sleep until it is 0. As for the | |
397 | * advance/delay we gain here, we try to fix it next time. | |
398 | */ | |
399 | init_delay_params(&sc, cpu); | |
400 | ||
7d13299d | 401 | /* prepare setjmp context for exception handling */ |
3fb2ded1 | 402 | for(;;) { |
6f03bef0 | 403 | if (sigsetjmp(cpu->jmp_env, 0) == 0) { |
3fb2ded1 | 404 | /* if an exception is pending, we execute it here */ |
27103424 AF |
405 | if (cpu->exception_index >= 0) { |
406 | if (cpu->exception_index >= EXCP_INTERRUPT) { | |
3fb2ded1 | 407 | /* exit request from the cpu execution loop */ |
27103424 | 408 | ret = cpu->exception_index; |
1009d2ed JK |
409 | if (ret == EXCP_DEBUG) { |
410 | cpu_handle_debug_exception(env); | |
411 | } | |
e511b4d7 | 412 | cpu->exception_index = -1; |
3fb2ded1 | 413 | break; |
72d239ed AJ |
414 | } else { |
415 | #if defined(CONFIG_USER_ONLY) | |
3fb2ded1 | 416 | /* if user mode only, we simulate a fake exception |
9f083493 | 417 | which will be handled outside the cpu execution |
3fb2ded1 | 418 | loop */ |
83479e77 | 419 | #if defined(TARGET_I386) |
97a8ea5a | 420 | cc->do_interrupt(cpu); |
83479e77 | 421 | #endif |
27103424 | 422 | ret = cpu->exception_index; |
e511b4d7 | 423 | cpu->exception_index = -1; |
3fb2ded1 | 424 | break; |
72d239ed | 425 | #else |
97a8ea5a | 426 | cc->do_interrupt(cpu); |
27103424 | 427 | cpu->exception_index = -1; |
83479e77 | 428 | #endif |
3fb2ded1 | 429 | } |
5fafdf24 | 430 | } |
9df217a3 | 431 | |
b5fc09ae | 432 | next_tb = 0; /* force lookup of first TB */ |
3fb2ded1 | 433 | for(;;) { |
259186a7 | 434 | interrupt_request = cpu->interrupt_request; |
e1638bd8 | 435 | if (unlikely(interrupt_request)) { |
ed2803da | 436 | if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { |
e1638bd8 | 437 | /* Mask out external interrupts for this step. */ |
3125f763 | 438 | interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; |
e1638bd8 | 439 | } |
6658ffb8 | 440 | if (interrupt_request & CPU_INTERRUPT_DEBUG) { |
259186a7 | 441 | cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; |
27103424 | 442 | cpu->exception_index = EXCP_DEBUG; |
5638d180 | 443 | cpu_loop_exit(cpu); |
6658ffb8 | 444 | } |
a90b7318 | 445 | if (interrupt_request & CPU_INTERRUPT_HALT) { |
259186a7 AF |
446 | cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; |
447 | cpu->halted = 1; | |
27103424 | 448 | cpu->exception_index = EXCP_HLT; |
5638d180 | 449 | cpu_loop_exit(cpu); |
a90b7318 | 450 | } |
4a92a558 PB |
451 | #if defined(TARGET_I386) |
452 | if (interrupt_request & CPU_INTERRUPT_INIT) { | |
453 | cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0); | |
454 | do_cpu_init(x86_cpu); | |
455 | cpu->exception_index = EXCP_HALTED; | |
456 | cpu_loop_exit(cpu); | |
457 | } | |
458 | #else | |
459 | if (interrupt_request & CPU_INTERRUPT_RESET) { | |
460 | cpu_reset(cpu); | |
461 | } | |
68a79315 | 462 | #endif |
9585db68 RH |
463 | /* The target hook has 3 exit conditions: |
464 | False when the interrupt isn't processed, | |
465 | True when it is, and we should restart on a new TB, | |
466 | and via longjmp via cpu_loop_exit. */ | |
467 | if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { | |
468 | next_tb = 0; | |
469 | } | |
470 | /* Don't use the cached interrupt_request value, | |
471 | do_interrupt may have updated the EXITTB flag. */ | |
259186a7 AF |
472 | if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) { |
473 | cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; | |
bf3e8bf1 FB |
474 | /* ensure that no TB jump will be modified as |
475 | the program flow was changed */ | |
b5fc09ae | 476 | next_tb = 0; |
bf3e8bf1 | 477 | } |
be214e6c | 478 | } |
fcd7d003 AF |
479 | if (unlikely(cpu->exit_request)) { |
480 | cpu->exit_request = 0; | |
27103424 | 481 | cpu->exception_index = EXCP_INTERRUPT; |
5638d180 | 482 | cpu_loop_exit(cpu); |
3fb2ded1 | 483 | } |
5e5f07e0 | 484 | spin_lock(&tcg_ctx.tb_ctx.tb_lock); |
bae2c270 | 485 | have_tb_lock = true; |
cea5f9a2 | 486 | tb = tb_find_fast(env); |
d5975363 PB |
487 | /* Note: we do it here to avoid a gcc bug on Mac OS X when |
488 | doing it in tb_find_slow */ | |
5e5f07e0 | 489 | if (tcg_ctx.tb_ctx.tb_invalidated_flag) { |
d5975363 PB |
490 | /* as some TB could have been invalidated because |
491 | of memory exceptions while generating the code, we | |
492 | must recompute the hash index here */ | |
493 | next_tb = 0; | |
5e5f07e0 | 494 | tcg_ctx.tb_ctx.tb_invalidated_flag = 0; |
d5975363 | 495 | } |
c30d1aea PM |
496 | if (qemu_loglevel_mask(CPU_LOG_EXEC)) { |
497 | qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n", | |
498 | tb->tc_ptr, tb->pc, lookup_symbol(tb->pc)); | |
499 | } | |
8a40a180 FB |
500 | /* see if we can patch the calling TB. When the TB |
501 | spans two pages, we cannot safely do a direct | |
502 | jump. */ | |
040f2fb2 | 503 | if (next_tb != 0 && tb->page_addr[1] == -1) { |
0980011b PM |
504 | tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK), |
505 | next_tb & TB_EXIT_MASK, tb); | |
3fb2ded1 | 506 | } |
bae2c270 | 507 | have_tb_lock = false; |
5e5f07e0 | 508 | spin_unlock(&tcg_ctx.tb_ctx.tb_lock); |
55e8b85e | 509 | |
510 | /* cpu_interrupt might be called while translating the | |
511 | TB, but before it is linked into a potentially | |
512 | infinite loop and becomes env->current_tb. Avoid | |
513 | starting execution if there is a pending interrupt. */ | |
d77953b9 | 514 | cpu->current_tb = tb; |
b0052d15 | 515 | barrier(); |
fcd7d003 | 516 | if (likely(!cpu->exit_request)) { |
6db8b538 | 517 | trace_exec_tb(tb, tb->pc); |
2e70f6ef | 518 | tc_ptr = tb->tc_ptr; |
e965fc38 | 519 | /* execute the generated code */ |
77211379 | 520 | next_tb = cpu_tb_exec(cpu, tc_ptr); |
378df4b2 PM |
521 | switch (next_tb & TB_EXIT_MASK) { |
522 | case TB_EXIT_REQUESTED: | |
523 | /* Something asked us to stop executing | |
524 | * chained TBs; just continue round the main | |
525 | * loop. Whatever requested the exit will also | |
526 | * have set something else (eg exit_request or | |
527 | * interrupt_request) which we will handle | |
528 | * next time around the loop. | |
529 | */ | |
378df4b2 PM |
530 | next_tb = 0; |
531 | break; | |
532 | case TB_EXIT_ICOUNT_EXPIRED: | |
533 | { | |
bf20dc07 | 534 | /* Instruction counter expired. */ |
52851b7e | 535 | int insns_left = cpu->icount_decr.u32; |
efee7340 | 536 | if (cpu->icount_extra && insns_left >= 0) { |
2e70f6ef | 537 | /* Refill decrementer and continue execution. */ |
efee7340 | 538 | cpu->icount_extra += insns_left; |
52851b7e | 539 | insns_left = MIN(0xffff, cpu->icount_extra); |
efee7340 | 540 | cpu->icount_extra -= insns_left; |
28ecfd7a | 541 | cpu->icount_decr.u16.low = insns_left; |
2e70f6ef PB |
542 | } else { |
543 | if (insns_left > 0) { | |
544 | /* Execute remaining instructions. */ | |
52851b7e | 545 | tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); |
cea5f9a2 | 546 | cpu_exec_nocache(env, insns_left, tb); |
c2aa5f81 | 547 | align_clocks(&sc, cpu); |
2e70f6ef | 548 | } |
27103424 | 549 | cpu->exception_index = EXCP_INTERRUPT; |
2e70f6ef | 550 | next_tb = 0; |
5638d180 | 551 | cpu_loop_exit(cpu); |
2e70f6ef | 552 | } |
378df4b2 PM |
553 | break; |
554 | } | |
555 | default: | |
556 | break; | |
2e70f6ef PB |
557 | } |
558 | } | |
d77953b9 | 559 | cpu->current_tb = NULL; |
c2aa5f81 ST |
560 | /* Try to align the host and virtual clocks |
561 | if the guest is in advance */ | |
562 | align_clocks(&sc, cpu); | |
4cbf74b6 FB |
563 | /* reset soft MMU for next block (it can currently |
564 | only be set by a memory fault) */ | |
50a518e3 | 565 | } /* for(;;) */ |
0d101938 JK |
566 | } else { |
567 | /* Reload env after longjmp - the compiler may have smashed all | |
568 | * local variables as longjmp is marked 'noreturn'. */ | |
4917cf44 AF |
569 | cpu = current_cpu; |
570 | env = cpu->env_ptr; | |
6c78f29a | 571 | cc = CPU_GET_CLASS(cpu); |
626cf8f4 | 572 | cpu->can_do_io = 1; |
693fa551 AF |
573 | #ifdef TARGET_I386 |
574 | x86_cpu = X86_CPU(cpu); | |
6c78f29a | 575 | #endif |
bae2c270 PM |
576 | if (have_tb_lock) { |
577 | spin_unlock(&tcg_ctx.tb_ctx.tb_lock); | |
578 | have_tb_lock = false; | |
579 | } | |
7d13299d | 580 | } |
3fb2ded1 FB |
581 | } /* for(;;) */ |
582 | ||
cffe7b32 | 583 | cc->cpu_exec_exit(cpu); |
79e2b9ae | 584 | rcu_read_unlock(); |
1057eaa7 | 585 | |
4917cf44 AF |
586 | /* fail safe : never use current_cpu outside cpu_exec() */ |
587 | current_cpu = NULL; | |
7d13299d FB |
588 | return ret; |
589 | } |