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Commit | Line | Data |
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296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
26 | #include "config-host.h" | |
27 | ||
83c9089e | 28 | #include "monitor/monitor.h" |
a4e15de9 | 29 | #include "qapi/qmp/qerror.h" |
d49b6836 | 30 | #include "qemu/error-report.h" |
9c17d615 | 31 | #include "sysemu/sysemu.h" |
022c62cb | 32 | #include "exec/gdbstub.h" |
9c17d615 PB |
33 | #include "sysemu/dma.h" |
34 | #include "sysemu/kvm.h" | |
de0b36b6 | 35 | #include "qmp-commands.h" |
296af7c9 | 36 | |
1de7afc9 | 37 | #include "qemu/thread.h" |
9c17d615 PB |
38 | #include "sysemu/cpus.h" |
39 | #include "sysemu/qtest.h" | |
1de7afc9 PB |
40 | #include "qemu/main-loop.h" |
41 | #include "qemu/bitmap.h" | |
cb365646 | 42 | #include "qemu/seqlock.h" |
a4e15de9 | 43 | #include "qapi-event.h" |
9cb805fd | 44 | #include "hw/nmi.h" |
0ff0fc19 JK |
45 | |
46 | #ifndef _WIN32 | |
1de7afc9 | 47 | #include "qemu/compatfd.h" |
0ff0fc19 | 48 | #endif |
296af7c9 | 49 | |
6d9cb73c JK |
50 | #ifdef CONFIG_LINUX |
51 | ||
52 | #include <sys/prctl.h> | |
53 | ||
c0532a76 MT |
54 | #ifndef PR_MCE_KILL |
55 | #define PR_MCE_KILL 33 | |
56 | #endif | |
57 | ||
6d9cb73c JK |
58 | #ifndef PR_MCE_KILL_SET |
59 | #define PR_MCE_KILL_SET 1 | |
60 | #endif | |
61 | ||
62 | #ifndef PR_MCE_KILL_EARLY | |
63 | #define PR_MCE_KILL_EARLY 1 | |
64 | #endif | |
65 | ||
66 | #endif /* CONFIG_LINUX */ | |
67 | ||
182735ef | 68 | static CPUState *next_cpu; |
27498bef ST |
69 | int64_t max_delay; |
70 | int64_t max_advance; | |
296af7c9 | 71 | |
321bc0b2 TC |
72 | bool cpu_is_stopped(CPUState *cpu) |
73 | { | |
74 | return cpu->stopped || !runstate_is_running(); | |
75 | } | |
76 | ||
a98ae1d8 | 77 | static bool cpu_thread_is_idle(CPUState *cpu) |
ac873f1e | 78 | { |
c64ca814 | 79 | if (cpu->stop || cpu->queued_work_first) { |
ac873f1e PM |
80 | return false; |
81 | } | |
321bc0b2 | 82 | if (cpu_is_stopped(cpu)) { |
ac873f1e PM |
83 | return true; |
84 | } | |
8c2e1b00 | 85 | if (!cpu->halted || cpu_has_work(cpu) || |
215e79c0 | 86 | kvm_halt_in_kernel()) { |
ac873f1e PM |
87 | return false; |
88 | } | |
89 | return true; | |
90 | } | |
91 | ||
92 | static bool all_cpu_threads_idle(void) | |
93 | { | |
182735ef | 94 | CPUState *cpu; |
ac873f1e | 95 | |
bdc44640 | 96 | CPU_FOREACH(cpu) { |
182735ef | 97 | if (!cpu_thread_is_idle(cpu)) { |
ac873f1e PM |
98 | return false; |
99 | } | |
100 | } | |
101 | return true; | |
102 | } | |
103 | ||
946fb27c PB |
104 | /***********************************************************/ |
105 | /* guest cycle counter */ | |
106 | ||
a3270e19 PB |
107 | /* Protected by TimersState seqlock */ |
108 | ||
5045e9d9 | 109 | static bool icount_sleep = true; |
71468395 | 110 | static int64_t vm_clock_warp_start = -1; |
946fb27c PB |
111 | /* Conversion factor from emulated instructions to virtual clock ticks. */ |
112 | static int icount_time_shift; | |
113 | /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ | |
114 | #define MAX_ICOUNT_SHIFT 10 | |
a3270e19 | 115 | |
946fb27c PB |
116 | static QEMUTimer *icount_rt_timer; |
117 | static QEMUTimer *icount_vm_timer; | |
118 | static QEMUTimer *icount_warp_timer; | |
946fb27c PB |
119 | |
120 | typedef struct TimersState { | |
cb365646 | 121 | /* Protected by BQL. */ |
946fb27c PB |
122 | int64_t cpu_ticks_prev; |
123 | int64_t cpu_ticks_offset; | |
cb365646 LPF |
124 | |
125 | /* cpu_clock_offset can be read out of BQL, so protect it with | |
126 | * this lock. | |
127 | */ | |
128 | QemuSeqLock vm_clock_seqlock; | |
946fb27c PB |
129 | int64_t cpu_clock_offset; |
130 | int32_t cpu_ticks_enabled; | |
131 | int64_t dummy; | |
c96778bb FK |
132 | |
133 | /* Compensate for varying guest execution speed. */ | |
134 | int64_t qemu_icount_bias; | |
135 | /* Only written by TCG thread */ | |
136 | int64_t qemu_icount; | |
946fb27c PB |
137 | } TimersState; |
138 | ||
d9cd4007 | 139 | static TimersState timers_state; |
946fb27c | 140 | |
2a62914b | 141 | int64_t cpu_get_icount_raw(void) |
946fb27c PB |
142 | { |
143 | int64_t icount; | |
4917cf44 | 144 | CPUState *cpu = current_cpu; |
946fb27c | 145 | |
c96778bb | 146 | icount = timers_state.qemu_icount; |
4917cf44 | 147 | if (cpu) { |
414b15c9 | 148 | if (!cpu->can_do_io) { |
2a62914b PD |
149 | fprintf(stderr, "Bad icount read\n"); |
150 | exit(1); | |
946fb27c | 151 | } |
28ecfd7a | 152 | icount -= (cpu->icount_decr.u16.low + cpu->icount_extra); |
946fb27c | 153 | } |
2a62914b PD |
154 | return icount; |
155 | } | |
156 | ||
157 | /* Return the virtual CPU time, based on the instruction counter. */ | |
158 | static int64_t cpu_get_icount_locked(void) | |
159 | { | |
160 | int64_t icount = cpu_get_icount_raw(); | |
3f031313 | 161 | return timers_state.qemu_icount_bias + cpu_icount_to_ns(icount); |
946fb27c PB |
162 | } |
163 | ||
17a15f1b PB |
164 | int64_t cpu_get_icount(void) |
165 | { | |
166 | int64_t icount; | |
167 | unsigned start; | |
168 | ||
169 | do { | |
170 | start = seqlock_read_begin(&timers_state.vm_clock_seqlock); | |
171 | icount = cpu_get_icount_locked(); | |
172 | } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, start)); | |
173 | ||
174 | return icount; | |
175 | } | |
176 | ||
3f031313 FK |
177 | int64_t cpu_icount_to_ns(int64_t icount) |
178 | { | |
179 | return icount << icount_time_shift; | |
180 | } | |
181 | ||
946fb27c | 182 | /* return the host CPU cycle counter and handle stop/restart */ |
cb365646 | 183 | /* Caller must hold the BQL */ |
946fb27c PB |
184 | int64_t cpu_get_ticks(void) |
185 | { | |
5f3e3101 PB |
186 | int64_t ticks; |
187 | ||
946fb27c PB |
188 | if (use_icount) { |
189 | return cpu_get_icount(); | |
190 | } | |
5f3e3101 PB |
191 | |
192 | ticks = timers_state.cpu_ticks_offset; | |
193 | if (timers_state.cpu_ticks_enabled) { | |
194 | ticks += cpu_get_real_ticks(); | |
195 | } | |
196 | ||
197 | if (timers_state.cpu_ticks_prev > ticks) { | |
198 | /* Note: non increasing ticks may happen if the host uses | |
199 | software suspend */ | |
200 | timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks; | |
201 | ticks = timers_state.cpu_ticks_prev; | |
946fb27c | 202 | } |
5f3e3101 PB |
203 | |
204 | timers_state.cpu_ticks_prev = ticks; | |
205 | return ticks; | |
946fb27c PB |
206 | } |
207 | ||
cb365646 | 208 | static int64_t cpu_get_clock_locked(void) |
946fb27c | 209 | { |
5f3e3101 | 210 | int64_t ticks; |
cb365646 | 211 | |
5f3e3101 PB |
212 | ticks = timers_state.cpu_clock_offset; |
213 | if (timers_state.cpu_ticks_enabled) { | |
214 | ticks += get_clock(); | |
946fb27c | 215 | } |
cb365646 | 216 | |
5f3e3101 | 217 | return ticks; |
cb365646 LPF |
218 | } |
219 | ||
220 | /* return the host CPU monotonic timer and handle stop/restart */ | |
221 | int64_t cpu_get_clock(void) | |
222 | { | |
223 | int64_t ti; | |
224 | unsigned start; | |
225 | ||
226 | do { | |
227 | start = seqlock_read_begin(&timers_state.vm_clock_seqlock); | |
228 | ti = cpu_get_clock_locked(); | |
229 | } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, start)); | |
230 | ||
231 | return ti; | |
946fb27c PB |
232 | } |
233 | ||
cb365646 LPF |
234 | /* enable cpu_get_ticks() |
235 | * Caller must hold BQL which server as mutex for vm_clock_seqlock. | |
236 | */ | |
946fb27c PB |
237 | void cpu_enable_ticks(void) |
238 | { | |
cb365646 LPF |
239 | /* Here, the really thing protected by seqlock is cpu_clock_offset. */ |
240 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
946fb27c PB |
241 | if (!timers_state.cpu_ticks_enabled) { |
242 | timers_state.cpu_ticks_offset -= cpu_get_real_ticks(); | |
243 | timers_state.cpu_clock_offset -= get_clock(); | |
244 | timers_state.cpu_ticks_enabled = 1; | |
245 | } | |
cb365646 | 246 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
247 | } |
248 | ||
249 | /* disable cpu_get_ticks() : the clock is stopped. You must not call | |
cb365646 LPF |
250 | * cpu_get_ticks() after that. |
251 | * Caller must hold BQL which server as mutex for vm_clock_seqlock. | |
252 | */ | |
946fb27c PB |
253 | void cpu_disable_ticks(void) |
254 | { | |
cb365646 LPF |
255 | /* Here, the really thing protected by seqlock is cpu_clock_offset. */ |
256 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
946fb27c | 257 | if (timers_state.cpu_ticks_enabled) { |
5f3e3101 | 258 | timers_state.cpu_ticks_offset += cpu_get_real_ticks(); |
cb365646 | 259 | timers_state.cpu_clock_offset = cpu_get_clock_locked(); |
946fb27c PB |
260 | timers_state.cpu_ticks_enabled = 0; |
261 | } | |
cb365646 | 262 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
263 | } |
264 | ||
265 | /* Correlation between real and virtual time is always going to be | |
266 | fairly approximate, so ignore small variation. | |
267 | When the guest is idle real and virtual time will be aligned in | |
268 | the IO wait loop. */ | |
269 | #define ICOUNT_WOBBLE (get_ticks_per_sec() / 10) | |
270 | ||
271 | static void icount_adjust(void) | |
272 | { | |
273 | int64_t cur_time; | |
274 | int64_t cur_icount; | |
275 | int64_t delta; | |
a3270e19 PB |
276 | |
277 | /* Protected by TimersState mutex. */ | |
946fb27c | 278 | static int64_t last_delta; |
468cc7cf | 279 | |
946fb27c PB |
280 | /* If the VM is not running, then do nothing. */ |
281 | if (!runstate_is_running()) { | |
282 | return; | |
283 | } | |
468cc7cf | 284 | |
17a15f1b PB |
285 | seqlock_write_lock(&timers_state.vm_clock_seqlock); |
286 | cur_time = cpu_get_clock_locked(); | |
287 | cur_icount = cpu_get_icount_locked(); | |
468cc7cf | 288 | |
946fb27c PB |
289 | delta = cur_icount - cur_time; |
290 | /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */ | |
291 | if (delta > 0 | |
292 | && last_delta + ICOUNT_WOBBLE < delta * 2 | |
293 | && icount_time_shift > 0) { | |
294 | /* The guest is getting too far ahead. Slow time down. */ | |
295 | icount_time_shift--; | |
296 | } | |
297 | if (delta < 0 | |
298 | && last_delta - ICOUNT_WOBBLE > delta * 2 | |
299 | && icount_time_shift < MAX_ICOUNT_SHIFT) { | |
300 | /* The guest is getting too far behind. Speed time up. */ | |
301 | icount_time_shift++; | |
302 | } | |
303 | last_delta = delta; | |
c96778bb FK |
304 | timers_state.qemu_icount_bias = cur_icount |
305 | - (timers_state.qemu_icount << icount_time_shift); | |
17a15f1b | 306 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
307 | } |
308 | ||
309 | static void icount_adjust_rt(void *opaque) | |
310 | { | |
40daca54 | 311 | timer_mod(icount_rt_timer, |
1979b908 | 312 | qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL_RT) + 1000); |
946fb27c PB |
313 | icount_adjust(); |
314 | } | |
315 | ||
316 | static void icount_adjust_vm(void *opaque) | |
317 | { | |
40daca54 AB |
318 | timer_mod(icount_vm_timer, |
319 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
320 | get_ticks_per_sec() / 10); | |
946fb27c PB |
321 | icount_adjust(); |
322 | } | |
323 | ||
324 | static int64_t qemu_icount_round(int64_t count) | |
325 | { | |
326 | return (count + (1 << icount_time_shift) - 1) >> icount_time_shift; | |
327 | } | |
328 | ||
329 | static void icount_warp_rt(void *opaque) | |
330 | { | |
17a15f1b PB |
331 | /* The icount_warp_timer is rescheduled soon after vm_clock_warp_start |
332 | * changes from -1 to another value, so the race here is okay. | |
333 | */ | |
334 | if (atomic_read(&vm_clock_warp_start) == -1) { | |
946fb27c PB |
335 | return; |
336 | } | |
337 | ||
17a15f1b | 338 | seqlock_write_lock(&timers_state.vm_clock_seqlock); |
946fb27c | 339 | if (runstate_is_running()) { |
bf2a7ddb | 340 | int64_t clock = cpu_get_clock_locked(); |
8ed961d9 PB |
341 | int64_t warp_delta; |
342 | ||
343 | warp_delta = clock - vm_clock_warp_start; | |
344 | if (use_icount == 2) { | |
946fb27c | 345 | /* |
40daca54 | 346 | * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too |
946fb27c PB |
347 | * far ahead of real time. |
348 | */ | |
17a15f1b | 349 | int64_t cur_icount = cpu_get_icount_locked(); |
bf2a7ddb | 350 | int64_t delta = clock - cur_icount; |
8ed961d9 | 351 | warp_delta = MIN(warp_delta, delta); |
946fb27c | 352 | } |
c96778bb | 353 | timers_state.qemu_icount_bias += warp_delta; |
946fb27c PB |
354 | } |
355 | vm_clock_warp_start = -1; | |
17a15f1b | 356 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
8ed961d9 PB |
357 | |
358 | if (qemu_clock_expired(QEMU_CLOCK_VIRTUAL)) { | |
359 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); | |
360 | } | |
946fb27c PB |
361 | } |
362 | ||
8156be56 PB |
363 | void qtest_clock_warp(int64_t dest) |
364 | { | |
40daca54 | 365 | int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
efef88b3 | 366 | AioContext *aio_context; |
8156be56 | 367 | assert(qtest_enabled()); |
efef88b3 | 368 | aio_context = qemu_get_aio_context(); |
8156be56 | 369 | while (clock < dest) { |
40daca54 | 370 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
c9299e2f | 371 | int64_t warp = qemu_soonest_timeout(dest - clock, deadline); |
efef88b3 | 372 | |
17a15f1b | 373 | seqlock_write_lock(&timers_state.vm_clock_seqlock); |
c96778bb | 374 | timers_state.qemu_icount_bias += warp; |
17a15f1b PB |
375 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
376 | ||
40daca54 | 377 | qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL); |
efef88b3 | 378 | timerlist_run_timers(aio_context->tlg.tl[QEMU_CLOCK_VIRTUAL]); |
40daca54 | 379 | clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
8156be56 | 380 | } |
40daca54 | 381 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
382 | } |
383 | ||
40daca54 | 384 | void qemu_clock_warp(QEMUClockType type) |
946fb27c | 385 | { |
ce78d18c | 386 | int64_t clock; |
946fb27c PB |
387 | int64_t deadline; |
388 | ||
389 | /* | |
390 | * There are too many global variables to make the "warp" behavior | |
391 | * applicable to other clocks. But a clock argument removes the | |
392 | * need for if statements all over the place. | |
393 | */ | |
40daca54 | 394 | if (type != QEMU_CLOCK_VIRTUAL || !use_icount) { |
946fb27c PB |
395 | return; |
396 | } | |
397 | ||
5045e9d9 VC |
398 | if (icount_sleep) { |
399 | /* | |
400 | * If the CPUs have been sleeping, advance QEMU_CLOCK_VIRTUAL timer now. | |
401 | * This ensures that the deadline for the timer is computed correctly | |
402 | * below. | |
403 | * This also makes sure that the insn counter is synchronized before | |
404 | * the CPU starts running, in case the CPU is woken by an event other | |
405 | * than the earliest QEMU_CLOCK_VIRTUAL timer. | |
406 | */ | |
407 | icount_warp_rt(NULL); | |
408 | timer_del(icount_warp_timer); | |
409 | } | |
ce78d18c | 410 | if (!all_cpu_threads_idle()) { |
946fb27c PB |
411 | return; |
412 | } | |
413 | ||
8156be56 PB |
414 | if (qtest_enabled()) { |
415 | /* When testing, qtest commands advance icount. */ | |
416 | return; | |
417 | } | |
418 | ||
ac70aafc | 419 | /* We want to use the earliest deadline from ALL vm_clocks */ |
bf2a7ddb | 420 | clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); |
40daca54 | 421 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ce78d18c | 422 | if (deadline < 0) { |
d7a0f71d VC |
423 | static bool notified; |
424 | if (!icount_sleep && !notified) { | |
425 | error_report("WARNING: icount sleep disabled and no active timers"); | |
426 | notified = true; | |
427 | } | |
ce78d18c | 428 | return; |
ac70aafc AB |
429 | } |
430 | ||
946fb27c PB |
431 | if (deadline > 0) { |
432 | /* | |
40daca54 | 433 | * Ensure QEMU_CLOCK_VIRTUAL proceeds even when the virtual CPU goes to |
946fb27c PB |
434 | * sleep. Otherwise, the CPU might be waiting for a future timer |
435 | * interrupt to wake it up, but the interrupt never comes because | |
436 | * the vCPU isn't running any insns and thus doesn't advance the | |
40daca54 | 437 | * QEMU_CLOCK_VIRTUAL. |
946fb27c | 438 | */ |
5045e9d9 VC |
439 | if (!icount_sleep) { |
440 | /* | |
441 | * We never let VCPUs sleep in no sleep icount mode. | |
442 | * If there is a pending QEMU_CLOCK_VIRTUAL timer we just advance | |
443 | * to the next QEMU_CLOCK_VIRTUAL event and notify it. | |
444 | * It is useful when we want a deterministic execution time, | |
445 | * isolated from host latencies. | |
446 | */ | |
447 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
448 | timers_state.qemu_icount_bias += deadline; | |
449 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); | |
450 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); | |
451 | } else { | |
452 | /* | |
453 | * We do stop VCPUs and only advance QEMU_CLOCK_VIRTUAL after some | |
454 | * "real" time, (related to the time left until the next event) has | |
455 | * passed. The QEMU_CLOCK_VIRTUAL_RT clock will do this. | |
456 | * This avoids that the warps are visible externally; for example, | |
457 | * you will not be sending network packets continuously instead of | |
458 | * every 100ms. | |
459 | */ | |
460 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
461 | if (vm_clock_warp_start == -1 || vm_clock_warp_start > clock) { | |
462 | vm_clock_warp_start = clock; | |
463 | } | |
464 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); | |
465 | timer_mod_anticipate(icount_warp_timer, clock + deadline); | |
ce78d18c | 466 | } |
ac70aafc | 467 | } else if (deadline == 0) { |
40daca54 | 468 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
946fb27c PB |
469 | } |
470 | } | |
471 | ||
d09eae37 FK |
472 | static bool icount_state_needed(void *opaque) |
473 | { | |
474 | return use_icount; | |
475 | } | |
476 | ||
477 | /* | |
478 | * This is a subsection for icount migration. | |
479 | */ | |
480 | static const VMStateDescription icount_vmstate_timers = { | |
481 | .name = "timer/icount", | |
482 | .version_id = 1, | |
483 | .minimum_version_id = 1, | |
5cd8cada | 484 | .needed = icount_state_needed, |
d09eae37 FK |
485 | .fields = (VMStateField[]) { |
486 | VMSTATE_INT64(qemu_icount_bias, TimersState), | |
487 | VMSTATE_INT64(qemu_icount, TimersState), | |
488 | VMSTATE_END_OF_LIST() | |
489 | } | |
490 | }; | |
491 | ||
946fb27c PB |
492 | static const VMStateDescription vmstate_timers = { |
493 | .name = "timer", | |
494 | .version_id = 2, | |
495 | .minimum_version_id = 1, | |
35d08458 | 496 | .fields = (VMStateField[]) { |
946fb27c PB |
497 | VMSTATE_INT64(cpu_ticks_offset, TimersState), |
498 | VMSTATE_INT64(dummy, TimersState), | |
499 | VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2), | |
500 | VMSTATE_END_OF_LIST() | |
d09eae37 | 501 | }, |
5cd8cada JQ |
502 | .subsections = (const VMStateDescription*[]) { |
503 | &icount_vmstate_timers, | |
504 | NULL | |
946fb27c PB |
505 | } |
506 | }; | |
507 | ||
4603ea01 PD |
508 | void cpu_ticks_init(void) |
509 | { | |
510 | seqlock_init(&timers_state.vm_clock_seqlock, NULL); | |
511 | vmstate_register(NULL, 0, &vmstate_timers, &timers_state); | |
512 | } | |
513 | ||
1ad9580b | 514 | void configure_icount(QemuOpts *opts, Error **errp) |
946fb27c | 515 | { |
1ad9580b | 516 | const char *option; |
a8bfac37 | 517 | char *rem_str = NULL; |
1ad9580b | 518 | |
1ad9580b | 519 | option = qemu_opt_get(opts, "shift"); |
946fb27c | 520 | if (!option) { |
a8bfac37 ST |
521 | if (qemu_opt_get(opts, "align") != NULL) { |
522 | error_setg(errp, "Please specify shift option when using align"); | |
523 | } | |
946fb27c PB |
524 | return; |
525 | } | |
f1f4b57e VC |
526 | |
527 | icount_sleep = qemu_opt_get_bool(opts, "sleep", true); | |
5045e9d9 VC |
528 | if (icount_sleep) { |
529 | icount_warp_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL_RT, | |
530 | icount_warp_rt, NULL); | |
531 | } | |
f1f4b57e | 532 | |
a8bfac37 | 533 | icount_align_option = qemu_opt_get_bool(opts, "align", false); |
f1f4b57e VC |
534 | |
535 | if (icount_align_option && !icount_sleep) { | |
536 | error_setg(errp, "align=on and sleep=no are incompatible"); | |
537 | } | |
946fb27c | 538 | if (strcmp(option, "auto") != 0) { |
a8bfac37 ST |
539 | errno = 0; |
540 | icount_time_shift = strtol(option, &rem_str, 0); | |
541 | if (errno != 0 || *rem_str != '\0' || !strlen(option)) { | |
542 | error_setg(errp, "icount: Invalid shift value"); | |
543 | } | |
946fb27c PB |
544 | use_icount = 1; |
545 | return; | |
a8bfac37 ST |
546 | } else if (icount_align_option) { |
547 | error_setg(errp, "shift=auto and align=on are incompatible"); | |
f1f4b57e VC |
548 | } else if (!icount_sleep) { |
549 | error_setg(errp, "shift=auto and sleep=no are incompatible"); | |
946fb27c PB |
550 | } |
551 | ||
552 | use_icount = 2; | |
553 | ||
554 | /* 125MIPS seems a reasonable initial guess at the guest speed. | |
555 | It will be corrected fairly quickly anyway. */ | |
556 | icount_time_shift = 3; | |
557 | ||
558 | /* Have both realtime and virtual time triggers for speed adjustment. | |
559 | The realtime trigger catches emulated time passing too slowly, | |
560 | the virtual time trigger catches emulated time passing too fast. | |
561 | Realtime triggers occur even when idle, so use them less frequently | |
562 | than VM triggers. */ | |
bf2a7ddb PD |
563 | icount_rt_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL_RT, |
564 | icount_adjust_rt, NULL); | |
40daca54 | 565 | timer_mod(icount_rt_timer, |
bf2a7ddb | 566 | qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL_RT) + 1000); |
40daca54 AB |
567 | icount_vm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, |
568 | icount_adjust_vm, NULL); | |
569 | timer_mod(icount_vm_timer, | |
570 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
571 | get_ticks_per_sec() / 10); | |
946fb27c PB |
572 | } |
573 | ||
296af7c9 BS |
574 | /***********************************************************/ |
575 | void hw_error(const char *fmt, ...) | |
576 | { | |
577 | va_list ap; | |
55e5c285 | 578 | CPUState *cpu; |
296af7c9 BS |
579 | |
580 | va_start(ap, fmt); | |
581 | fprintf(stderr, "qemu: hardware error: "); | |
582 | vfprintf(stderr, fmt, ap); | |
583 | fprintf(stderr, "\n"); | |
bdc44640 | 584 | CPU_FOREACH(cpu) { |
55e5c285 | 585 | fprintf(stderr, "CPU #%d:\n", cpu->cpu_index); |
878096ee | 586 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU); |
296af7c9 BS |
587 | } |
588 | va_end(ap); | |
589 | abort(); | |
590 | } | |
591 | ||
592 | void cpu_synchronize_all_states(void) | |
593 | { | |
182735ef | 594 | CPUState *cpu; |
296af7c9 | 595 | |
bdc44640 | 596 | CPU_FOREACH(cpu) { |
182735ef | 597 | cpu_synchronize_state(cpu); |
296af7c9 BS |
598 | } |
599 | } | |
600 | ||
601 | void cpu_synchronize_all_post_reset(void) | |
602 | { | |
182735ef | 603 | CPUState *cpu; |
296af7c9 | 604 | |
bdc44640 | 605 | CPU_FOREACH(cpu) { |
182735ef | 606 | cpu_synchronize_post_reset(cpu); |
296af7c9 BS |
607 | } |
608 | } | |
609 | ||
610 | void cpu_synchronize_all_post_init(void) | |
611 | { | |
182735ef | 612 | CPUState *cpu; |
296af7c9 | 613 | |
bdc44640 | 614 | CPU_FOREACH(cpu) { |
182735ef | 615 | cpu_synchronize_post_init(cpu); |
296af7c9 BS |
616 | } |
617 | } | |
618 | ||
de9d61e8 MT |
619 | void cpu_clean_all_dirty(void) |
620 | { | |
621 | CPUState *cpu; | |
622 | ||
623 | CPU_FOREACH(cpu) { | |
624 | cpu_clean_state(cpu); | |
625 | } | |
626 | } | |
627 | ||
56983463 | 628 | static int do_vm_stop(RunState state) |
296af7c9 | 629 | { |
56983463 KW |
630 | int ret = 0; |
631 | ||
1354869c | 632 | if (runstate_is_running()) { |
296af7c9 | 633 | cpu_disable_ticks(); |
296af7c9 | 634 | pause_all_vcpus(); |
f5bbfba1 | 635 | runstate_set(state); |
1dfb4dd9 | 636 | vm_state_notify(0, state); |
a4e15de9 | 637 | qapi_event_send_stop(&error_abort); |
296af7c9 | 638 | } |
56983463 | 639 | |
594a45ce KW |
640 | bdrv_drain_all(); |
641 | ret = bdrv_flush_all(); | |
642 | ||
56983463 | 643 | return ret; |
296af7c9 BS |
644 | } |
645 | ||
a1fcaa73 | 646 | static bool cpu_can_run(CPUState *cpu) |
296af7c9 | 647 | { |
4fdeee7c | 648 | if (cpu->stop) { |
a1fcaa73 | 649 | return false; |
0ab07c62 | 650 | } |
321bc0b2 | 651 | if (cpu_is_stopped(cpu)) { |
a1fcaa73 | 652 | return false; |
0ab07c62 | 653 | } |
a1fcaa73 | 654 | return true; |
296af7c9 BS |
655 | } |
656 | ||
91325046 | 657 | static void cpu_handle_guest_debug(CPUState *cpu) |
83f338f7 | 658 | { |
64f6b346 | 659 | gdb_set_stop_cpu(cpu); |
8cf71710 | 660 | qemu_system_debug_request(); |
f324e766 | 661 | cpu->stopped = true; |
3c638d06 JK |
662 | } |
663 | ||
6d9cb73c JK |
664 | #ifdef CONFIG_LINUX |
665 | static void sigbus_reraise(void) | |
666 | { | |
667 | sigset_t set; | |
668 | struct sigaction action; | |
669 | ||
670 | memset(&action, 0, sizeof(action)); | |
671 | action.sa_handler = SIG_DFL; | |
672 | if (!sigaction(SIGBUS, &action, NULL)) { | |
673 | raise(SIGBUS); | |
674 | sigemptyset(&set); | |
675 | sigaddset(&set, SIGBUS); | |
676 | sigprocmask(SIG_UNBLOCK, &set, NULL); | |
677 | } | |
678 | perror("Failed to re-raise SIGBUS!\n"); | |
679 | abort(); | |
680 | } | |
681 | ||
682 | static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo, | |
683 | void *ctx) | |
684 | { | |
685 | if (kvm_on_sigbus(siginfo->ssi_code, | |
686 | (void *)(intptr_t)siginfo->ssi_addr)) { | |
687 | sigbus_reraise(); | |
688 | } | |
689 | } | |
690 | ||
691 | static void qemu_init_sigbus(void) | |
692 | { | |
693 | struct sigaction action; | |
694 | ||
695 | memset(&action, 0, sizeof(action)); | |
696 | action.sa_flags = SA_SIGINFO; | |
697 | action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler; | |
698 | sigaction(SIGBUS, &action, NULL); | |
699 | ||
700 | prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0); | |
701 | } | |
702 | ||
290adf38 | 703 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
704 | { |
705 | struct timespec ts = { 0, 0 }; | |
706 | siginfo_t siginfo; | |
707 | sigset_t waitset; | |
708 | sigset_t chkset; | |
709 | int r; | |
710 | ||
711 | sigemptyset(&waitset); | |
712 | sigaddset(&waitset, SIG_IPI); | |
713 | sigaddset(&waitset, SIGBUS); | |
714 | ||
715 | do { | |
716 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
717 | if (r == -1 && !(errno == EAGAIN || errno == EINTR)) { | |
718 | perror("sigtimedwait"); | |
719 | exit(1); | |
720 | } | |
721 | ||
722 | switch (r) { | |
723 | case SIGBUS: | |
290adf38 | 724 | if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) { |
1ab3c6c0 JK |
725 | sigbus_reraise(); |
726 | } | |
727 | break; | |
728 | default: | |
729 | break; | |
730 | } | |
731 | ||
732 | r = sigpending(&chkset); | |
733 | if (r == -1) { | |
734 | perror("sigpending"); | |
735 | exit(1); | |
736 | } | |
737 | } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS)); | |
1ab3c6c0 JK |
738 | } |
739 | ||
6d9cb73c JK |
740 | #else /* !CONFIG_LINUX */ |
741 | ||
742 | static void qemu_init_sigbus(void) | |
743 | { | |
744 | } | |
1ab3c6c0 | 745 | |
290adf38 | 746 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
747 | { |
748 | } | |
6d9cb73c JK |
749 | #endif /* !CONFIG_LINUX */ |
750 | ||
296af7c9 | 751 | #ifndef _WIN32 |
55f8d6ac JK |
752 | static void dummy_signal(int sig) |
753 | { | |
754 | } | |
55f8d6ac | 755 | |
13618e05 | 756 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
714bd040 PB |
757 | { |
758 | int r; | |
759 | sigset_t set; | |
760 | struct sigaction sigact; | |
761 | ||
762 | memset(&sigact, 0, sizeof(sigact)); | |
763 | sigact.sa_handler = dummy_signal; | |
764 | sigaction(SIG_IPI, &sigact, NULL); | |
765 | ||
714bd040 PB |
766 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
767 | sigdelset(&set, SIG_IPI); | |
714bd040 | 768 | sigdelset(&set, SIGBUS); |
491d6e80 | 769 | r = kvm_set_signal_mask(cpu, &set); |
714bd040 PB |
770 | if (r) { |
771 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
772 | exit(1); | |
773 | } | |
774 | } | |
775 | ||
55f8d6ac | 776 | #else /* _WIN32 */ |
13618e05 | 777 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
ff48eb5f | 778 | { |
714bd040 PB |
779 | abort(); |
780 | } | |
714bd040 | 781 | #endif /* _WIN32 */ |
ff48eb5f | 782 | |
b2532d88 | 783 | static QemuMutex qemu_global_mutex; |
46daff13 | 784 | static QemuCond qemu_io_proceeded_cond; |
6b49809c | 785 | static unsigned iothread_requesting_mutex; |
296af7c9 BS |
786 | |
787 | static QemuThread io_thread; | |
788 | ||
296af7c9 BS |
789 | /* cpu creation */ |
790 | static QemuCond qemu_cpu_cond; | |
791 | /* system init */ | |
296af7c9 | 792 | static QemuCond qemu_pause_cond; |
e82bcec2 | 793 | static QemuCond qemu_work_cond; |
296af7c9 | 794 | |
d3b12f5d | 795 | void qemu_init_cpu_loop(void) |
296af7c9 | 796 | { |
6d9cb73c | 797 | qemu_init_sigbus(); |
ed94592b | 798 | qemu_cond_init(&qemu_cpu_cond); |
ed94592b AL |
799 | qemu_cond_init(&qemu_pause_cond); |
800 | qemu_cond_init(&qemu_work_cond); | |
46daff13 | 801 | qemu_cond_init(&qemu_io_proceeded_cond); |
296af7c9 | 802 | qemu_mutex_init(&qemu_global_mutex); |
296af7c9 | 803 | |
b7680cb6 | 804 | qemu_thread_get_self(&io_thread); |
296af7c9 BS |
805 | } |
806 | ||
f100f0b3 | 807 | void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
e82bcec2 MT |
808 | { |
809 | struct qemu_work_item wi; | |
810 | ||
60e82579 | 811 | if (qemu_cpu_is_self(cpu)) { |
e82bcec2 MT |
812 | func(data); |
813 | return; | |
814 | } | |
815 | ||
816 | wi.func = func; | |
817 | wi.data = data; | |
3c02270d | 818 | wi.free = false; |
376692b9 PB |
819 | |
820 | qemu_mutex_lock(&cpu->work_mutex); | |
c64ca814 AF |
821 | if (cpu->queued_work_first == NULL) { |
822 | cpu->queued_work_first = &wi; | |
0ab07c62 | 823 | } else { |
c64ca814 | 824 | cpu->queued_work_last->next = &wi; |
0ab07c62 | 825 | } |
c64ca814 | 826 | cpu->queued_work_last = &wi; |
e82bcec2 MT |
827 | wi.next = NULL; |
828 | wi.done = false; | |
376692b9 | 829 | qemu_mutex_unlock(&cpu->work_mutex); |
e82bcec2 | 830 | |
c08d7424 | 831 | qemu_cpu_kick(cpu); |
376692b9 | 832 | while (!atomic_mb_read(&wi.done)) { |
4917cf44 | 833 | CPUState *self_cpu = current_cpu; |
e82bcec2 MT |
834 | |
835 | qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex); | |
4917cf44 | 836 | current_cpu = self_cpu; |
e82bcec2 MT |
837 | } |
838 | } | |
839 | ||
3c02270d CV |
840 | void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
841 | { | |
842 | struct qemu_work_item *wi; | |
843 | ||
844 | if (qemu_cpu_is_self(cpu)) { | |
845 | func(data); | |
846 | return; | |
847 | } | |
848 | ||
849 | wi = g_malloc0(sizeof(struct qemu_work_item)); | |
850 | wi->func = func; | |
851 | wi->data = data; | |
852 | wi->free = true; | |
376692b9 PB |
853 | |
854 | qemu_mutex_lock(&cpu->work_mutex); | |
3c02270d CV |
855 | if (cpu->queued_work_first == NULL) { |
856 | cpu->queued_work_first = wi; | |
857 | } else { | |
858 | cpu->queued_work_last->next = wi; | |
859 | } | |
860 | cpu->queued_work_last = wi; | |
861 | wi->next = NULL; | |
862 | wi->done = false; | |
376692b9 | 863 | qemu_mutex_unlock(&cpu->work_mutex); |
3c02270d CV |
864 | |
865 | qemu_cpu_kick(cpu); | |
866 | } | |
867 | ||
6d45b109 | 868 | static void flush_queued_work(CPUState *cpu) |
e82bcec2 MT |
869 | { |
870 | struct qemu_work_item *wi; | |
871 | ||
c64ca814 | 872 | if (cpu->queued_work_first == NULL) { |
e82bcec2 | 873 | return; |
0ab07c62 | 874 | } |
e82bcec2 | 875 | |
376692b9 PB |
876 | qemu_mutex_lock(&cpu->work_mutex); |
877 | while (cpu->queued_work_first != NULL) { | |
878 | wi = cpu->queued_work_first; | |
c64ca814 | 879 | cpu->queued_work_first = wi->next; |
376692b9 PB |
880 | if (!cpu->queued_work_first) { |
881 | cpu->queued_work_last = NULL; | |
882 | } | |
883 | qemu_mutex_unlock(&cpu->work_mutex); | |
e82bcec2 | 884 | wi->func(wi->data); |
376692b9 | 885 | qemu_mutex_lock(&cpu->work_mutex); |
3c02270d CV |
886 | if (wi->free) { |
887 | g_free(wi); | |
376692b9 PB |
888 | } else { |
889 | atomic_mb_set(&wi->done, true); | |
3c02270d | 890 | } |
e82bcec2 | 891 | } |
376692b9 | 892 | qemu_mutex_unlock(&cpu->work_mutex); |
e82bcec2 MT |
893 | qemu_cond_broadcast(&qemu_work_cond); |
894 | } | |
895 | ||
509a0d78 | 896 | static void qemu_wait_io_event_common(CPUState *cpu) |
296af7c9 | 897 | { |
4fdeee7c AF |
898 | if (cpu->stop) { |
899 | cpu->stop = false; | |
f324e766 | 900 | cpu->stopped = true; |
296af7c9 BS |
901 | qemu_cond_signal(&qemu_pause_cond); |
902 | } | |
6d45b109 | 903 | flush_queued_work(cpu); |
216fc9a4 | 904 | cpu->thread_kicked = false; |
296af7c9 BS |
905 | } |
906 | ||
d5f8d613 | 907 | static void qemu_tcg_wait_io_event(CPUState *cpu) |
296af7c9 | 908 | { |
16400322 | 909 | while (all_cpu_threads_idle()) { |
ab33fcda PB |
910 | /* Start accounting real time to the virtual clock if the CPUs |
911 | are idle. */ | |
40daca54 | 912 | qemu_clock_warp(QEMU_CLOCK_VIRTUAL); |
d5f8d613 | 913 | qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); |
16400322 | 914 | } |
296af7c9 | 915 | |
46daff13 PB |
916 | while (iothread_requesting_mutex) { |
917 | qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex); | |
918 | } | |
6cabe1f3 | 919 | |
bdc44640 | 920 | CPU_FOREACH(cpu) { |
182735ef | 921 | qemu_wait_io_event_common(cpu); |
6cabe1f3 | 922 | } |
296af7c9 BS |
923 | } |
924 | ||
fd529e8f | 925 | static void qemu_kvm_wait_io_event(CPUState *cpu) |
296af7c9 | 926 | { |
a98ae1d8 | 927 | while (cpu_thread_is_idle(cpu)) { |
f5c121b8 | 928 | qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); |
16400322 | 929 | } |
296af7c9 | 930 | |
290adf38 | 931 | qemu_kvm_eat_signals(cpu); |
509a0d78 | 932 | qemu_wait_io_event_common(cpu); |
296af7c9 BS |
933 | } |
934 | ||
7e97cd88 | 935 | static void *qemu_kvm_cpu_thread_fn(void *arg) |
296af7c9 | 936 | { |
48a106bd | 937 | CPUState *cpu = arg; |
84b4915d | 938 | int r; |
296af7c9 | 939 | |
ab28bd23 PB |
940 | rcu_register_thread(); |
941 | ||
2e7f7a3c | 942 | qemu_mutex_lock_iothread(); |
814e612e | 943 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 944 | cpu->thread_id = qemu_get_thread_id(); |
626cf8f4 | 945 | cpu->can_do_io = 1; |
4917cf44 | 946 | current_cpu = cpu; |
296af7c9 | 947 | |
504134d2 | 948 | r = kvm_init_vcpu(cpu); |
84b4915d JK |
949 | if (r < 0) { |
950 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
951 | exit(1); | |
952 | } | |
296af7c9 | 953 | |
13618e05 | 954 | qemu_kvm_init_cpu_signals(cpu); |
296af7c9 BS |
955 | |
956 | /* signal CPU creation */ | |
61a46217 | 957 | cpu->created = true; |
296af7c9 BS |
958 | qemu_cond_signal(&qemu_cpu_cond); |
959 | ||
296af7c9 | 960 | while (1) { |
a1fcaa73 | 961 | if (cpu_can_run(cpu)) { |
1458c363 | 962 | r = kvm_cpu_exec(cpu); |
83f338f7 | 963 | if (r == EXCP_DEBUG) { |
91325046 | 964 | cpu_handle_guest_debug(cpu); |
83f338f7 | 965 | } |
0ab07c62 | 966 | } |
fd529e8f | 967 | qemu_kvm_wait_io_event(cpu); |
296af7c9 BS |
968 | } |
969 | ||
970 | return NULL; | |
971 | } | |
972 | ||
c7f0f3b1 AL |
973 | static void *qemu_dummy_cpu_thread_fn(void *arg) |
974 | { | |
975 | #ifdef _WIN32 | |
976 | fprintf(stderr, "qtest is not supported under Windows\n"); | |
977 | exit(1); | |
978 | #else | |
10a9021d | 979 | CPUState *cpu = arg; |
c7f0f3b1 AL |
980 | sigset_t waitset; |
981 | int r; | |
982 | ||
ab28bd23 PB |
983 | rcu_register_thread(); |
984 | ||
c7f0f3b1 | 985 | qemu_mutex_lock_iothread(); |
814e612e | 986 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 987 | cpu->thread_id = qemu_get_thread_id(); |
626cf8f4 | 988 | cpu->can_do_io = 1; |
c7f0f3b1 AL |
989 | |
990 | sigemptyset(&waitset); | |
991 | sigaddset(&waitset, SIG_IPI); | |
992 | ||
993 | /* signal CPU creation */ | |
61a46217 | 994 | cpu->created = true; |
c7f0f3b1 AL |
995 | qemu_cond_signal(&qemu_cpu_cond); |
996 | ||
4917cf44 | 997 | current_cpu = cpu; |
c7f0f3b1 | 998 | while (1) { |
4917cf44 | 999 | current_cpu = NULL; |
c7f0f3b1 AL |
1000 | qemu_mutex_unlock_iothread(); |
1001 | do { | |
1002 | int sig; | |
1003 | r = sigwait(&waitset, &sig); | |
1004 | } while (r == -1 && (errno == EAGAIN || errno == EINTR)); | |
1005 | if (r == -1) { | |
1006 | perror("sigwait"); | |
1007 | exit(1); | |
1008 | } | |
1009 | qemu_mutex_lock_iothread(); | |
4917cf44 | 1010 | current_cpu = cpu; |
509a0d78 | 1011 | qemu_wait_io_event_common(cpu); |
c7f0f3b1 AL |
1012 | } |
1013 | ||
1014 | return NULL; | |
1015 | #endif | |
1016 | } | |
1017 | ||
bdb7ca67 JK |
1018 | static void tcg_exec_all(void); |
1019 | ||
7e97cd88 | 1020 | static void *qemu_tcg_cpu_thread_fn(void *arg) |
296af7c9 | 1021 | { |
c3586ba7 | 1022 | CPUState *cpu = arg; |
296af7c9 | 1023 | |
ab28bd23 PB |
1024 | rcu_register_thread(); |
1025 | ||
2e7f7a3c | 1026 | qemu_mutex_lock_iothread(); |
814e612e | 1027 | qemu_thread_get_self(cpu->thread); |
296af7c9 | 1028 | |
38fcbd3f AF |
1029 | CPU_FOREACH(cpu) { |
1030 | cpu->thread_id = qemu_get_thread_id(); | |
1031 | cpu->created = true; | |
626cf8f4 | 1032 | cpu->can_do_io = 1; |
38fcbd3f | 1033 | } |
296af7c9 BS |
1034 | qemu_cond_signal(&qemu_cpu_cond); |
1035 | ||
fa7d1867 | 1036 | /* wait for initial kick-off after machine start */ |
c28e399c | 1037 | while (first_cpu->stopped) { |
d5f8d613 | 1038 | qemu_cond_wait(first_cpu->halt_cond, &qemu_global_mutex); |
8e564b4e JK |
1039 | |
1040 | /* process any pending work */ | |
bdc44640 | 1041 | CPU_FOREACH(cpu) { |
182735ef | 1042 | qemu_wait_io_event_common(cpu); |
8e564b4e | 1043 | } |
0ab07c62 | 1044 | } |
296af7c9 | 1045 | |
21618b3e | 1046 | /* process any pending work */ |
aed807c8 | 1047 | atomic_mb_set(&exit_request, 1); |
21618b3e | 1048 | |
296af7c9 | 1049 | while (1) { |
bdb7ca67 | 1050 | tcg_exec_all(); |
ac70aafc AB |
1051 | |
1052 | if (use_icount) { | |
40daca54 | 1053 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
1054 | |
1055 | if (deadline == 0) { | |
40daca54 | 1056 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
ac70aafc | 1057 | } |
3b2319a3 | 1058 | } |
d5f8d613 | 1059 | qemu_tcg_wait_io_event(QTAILQ_FIRST(&cpus)); |
296af7c9 BS |
1060 | } |
1061 | ||
1062 | return NULL; | |
1063 | } | |
1064 | ||
2ff09a40 | 1065 | static void qemu_cpu_kick_thread(CPUState *cpu) |
cc015e9a PB |
1066 | { |
1067 | #ifndef _WIN32 | |
1068 | int err; | |
1069 | ||
e0c38211 PB |
1070 | if (cpu->thread_kicked) { |
1071 | return; | |
9102deda | 1072 | } |
e0c38211 | 1073 | cpu->thread_kicked = true; |
814e612e | 1074 | err = pthread_kill(cpu->thread->thread, SIG_IPI); |
cc015e9a PB |
1075 | if (err) { |
1076 | fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); | |
1077 | exit(1); | |
1078 | } | |
1079 | #else /* _WIN32 */ | |
e0c38211 PB |
1080 | abort(); |
1081 | #endif | |
1082 | } | |
ed9164a3 | 1083 | |
e0c38211 PB |
1084 | static void qemu_cpu_kick_no_halt(void) |
1085 | { | |
1086 | CPUState *cpu; | |
1087 | /* Ensure whatever caused the exit has reached the CPU threads before | |
1088 | * writing exit_request. | |
1089 | */ | |
1090 | atomic_mb_set(&exit_request, 1); | |
1091 | cpu = atomic_mb_read(&tcg_current_cpu); | |
1092 | if (cpu) { | |
1093 | cpu_exit(cpu); | |
cc015e9a | 1094 | } |
cc015e9a PB |
1095 | } |
1096 | ||
c08d7424 | 1097 | void qemu_cpu_kick(CPUState *cpu) |
296af7c9 | 1098 | { |
f5c121b8 | 1099 | qemu_cond_broadcast(cpu->halt_cond); |
e0c38211 PB |
1100 | if (tcg_enabled()) { |
1101 | qemu_cpu_kick_no_halt(); | |
1102 | } else { | |
1103 | qemu_cpu_kick_thread(cpu); | |
1104 | } | |
296af7c9 BS |
1105 | } |
1106 | ||
46d62fac | 1107 | void qemu_cpu_kick_self(void) |
296af7c9 | 1108 | { |
4917cf44 | 1109 | assert(current_cpu); |
9102deda | 1110 | qemu_cpu_kick_thread(current_cpu); |
296af7c9 BS |
1111 | } |
1112 | ||
60e82579 | 1113 | bool qemu_cpu_is_self(CPUState *cpu) |
296af7c9 | 1114 | { |
814e612e | 1115 | return qemu_thread_is_self(cpu->thread); |
296af7c9 BS |
1116 | } |
1117 | ||
79e2b9ae | 1118 | bool qemu_in_vcpu_thread(void) |
aa723c23 | 1119 | { |
4917cf44 | 1120 | return current_cpu && qemu_cpu_is_self(current_cpu); |
aa723c23 JQ |
1121 | } |
1122 | ||
afbe7053 PB |
1123 | static __thread bool iothread_locked = false; |
1124 | ||
1125 | bool qemu_mutex_iothread_locked(void) | |
1126 | { | |
1127 | return iothread_locked; | |
1128 | } | |
1129 | ||
296af7c9 BS |
1130 | void qemu_mutex_lock_iothread(void) |
1131 | { | |
21618b3e | 1132 | atomic_inc(&iothread_requesting_mutex); |
2e7f7a3c PB |
1133 | /* In the simple case there is no need to bump the VCPU thread out of |
1134 | * TCG code execution. | |
1135 | */ | |
1136 | if (!tcg_enabled() || qemu_in_vcpu_thread() || | |
46036b24 | 1137 | !first_cpu || !first_cpu->created) { |
296af7c9 | 1138 | qemu_mutex_lock(&qemu_global_mutex); |
21618b3e | 1139 | atomic_dec(&iothread_requesting_mutex); |
1a28cac3 | 1140 | } else { |
1a28cac3 | 1141 | if (qemu_mutex_trylock(&qemu_global_mutex)) { |
e0c38211 | 1142 | qemu_cpu_kick_no_halt(); |
1a28cac3 MT |
1143 | qemu_mutex_lock(&qemu_global_mutex); |
1144 | } | |
6b49809c | 1145 | atomic_dec(&iothread_requesting_mutex); |
46daff13 | 1146 | qemu_cond_broadcast(&qemu_io_proceeded_cond); |
1a28cac3 | 1147 | } |
afbe7053 | 1148 | iothread_locked = true; |
296af7c9 BS |
1149 | } |
1150 | ||
1151 | void qemu_mutex_unlock_iothread(void) | |
1152 | { | |
afbe7053 | 1153 | iothread_locked = false; |
296af7c9 BS |
1154 | qemu_mutex_unlock(&qemu_global_mutex); |
1155 | } | |
1156 | ||
1157 | static int all_vcpus_paused(void) | |
1158 | { | |
bdc44640 | 1159 | CPUState *cpu; |
296af7c9 | 1160 | |
bdc44640 | 1161 | CPU_FOREACH(cpu) { |
182735ef | 1162 | if (!cpu->stopped) { |
296af7c9 | 1163 | return 0; |
0ab07c62 | 1164 | } |
296af7c9 BS |
1165 | } |
1166 | ||
1167 | return 1; | |
1168 | } | |
1169 | ||
1170 | void pause_all_vcpus(void) | |
1171 | { | |
bdc44640 | 1172 | CPUState *cpu; |
296af7c9 | 1173 | |
40daca54 | 1174 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, false); |
bdc44640 | 1175 | CPU_FOREACH(cpu) { |
182735ef AF |
1176 | cpu->stop = true; |
1177 | qemu_cpu_kick(cpu); | |
296af7c9 BS |
1178 | } |
1179 | ||
aa723c23 | 1180 | if (qemu_in_vcpu_thread()) { |
d798e974 JK |
1181 | cpu_stop_current(); |
1182 | if (!kvm_enabled()) { | |
bdc44640 | 1183 | CPU_FOREACH(cpu) { |
182735ef AF |
1184 | cpu->stop = false; |
1185 | cpu->stopped = true; | |
d798e974 JK |
1186 | } |
1187 | return; | |
1188 | } | |
1189 | } | |
1190 | ||
296af7c9 | 1191 | while (!all_vcpus_paused()) { |
be7d6c57 | 1192 | qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex); |
bdc44640 | 1193 | CPU_FOREACH(cpu) { |
182735ef | 1194 | qemu_cpu_kick(cpu); |
296af7c9 BS |
1195 | } |
1196 | } | |
1197 | } | |
1198 | ||
2993683b IM |
1199 | void cpu_resume(CPUState *cpu) |
1200 | { | |
1201 | cpu->stop = false; | |
1202 | cpu->stopped = false; | |
1203 | qemu_cpu_kick(cpu); | |
1204 | } | |
1205 | ||
296af7c9 BS |
1206 | void resume_all_vcpus(void) |
1207 | { | |
bdc44640 | 1208 | CPUState *cpu; |
296af7c9 | 1209 | |
40daca54 | 1210 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true); |
bdc44640 | 1211 | CPU_FOREACH(cpu) { |
182735ef | 1212 | cpu_resume(cpu); |
296af7c9 BS |
1213 | } |
1214 | } | |
1215 | ||
4900116e DDAG |
1216 | /* For temporary buffers for forming a name */ |
1217 | #define VCPU_THREAD_NAME_SIZE 16 | |
1218 | ||
e5ab30a2 | 1219 | static void qemu_tcg_init_vcpu(CPUState *cpu) |
296af7c9 | 1220 | { |
4900116e | 1221 | char thread_name[VCPU_THREAD_NAME_SIZE]; |
d5f8d613 FK |
1222 | static QemuCond *tcg_halt_cond; |
1223 | static QemuThread *tcg_cpu_thread; | |
4900116e | 1224 | |
09daed84 EI |
1225 | tcg_cpu_address_space_init(cpu, cpu->as); |
1226 | ||
296af7c9 BS |
1227 | /* share a single thread for all cpus with TCG */ |
1228 | if (!tcg_cpu_thread) { | |
814e612e | 1229 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1230 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1231 | qemu_cond_init(cpu->halt_cond); | |
1232 | tcg_halt_cond = cpu->halt_cond; | |
4900116e DDAG |
1233 | snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/TCG", |
1234 | cpu->cpu_index); | |
1235 | qemu_thread_create(cpu->thread, thread_name, qemu_tcg_cpu_thread_fn, | |
1236 | cpu, QEMU_THREAD_JOINABLE); | |
1ecf47bf | 1237 | #ifdef _WIN32 |
814e612e | 1238 | cpu->hThread = qemu_thread_get_handle(cpu->thread); |
1ecf47bf | 1239 | #endif |
61a46217 | 1240 | while (!cpu->created) { |
18a85728 | 1241 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1242 | } |
814e612e | 1243 | tcg_cpu_thread = cpu->thread; |
296af7c9 | 1244 | } else { |
814e612e | 1245 | cpu->thread = tcg_cpu_thread; |
f5c121b8 | 1246 | cpu->halt_cond = tcg_halt_cond; |
296af7c9 BS |
1247 | } |
1248 | } | |
1249 | ||
48a106bd | 1250 | static void qemu_kvm_start_vcpu(CPUState *cpu) |
296af7c9 | 1251 | { |
4900116e DDAG |
1252 | char thread_name[VCPU_THREAD_NAME_SIZE]; |
1253 | ||
814e612e | 1254 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1255 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1256 | qemu_cond_init(cpu->halt_cond); | |
4900116e DDAG |
1257 | snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/KVM", |
1258 | cpu->cpu_index); | |
1259 | qemu_thread_create(cpu->thread, thread_name, qemu_kvm_cpu_thread_fn, | |
1260 | cpu, QEMU_THREAD_JOINABLE); | |
61a46217 | 1261 | while (!cpu->created) { |
18a85728 | 1262 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1263 | } |
296af7c9 BS |
1264 | } |
1265 | ||
10a9021d | 1266 | static void qemu_dummy_start_vcpu(CPUState *cpu) |
c7f0f3b1 | 1267 | { |
4900116e DDAG |
1268 | char thread_name[VCPU_THREAD_NAME_SIZE]; |
1269 | ||
814e612e | 1270 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1271 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1272 | qemu_cond_init(cpu->halt_cond); | |
4900116e DDAG |
1273 | snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/DUMMY", |
1274 | cpu->cpu_index); | |
1275 | qemu_thread_create(cpu->thread, thread_name, qemu_dummy_cpu_thread_fn, cpu, | |
c7f0f3b1 | 1276 | QEMU_THREAD_JOINABLE); |
61a46217 | 1277 | while (!cpu->created) { |
c7f0f3b1 AL |
1278 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
1279 | } | |
1280 | } | |
1281 | ||
c643bed9 | 1282 | void qemu_init_vcpu(CPUState *cpu) |
296af7c9 | 1283 | { |
ce3960eb AF |
1284 | cpu->nr_cores = smp_cores; |
1285 | cpu->nr_threads = smp_threads; | |
f324e766 | 1286 | cpu->stopped = true; |
0ab07c62 | 1287 | if (kvm_enabled()) { |
48a106bd | 1288 | qemu_kvm_start_vcpu(cpu); |
c7f0f3b1 | 1289 | } else if (tcg_enabled()) { |
e5ab30a2 | 1290 | qemu_tcg_init_vcpu(cpu); |
c7f0f3b1 | 1291 | } else { |
10a9021d | 1292 | qemu_dummy_start_vcpu(cpu); |
0ab07c62 | 1293 | } |
296af7c9 BS |
1294 | } |
1295 | ||
b4a3d965 | 1296 | void cpu_stop_current(void) |
296af7c9 | 1297 | { |
4917cf44 AF |
1298 | if (current_cpu) { |
1299 | current_cpu->stop = false; | |
1300 | current_cpu->stopped = true; | |
1301 | cpu_exit(current_cpu); | |
67bb172f | 1302 | qemu_cond_signal(&qemu_pause_cond); |
b4a3d965 | 1303 | } |
296af7c9 BS |
1304 | } |
1305 | ||
56983463 | 1306 | int vm_stop(RunState state) |
296af7c9 | 1307 | { |
aa723c23 | 1308 | if (qemu_in_vcpu_thread()) { |
74892d24 | 1309 | qemu_system_vmstop_request_prepare(); |
1dfb4dd9 | 1310 | qemu_system_vmstop_request(state); |
296af7c9 BS |
1311 | /* |
1312 | * FIXME: should not return to device code in case | |
1313 | * vm_stop() has been requested. | |
1314 | */ | |
b4a3d965 | 1315 | cpu_stop_current(); |
56983463 | 1316 | return 0; |
296af7c9 | 1317 | } |
56983463 KW |
1318 | |
1319 | return do_vm_stop(state); | |
296af7c9 BS |
1320 | } |
1321 | ||
8a9236f1 LC |
1322 | /* does a state transition even if the VM is already stopped, |
1323 | current state is forgotten forever */ | |
56983463 | 1324 | int vm_stop_force_state(RunState state) |
8a9236f1 LC |
1325 | { |
1326 | if (runstate_is_running()) { | |
56983463 | 1327 | return vm_stop(state); |
8a9236f1 LC |
1328 | } else { |
1329 | runstate_set(state); | |
594a45ce KW |
1330 | /* Make sure to return an error if the flush in a previous vm_stop() |
1331 | * failed. */ | |
1332 | return bdrv_flush_all(); | |
8a9236f1 LC |
1333 | } |
1334 | } | |
1335 | ||
3d57f789 | 1336 | static int tcg_cpu_exec(CPUState *cpu) |
296af7c9 BS |
1337 | { |
1338 | int ret; | |
1339 | #ifdef CONFIG_PROFILER | |
1340 | int64_t ti; | |
1341 | #endif | |
1342 | ||
1343 | #ifdef CONFIG_PROFILER | |
1344 | ti = profile_getclock(); | |
1345 | #endif | |
1346 | if (use_icount) { | |
1347 | int64_t count; | |
ac70aafc | 1348 | int64_t deadline; |
296af7c9 | 1349 | int decr; |
c96778bb FK |
1350 | timers_state.qemu_icount -= (cpu->icount_decr.u16.low |
1351 | + cpu->icount_extra); | |
28ecfd7a | 1352 | cpu->icount_decr.u16.low = 0; |
efee7340 | 1353 | cpu->icount_extra = 0; |
40daca54 | 1354 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
1355 | |
1356 | /* Maintain prior (possibly buggy) behaviour where if no deadline | |
40daca54 | 1357 | * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than |
ac70aafc AB |
1358 | * INT32_MAX nanoseconds ahead, we still use INT32_MAX |
1359 | * nanoseconds. | |
1360 | */ | |
1361 | if ((deadline < 0) || (deadline > INT32_MAX)) { | |
1362 | deadline = INT32_MAX; | |
1363 | } | |
1364 | ||
1365 | count = qemu_icount_round(deadline); | |
c96778bb | 1366 | timers_state.qemu_icount += count; |
296af7c9 BS |
1367 | decr = (count > 0xffff) ? 0xffff : count; |
1368 | count -= decr; | |
28ecfd7a | 1369 | cpu->icount_decr.u16.low = decr; |
efee7340 | 1370 | cpu->icount_extra = count; |
296af7c9 | 1371 | } |
ea3e9847 | 1372 | ret = cpu_exec(cpu); |
296af7c9 | 1373 | #ifdef CONFIG_PROFILER |
89d5cbdd | 1374 | tcg_time += profile_getclock() - ti; |
296af7c9 BS |
1375 | #endif |
1376 | if (use_icount) { | |
1377 | /* Fold pending instructions back into the | |
1378 | instruction counter, and clear the interrupt flag. */ | |
c96778bb FK |
1379 | timers_state.qemu_icount -= (cpu->icount_decr.u16.low |
1380 | + cpu->icount_extra); | |
28ecfd7a | 1381 | cpu->icount_decr.u32 = 0; |
efee7340 | 1382 | cpu->icount_extra = 0; |
296af7c9 BS |
1383 | } |
1384 | return ret; | |
1385 | } | |
1386 | ||
bdb7ca67 | 1387 | static void tcg_exec_all(void) |
296af7c9 | 1388 | { |
9a36085b JK |
1389 | int r; |
1390 | ||
40daca54 AB |
1391 | /* Account partial waits to QEMU_CLOCK_VIRTUAL. */ |
1392 | qemu_clock_warp(QEMU_CLOCK_VIRTUAL); | |
ab33fcda | 1393 | |
0ab07c62 | 1394 | if (next_cpu == NULL) { |
296af7c9 | 1395 | next_cpu = first_cpu; |
0ab07c62 | 1396 | } |
bdc44640 | 1397 | for (; next_cpu != NULL && !exit_request; next_cpu = CPU_NEXT(next_cpu)) { |
182735ef | 1398 | CPUState *cpu = next_cpu; |
296af7c9 | 1399 | |
40daca54 | 1400 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, |
ed2803da | 1401 | (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0); |
296af7c9 | 1402 | |
a1fcaa73 | 1403 | if (cpu_can_run(cpu)) { |
3d57f789 | 1404 | r = tcg_cpu_exec(cpu); |
9a36085b | 1405 | if (r == EXCP_DEBUG) { |
91325046 | 1406 | cpu_handle_guest_debug(cpu); |
3c638d06 JK |
1407 | break; |
1408 | } | |
f324e766 | 1409 | } else if (cpu->stop || cpu->stopped) { |
296af7c9 BS |
1410 | break; |
1411 | } | |
1412 | } | |
aed807c8 PB |
1413 | |
1414 | /* Pairs with smp_wmb in qemu_cpu_kick. */ | |
1415 | atomic_mb_set(&exit_request, 0); | |
296af7c9 BS |
1416 | } |
1417 | ||
9a78eead | 1418 | void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) |
262353cb BS |
1419 | { |
1420 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
e916cbf8 PM |
1421 | #if defined(cpu_list) |
1422 | cpu_list(f, cpu_fprintf); | |
262353cb BS |
1423 | #endif |
1424 | } | |
de0b36b6 LC |
1425 | |
1426 | CpuInfoList *qmp_query_cpus(Error **errp) | |
1427 | { | |
1428 | CpuInfoList *head = NULL, *cur_item = NULL; | |
182735ef | 1429 | CPUState *cpu; |
de0b36b6 | 1430 | |
bdc44640 | 1431 | CPU_FOREACH(cpu) { |
de0b36b6 | 1432 | CpuInfoList *info; |
182735ef AF |
1433 | #if defined(TARGET_I386) |
1434 | X86CPU *x86_cpu = X86_CPU(cpu); | |
1435 | CPUX86State *env = &x86_cpu->env; | |
1436 | #elif defined(TARGET_PPC) | |
1437 | PowerPCCPU *ppc_cpu = POWERPC_CPU(cpu); | |
1438 | CPUPPCState *env = &ppc_cpu->env; | |
1439 | #elif defined(TARGET_SPARC) | |
1440 | SPARCCPU *sparc_cpu = SPARC_CPU(cpu); | |
1441 | CPUSPARCState *env = &sparc_cpu->env; | |
1442 | #elif defined(TARGET_MIPS) | |
1443 | MIPSCPU *mips_cpu = MIPS_CPU(cpu); | |
1444 | CPUMIPSState *env = &mips_cpu->env; | |
48e06fe0 BK |
1445 | #elif defined(TARGET_TRICORE) |
1446 | TriCoreCPU *tricore_cpu = TRICORE_CPU(cpu); | |
1447 | CPUTriCoreState *env = &tricore_cpu->env; | |
182735ef | 1448 | #endif |
de0b36b6 | 1449 | |
cb446eca | 1450 | cpu_synchronize_state(cpu); |
de0b36b6 LC |
1451 | |
1452 | info = g_malloc0(sizeof(*info)); | |
1453 | info->value = g_malloc0(sizeof(*info->value)); | |
55e5c285 | 1454 | info->value->CPU = cpu->cpu_index; |
182735ef | 1455 | info->value->current = (cpu == first_cpu); |
259186a7 | 1456 | info->value->halted = cpu->halted; |
58f88d4b | 1457 | info->value->qom_path = object_get_canonical_path(OBJECT(cpu)); |
9f09e18a | 1458 | info->value->thread_id = cpu->thread_id; |
de0b36b6 LC |
1459 | #if defined(TARGET_I386) |
1460 | info->value->has_pc = true; | |
1461 | info->value->pc = env->eip + env->segs[R_CS].base; | |
1462 | #elif defined(TARGET_PPC) | |
1463 | info->value->has_nip = true; | |
1464 | info->value->nip = env->nip; | |
1465 | #elif defined(TARGET_SPARC) | |
1466 | info->value->has_pc = true; | |
1467 | info->value->pc = env->pc; | |
1468 | info->value->has_npc = true; | |
1469 | info->value->npc = env->npc; | |
1470 | #elif defined(TARGET_MIPS) | |
1471 | info->value->has_PC = true; | |
1472 | info->value->PC = env->active_tc.PC; | |
48e06fe0 BK |
1473 | #elif defined(TARGET_TRICORE) |
1474 | info->value->has_PC = true; | |
1475 | info->value->PC = env->PC; | |
de0b36b6 LC |
1476 | #endif |
1477 | ||
1478 | /* XXX: waiting for the qapi to support GSList */ | |
1479 | if (!cur_item) { | |
1480 | head = cur_item = info; | |
1481 | } else { | |
1482 | cur_item->next = info; | |
1483 | cur_item = info; | |
1484 | } | |
1485 | } | |
1486 | ||
1487 | return head; | |
1488 | } | |
0cfd6a9a LC |
1489 | |
1490 | void qmp_memsave(int64_t addr, int64_t size, const char *filename, | |
1491 | bool has_cpu, int64_t cpu_index, Error **errp) | |
1492 | { | |
1493 | FILE *f; | |
1494 | uint32_t l; | |
55e5c285 | 1495 | CPUState *cpu; |
0cfd6a9a | 1496 | uint8_t buf[1024]; |
0dc9daf0 | 1497 | int64_t orig_addr = addr, orig_size = size; |
0cfd6a9a LC |
1498 | |
1499 | if (!has_cpu) { | |
1500 | cpu_index = 0; | |
1501 | } | |
1502 | ||
151d1322 AF |
1503 | cpu = qemu_get_cpu(cpu_index); |
1504 | if (cpu == NULL) { | |
c6bd8c70 MA |
1505 | error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index", |
1506 | "a CPU number"); | |
0cfd6a9a LC |
1507 | return; |
1508 | } | |
1509 | ||
1510 | f = fopen(filename, "wb"); | |
1511 | if (!f) { | |
618da851 | 1512 | error_setg_file_open(errp, errno, filename); |
0cfd6a9a LC |
1513 | return; |
1514 | } | |
1515 | ||
1516 | while (size != 0) { | |
1517 | l = sizeof(buf); | |
1518 | if (l > size) | |
1519 | l = size; | |
2f4d0f59 | 1520 | if (cpu_memory_rw_debug(cpu, addr, buf, l, 0) != 0) { |
0dc9daf0 BP |
1521 | error_setg(errp, "Invalid addr 0x%016" PRIx64 "/size %" PRId64 |
1522 | " specified", orig_addr, orig_size); | |
2f4d0f59 AK |
1523 | goto exit; |
1524 | } | |
0cfd6a9a | 1525 | if (fwrite(buf, 1, l, f) != l) { |
c6bd8c70 | 1526 | error_setg(errp, QERR_IO_ERROR); |
0cfd6a9a LC |
1527 | goto exit; |
1528 | } | |
1529 | addr += l; | |
1530 | size -= l; | |
1531 | } | |
1532 | ||
1533 | exit: | |
1534 | fclose(f); | |
1535 | } | |
6d3962bf LC |
1536 | |
1537 | void qmp_pmemsave(int64_t addr, int64_t size, const char *filename, | |
1538 | Error **errp) | |
1539 | { | |
1540 | FILE *f; | |
1541 | uint32_t l; | |
1542 | uint8_t buf[1024]; | |
1543 | ||
1544 | f = fopen(filename, "wb"); | |
1545 | if (!f) { | |
618da851 | 1546 | error_setg_file_open(errp, errno, filename); |
6d3962bf LC |
1547 | return; |
1548 | } | |
1549 | ||
1550 | while (size != 0) { | |
1551 | l = sizeof(buf); | |
1552 | if (l > size) | |
1553 | l = size; | |
eb6282f2 | 1554 | cpu_physical_memory_read(addr, buf, l); |
6d3962bf | 1555 | if (fwrite(buf, 1, l, f) != l) { |
c6bd8c70 | 1556 | error_setg(errp, QERR_IO_ERROR); |
6d3962bf LC |
1557 | goto exit; |
1558 | } | |
1559 | addr += l; | |
1560 | size -= l; | |
1561 | } | |
1562 | ||
1563 | exit: | |
1564 | fclose(f); | |
1565 | } | |
ab49ab5c LC |
1566 | |
1567 | void qmp_inject_nmi(Error **errp) | |
1568 | { | |
1569 | #if defined(TARGET_I386) | |
182735ef AF |
1570 | CPUState *cs; |
1571 | ||
bdc44640 | 1572 | CPU_FOREACH(cs) { |
182735ef | 1573 | X86CPU *cpu = X86_CPU(cs); |
ab49ab5c | 1574 | |
02e51483 | 1575 | if (!cpu->apic_state) { |
182735ef | 1576 | cpu_interrupt(cs, CPU_INTERRUPT_NMI); |
02c09195 | 1577 | } else { |
02e51483 | 1578 | apic_deliver_nmi(cpu->apic_state); |
02c09195 | 1579 | } |
ab49ab5c LC |
1580 | } |
1581 | #else | |
9cb805fd | 1582 | nmi_monitor_handle(monitor_get_cpu_index(), errp); |
ab49ab5c LC |
1583 | #endif |
1584 | } | |
27498bef ST |
1585 | |
1586 | void dump_drift_info(FILE *f, fprintf_function cpu_fprintf) | |
1587 | { | |
1588 | if (!use_icount) { | |
1589 | return; | |
1590 | } | |
1591 | ||
1592 | cpu_fprintf(f, "Host - Guest clock %"PRIi64" ms\n", | |
1593 | (cpu_get_clock() - cpu_get_icount())/SCALE_MS); | |
1594 | if (icount_align_option) { | |
1595 | cpu_fprintf(f, "Max guest delay %"PRIi64" ms\n", -max_delay/SCALE_MS); | |
1596 | cpu_fprintf(f, "Max guest advance %"PRIi64" ms\n", max_advance/SCALE_MS); | |
1597 | } else { | |
1598 | cpu_fprintf(f, "Max guest delay NA\n"); | |
1599 | cpu_fprintf(f, "Max guest advance NA\n"); | |
1600 | } | |
1601 | } |