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296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
26 | #include "config-host.h" | |
27 | ||
28 | #include "monitor.h" | |
29 | #include "sysemu.h" | |
30 | #include "gdbstub.h" | |
31 | #include "dma.h" | |
32 | #include "kvm.h" | |
de0b36b6 | 33 | #include "qmp-commands.h" |
296af7c9 | 34 | |
96284e89 | 35 | #include "qemu-thread.h" |
296af7c9 | 36 | #include "cpus.h" |
8156be56 | 37 | #include "qtest.h" |
44a9b356 | 38 | #include "main-loop.h" |
ee785fed | 39 | #include "bitmap.h" |
0ff0fc19 JK |
40 | |
41 | #ifndef _WIN32 | |
a8486bc9 | 42 | #include "compatfd.h" |
0ff0fc19 | 43 | #endif |
296af7c9 | 44 | |
6d9cb73c JK |
45 | #ifdef CONFIG_LINUX |
46 | ||
47 | #include <sys/prctl.h> | |
48 | ||
c0532a76 MT |
49 | #ifndef PR_MCE_KILL |
50 | #define PR_MCE_KILL 33 | |
51 | #endif | |
52 | ||
6d9cb73c JK |
53 | #ifndef PR_MCE_KILL_SET |
54 | #define PR_MCE_KILL_SET 1 | |
55 | #endif | |
56 | ||
57 | #ifndef PR_MCE_KILL_EARLY | |
58 | #define PR_MCE_KILL_EARLY 1 | |
59 | #endif | |
60 | ||
61 | #endif /* CONFIG_LINUX */ | |
62 | ||
9349b4f9 | 63 | static CPUArchState *next_cpu; |
296af7c9 | 64 | |
ac873f1e PM |
65 | static bool cpu_thread_is_idle(CPUArchState *env) |
66 | { | |
4fdeee7c AF |
67 | CPUState *cpu = ENV_GET_CPU(env); |
68 | ||
69 | if (cpu->stop || env->queued_work_first) { | |
ac873f1e PM |
70 | return false; |
71 | } | |
f324e766 | 72 | if (cpu->stopped || !runstate_is_running()) { |
ac873f1e PM |
73 | return true; |
74 | } | |
7ae26bd4 PM |
75 | if (!env->halted || qemu_cpu_has_work(env) || |
76 | kvm_async_interrupts_enabled()) { | |
ac873f1e PM |
77 | return false; |
78 | } | |
79 | return true; | |
80 | } | |
81 | ||
82 | static bool all_cpu_threads_idle(void) | |
83 | { | |
84 | CPUArchState *env; | |
85 | ||
86 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
87 | if (!cpu_thread_is_idle(env)) { | |
88 | return false; | |
89 | } | |
90 | } | |
91 | return true; | |
92 | } | |
93 | ||
946fb27c PB |
94 | /***********************************************************/ |
95 | /* guest cycle counter */ | |
96 | ||
97 | /* Conversion factor from emulated instructions to virtual clock ticks. */ | |
98 | static int icount_time_shift; | |
99 | /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ | |
100 | #define MAX_ICOUNT_SHIFT 10 | |
101 | /* Compensate for varying guest execution speed. */ | |
102 | static int64_t qemu_icount_bias; | |
103 | static QEMUTimer *icount_rt_timer; | |
104 | static QEMUTimer *icount_vm_timer; | |
105 | static QEMUTimer *icount_warp_timer; | |
106 | static int64_t vm_clock_warp_start; | |
107 | static int64_t qemu_icount; | |
108 | ||
109 | typedef struct TimersState { | |
110 | int64_t cpu_ticks_prev; | |
111 | int64_t cpu_ticks_offset; | |
112 | int64_t cpu_clock_offset; | |
113 | int32_t cpu_ticks_enabled; | |
114 | int64_t dummy; | |
115 | } TimersState; | |
116 | ||
117 | TimersState timers_state; | |
118 | ||
119 | /* Return the virtual CPU time, based on the instruction counter. */ | |
120 | int64_t cpu_get_icount(void) | |
121 | { | |
122 | int64_t icount; | |
9349b4f9 | 123 | CPUArchState *env = cpu_single_env; |
946fb27c PB |
124 | |
125 | icount = qemu_icount; | |
126 | if (env) { | |
127 | if (!can_do_io(env)) { | |
128 | fprintf(stderr, "Bad clock read\n"); | |
129 | } | |
130 | icount -= (env->icount_decr.u16.low + env->icount_extra); | |
131 | } | |
132 | return qemu_icount_bias + (icount << icount_time_shift); | |
133 | } | |
134 | ||
135 | /* return the host CPU cycle counter and handle stop/restart */ | |
136 | int64_t cpu_get_ticks(void) | |
137 | { | |
138 | if (use_icount) { | |
139 | return cpu_get_icount(); | |
140 | } | |
141 | if (!timers_state.cpu_ticks_enabled) { | |
142 | return timers_state.cpu_ticks_offset; | |
143 | } else { | |
144 | int64_t ticks; | |
145 | ticks = cpu_get_real_ticks(); | |
146 | if (timers_state.cpu_ticks_prev > ticks) { | |
147 | /* Note: non increasing ticks may happen if the host uses | |
148 | software suspend */ | |
149 | timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks; | |
150 | } | |
151 | timers_state.cpu_ticks_prev = ticks; | |
152 | return ticks + timers_state.cpu_ticks_offset; | |
153 | } | |
154 | } | |
155 | ||
156 | /* return the host CPU monotonic timer and handle stop/restart */ | |
157 | int64_t cpu_get_clock(void) | |
158 | { | |
159 | int64_t ti; | |
160 | if (!timers_state.cpu_ticks_enabled) { | |
161 | return timers_state.cpu_clock_offset; | |
162 | } else { | |
163 | ti = get_clock(); | |
164 | return ti + timers_state.cpu_clock_offset; | |
165 | } | |
166 | } | |
167 | ||
168 | /* enable cpu_get_ticks() */ | |
169 | void cpu_enable_ticks(void) | |
170 | { | |
171 | if (!timers_state.cpu_ticks_enabled) { | |
172 | timers_state.cpu_ticks_offset -= cpu_get_real_ticks(); | |
173 | timers_state.cpu_clock_offset -= get_clock(); | |
174 | timers_state.cpu_ticks_enabled = 1; | |
175 | } | |
176 | } | |
177 | ||
178 | /* disable cpu_get_ticks() : the clock is stopped. You must not call | |
179 | cpu_get_ticks() after that. */ | |
180 | void cpu_disable_ticks(void) | |
181 | { | |
182 | if (timers_state.cpu_ticks_enabled) { | |
183 | timers_state.cpu_ticks_offset = cpu_get_ticks(); | |
184 | timers_state.cpu_clock_offset = cpu_get_clock(); | |
185 | timers_state.cpu_ticks_enabled = 0; | |
186 | } | |
187 | } | |
188 | ||
189 | /* Correlation between real and virtual time is always going to be | |
190 | fairly approximate, so ignore small variation. | |
191 | When the guest is idle real and virtual time will be aligned in | |
192 | the IO wait loop. */ | |
193 | #define ICOUNT_WOBBLE (get_ticks_per_sec() / 10) | |
194 | ||
195 | static void icount_adjust(void) | |
196 | { | |
197 | int64_t cur_time; | |
198 | int64_t cur_icount; | |
199 | int64_t delta; | |
200 | static int64_t last_delta; | |
201 | /* If the VM is not running, then do nothing. */ | |
202 | if (!runstate_is_running()) { | |
203 | return; | |
204 | } | |
205 | cur_time = cpu_get_clock(); | |
206 | cur_icount = qemu_get_clock_ns(vm_clock); | |
207 | delta = cur_icount - cur_time; | |
208 | /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */ | |
209 | if (delta > 0 | |
210 | && last_delta + ICOUNT_WOBBLE < delta * 2 | |
211 | && icount_time_shift > 0) { | |
212 | /* The guest is getting too far ahead. Slow time down. */ | |
213 | icount_time_shift--; | |
214 | } | |
215 | if (delta < 0 | |
216 | && last_delta - ICOUNT_WOBBLE > delta * 2 | |
217 | && icount_time_shift < MAX_ICOUNT_SHIFT) { | |
218 | /* The guest is getting too far behind. Speed time up. */ | |
219 | icount_time_shift++; | |
220 | } | |
221 | last_delta = delta; | |
222 | qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift); | |
223 | } | |
224 | ||
225 | static void icount_adjust_rt(void *opaque) | |
226 | { | |
227 | qemu_mod_timer(icount_rt_timer, | |
228 | qemu_get_clock_ms(rt_clock) + 1000); | |
229 | icount_adjust(); | |
230 | } | |
231 | ||
232 | static void icount_adjust_vm(void *opaque) | |
233 | { | |
234 | qemu_mod_timer(icount_vm_timer, | |
235 | qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10); | |
236 | icount_adjust(); | |
237 | } | |
238 | ||
239 | static int64_t qemu_icount_round(int64_t count) | |
240 | { | |
241 | return (count + (1 << icount_time_shift) - 1) >> icount_time_shift; | |
242 | } | |
243 | ||
244 | static void icount_warp_rt(void *opaque) | |
245 | { | |
246 | if (vm_clock_warp_start == -1) { | |
247 | return; | |
248 | } | |
249 | ||
250 | if (runstate_is_running()) { | |
251 | int64_t clock = qemu_get_clock_ns(rt_clock); | |
252 | int64_t warp_delta = clock - vm_clock_warp_start; | |
253 | if (use_icount == 1) { | |
254 | qemu_icount_bias += warp_delta; | |
255 | } else { | |
256 | /* | |
257 | * In adaptive mode, do not let the vm_clock run too | |
258 | * far ahead of real time. | |
259 | */ | |
260 | int64_t cur_time = cpu_get_clock(); | |
261 | int64_t cur_icount = qemu_get_clock_ns(vm_clock); | |
262 | int64_t delta = cur_time - cur_icount; | |
263 | qemu_icount_bias += MIN(warp_delta, delta); | |
264 | } | |
265 | if (qemu_clock_expired(vm_clock)) { | |
266 | qemu_notify_event(); | |
267 | } | |
268 | } | |
269 | vm_clock_warp_start = -1; | |
270 | } | |
271 | ||
8156be56 PB |
272 | void qtest_clock_warp(int64_t dest) |
273 | { | |
274 | int64_t clock = qemu_get_clock_ns(vm_clock); | |
275 | assert(qtest_enabled()); | |
276 | while (clock < dest) { | |
277 | int64_t deadline = qemu_clock_deadline(vm_clock); | |
278 | int64_t warp = MIN(dest - clock, deadline); | |
279 | qemu_icount_bias += warp; | |
280 | qemu_run_timers(vm_clock); | |
281 | clock = qemu_get_clock_ns(vm_clock); | |
282 | } | |
283 | qemu_notify_event(); | |
284 | } | |
285 | ||
946fb27c PB |
286 | void qemu_clock_warp(QEMUClock *clock) |
287 | { | |
288 | int64_t deadline; | |
289 | ||
290 | /* | |
291 | * There are too many global variables to make the "warp" behavior | |
292 | * applicable to other clocks. But a clock argument removes the | |
293 | * need for if statements all over the place. | |
294 | */ | |
295 | if (clock != vm_clock || !use_icount) { | |
296 | return; | |
297 | } | |
298 | ||
299 | /* | |
300 | * If the CPUs have been sleeping, advance the vm_clock timer now. This | |
301 | * ensures that the deadline for the timer is computed correctly below. | |
302 | * This also makes sure that the insn counter is synchronized before the | |
303 | * CPU starts running, in case the CPU is woken by an event other than | |
304 | * the earliest vm_clock timer. | |
305 | */ | |
306 | icount_warp_rt(NULL); | |
307 | if (!all_cpu_threads_idle() || !qemu_clock_has_timers(vm_clock)) { | |
308 | qemu_del_timer(icount_warp_timer); | |
309 | return; | |
310 | } | |
311 | ||
8156be56 PB |
312 | if (qtest_enabled()) { |
313 | /* When testing, qtest commands advance icount. */ | |
314 | return; | |
315 | } | |
316 | ||
946fb27c PB |
317 | vm_clock_warp_start = qemu_get_clock_ns(rt_clock); |
318 | deadline = qemu_clock_deadline(vm_clock); | |
319 | if (deadline > 0) { | |
320 | /* | |
321 | * Ensure the vm_clock proceeds even when the virtual CPU goes to | |
322 | * sleep. Otherwise, the CPU might be waiting for a future timer | |
323 | * interrupt to wake it up, but the interrupt never comes because | |
324 | * the vCPU isn't running any insns and thus doesn't advance the | |
325 | * vm_clock. | |
326 | * | |
327 | * An extreme solution for this problem would be to never let VCPUs | |
328 | * sleep in icount mode if there is a pending vm_clock timer; rather | |
329 | * time could just advance to the next vm_clock event. Instead, we | |
330 | * do stop VCPUs and only advance vm_clock after some "real" time, | |
331 | * (related to the time left until the next event) has passed. This | |
332 | * rt_clock timer will do this. This avoids that the warps are too | |
333 | * visible externally---for example, you will not be sending network | |
07f35073 | 334 | * packets continuously instead of every 100ms. |
946fb27c PB |
335 | */ |
336 | qemu_mod_timer(icount_warp_timer, vm_clock_warp_start + deadline); | |
337 | } else { | |
338 | qemu_notify_event(); | |
339 | } | |
340 | } | |
341 | ||
342 | static const VMStateDescription vmstate_timers = { | |
343 | .name = "timer", | |
344 | .version_id = 2, | |
345 | .minimum_version_id = 1, | |
346 | .minimum_version_id_old = 1, | |
347 | .fields = (VMStateField[]) { | |
348 | VMSTATE_INT64(cpu_ticks_offset, TimersState), | |
349 | VMSTATE_INT64(dummy, TimersState), | |
350 | VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2), | |
351 | VMSTATE_END_OF_LIST() | |
352 | } | |
353 | }; | |
354 | ||
355 | void configure_icount(const char *option) | |
356 | { | |
357 | vmstate_register(NULL, 0, &vmstate_timers, &timers_state); | |
358 | if (!option) { | |
359 | return; | |
360 | } | |
361 | ||
362 | icount_warp_timer = qemu_new_timer_ns(rt_clock, icount_warp_rt, NULL); | |
363 | if (strcmp(option, "auto") != 0) { | |
364 | icount_time_shift = strtol(option, NULL, 0); | |
365 | use_icount = 1; | |
366 | return; | |
367 | } | |
368 | ||
369 | use_icount = 2; | |
370 | ||
371 | /* 125MIPS seems a reasonable initial guess at the guest speed. | |
372 | It will be corrected fairly quickly anyway. */ | |
373 | icount_time_shift = 3; | |
374 | ||
375 | /* Have both realtime and virtual time triggers for speed adjustment. | |
376 | The realtime trigger catches emulated time passing too slowly, | |
377 | the virtual time trigger catches emulated time passing too fast. | |
378 | Realtime triggers occur even when idle, so use them less frequently | |
379 | than VM triggers. */ | |
380 | icount_rt_timer = qemu_new_timer_ms(rt_clock, icount_adjust_rt, NULL); | |
381 | qemu_mod_timer(icount_rt_timer, | |
382 | qemu_get_clock_ms(rt_clock) + 1000); | |
383 | icount_vm_timer = qemu_new_timer_ns(vm_clock, icount_adjust_vm, NULL); | |
384 | qemu_mod_timer(icount_vm_timer, | |
385 | qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10); | |
386 | } | |
387 | ||
296af7c9 BS |
388 | /***********************************************************/ |
389 | void hw_error(const char *fmt, ...) | |
390 | { | |
391 | va_list ap; | |
9349b4f9 | 392 | CPUArchState *env; |
296af7c9 BS |
393 | |
394 | va_start(ap, fmt); | |
395 | fprintf(stderr, "qemu: hardware error: "); | |
396 | vfprintf(stderr, fmt, ap); | |
397 | fprintf(stderr, "\n"); | |
398 | for(env = first_cpu; env != NULL; env = env->next_cpu) { | |
399 | fprintf(stderr, "CPU #%d:\n", env->cpu_index); | |
6fd2a026 | 400 | cpu_dump_state(env, stderr, fprintf, CPU_DUMP_FPU); |
296af7c9 BS |
401 | } |
402 | va_end(ap); | |
403 | abort(); | |
404 | } | |
405 | ||
406 | void cpu_synchronize_all_states(void) | |
407 | { | |
9349b4f9 | 408 | CPUArchState *cpu; |
296af7c9 BS |
409 | |
410 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
411 | cpu_synchronize_state(cpu); | |
412 | } | |
413 | } | |
414 | ||
415 | void cpu_synchronize_all_post_reset(void) | |
416 | { | |
9349b4f9 | 417 | CPUArchState *cpu; |
296af7c9 BS |
418 | |
419 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
420 | cpu_synchronize_post_reset(cpu); | |
421 | } | |
422 | } | |
423 | ||
424 | void cpu_synchronize_all_post_init(void) | |
425 | { | |
9349b4f9 | 426 | CPUArchState *cpu; |
296af7c9 BS |
427 | |
428 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
429 | cpu_synchronize_post_init(cpu); | |
430 | } | |
431 | } | |
432 | ||
2fa45344 | 433 | bool cpu_is_stopped(CPUState *cpu) |
3ae9501c | 434 | { |
f324e766 | 435 | return !runstate_is_running() || cpu->stopped; |
3ae9501c MT |
436 | } |
437 | ||
1dfb4dd9 | 438 | static void do_vm_stop(RunState state) |
296af7c9 | 439 | { |
1354869c | 440 | if (runstate_is_running()) { |
296af7c9 | 441 | cpu_disable_ticks(); |
296af7c9 | 442 | pause_all_vcpus(); |
f5bbfba1 | 443 | runstate_set(state); |
1dfb4dd9 | 444 | vm_state_notify(0, state); |
922453bc | 445 | bdrv_drain_all(); |
55df6f33 | 446 | bdrv_flush_all(); |
296af7c9 BS |
447 | monitor_protocol_event(QEVENT_STOP, NULL); |
448 | } | |
449 | } | |
450 | ||
9349b4f9 | 451 | static int cpu_can_run(CPUArchState *env) |
296af7c9 | 452 | { |
4fdeee7c AF |
453 | CPUState *cpu = ENV_GET_CPU(env); |
454 | ||
455 | if (cpu->stop) { | |
296af7c9 | 456 | return 0; |
0ab07c62 | 457 | } |
f324e766 | 458 | if (cpu->stopped || !runstate_is_running()) { |
296af7c9 | 459 | return 0; |
0ab07c62 | 460 | } |
296af7c9 BS |
461 | return 1; |
462 | } | |
463 | ||
9349b4f9 | 464 | static void cpu_handle_guest_debug(CPUArchState *env) |
83f338f7 | 465 | { |
f324e766 AF |
466 | CPUState *cpu = ENV_GET_CPU(env); |
467 | ||
3c638d06 | 468 | gdb_set_stop_cpu(env); |
8cf71710 | 469 | qemu_system_debug_request(); |
f324e766 | 470 | cpu->stopped = true; |
3c638d06 JK |
471 | } |
472 | ||
714bd040 PB |
473 | static void cpu_signal(int sig) |
474 | { | |
475 | if (cpu_single_env) { | |
476 | cpu_exit(cpu_single_env); | |
477 | } | |
478 | exit_request = 1; | |
479 | } | |
714bd040 | 480 | |
6d9cb73c JK |
481 | #ifdef CONFIG_LINUX |
482 | static void sigbus_reraise(void) | |
483 | { | |
484 | sigset_t set; | |
485 | struct sigaction action; | |
486 | ||
487 | memset(&action, 0, sizeof(action)); | |
488 | action.sa_handler = SIG_DFL; | |
489 | if (!sigaction(SIGBUS, &action, NULL)) { | |
490 | raise(SIGBUS); | |
491 | sigemptyset(&set); | |
492 | sigaddset(&set, SIGBUS); | |
493 | sigprocmask(SIG_UNBLOCK, &set, NULL); | |
494 | } | |
495 | perror("Failed to re-raise SIGBUS!\n"); | |
496 | abort(); | |
497 | } | |
498 | ||
499 | static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo, | |
500 | void *ctx) | |
501 | { | |
502 | if (kvm_on_sigbus(siginfo->ssi_code, | |
503 | (void *)(intptr_t)siginfo->ssi_addr)) { | |
504 | sigbus_reraise(); | |
505 | } | |
506 | } | |
507 | ||
508 | static void qemu_init_sigbus(void) | |
509 | { | |
510 | struct sigaction action; | |
511 | ||
512 | memset(&action, 0, sizeof(action)); | |
513 | action.sa_flags = SA_SIGINFO; | |
514 | action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler; | |
515 | sigaction(SIGBUS, &action, NULL); | |
516 | ||
517 | prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0); | |
518 | } | |
519 | ||
9349b4f9 | 520 | static void qemu_kvm_eat_signals(CPUArchState *env) |
1ab3c6c0 JK |
521 | { |
522 | struct timespec ts = { 0, 0 }; | |
523 | siginfo_t siginfo; | |
524 | sigset_t waitset; | |
525 | sigset_t chkset; | |
526 | int r; | |
527 | ||
528 | sigemptyset(&waitset); | |
529 | sigaddset(&waitset, SIG_IPI); | |
530 | sigaddset(&waitset, SIGBUS); | |
531 | ||
532 | do { | |
533 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
534 | if (r == -1 && !(errno == EAGAIN || errno == EINTR)) { | |
535 | perror("sigtimedwait"); | |
536 | exit(1); | |
537 | } | |
538 | ||
539 | switch (r) { | |
540 | case SIGBUS: | |
541 | if (kvm_on_sigbus_vcpu(env, siginfo.si_code, siginfo.si_addr)) { | |
542 | sigbus_reraise(); | |
543 | } | |
544 | break; | |
545 | default: | |
546 | break; | |
547 | } | |
548 | ||
549 | r = sigpending(&chkset); | |
550 | if (r == -1) { | |
551 | perror("sigpending"); | |
552 | exit(1); | |
553 | } | |
554 | } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS)); | |
1ab3c6c0 JK |
555 | } |
556 | ||
6d9cb73c JK |
557 | #else /* !CONFIG_LINUX */ |
558 | ||
559 | static void qemu_init_sigbus(void) | |
560 | { | |
561 | } | |
1ab3c6c0 | 562 | |
9349b4f9 | 563 | static void qemu_kvm_eat_signals(CPUArchState *env) |
1ab3c6c0 JK |
564 | { |
565 | } | |
6d9cb73c JK |
566 | #endif /* !CONFIG_LINUX */ |
567 | ||
296af7c9 | 568 | #ifndef _WIN32 |
55f8d6ac JK |
569 | static void dummy_signal(int sig) |
570 | { | |
571 | } | |
55f8d6ac | 572 | |
9349b4f9 | 573 | static void qemu_kvm_init_cpu_signals(CPUArchState *env) |
714bd040 PB |
574 | { |
575 | int r; | |
576 | sigset_t set; | |
577 | struct sigaction sigact; | |
578 | ||
579 | memset(&sigact, 0, sizeof(sigact)); | |
580 | sigact.sa_handler = dummy_signal; | |
581 | sigaction(SIG_IPI, &sigact, NULL); | |
582 | ||
714bd040 PB |
583 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
584 | sigdelset(&set, SIG_IPI); | |
714bd040 PB |
585 | sigdelset(&set, SIGBUS); |
586 | r = kvm_set_signal_mask(env, &set); | |
587 | if (r) { | |
588 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
589 | exit(1); | |
590 | } | |
591 | } | |
592 | ||
593 | static void qemu_tcg_init_cpu_signals(void) | |
594 | { | |
714bd040 PB |
595 | sigset_t set; |
596 | struct sigaction sigact; | |
597 | ||
598 | memset(&sigact, 0, sizeof(sigact)); | |
599 | sigact.sa_handler = cpu_signal; | |
600 | sigaction(SIG_IPI, &sigact, NULL); | |
601 | ||
602 | sigemptyset(&set); | |
603 | sigaddset(&set, SIG_IPI); | |
604 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
714bd040 PB |
605 | } |
606 | ||
55f8d6ac | 607 | #else /* _WIN32 */ |
9349b4f9 | 608 | static void qemu_kvm_init_cpu_signals(CPUArchState *env) |
ff48eb5f | 609 | { |
714bd040 PB |
610 | abort(); |
611 | } | |
ff48eb5f | 612 | |
714bd040 PB |
613 | static void qemu_tcg_init_cpu_signals(void) |
614 | { | |
ff48eb5f | 615 | } |
714bd040 | 616 | #endif /* _WIN32 */ |
ff48eb5f | 617 | |
b2532d88 | 618 | static QemuMutex qemu_global_mutex; |
46daff13 PB |
619 | static QemuCond qemu_io_proceeded_cond; |
620 | static bool iothread_requesting_mutex; | |
296af7c9 BS |
621 | |
622 | static QemuThread io_thread; | |
623 | ||
624 | static QemuThread *tcg_cpu_thread; | |
625 | static QemuCond *tcg_halt_cond; | |
626 | ||
296af7c9 BS |
627 | /* cpu creation */ |
628 | static QemuCond qemu_cpu_cond; | |
629 | /* system init */ | |
296af7c9 | 630 | static QemuCond qemu_pause_cond; |
e82bcec2 | 631 | static QemuCond qemu_work_cond; |
296af7c9 | 632 | |
d3b12f5d | 633 | void qemu_init_cpu_loop(void) |
296af7c9 | 634 | { |
6d9cb73c | 635 | qemu_init_sigbus(); |
ed94592b | 636 | qemu_cond_init(&qemu_cpu_cond); |
ed94592b AL |
637 | qemu_cond_init(&qemu_pause_cond); |
638 | qemu_cond_init(&qemu_work_cond); | |
46daff13 | 639 | qemu_cond_init(&qemu_io_proceeded_cond); |
296af7c9 | 640 | qemu_mutex_init(&qemu_global_mutex); |
296af7c9 | 641 | |
b7680cb6 | 642 | qemu_thread_get_self(&io_thread); |
296af7c9 BS |
643 | } |
644 | ||
9349b4f9 | 645 | void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data) |
e82bcec2 | 646 | { |
60e82579 | 647 | CPUState *cpu = ENV_GET_CPU(env); |
e82bcec2 MT |
648 | struct qemu_work_item wi; |
649 | ||
60e82579 | 650 | if (qemu_cpu_is_self(cpu)) { |
e82bcec2 MT |
651 | func(data); |
652 | return; | |
653 | } | |
654 | ||
655 | wi.func = func; | |
656 | wi.data = data; | |
0ab07c62 | 657 | if (!env->queued_work_first) { |
e82bcec2 | 658 | env->queued_work_first = &wi; |
0ab07c62 | 659 | } else { |
e82bcec2 | 660 | env->queued_work_last->next = &wi; |
0ab07c62 | 661 | } |
e82bcec2 MT |
662 | env->queued_work_last = &wi; |
663 | wi.next = NULL; | |
664 | wi.done = false; | |
665 | ||
666 | qemu_cpu_kick(env); | |
667 | while (!wi.done) { | |
9349b4f9 | 668 | CPUArchState *self_env = cpu_single_env; |
e82bcec2 MT |
669 | |
670 | qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex); | |
671 | cpu_single_env = self_env; | |
672 | } | |
673 | } | |
674 | ||
9349b4f9 | 675 | static void flush_queued_work(CPUArchState *env) |
e82bcec2 MT |
676 | { |
677 | struct qemu_work_item *wi; | |
678 | ||
0ab07c62 | 679 | if (!env->queued_work_first) { |
e82bcec2 | 680 | return; |
0ab07c62 | 681 | } |
e82bcec2 MT |
682 | |
683 | while ((wi = env->queued_work_first)) { | |
684 | env->queued_work_first = wi->next; | |
685 | wi->func(wi->data); | |
686 | wi->done = true; | |
687 | } | |
688 | env->queued_work_last = NULL; | |
689 | qemu_cond_broadcast(&qemu_work_cond); | |
690 | } | |
691 | ||
9349b4f9 | 692 | static void qemu_wait_io_event_common(CPUArchState *env) |
296af7c9 | 693 | { |
216fc9a4 AF |
694 | CPUState *cpu = ENV_GET_CPU(env); |
695 | ||
4fdeee7c AF |
696 | if (cpu->stop) { |
697 | cpu->stop = false; | |
f324e766 | 698 | cpu->stopped = true; |
296af7c9 BS |
699 | qemu_cond_signal(&qemu_pause_cond); |
700 | } | |
e82bcec2 | 701 | flush_queued_work(env); |
216fc9a4 | 702 | cpu->thread_kicked = false; |
296af7c9 BS |
703 | } |
704 | ||
6cabe1f3 | 705 | static void qemu_tcg_wait_io_event(void) |
296af7c9 | 706 | { |
9349b4f9 | 707 | CPUArchState *env; |
6cabe1f3 | 708 | |
16400322 | 709 | while (all_cpu_threads_idle()) { |
ab33fcda PB |
710 | /* Start accounting real time to the virtual clock if the CPUs |
711 | are idle. */ | |
712 | qemu_clock_warp(vm_clock); | |
9705fbb5 | 713 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
16400322 | 714 | } |
296af7c9 | 715 | |
46daff13 PB |
716 | while (iothread_requesting_mutex) { |
717 | qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex); | |
718 | } | |
6cabe1f3 JK |
719 | |
720 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
721 | qemu_wait_io_event_common(env); | |
722 | } | |
296af7c9 BS |
723 | } |
724 | ||
9349b4f9 | 725 | static void qemu_kvm_wait_io_event(CPUArchState *env) |
296af7c9 | 726 | { |
16400322 | 727 | while (cpu_thread_is_idle(env)) { |
9705fbb5 | 728 | qemu_cond_wait(env->halt_cond, &qemu_global_mutex); |
16400322 | 729 | } |
296af7c9 | 730 | |
5db5bdac | 731 | qemu_kvm_eat_signals(env); |
296af7c9 BS |
732 | qemu_wait_io_event_common(env); |
733 | } | |
734 | ||
7e97cd88 | 735 | static void *qemu_kvm_cpu_thread_fn(void *arg) |
296af7c9 | 736 | { |
9349b4f9 | 737 | CPUArchState *env = arg; |
814e612e | 738 | CPUState *cpu = ENV_GET_CPU(env); |
84b4915d | 739 | int r; |
296af7c9 | 740 | |
6164e6d6 | 741 | qemu_mutex_lock(&qemu_global_mutex); |
814e612e | 742 | qemu_thread_get_self(cpu->thread); |
dc7a09cf | 743 | env->thread_id = qemu_get_thread_id(); |
e479c207 | 744 | cpu_single_env = env; |
296af7c9 | 745 | |
84b4915d JK |
746 | r = kvm_init_vcpu(env); |
747 | if (r < 0) { | |
748 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
749 | exit(1); | |
750 | } | |
296af7c9 | 751 | |
55f8d6ac | 752 | qemu_kvm_init_cpu_signals(env); |
296af7c9 BS |
753 | |
754 | /* signal CPU creation */ | |
61a46217 | 755 | cpu->created = true; |
296af7c9 BS |
756 | qemu_cond_signal(&qemu_cpu_cond); |
757 | ||
296af7c9 | 758 | while (1) { |
0ab07c62 | 759 | if (cpu_can_run(env)) { |
6792a57b | 760 | r = kvm_cpu_exec(env); |
83f338f7 | 761 | if (r == EXCP_DEBUG) { |
1009d2ed | 762 | cpu_handle_guest_debug(env); |
83f338f7 | 763 | } |
0ab07c62 | 764 | } |
296af7c9 BS |
765 | qemu_kvm_wait_io_event(env); |
766 | } | |
767 | ||
768 | return NULL; | |
769 | } | |
770 | ||
c7f0f3b1 AL |
771 | static void *qemu_dummy_cpu_thread_fn(void *arg) |
772 | { | |
773 | #ifdef _WIN32 | |
774 | fprintf(stderr, "qtest is not supported under Windows\n"); | |
775 | exit(1); | |
776 | #else | |
777 | CPUArchState *env = arg; | |
814e612e | 778 | CPUState *cpu = ENV_GET_CPU(env); |
c7f0f3b1 AL |
779 | sigset_t waitset; |
780 | int r; | |
781 | ||
782 | qemu_mutex_lock_iothread(); | |
814e612e | 783 | qemu_thread_get_self(cpu->thread); |
c7f0f3b1 AL |
784 | env->thread_id = qemu_get_thread_id(); |
785 | ||
786 | sigemptyset(&waitset); | |
787 | sigaddset(&waitset, SIG_IPI); | |
788 | ||
789 | /* signal CPU creation */ | |
61a46217 | 790 | cpu->created = true; |
c7f0f3b1 AL |
791 | qemu_cond_signal(&qemu_cpu_cond); |
792 | ||
793 | cpu_single_env = env; | |
794 | while (1) { | |
795 | cpu_single_env = NULL; | |
796 | qemu_mutex_unlock_iothread(); | |
797 | do { | |
798 | int sig; | |
799 | r = sigwait(&waitset, &sig); | |
800 | } while (r == -1 && (errno == EAGAIN || errno == EINTR)); | |
801 | if (r == -1) { | |
802 | perror("sigwait"); | |
803 | exit(1); | |
804 | } | |
805 | qemu_mutex_lock_iothread(); | |
806 | cpu_single_env = env; | |
807 | qemu_wait_io_event_common(env); | |
808 | } | |
809 | ||
810 | return NULL; | |
811 | #endif | |
812 | } | |
813 | ||
bdb7ca67 JK |
814 | static void tcg_exec_all(void); |
815 | ||
7e97cd88 | 816 | static void *qemu_tcg_cpu_thread_fn(void *arg) |
296af7c9 | 817 | { |
9349b4f9 | 818 | CPUArchState *env = arg; |
814e612e | 819 | CPUState *cpu = ENV_GET_CPU(env); |
296af7c9 | 820 | |
55f8d6ac | 821 | qemu_tcg_init_cpu_signals(); |
814e612e | 822 | qemu_thread_get_self(cpu->thread); |
296af7c9 BS |
823 | |
824 | /* signal CPU creation */ | |
825 | qemu_mutex_lock(&qemu_global_mutex); | |
0ab07c62 | 826 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
61a46217 | 827 | cpu = ENV_GET_CPU(env); |
dc7a09cf | 828 | env->thread_id = qemu_get_thread_id(); |
61a46217 | 829 | cpu->created = true; |
0ab07c62 | 830 | } |
296af7c9 BS |
831 | qemu_cond_signal(&qemu_cpu_cond); |
832 | ||
fa7d1867 | 833 | /* wait for initial kick-off after machine start */ |
f324e766 | 834 | while (ENV_GET_CPU(first_cpu)->stopped) { |
fa7d1867 | 835 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
8e564b4e JK |
836 | |
837 | /* process any pending work */ | |
838 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
839 | qemu_wait_io_event_common(env); | |
840 | } | |
0ab07c62 | 841 | } |
296af7c9 BS |
842 | |
843 | while (1) { | |
bdb7ca67 | 844 | tcg_exec_all(); |
946fb27c | 845 | if (use_icount && qemu_clock_deadline(vm_clock) <= 0) { |
3b2319a3 PB |
846 | qemu_notify_event(); |
847 | } | |
6cabe1f3 | 848 | qemu_tcg_wait_io_event(); |
296af7c9 BS |
849 | } |
850 | ||
851 | return NULL; | |
852 | } | |
853 | ||
2ff09a40 | 854 | static void qemu_cpu_kick_thread(CPUState *cpu) |
cc015e9a PB |
855 | { |
856 | #ifndef _WIN32 | |
857 | int err; | |
858 | ||
814e612e | 859 | err = pthread_kill(cpu->thread->thread, SIG_IPI); |
cc015e9a PB |
860 | if (err) { |
861 | fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); | |
862 | exit(1); | |
863 | } | |
864 | #else /* _WIN32 */ | |
60e82579 | 865 | if (!qemu_cpu_is_self(cpu)) { |
bcba2a72 | 866 | SuspendThread(cpu->hThread); |
cc015e9a | 867 | cpu_signal(0); |
bcba2a72 | 868 | ResumeThread(cpu->hThread); |
cc015e9a PB |
869 | } |
870 | #endif | |
871 | } | |
872 | ||
296af7c9 BS |
873 | void qemu_cpu_kick(void *_env) |
874 | { | |
9349b4f9 | 875 | CPUArchState *env = _env; |
216fc9a4 | 876 | CPUState *cpu = ENV_GET_CPU(env); |
296af7c9 | 877 | |
296af7c9 | 878 | qemu_cond_broadcast(env->halt_cond); |
216fc9a4 | 879 | if (!tcg_enabled() && !cpu->thread_kicked) { |
2ff09a40 | 880 | qemu_cpu_kick_thread(cpu); |
216fc9a4 | 881 | cpu->thread_kicked = true; |
aa2c364b | 882 | } |
296af7c9 BS |
883 | } |
884 | ||
46d62fac | 885 | void qemu_cpu_kick_self(void) |
296af7c9 | 886 | { |
b55c22c6 | 887 | #ifndef _WIN32 |
46d62fac | 888 | assert(cpu_single_env); |
216fc9a4 | 889 | CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env); |
296af7c9 | 890 | |
216fc9a4 | 891 | if (!cpu_single_cpu->thread_kicked) { |
2ff09a40 | 892 | qemu_cpu_kick_thread(cpu_single_cpu); |
216fc9a4 | 893 | cpu_single_cpu->thread_kicked = true; |
296af7c9 | 894 | } |
b55c22c6 PB |
895 | #else |
896 | abort(); | |
897 | #endif | |
296af7c9 BS |
898 | } |
899 | ||
60e82579 | 900 | bool qemu_cpu_is_self(CPUState *cpu) |
296af7c9 | 901 | { |
814e612e | 902 | return qemu_thread_is_self(cpu->thread); |
296af7c9 BS |
903 | } |
904 | ||
aa723c23 JQ |
905 | static bool qemu_in_vcpu_thread(void) |
906 | { | |
60e82579 | 907 | return cpu_single_env && qemu_cpu_is_self(ENV_GET_CPU(cpu_single_env)); |
aa723c23 JQ |
908 | } |
909 | ||
296af7c9 BS |
910 | void qemu_mutex_lock_iothread(void) |
911 | { | |
c7f0f3b1 | 912 | if (!tcg_enabled()) { |
296af7c9 | 913 | qemu_mutex_lock(&qemu_global_mutex); |
1a28cac3 | 914 | } else { |
46daff13 | 915 | iothread_requesting_mutex = true; |
1a28cac3 | 916 | if (qemu_mutex_trylock(&qemu_global_mutex)) { |
2ff09a40 | 917 | qemu_cpu_kick_thread(ENV_GET_CPU(first_cpu)); |
1a28cac3 MT |
918 | qemu_mutex_lock(&qemu_global_mutex); |
919 | } | |
46daff13 PB |
920 | iothread_requesting_mutex = false; |
921 | qemu_cond_broadcast(&qemu_io_proceeded_cond); | |
1a28cac3 | 922 | } |
296af7c9 BS |
923 | } |
924 | ||
925 | void qemu_mutex_unlock_iothread(void) | |
926 | { | |
927 | qemu_mutex_unlock(&qemu_global_mutex); | |
928 | } | |
929 | ||
930 | static int all_vcpus_paused(void) | |
931 | { | |
9349b4f9 | 932 | CPUArchState *penv = first_cpu; |
296af7c9 BS |
933 | |
934 | while (penv) { | |
f324e766 AF |
935 | CPUState *pcpu = ENV_GET_CPU(penv); |
936 | if (!pcpu->stopped) { | |
296af7c9 | 937 | return 0; |
0ab07c62 | 938 | } |
5207a5e0 | 939 | penv = penv->next_cpu; |
296af7c9 BS |
940 | } |
941 | ||
942 | return 1; | |
943 | } | |
944 | ||
945 | void pause_all_vcpus(void) | |
946 | { | |
9349b4f9 | 947 | CPUArchState *penv = first_cpu; |
296af7c9 | 948 | |
a5c57d64 | 949 | qemu_clock_enable(vm_clock, false); |
296af7c9 | 950 | while (penv) { |
4fdeee7c AF |
951 | CPUState *pcpu = ENV_GET_CPU(penv); |
952 | pcpu->stop = true; | |
296af7c9 | 953 | qemu_cpu_kick(penv); |
5207a5e0 | 954 | penv = penv->next_cpu; |
296af7c9 BS |
955 | } |
956 | ||
aa723c23 | 957 | if (qemu_in_vcpu_thread()) { |
d798e974 JK |
958 | cpu_stop_current(); |
959 | if (!kvm_enabled()) { | |
960 | while (penv) { | |
4fdeee7c AF |
961 | CPUState *pcpu = ENV_GET_CPU(penv); |
962 | pcpu->stop = 0; | |
f324e766 | 963 | pcpu->stopped = true; |
d798e974 JK |
964 | penv = penv->next_cpu; |
965 | } | |
966 | return; | |
967 | } | |
968 | } | |
969 | ||
296af7c9 | 970 | while (!all_vcpus_paused()) { |
be7d6c57 | 971 | qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex); |
296af7c9 BS |
972 | penv = first_cpu; |
973 | while (penv) { | |
1fbb22e5 | 974 | qemu_cpu_kick(penv); |
5207a5e0 | 975 | penv = penv->next_cpu; |
296af7c9 BS |
976 | } |
977 | } | |
978 | } | |
979 | ||
980 | void resume_all_vcpus(void) | |
981 | { | |
9349b4f9 | 982 | CPUArchState *penv = first_cpu; |
296af7c9 | 983 | |
47113ab6 | 984 | qemu_clock_enable(vm_clock, true); |
296af7c9 | 985 | while (penv) { |
4fdeee7c AF |
986 | CPUState *pcpu = ENV_GET_CPU(penv); |
987 | pcpu->stop = false; | |
f324e766 | 988 | pcpu->stopped = false; |
296af7c9 | 989 | qemu_cpu_kick(penv); |
5207a5e0 | 990 | penv = penv->next_cpu; |
296af7c9 BS |
991 | } |
992 | } | |
993 | ||
7e97cd88 | 994 | static void qemu_tcg_init_vcpu(void *_env) |
296af7c9 | 995 | { |
9349b4f9 | 996 | CPUArchState *env = _env; |
bcba2a72 | 997 | CPUState *cpu = ENV_GET_CPU(env); |
0ab07c62 | 998 | |
296af7c9 BS |
999 | /* share a single thread for all cpus with TCG */ |
1000 | if (!tcg_cpu_thread) { | |
814e612e | 1001 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
7267c094 | 1002 | env->halt_cond = g_malloc0(sizeof(QemuCond)); |
296af7c9 | 1003 | qemu_cond_init(env->halt_cond); |
fa7d1867 | 1004 | tcg_halt_cond = env->halt_cond; |
814e612e | 1005 | qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, env, |
1ecf47bf PB |
1006 | QEMU_THREAD_JOINABLE); |
1007 | #ifdef _WIN32 | |
814e612e | 1008 | cpu->hThread = qemu_thread_get_handle(cpu->thread); |
1ecf47bf | 1009 | #endif |
61a46217 | 1010 | while (!cpu->created) { |
18a85728 | 1011 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1012 | } |
814e612e | 1013 | tcg_cpu_thread = cpu->thread; |
296af7c9 | 1014 | } else { |
814e612e | 1015 | cpu->thread = tcg_cpu_thread; |
296af7c9 BS |
1016 | env->halt_cond = tcg_halt_cond; |
1017 | } | |
1018 | } | |
1019 | ||
9349b4f9 | 1020 | static void qemu_kvm_start_vcpu(CPUArchState *env) |
296af7c9 | 1021 | { |
814e612e AF |
1022 | CPUState *cpu = ENV_GET_CPU(env); |
1023 | ||
1024 | cpu->thread = g_malloc0(sizeof(QemuThread)); | |
7267c094 | 1025 | env->halt_cond = g_malloc0(sizeof(QemuCond)); |
296af7c9 | 1026 | qemu_cond_init(env->halt_cond); |
814e612e | 1027 | qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, env, |
1ecf47bf | 1028 | QEMU_THREAD_JOINABLE); |
61a46217 | 1029 | while (!cpu->created) { |
18a85728 | 1030 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1031 | } |
296af7c9 BS |
1032 | } |
1033 | ||
c7f0f3b1 AL |
1034 | static void qemu_dummy_start_vcpu(CPUArchState *env) |
1035 | { | |
814e612e AF |
1036 | CPUState *cpu = ENV_GET_CPU(env); |
1037 | ||
1038 | cpu->thread = g_malloc0(sizeof(QemuThread)); | |
c7f0f3b1 AL |
1039 | env->halt_cond = g_malloc0(sizeof(QemuCond)); |
1040 | qemu_cond_init(env->halt_cond); | |
814e612e | 1041 | qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, env, |
c7f0f3b1 | 1042 | QEMU_THREAD_JOINABLE); |
61a46217 | 1043 | while (!cpu->created) { |
c7f0f3b1 AL |
1044 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
1045 | } | |
1046 | } | |
1047 | ||
296af7c9 BS |
1048 | void qemu_init_vcpu(void *_env) |
1049 | { | |
9349b4f9 | 1050 | CPUArchState *env = _env; |
f324e766 | 1051 | CPUState *cpu = ENV_GET_CPU(env); |
296af7c9 BS |
1052 | |
1053 | env->nr_cores = smp_cores; | |
1054 | env->nr_threads = smp_threads; | |
f324e766 | 1055 | cpu->stopped = true; |
0ab07c62 | 1056 | if (kvm_enabled()) { |
7e97cd88 | 1057 | qemu_kvm_start_vcpu(env); |
c7f0f3b1 | 1058 | } else if (tcg_enabled()) { |
7e97cd88 | 1059 | qemu_tcg_init_vcpu(env); |
c7f0f3b1 AL |
1060 | } else { |
1061 | qemu_dummy_start_vcpu(env); | |
0ab07c62 | 1062 | } |
296af7c9 BS |
1063 | } |
1064 | ||
b4a3d965 | 1065 | void cpu_stop_current(void) |
296af7c9 | 1066 | { |
b4a3d965 | 1067 | if (cpu_single_env) { |
4fdeee7c AF |
1068 | CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env); |
1069 | cpu_single_cpu->stop = false; | |
f324e766 | 1070 | cpu_single_cpu->stopped = true; |
b4a3d965 | 1071 | cpu_exit(cpu_single_env); |
67bb172f | 1072 | qemu_cond_signal(&qemu_pause_cond); |
b4a3d965 | 1073 | } |
296af7c9 BS |
1074 | } |
1075 | ||
1dfb4dd9 | 1076 | void vm_stop(RunState state) |
296af7c9 | 1077 | { |
aa723c23 | 1078 | if (qemu_in_vcpu_thread()) { |
1dfb4dd9 | 1079 | qemu_system_vmstop_request(state); |
296af7c9 BS |
1080 | /* |
1081 | * FIXME: should not return to device code in case | |
1082 | * vm_stop() has been requested. | |
1083 | */ | |
b4a3d965 | 1084 | cpu_stop_current(); |
296af7c9 BS |
1085 | return; |
1086 | } | |
1dfb4dd9 | 1087 | do_vm_stop(state); |
296af7c9 BS |
1088 | } |
1089 | ||
8a9236f1 LC |
1090 | /* does a state transition even if the VM is already stopped, |
1091 | current state is forgotten forever */ | |
1092 | void vm_stop_force_state(RunState state) | |
1093 | { | |
1094 | if (runstate_is_running()) { | |
1095 | vm_stop(state); | |
1096 | } else { | |
1097 | runstate_set(state); | |
1098 | } | |
1099 | } | |
1100 | ||
9349b4f9 | 1101 | static int tcg_cpu_exec(CPUArchState *env) |
296af7c9 BS |
1102 | { |
1103 | int ret; | |
1104 | #ifdef CONFIG_PROFILER | |
1105 | int64_t ti; | |
1106 | #endif | |
1107 | ||
1108 | #ifdef CONFIG_PROFILER | |
1109 | ti = profile_getclock(); | |
1110 | #endif | |
1111 | if (use_icount) { | |
1112 | int64_t count; | |
1113 | int decr; | |
1114 | qemu_icount -= (env->icount_decr.u16.low + env->icount_extra); | |
1115 | env->icount_decr.u16.low = 0; | |
1116 | env->icount_extra = 0; | |
946fb27c | 1117 | count = qemu_icount_round(qemu_clock_deadline(vm_clock)); |
296af7c9 BS |
1118 | qemu_icount += count; |
1119 | decr = (count > 0xffff) ? 0xffff : count; | |
1120 | count -= decr; | |
1121 | env->icount_decr.u16.low = decr; | |
1122 | env->icount_extra = count; | |
1123 | } | |
1124 | ret = cpu_exec(env); | |
1125 | #ifdef CONFIG_PROFILER | |
1126 | qemu_time += profile_getclock() - ti; | |
1127 | #endif | |
1128 | if (use_icount) { | |
1129 | /* Fold pending instructions back into the | |
1130 | instruction counter, and clear the interrupt flag. */ | |
1131 | qemu_icount -= (env->icount_decr.u16.low | |
1132 | + env->icount_extra); | |
1133 | env->icount_decr.u32 = 0; | |
1134 | env->icount_extra = 0; | |
1135 | } | |
1136 | return ret; | |
1137 | } | |
1138 | ||
bdb7ca67 | 1139 | static void tcg_exec_all(void) |
296af7c9 | 1140 | { |
9a36085b JK |
1141 | int r; |
1142 | ||
ab33fcda PB |
1143 | /* Account partial waits to the vm_clock. */ |
1144 | qemu_clock_warp(vm_clock); | |
1145 | ||
0ab07c62 | 1146 | if (next_cpu == NULL) { |
296af7c9 | 1147 | next_cpu = first_cpu; |
0ab07c62 | 1148 | } |
c629a4bc | 1149 | for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) { |
9349b4f9 | 1150 | CPUArchState *env = next_cpu; |
4fdeee7c | 1151 | CPUState *cpu = ENV_GET_CPU(env); |
296af7c9 BS |
1152 | |
1153 | qemu_clock_enable(vm_clock, | |
345f4426 | 1154 | (env->singlestep_enabled & SSTEP_NOTIMER) == 0); |
296af7c9 | 1155 | |
3c638d06 | 1156 | if (cpu_can_run(env)) { |
bdb7ca67 | 1157 | r = tcg_cpu_exec(env); |
9a36085b | 1158 | if (r == EXCP_DEBUG) { |
1009d2ed | 1159 | cpu_handle_guest_debug(env); |
3c638d06 JK |
1160 | break; |
1161 | } | |
f324e766 | 1162 | } else if (cpu->stop || cpu->stopped) { |
296af7c9 BS |
1163 | break; |
1164 | } | |
1165 | } | |
c629a4bc | 1166 | exit_request = 0; |
296af7c9 BS |
1167 | } |
1168 | ||
1169 | void set_numa_modes(void) | |
1170 | { | |
9349b4f9 | 1171 | CPUArchState *env; |
296af7c9 BS |
1172 | int i; |
1173 | ||
1174 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
1175 | for (i = 0; i < nb_numa_nodes; i++) { | |
ee785fed | 1176 | if (test_bit(env->cpu_index, node_cpumask[i])) { |
296af7c9 BS |
1177 | env->numa_node = i; |
1178 | } | |
1179 | } | |
1180 | } | |
1181 | } | |
1182 | ||
1183 | void set_cpu_log(const char *optarg) | |
1184 | { | |
1185 | int mask; | |
1186 | const CPULogItem *item; | |
1187 | ||
1188 | mask = cpu_str_to_log_mask(optarg); | |
1189 | if (!mask) { | |
1190 | printf("Log items (comma separated):\n"); | |
1191 | for (item = cpu_log_items; item->mask != 0; item++) { | |
1192 | printf("%-10s %s\n", item->name, item->help); | |
1193 | } | |
1194 | exit(1); | |
1195 | } | |
1196 | cpu_set_log(mask); | |
1197 | } | |
29e922b6 | 1198 | |
c235d738 MF |
1199 | void set_cpu_log_filename(const char *optarg) |
1200 | { | |
1201 | cpu_set_log_filename(optarg); | |
1202 | } | |
1203 | ||
9a78eead | 1204 | void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) |
262353cb BS |
1205 | { |
1206 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
e916cbf8 PM |
1207 | #if defined(cpu_list) |
1208 | cpu_list(f, cpu_fprintf); | |
262353cb BS |
1209 | #endif |
1210 | } | |
de0b36b6 LC |
1211 | |
1212 | CpuInfoList *qmp_query_cpus(Error **errp) | |
1213 | { | |
1214 | CpuInfoList *head = NULL, *cur_item = NULL; | |
9349b4f9 | 1215 | CPUArchState *env; |
de0b36b6 LC |
1216 | |
1217 | for(env = first_cpu; env != NULL; env = env->next_cpu) { | |
1218 | CpuInfoList *info; | |
1219 | ||
1220 | cpu_synchronize_state(env); | |
1221 | ||
1222 | info = g_malloc0(sizeof(*info)); | |
1223 | info->value = g_malloc0(sizeof(*info->value)); | |
1224 | info->value->CPU = env->cpu_index; | |
1225 | info->value->current = (env == first_cpu); | |
1226 | info->value->halted = env->halted; | |
1227 | info->value->thread_id = env->thread_id; | |
1228 | #if defined(TARGET_I386) | |
1229 | info->value->has_pc = true; | |
1230 | info->value->pc = env->eip + env->segs[R_CS].base; | |
1231 | #elif defined(TARGET_PPC) | |
1232 | info->value->has_nip = true; | |
1233 | info->value->nip = env->nip; | |
1234 | #elif defined(TARGET_SPARC) | |
1235 | info->value->has_pc = true; | |
1236 | info->value->pc = env->pc; | |
1237 | info->value->has_npc = true; | |
1238 | info->value->npc = env->npc; | |
1239 | #elif defined(TARGET_MIPS) | |
1240 | info->value->has_PC = true; | |
1241 | info->value->PC = env->active_tc.PC; | |
1242 | #endif | |
1243 | ||
1244 | /* XXX: waiting for the qapi to support GSList */ | |
1245 | if (!cur_item) { | |
1246 | head = cur_item = info; | |
1247 | } else { | |
1248 | cur_item->next = info; | |
1249 | cur_item = info; | |
1250 | } | |
1251 | } | |
1252 | ||
1253 | return head; | |
1254 | } | |
0cfd6a9a LC |
1255 | |
1256 | void qmp_memsave(int64_t addr, int64_t size, const char *filename, | |
1257 | bool has_cpu, int64_t cpu_index, Error **errp) | |
1258 | { | |
1259 | FILE *f; | |
1260 | uint32_t l; | |
9349b4f9 | 1261 | CPUArchState *env; |
0cfd6a9a LC |
1262 | uint8_t buf[1024]; |
1263 | ||
1264 | if (!has_cpu) { | |
1265 | cpu_index = 0; | |
1266 | } | |
1267 | ||
1268 | for (env = first_cpu; env; env = env->next_cpu) { | |
1269 | if (cpu_index == env->cpu_index) { | |
1270 | break; | |
1271 | } | |
1272 | } | |
1273 | ||
1274 | if (env == NULL) { | |
1275 | error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index", | |
1276 | "a CPU number"); | |
1277 | return; | |
1278 | } | |
1279 | ||
1280 | f = fopen(filename, "wb"); | |
1281 | if (!f) { | |
1282 | error_set(errp, QERR_OPEN_FILE_FAILED, filename); | |
1283 | return; | |
1284 | } | |
1285 | ||
1286 | while (size != 0) { | |
1287 | l = sizeof(buf); | |
1288 | if (l > size) | |
1289 | l = size; | |
1290 | cpu_memory_rw_debug(env, addr, buf, l, 0); | |
1291 | if (fwrite(buf, 1, l, f) != l) { | |
1292 | error_set(errp, QERR_IO_ERROR); | |
1293 | goto exit; | |
1294 | } | |
1295 | addr += l; | |
1296 | size -= l; | |
1297 | } | |
1298 | ||
1299 | exit: | |
1300 | fclose(f); | |
1301 | } | |
6d3962bf LC |
1302 | |
1303 | void qmp_pmemsave(int64_t addr, int64_t size, const char *filename, | |
1304 | Error **errp) | |
1305 | { | |
1306 | FILE *f; | |
1307 | uint32_t l; | |
1308 | uint8_t buf[1024]; | |
1309 | ||
1310 | f = fopen(filename, "wb"); | |
1311 | if (!f) { | |
1312 | error_set(errp, QERR_OPEN_FILE_FAILED, filename); | |
1313 | return; | |
1314 | } | |
1315 | ||
1316 | while (size != 0) { | |
1317 | l = sizeof(buf); | |
1318 | if (l > size) | |
1319 | l = size; | |
1320 | cpu_physical_memory_rw(addr, buf, l, 0); | |
1321 | if (fwrite(buf, 1, l, f) != l) { | |
1322 | error_set(errp, QERR_IO_ERROR); | |
1323 | goto exit; | |
1324 | } | |
1325 | addr += l; | |
1326 | size -= l; | |
1327 | } | |
1328 | ||
1329 | exit: | |
1330 | fclose(f); | |
1331 | } | |
ab49ab5c LC |
1332 | |
1333 | void qmp_inject_nmi(Error **errp) | |
1334 | { | |
1335 | #if defined(TARGET_I386) | |
9349b4f9 | 1336 | CPUArchState *env; |
ab49ab5c LC |
1337 | |
1338 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
02c09195 JK |
1339 | if (!env->apic_state) { |
1340 | cpu_interrupt(env, CPU_INTERRUPT_NMI); | |
1341 | } else { | |
1342 | apic_deliver_nmi(env->apic_state); | |
1343 | } | |
ab49ab5c LC |
1344 | } |
1345 | #else | |
1346 | error_set(errp, QERR_UNSUPPORTED); | |
1347 | #endif | |
1348 | } |