]>
Commit | Line | Data |
---|---|---|
296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
26 | #include "config-host.h" | |
27 | ||
28 | #include "monitor.h" | |
29 | #include "sysemu.h" | |
30 | #include "gdbstub.h" | |
31 | #include "dma.h" | |
32 | #include "kvm.h" | |
262ea18e | 33 | #include "exec-all.h" |
296af7c9 | 34 | |
96284e89 | 35 | #include "qemu-thread.h" |
296af7c9 | 36 | #include "cpus.h" |
a8486bc9 | 37 | #include "compatfd.h" |
296af7c9 | 38 | |
7277e027 BS |
39 | #ifdef SIGRTMIN |
40 | #define SIG_IPI (SIGRTMIN+4) | |
41 | #else | |
42 | #define SIG_IPI SIGUSR1 | |
43 | #endif | |
44 | ||
6d9cb73c JK |
45 | #ifdef CONFIG_LINUX |
46 | ||
47 | #include <sys/prctl.h> | |
48 | ||
c0532a76 MT |
49 | #ifndef PR_MCE_KILL |
50 | #define PR_MCE_KILL 33 | |
51 | #endif | |
52 | ||
6d9cb73c JK |
53 | #ifndef PR_MCE_KILL_SET |
54 | #define PR_MCE_KILL_SET 1 | |
55 | #endif | |
56 | ||
57 | #ifndef PR_MCE_KILL_EARLY | |
58 | #define PR_MCE_KILL_EARLY 1 | |
59 | #endif | |
60 | ||
61 | #endif /* CONFIG_LINUX */ | |
62 | ||
296af7c9 BS |
63 | static CPUState *next_cpu; |
64 | ||
65 | /***********************************************************/ | |
66 | void hw_error(const char *fmt, ...) | |
67 | { | |
68 | va_list ap; | |
69 | CPUState *env; | |
70 | ||
71 | va_start(ap, fmt); | |
72 | fprintf(stderr, "qemu: hardware error: "); | |
73 | vfprintf(stderr, fmt, ap); | |
74 | fprintf(stderr, "\n"); | |
75 | for(env = first_cpu; env != NULL; env = env->next_cpu) { | |
76 | fprintf(stderr, "CPU #%d:\n", env->cpu_index); | |
77 | #ifdef TARGET_I386 | |
78 | cpu_dump_state(env, stderr, fprintf, X86_DUMP_FPU); | |
79 | #else | |
80 | cpu_dump_state(env, stderr, fprintf, 0); | |
81 | #endif | |
82 | } | |
83 | va_end(ap); | |
84 | abort(); | |
85 | } | |
86 | ||
87 | void cpu_synchronize_all_states(void) | |
88 | { | |
89 | CPUState *cpu; | |
90 | ||
91 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
92 | cpu_synchronize_state(cpu); | |
93 | } | |
94 | } | |
95 | ||
96 | void cpu_synchronize_all_post_reset(void) | |
97 | { | |
98 | CPUState *cpu; | |
99 | ||
100 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
101 | cpu_synchronize_post_reset(cpu); | |
102 | } | |
103 | } | |
104 | ||
105 | void cpu_synchronize_all_post_init(void) | |
106 | { | |
107 | CPUState *cpu; | |
108 | ||
109 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
110 | cpu_synchronize_post_init(cpu); | |
111 | } | |
112 | } | |
113 | ||
3ae9501c MT |
114 | int cpu_is_stopped(CPUState *env) |
115 | { | |
116 | return !vm_running || env->stopped; | |
117 | } | |
118 | ||
296af7c9 BS |
119 | static void do_vm_stop(int reason) |
120 | { | |
121 | if (vm_running) { | |
122 | cpu_disable_ticks(); | |
123 | vm_running = 0; | |
124 | pause_all_vcpus(); | |
125 | vm_state_notify(0, reason); | |
55df6f33 MT |
126 | qemu_aio_flush(); |
127 | bdrv_flush_all(); | |
296af7c9 BS |
128 | monitor_protocol_event(QEVENT_STOP, NULL); |
129 | } | |
130 | } | |
131 | ||
132 | static int cpu_can_run(CPUState *env) | |
133 | { | |
0ab07c62 | 134 | if (env->stop) { |
296af7c9 | 135 | return 0; |
0ab07c62 JK |
136 | } |
137 | if (env->stopped || !vm_running) { | |
296af7c9 | 138 | return 0; |
0ab07c62 | 139 | } |
296af7c9 BS |
140 | return 1; |
141 | } | |
142 | ||
16400322 | 143 | static bool cpu_thread_is_idle(CPUState *env) |
296af7c9 | 144 | { |
16400322 JK |
145 | if (env->stop || env->queued_work_first) { |
146 | return false; | |
147 | } | |
148 | if (env->stopped || !vm_running) { | |
149 | return true; | |
150 | } | |
151 | if (!env->halted || qemu_cpu_has_work(env)) { | |
152 | return false; | |
153 | } | |
154 | return true; | |
296af7c9 BS |
155 | } |
156 | ||
16400322 | 157 | static bool all_cpu_threads_idle(void) |
296af7c9 BS |
158 | { |
159 | CPUState *env; | |
160 | ||
16400322 JK |
161 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
162 | if (!cpu_thread_is_idle(env)) { | |
163 | return false; | |
164 | } | |
165 | } | |
166 | return true; | |
296af7c9 BS |
167 | } |
168 | ||
83f338f7 JK |
169 | static CPUDebugExcpHandler *debug_excp_handler; |
170 | ||
171 | CPUDebugExcpHandler *cpu_set_debug_excp_handler(CPUDebugExcpHandler *handler) | |
172 | { | |
173 | CPUDebugExcpHandler *old_handler = debug_excp_handler; | |
174 | ||
175 | debug_excp_handler = handler; | |
176 | return old_handler; | |
177 | } | |
178 | ||
179 | static void cpu_handle_debug_exception(CPUState *env) | |
3c638d06 | 180 | { |
83f338f7 JK |
181 | CPUWatchpoint *wp; |
182 | ||
183 | if (!env->watchpoint_hit) { | |
184 | QTAILQ_FOREACH(wp, &env->watchpoints, entry) { | |
185 | wp->flags &= ~BP_WATCHPOINT_HIT; | |
186 | } | |
187 | } | |
188 | if (debug_excp_handler) { | |
189 | debug_excp_handler(env); | |
190 | } | |
191 | ||
3c638d06 | 192 | gdb_set_stop_cpu(env); |
8cf71710 | 193 | qemu_system_debug_request(); |
83f338f7 JK |
194 | #ifdef CONFIG_IOTHREAD |
195 | env->stopped = 1; | |
196 | #endif | |
3c638d06 JK |
197 | } |
198 | ||
6d9cb73c JK |
199 | #ifdef CONFIG_LINUX |
200 | static void sigbus_reraise(void) | |
201 | { | |
202 | sigset_t set; | |
203 | struct sigaction action; | |
204 | ||
205 | memset(&action, 0, sizeof(action)); | |
206 | action.sa_handler = SIG_DFL; | |
207 | if (!sigaction(SIGBUS, &action, NULL)) { | |
208 | raise(SIGBUS); | |
209 | sigemptyset(&set); | |
210 | sigaddset(&set, SIGBUS); | |
211 | sigprocmask(SIG_UNBLOCK, &set, NULL); | |
212 | } | |
213 | perror("Failed to re-raise SIGBUS!\n"); | |
214 | abort(); | |
215 | } | |
216 | ||
217 | static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo, | |
218 | void *ctx) | |
219 | { | |
220 | if (kvm_on_sigbus(siginfo->ssi_code, | |
221 | (void *)(intptr_t)siginfo->ssi_addr)) { | |
222 | sigbus_reraise(); | |
223 | } | |
224 | } | |
225 | ||
226 | static void qemu_init_sigbus(void) | |
227 | { | |
228 | struct sigaction action; | |
229 | ||
230 | memset(&action, 0, sizeof(action)); | |
231 | action.sa_flags = SA_SIGINFO; | |
232 | action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler; | |
233 | sigaction(SIGBUS, &action, NULL); | |
234 | ||
235 | prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0); | |
236 | } | |
237 | ||
238 | #else /* !CONFIG_LINUX */ | |
239 | ||
240 | static void qemu_init_sigbus(void) | |
241 | { | |
242 | } | |
243 | #endif /* !CONFIG_LINUX */ | |
244 | ||
296af7c9 BS |
245 | #ifndef _WIN32 |
246 | static int io_thread_fd = -1; | |
247 | ||
248 | static void qemu_event_increment(void) | |
249 | { | |
250 | /* Write 8 bytes to be compatible with eventfd. */ | |
26a82330 | 251 | static const uint64_t val = 1; |
296af7c9 BS |
252 | ssize_t ret; |
253 | ||
0ab07c62 | 254 | if (io_thread_fd == -1) { |
296af7c9 | 255 | return; |
0ab07c62 | 256 | } |
296af7c9 BS |
257 | do { |
258 | ret = write(io_thread_fd, &val, sizeof(val)); | |
259 | } while (ret < 0 && errno == EINTR); | |
260 | ||
261 | /* EAGAIN is fine, a read must be pending. */ | |
262 | if (ret < 0 && errno != EAGAIN) { | |
263 | fprintf(stderr, "qemu_event_increment: write() filed: %s\n", | |
264 | strerror(errno)); | |
265 | exit (1); | |
266 | } | |
267 | } | |
268 | ||
269 | static void qemu_event_read(void *opaque) | |
270 | { | |
271 | int fd = (unsigned long)opaque; | |
272 | ssize_t len; | |
273 | char buffer[512]; | |
274 | ||
275 | /* Drain the notify pipe. For eventfd, only 8 bytes will be read. */ | |
276 | do { | |
277 | len = read(fd, buffer, sizeof(buffer)); | |
278 | } while ((len == -1 && errno == EINTR) || len == sizeof(buffer)); | |
279 | } | |
280 | ||
281 | static int qemu_event_init(void) | |
282 | { | |
283 | int err; | |
284 | int fds[2]; | |
285 | ||
286 | err = qemu_eventfd(fds); | |
0ab07c62 | 287 | if (err == -1) { |
296af7c9 | 288 | return -errno; |
0ab07c62 | 289 | } |
296af7c9 | 290 | err = fcntl_setfl(fds[0], O_NONBLOCK); |
0ab07c62 | 291 | if (err < 0) { |
296af7c9 | 292 | goto fail; |
0ab07c62 | 293 | } |
296af7c9 | 294 | err = fcntl_setfl(fds[1], O_NONBLOCK); |
0ab07c62 | 295 | if (err < 0) { |
296af7c9 | 296 | goto fail; |
0ab07c62 | 297 | } |
296af7c9 BS |
298 | qemu_set_fd_handler2(fds[0], NULL, qemu_event_read, NULL, |
299 | (void *)(unsigned long)fds[0]); | |
300 | ||
301 | io_thread_fd = fds[1]; | |
302 | return 0; | |
303 | ||
304 | fail: | |
305 | close(fds[0]); | |
306 | close(fds[1]); | |
307 | return err; | |
308 | } | |
55f8d6ac | 309 | |
55f8d6ac JK |
310 | static void dummy_signal(int sig) |
311 | { | |
312 | } | |
55f8d6ac | 313 | |
d0f294ce JK |
314 | /* If we have signalfd, we mask out the signals we want to handle and then |
315 | * use signalfd to listen for them. We rely on whatever the current signal | |
316 | * handler is to dispatch the signals when we receive them. | |
317 | */ | |
318 | static void sigfd_handler(void *opaque) | |
319 | { | |
320 | int fd = (unsigned long) opaque; | |
321 | struct qemu_signalfd_siginfo info; | |
322 | struct sigaction action; | |
323 | ssize_t len; | |
324 | ||
325 | while (1) { | |
326 | do { | |
327 | len = read(fd, &info, sizeof(info)); | |
328 | } while (len == -1 && errno == EINTR); | |
329 | ||
330 | if (len == -1 && errno == EAGAIN) { | |
331 | break; | |
332 | } | |
333 | ||
334 | if (len != sizeof(info)) { | |
335 | printf("read from sigfd returned %zd: %m\n", len); | |
336 | return; | |
337 | } | |
338 | ||
339 | sigaction(info.ssi_signo, NULL, &action); | |
340 | if ((action.sa_flags & SA_SIGINFO) && action.sa_sigaction) { | |
341 | action.sa_sigaction(info.ssi_signo, | |
342 | (siginfo_t *)&info, NULL); | |
343 | } else if (action.sa_handler) { | |
344 | action.sa_handler(info.ssi_signo); | |
345 | } | |
346 | } | |
347 | } | |
348 | ||
349 | static int qemu_signalfd_init(sigset_t mask) | |
350 | { | |
351 | int sigfd; | |
352 | ||
353 | sigfd = qemu_signalfd(&mask); | |
354 | if (sigfd == -1) { | |
355 | fprintf(stderr, "failed to create signalfd\n"); | |
356 | return -errno; | |
357 | } | |
358 | ||
359 | fcntl_setfl(sigfd, O_NONBLOCK); | |
360 | ||
361 | qemu_set_fd_handler2(sigfd, NULL, sigfd_handler, NULL, | |
362 | (void *)(unsigned long) sigfd); | |
363 | ||
364 | return 0; | |
365 | } | |
366 | ||
9a36085b JK |
367 | static void qemu_kvm_eat_signals(CPUState *env) |
368 | { | |
369 | struct timespec ts = { 0, 0 }; | |
370 | siginfo_t siginfo; | |
371 | sigset_t waitset; | |
372 | sigset_t chkset; | |
373 | int r; | |
374 | ||
375 | sigemptyset(&waitset); | |
376 | sigaddset(&waitset, SIG_IPI); | |
377 | sigaddset(&waitset, SIGBUS); | |
378 | ||
379 | do { | |
380 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
381 | if (r == -1 && !(errno == EAGAIN || errno == EINTR)) { | |
382 | perror("sigtimedwait"); | |
383 | exit(1); | |
384 | } | |
385 | ||
386 | switch (r) { | |
9a36085b JK |
387 | case SIGBUS: |
388 | if (kvm_on_sigbus_vcpu(env, siginfo.si_code, siginfo.si_addr)) { | |
389 | sigbus_reraise(); | |
390 | } | |
391 | break; | |
9a36085b JK |
392 | default: |
393 | break; | |
394 | } | |
395 | ||
396 | r = sigpending(&chkset); | |
397 | if (r == -1) { | |
398 | perror("sigpending"); | |
399 | exit(1); | |
400 | } | |
401 | } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS)); | |
de758970 JK |
402 | |
403 | #ifndef CONFIG_IOTHREAD | |
404 | if (sigismember(&chkset, SIGIO) || sigismember(&chkset, SIGALRM)) { | |
405 | qemu_notify_event(); | |
406 | } | |
407 | #endif | |
9a36085b JK |
408 | } |
409 | ||
55f8d6ac JK |
410 | #else /* _WIN32 */ |
411 | ||
296af7c9 BS |
412 | HANDLE qemu_event_handle; |
413 | ||
414 | static void dummy_event_handler(void *opaque) | |
415 | { | |
416 | } | |
417 | ||
418 | static int qemu_event_init(void) | |
419 | { | |
420 | qemu_event_handle = CreateEvent(NULL, FALSE, FALSE, NULL); | |
421 | if (!qemu_event_handle) { | |
422 | fprintf(stderr, "Failed CreateEvent: %ld\n", GetLastError()); | |
423 | return -1; | |
424 | } | |
425 | qemu_add_wait_object(qemu_event_handle, dummy_event_handler, NULL); | |
426 | return 0; | |
427 | } | |
428 | ||
429 | static void qemu_event_increment(void) | |
430 | { | |
431 | if (!SetEvent(qemu_event_handle)) { | |
432 | fprintf(stderr, "qemu_event_increment: SetEvent failed: %ld\n", | |
433 | GetLastError()); | |
434 | exit (1); | |
435 | } | |
436 | } | |
9a36085b JK |
437 | |
438 | static void qemu_kvm_eat_signals(CPUState *env) | |
439 | { | |
440 | } | |
55f8d6ac | 441 | #endif /* _WIN32 */ |
296af7c9 BS |
442 | |
443 | #ifndef CONFIG_IOTHREAD | |
ff48eb5f JK |
444 | static void qemu_kvm_init_cpu_signals(CPUState *env) |
445 | { | |
446 | #ifndef _WIN32 | |
447 | int r; | |
448 | sigset_t set; | |
449 | struct sigaction sigact; | |
450 | ||
451 | memset(&sigact, 0, sizeof(sigact)); | |
452 | sigact.sa_handler = dummy_signal; | |
453 | sigaction(SIG_IPI, &sigact, NULL); | |
454 | ||
455 | sigemptyset(&set); | |
456 | sigaddset(&set, SIG_IPI); | |
de758970 JK |
457 | sigaddset(&set, SIGIO); |
458 | sigaddset(&set, SIGALRM); | |
ff48eb5f JK |
459 | pthread_sigmask(SIG_BLOCK, &set, NULL); |
460 | ||
461 | pthread_sigmask(SIG_BLOCK, NULL, &set); | |
462 | sigdelset(&set, SIG_IPI); | |
463 | sigdelset(&set, SIGBUS); | |
de758970 JK |
464 | sigdelset(&set, SIGIO); |
465 | sigdelset(&set, SIGALRM); | |
ff48eb5f JK |
466 | r = kvm_set_signal_mask(env, &set); |
467 | if (r) { | |
468 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
469 | exit(1); | |
470 | } | |
471 | #endif | |
472 | } | |
473 | ||
de758970 JK |
474 | #ifndef _WIN32 |
475 | static sigset_t block_synchronous_signals(void) | |
476 | { | |
477 | sigset_t set; | |
478 | ||
479 | sigemptyset(&set); | |
6d9cb73c | 480 | sigaddset(&set, SIGBUS); |
de758970 JK |
481 | if (kvm_enabled()) { |
482 | /* | |
483 | * We need to process timer signals synchronously to avoid a race | |
484 | * between exit_request check and KVM vcpu entry. | |
485 | */ | |
486 | sigaddset(&set, SIGIO); | |
487 | sigaddset(&set, SIGALRM); | |
488 | } | |
489 | ||
490 | return set; | |
491 | } | |
492 | #endif | |
493 | ||
296af7c9 BS |
494 | int qemu_init_main_loop(void) |
495 | { | |
d0f294ce JK |
496 | #ifndef _WIN32 |
497 | sigset_t blocked_signals; | |
498 | int ret; | |
499 | ||
de758970 | 500 | blocked_signals = block_synchronous_signals(); |
d0f294ce JK |
501 | |
502 | ret = qemu_signalfd_init(blocked_signals); | |
503 | if (ret) { | |
504 | return ret; | |
505 | } | |
506 | #endif | |
3c638d06 | 507 | |
6d9cb73c | 508 | qemu_init_sigbus(); |
3c638d06 | 509 | |
296af7c9 BS |
510 | return qemu_event_init(); |
511 | } | |
512 | ||
7277e027 BS |
513 | void qemu_main_loop_start(void) |
514 | { | |
515 | } | |
516 | ||
296af7c9 BS |
517 | void qemu_init_vcpu(void *_env) |
518 | { | |
519 | CPUState *env = _env; | |
84b4915d | 520 | int r; |
296af7c9 BS |
521 | |
522 | env->nr_cores = smp_cores; | |
523 | env->nr_threads = smp_threads; | |
84b4915d JK |
524 | |
525 | if (kvm_enabled()) { | |
526 | r = kvm_init_vcpu(env); | |
527 | if (r < 0) { | |
528 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
529 | exit(1); | |
530 | } | |
ff48eb5f | 531 | qemu_kvm_init_cpu_signals(env); |
84b4915d | 532 | } |
296af7c9 BS |
533 | } |
534 | ||
b7680cb6 | 535 | int qemu_cpu_is_self(void *env) |
296af7c9 BS |
536 | { |
537 | return 1; | |
538 | } | |
539 | ||
e82bcec2 MT |
540 | void run_on_cpu(CPUState *env, void (*func)(void *data), void *data) |
541 | { | |
542 | func(data); | |
543 | } | |
544 | ||
296af7c9 BS |
545 | void resume_all_vcpus(void) |
546 | { | |
547 | } | |
548 | ||
549 | void pause_all_vcpus(void) | |
550 | { | |
551 | } | |
552 | ||
553 | void qemu_cpu_kick(void *env) | |
554 | { | |
296af7c9 BS |
555 | } |
556 | ||
46d62fac JK |
557 | void qemu_cpu_kick_self(void) |
558 | { | |
559 | #ifndef _WIN32 | |
560 | assert(cpu_single_env); | |
561 | ||
562 | raise(SIG_IPI); | |
563 | #else | |
564 | abort(); | |
565 | #endif | |
296af7c9 BS |
566 | } |
567 | ||
568 | void qemu_notify_event(void) | |
569 | { | |
570 | CPUState *env = cpu_single_env; | |
571 | ||
572 | qemu_event_increment (); | |
573 | if (env) { | |
574 | cpu_exit(env); | |
575 | } | |
576 | if (next_cpu && env != next_cpu) { | |
577 | cpu_exit(next_cpu); | |
578 | } | |
38145df2 | 579 | exit_request = 1; |
296af7c9 BS |
580 | } |
581 | ||
582 | void qemu_mutex_lock_iothread(void) {} | |
583 | void qemu_mutex_unlock_iothread(void) {} | |
584 | ||
b4a3d965 JK |
585 | void cpu_stop_current(void) |
586 | { | |
587 | } | |
588 | ||
296af7c9 BS |
589 | void vm_stop(int reason) |
590 | { | |
591 | do_vm_stop(reason); | |
592 | } | |
593 | ||
594 | #else /* CONFIG_IOTHREAD */ | |
595 | ||
296af7c9 BS |
596 | QemuMutex qemu_global_mutex; |
597 | static QemuMutex qemu_fair_mutex; | |
598 | ||
599 | static QemuThread io_thread; | |
600 | ||
601 | static QemuThread *tcg_cpu_thread; | |
602 | static QemuCond *tcg_halt_cond; | |
603 | ||
604 | static int qemu_system_ready; | |
605 | /* cpu creation */ | |
606 | static QemuCond qemu_cpu_cond; | |
607 | /* system init */ | |
608 | static QemuCond qemu_system_cond; | |
609 | static QemuCond qemu_pause_cond; | |
e82bcec2 | 610 | static QemuCond qemu_work_cond; |
296af7c9 | 611 | |
55f8d6ac | 612 | static void cpu_signal(int sig) |
a8486bc9 | 613 | { |
55f8d6ac JK |
614 | if (cpu_single_env) { |
615 | cpu_exit(cpu_single_env); | |
616 | } | |
617 | exit_request = 1; | |
618 | } | |
a8486bc9 | 619 | |
55f8d6ac JK |
620 | static void qemu_kvm_init_cpu_signals(CPUState *env) |
621 | { | |
622 | int r; | |
623 | sigset_t set; | |
624 | struct sigaction sigact; | |
a8486bc9 | 625 | |
55f8d6ac JK |
626 | memset(&sigact, 0, sizeof(sigact)); |
627 | sigact.sa_handler = dummy_signal; | |
628 | sigaction(SIG_IPI, &sigact, NULL); | |
a8486bc9 | 629 | |
55f8d6ac JK |
630 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
631 | sigdelset(&set, SIG_IPI); | |
632 | sigdelset(&set, SIGBUS); | |
633 | r = kvm_set_signal_mask(env, &set); | |
634 | if (r) { | |
635 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
636 | exit(1); | |
a8486bc9 MT |
637 | } |
638 | } | |
639 | ||
55f8d6ac | 640 | static void qemu_tcg_init_cpu_signals(void) |
a8486bc9 | 641 | { |
55f8d6ac JK |
642 | sigset_t set; |
643 | struct sigaction sigact; | |
a8486bc9 | 644 | |
55f8d6ac JK |
645 | memset(&sigact, 0, sizeof(sigact)); |
646 | sigact.sa_handler = cpu_signal; | |
647 | sigaction(SIG_IPI, &sigact, NULL); | |
a8486bc9 | 648 | |
55f8d6ac JK |
649 | sigemptyset(&set); |
650 | sigaddset(&set, SIG_IPI); | |
651 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
652 | } | |
a8486bc9 | 653 | |
55f8d6ac JK |
654 | static sigset_t block_io_signals(void) |
655 | { | |
656 | sigset_t set; | |
a8486bc9 | 657 | |
55f8d6ac JK |
658 | /* SIGUSR2 used by posix-aio-compat.c */ |
659 | sigemptyset(&set); | |
660 | sigaddset(&set, SIGUSR2); | |
661 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
662 | ||
663 | sigemptyset(&set); | |
664 | sigaddset(&set, SIGIO); | |
665 | sigaddset(&set, SIGALRM); | |
666 | sigaddset(&set, SIG_IPI); | |
667 | sigaddset(&set, SIGBUS); | |
668 | pthread_sigmask(SIG_BLOCK, &set, NULL); | |
669 | ||
55f8d6ac | 670 | return set; |
a8486bc9 | 671 | } |
296af7c9 BS |
672 | |
673 | int qemu_init_main_loop(void) | |
674 | { | |
675 | int ret; | |
a8486bc9 | 676 | sigset_t blocked_signals; |
296af7c9 | 677 | |
6d9cb73c | 678 | qemu_init_sigbus(); |
3c638d06 | 679 | |
a8486bc9 MT |
680 | blocked_signals = block_io_signals(); |
681 | ||
682 | ret = qemu_signalfd_init(blocked_signals); | |
0ab07c62 | 683 | if (ret) { |
a8486bc9 | 684 | return ret; |
0ab07c62 | 685 | } |
a8486bc9 MT |
686 | |
687 | /* Note eventfd must be drained before signalfd handlers run */ | |
296af7c9 | 688 | ret = qemu_event_init(); |
0ab07c62 | 689 | if (ret) { |
296af7c9 | 690 | return ret; |
0ab07c62 | 691 | } |
296af7c9 | 692 | |
ed94592b | 693 | qemu_cond_init(&qemu_cpu_cond); |
f8ca7b43 | 694 | qemu_cond_init(&qemu_system_cond); |
ed94592b AL |
695 | qemu_cond_init(&qemu_pause_cond); |
696 | qemu_cond_init(&qemu_work_cond); | |
296af7c9 BS |
697 | qemu_mutex_init(&qemu_fair_mutex); |
698 | qemu_mutex_init(&qemu_global_mutex); | |
699 | qemu_mutex_lock(&qemu_global_mutex); | |
700 | ||
b7680cb6 | 701 | qemu_thread_get_self(&io_thread); |
296af7c9 BS |
702 | |
703 | return 0; | |
704 | } | |
705 | ||
7277e027 BS |
706 | void qemu_main_loop_start(void) |
707 | { | |
708 | qemu_system_ready = 1; | |
709 | qemu_cond_broadcast(&qemu_system_cond); | |
710 | } | |
711 | ||
e82bcec2 MT |
712 | void run_on_cpu(CPUState *env, void (*func)(void *data), void *data) |
713 | { | |
714 | struct qemu_work_item wi; | |
715 | ||
b7680cb6 | 716 | if (qemu_cpu_is_self(env)) { |
e82bcec2 MT |
717 | func(data); |
718 | return; | |
719 | } | |
720 | ||
721 | wi.func = func; | |
722 | wi.data = data; | |
0ab07c62 | 723 | if (!env->queued_work_first) { |
e82bcec2 | 724 | env->queued_work_first = &wi; |
0ab07c62 | 725 | } else { |
e82bcec2 | 726 | env->queued_work_last->next = &wi; |
0ab07c62 | 727 | } |
e82bcec2 MT |
728 | env->queued_work_last = &wi; |
729 | wi.next = NULL; | |
730 | wi.done = false; | |
731 | ||
732 | qemu_cpu_kick(env); | |
733 | while (!wi.done) { | |
734 | CPUState *self_env = cpu_single_env; | |
735 | ||
736 | qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex); | |
737 | cpu_single_env = self_env; | |
738 | } | |
739 | } | |
740 | ||
741 | static void flush_queued_work(CPUState *env) | |
742 | { | |
743 | struct qemu_work_item *wi; | |
744 | ||
0ab07c62 | 745 | if (!env->queued_work_first) { |
e82bcec2 | 746 | return; |
0ab07c62 | 747 | } |
e82bcec2 MT |
748 | |
749 | while ((wi = env->queued_work_first)) { | |
750 | env->queued_work_first = wi->next; | |
751 | wi->func(wi->data); | |
752 | wi->done = true; | |
753 | } | |
754 | env->queued_work_last = NULL; | |
755 | qemu_cond_broadcast(&qemu_work_cond); | |
756 | } | |
757 | ||
296af7c9 BS |
758 | static void qemu_wait_io_event_common(CPUState *env) |
759 | { | |
760 | if (env->stop) { | |
761 | env->stop = 0; | |
762 | env->stopped = 1; | |
763 | qemu_cond_signal(&qemu_pause_cond); | |
764 | } | |
e82bcec2 | 765 | flush_queued_work(env); |
aa2c364b | 766 | env->thread_kicked = false; |
296af7c9 BS |
767 | } |
768 | ||
6cabe1f3 | 769 | static void qemu_tcg_wait_io_event(void) |
296af7c9 | 770 | { |
6cabe1f3 JK |
771 | CPUState *env; |
772 | ||
16400322 | 773 | while (all_cpu_threads_idle()) { |
9705fbb5 | 774 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
16400322 | 775 | } |
296af7c9 BS |
776 | |
777 | qemu_mutex_unlock(&qemu_global_mutex); | |
778 | ||
779 | /* | |
780 | * Users of qemu_global_mutex can be starved, having no chance | |
781 | * to acquire it since this path will get to it first. | |
782 | * So use another lock to provide fairness. | |
783 | */ | |
784 | qemu_mutex_lock(&qemu_fair_mutex); | |
785 | qemu_mutex_unlock(&qemu_fair_mutex); | |
786 | ||
787 | qemu_mutex_lock(&qemu_global_mutex); | |
6cabe1f3 JK |
788 | |
789 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
790 | qemu_wait_io_event_common(env); | |
791 | } | |
296af7c9 BS |
792 | } |
793 | ||
296af7c9 BS |
794 | static void qemu_kvm_wait_io_event(CPUState *env) |
795 | { | |
16400322 | 796 | while (cpu_thread_is_idle(env)) { |
9705fbb5 | 797 | qemu_cond_wait(env->halt_cond, &qemu_global_mutex); |
16400322 | 798 | } |
296af7c9 | 799 | |
5db5bdac | 800 | qemu_kvm_eat_signals(env); |
296af7c9 BS |
801 | qemu_wait_io_event_common(env); |
802 | } | |
803 | ||
7e97cd88 | 804 | static void *qemu_kvm_cpu_thread_fn(void *arg) |
296af7c9 BS |
805 | { |
806 | CPUState *env = arg; | |
84b4915d | 807 | int r; |
296af7c9 | 808 | |
6164e6d6 | 809 | qemu_mutex_lock(&qemu_global_mutex); |
b7680cb6 | 810 | qemu_thread_get_self(env->thread); |
296af7c9 | 811 | |
84b4915d JK |
812 | r = kvm_init_vcpu(env); |
813 | if (r < 0) { | |
814 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
815 | exit(1); | |
816 | } | |
296af7c9 | 817 | |
55f8d6ac | 818 | qemu_kvm_init_cpu_signals(env); |
296af7c9 BS |
819 | |
820 | /* signal CPU creation */ | |
296af7c9 BS |
821 | env->created = 1; |
822 | qemu_cond_signal(&qemu_cpu_cond); | |
823 | ||
824 | /* and wait for machine initialization */ | |
0ab07c62 | 825 | while (!qemu_system_ready) { |
e009894f | 826 | qemu_cond_wait(&qemu_system_cond, &qemu_global_mutex); |
0ab07c62 | 827 | } |
296af7c9 BS |
828 | |
829 | while (1) { | |
0ab07c62 | 830 | if (cpu_can_run(env)) { |
6792a57b | 831 | r = kvm_cpu_exec(env); |
83f338f7 JK |
832 | if (r == EXCP_DEBUG) { |
833 | cpu_handle_debug_exception(env); | |
834 | } | |
0ab07c62 | 835 | } |
296af7c9 BS |
836 | qemu_kvm_wait_io_event(env); |
837 | } | |
838 | ||
839 | return NULL; | |
840 | } | |
841 | ||
7e97cd88 | 842 | static void *qemu_tcg_cpu_thread_fn(void *arg) |
296af7c9 BS |
843 | { |
844 | CPUState *env = arg; | |
845 | ||
55f8d6ac | 846 | qemu_tcg_init_cpu_signals(); |
b7680cb6 | 847 | qemu_thread_get_self(env->thread); |
296af7c9 BS |
848 | |
849 | /* signal CPU creation */ | |
850 | qemu_mutex_lock(&qemu_global_mutex); | |
0ab07c62 | 851 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
296af7c9 | 852 | env->created = 1; |
0ab07c62 | 853 | } |
296af7c9 BS |
854 | qemu_cond_signal(&qemu_cpu_cond); |
855 | ||
856 | /* and wait for machine initialization */ | |
0ab07c62 | 857 | while (!qemu_system_ready) { |
e009894f | 858 | qemu_cond_wait(&qemu_system_cond, &qemu_global_mutex); |
0ab07c62 | 859 | } |
296af7c9 BS |
860 | |
861 | while (1) { | |
472fb0c4 | 862 | cpu_exec_all(); |
6cabe1f3 | 863 | qemu_tcg_wait_io_event(); |
296af7c9 BS |
864 | } |
865 | ||
866 | return NULL; | |
867 | } | |
868 | ||
869 | void qemu_cpu_kick(void *_env) | |
870 | { | |
871 | CPUState *env = _env; | |
296af7c9 | 872 | |
296af7c9 | 873 | qemu_cond_broadcast(env->halt_cond); |
aa2c364b JK |
874 | if (!env->thread_kicked) { |
875 | qemu_thread_signal(env->thread, SIG_IPI); | |
876 | env->thread_kicked = true; | |
877 | } | |
296af7c9 BS |
878 | } |
879 | ||
46d62fac | 880 | void qemu_cpu_kick_self(void) |
296af7c9 | 881 | { |
46d62fac | 882 | assert(cpu_single_env); |
296af7c9 | 883 | |
46d62fac JK |
884 | if (!cpu_single_env->thread_kicked) { |
885 | qemu_thread_signal(cpu_single_env->thread, SIG_IPI); | |
886 | cpu_single_env->thread_kicked = true; | |
296af7c9 BS |
887 | } |
888 | } | |
889 | ||
b7680cb6 | 890 | int qemu_cpu_is_self(void *_env) |
296af7c9 | 891 | { |
296af7c9 | 892 | CPUState *env = _env; |
a8486bc9 | 893 | |
b7680cb6 | 894 | return qemu_thread_is_self(env->thread); |
296af7c9 BS |
895 | } |
896 | ||
296af7c9 BS |
897 | void qemu_mutex_lock_iothread(void) |
898 | { | |
899 | if (kvm_enabled()) { | |
296af7c9 | 900 | qemu_mutex_lock(&qemu_global_mutex); |
1a28cac3 MT |
901 | } else { |
902 | qemu_mutex_lock(&qemu_fair_mutex); | |
903 | if (qemu_mutex_trylock(&qemu_global_mutex)) { | |
904 | qemu_thread_signal(tcg_cpu_thread, SIG_IPI); | |
905 | qemu_mutex_lock(&qemu_global_mutex); | |
906 | } | |
907 | qemu_mutex_unlock(&qemu_fair_mutex); | |
908 | } | |
296af7c9 BS |
909 | } |
910 | ||
911 | void qemu_mutex_unlock_iothread(void) | |
912 | { | |
913 | qemu_mutex_unlock(&qemu_global_mutex); | |
914 | } | |
915 | ||
916 | static int all_vcpus_paused(void) | |
917 | { | |
918 | CPUState *penv = first_cpu; | |
919 | ||
920 | while (penv) { | |
0ab07c62 | 921 | if (!penv->stopped) { |
296af7c9 | 922 | return 0; |
0ab07c62 | 923 | } |
296af7c9 BS |
924 | penv = (CPUState *)penv->next_cpu; |
925 | } | |
926 | ||
927 | return 1; | |
928 | } | |
929 | ||
930 | void pause_all_vcpus(void) | |
931 | { | |
932 | CPUState *penv = first_cpu; | |
933 | ||
934 | while (penv) { | |
935 | penv->stop = 1; | |
296af7c9 BS |
936 | qemu_cpu_kick(penv); |
937 | penv = (CPUState *)penv->next_cpu; | |
938 | } | |
939 | ||
940 | while (!all_vcpus_paused()) { | |
941 | qemu_cond_timedwait(&qemu_pause_cond, &qemu_global_mutex, 100); | |
942 | penv = first_cpu; | |
943 | while (penv) { | |
1fbb22e5 | 944 | qemu_cpu_kick(penv); |
296af7c9 BS |
945 | penv = (CPUState *)penv->next_cpu; |
946 | } | |
947 | } | |
948 | } | |
949 | ||
950 | void resume_all_vcpus(void) | |
951 | { | |
952 | CPUState *penv = first_cpu; | |
953 | ||
954 | while (penv) { | |
955 | penv->stop = 0; | |
956 | penv->stopped = 0; | |
296af7c9 BS |
957 | qemu_cpu_kick(penv); |
958 | penv = (CPUState *)penv->next_cpu; | |
959 | } | |
960 | } | |
961 | ||
7e97cd88 | 962 | static void qemu_tcg_init_vcpu(void *_env) |
296af7c9 BS |
963 | { |
964 | CPUState *env = _env; | |
0ab07c62 | 965 | |
296af7c9 BS |
966 | /* share a single thread for all cpus with TCG */ |
967 | if (!tcg_cpu_thread) { | |
968 | env->thread = qemu_mallocz(sizeof(QemuThread)); | |
969 | env->halt_cond = qemu_mallocz(sizeof(QemuCond)); | |
970 | qemu_cond_init(env->halt_cond); | |
7e97cd88 | 971 | qemu_thread_create(env->thread, qemu_tcg_cpu_thread_fn, env); |
0ab07c62 | 972 | while (env->created == 0) { |
296af7c9 | 973 | qemu_cond_timedwait(&qemu_cpu_cond, &qemu_global_mutex, 100); |
0ab07c62 | 974 | } |
296af7c9 BS |
975 | tcg_cpu_thread = env->thread; |
976 | tcg_halt_cond = env->halt_cond; | |
977 | } else { | |
978 | env->thread = tcg_cpu_thread; | |
979 | env->halt_cond = tcg_halt_cond; | |
980 | } | |
981 | } | |
982 | ||
7e97cd88 | 983 | static void qemu_kvm_start_vcpu(CPUState *env) |
296af7c9 BS |
984 | { |
985 | env->thread = qemu_mallocz(sizeof(QemuThread)); | |
986 | env->halt_cond = qemu_mallocz(sizeof(QemuCond)); | |
987 | qemu_cond_init(env->halt_cond); | |
7e97cd88 | 988 | qemu_thread_create(env->thread, qemu_kvm_cpu_thread_fn, env); |
0ab07c62 | 989 | while (env->created == 0) { |
296af7c9 | 990 | qemu_cond_timedwait(&qemu_cpu_cond, &qemu_global_mutex, 100); |
0ab07c62 | 991 | } |
296af7c9 BS |
992 | } |
993 | ||
994 | void qemu_init_vcpu(void *_env) | |
995 | { | |
996 | CPUState *env = _env; | |
997 | ||
998 | env->nr_cores = smp_cores; | |
999 | env->nr_threads = smp_threads; | |
0ab07c62 | 1000 | if (kvm_enabled()) { |
7e97cd88 | 1001 | qemu_kvm_start_vcpu(env); |
0ab07c62 | 1002 | } else { |
7e97cd88 | 1003 | qemu_tcg_init_vcpu(env); |
0ab07c62 | 1004 | } |
296af7c9 BS |
1005 | } |
1006 | ||
1007 | void qemu_notify_event(void) | |
1008 | { | |
1009 | qemu_event_increment(); | |
1010 | } | |
1011 | ||
b4a3d965 | 1012 | void cpu_stop_current(void) |
296af7c9 | 1013 | { |
b4a3d965 | 1014 | if (cpu_single_env) { |
67bb172f | 1015 | cpu_single_env->stop = 0; |
b4a3d965 JK |
1016 | cpu_single_env->stopped = 1; |
1017 | cpu_exit(cpu_single_env); | |
67bb172f | 1018 | qemu_cond_signal(&qemu_pause_cond); |
b4a3d965 | 1019 | } |
296af7c9 BS |
1020 | } |
1021 | ||
1022 | void vm_stop(int reason) | |
1023 | { | |
b7680cb6 | 1024 | if (!qemu_thread_is_self(&io_thread)) { |
296af7c9 BS |
1025 | qemu_system_vmstop_request(reason); |
1026 | /* | |
1027 | * FIXME: should not return to device code in case | |
1028 | * vm_stop() has been requested. | |
1029 | */ | |
b4a3d965 | 1030 | cpu_stop_current(); |
296af7c9 BS |
1031 | return; |
1032 | } | |
1033 | do_vm_stop(reason); | |
1034 | } | |
1035 | ||
1036 | #endif | |
1037 | ||
6792a57b | 1038 | static int tcg_cpu_exec(CPUState *env) |
296af7c9 BS |
1039 | { |
1040 | int ret; | |
1041 | #ifdef CONFIG_PROFILER | |
1042 | int64_t ti; | |
1043 | #endif | |
1044 | ||
1045 | #ifdef CONFIG_PROFILER | |
1046 | ti = profile_getclock(); | |
1047 | #endif | |
1048 | if (use_icount) { | |
1049 | int64_t count; | |
1050 | int decr; | |
1051 | qemu_icount -= (env->icount_decr.u16.low + env->icount_extra); | |
1052 | env->icount_decr.u16.low = 0; | |
1053 | env->icount_extra = 0; | |
1054 | count = qemu_icount_round (qemu_next_deadline()); | |
1055 | qemu_icount += count; | |
1056 | decr = (count > 0xffff) ? 0xffff : count; | |
1057 | count -= decr; | |
1058 | env->icount_decr.u16.low = decr; | |
1059 | env->icount_extra = count; | |
1060 | } | |
1061 | ret = cpu_exec(env); | |
1062 | #ifdef CONFIG_PROFILER | |
1063 | qemu_time += profile_getclock() - ti; | |
1064 | #endif | |
1065 | if (use_icount) { | |
1066 | /* Fold pending instructions back into the | |
1067 | instruction counter, and clear the interrupt flag. */ | |
1068 | qemu_icount -= (env->icount_decr.u16.low | |
1069 | + env->icount_extra); | |
1070 | env->icount_decr.u32 = 0; | |
1071 | env->icount_extra = 0; | |
1072 | } | |
1073 | return ret; | |
1074 | } | |
1075 | ||
472fb0c4 | 1076 | bool cpu_exec_all(void) |
296af7c9 | 1077 | { |
9a36085b JK |
1078 | int r; |
1079 | ||
0ab07c62 | 1080 | if (next_cpu == NULL) { |
296af7c9 | 1081 | next_cpu = first_cpu; |
0ab07c62 | 1082 | } |
c629a4bc | 1083 | for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) { |
345f4426 | 1084 | CPUState *env = next_cpu; |
296af7c9 BS |
1085 | |
1086 | qemu_clock_enable(vm_clock, | |
345f4426 | 1087 | (env->singlestep_enabled & SSTEP_NOTIMER) == 0); |
296af7c9 | 1088 | |
0ab07c62 | 1089 | if (qemu_alarm_pending()) { |
296af7c9 | 1090 | break; |
0ab07c62 | 1091 | } |
3c638d06 | 1092 | if (cpu_can_run(env)) { |
9a36085b | 1093 | if (kvm_enabled()) { |
6792a57b | 1094 | r = kvm_cpu_exec(env); |
9a36085b | 1095 | qemu_kvm_eat_signals(env); |
6792a57b JK |
1096 | } else { |
1097 | r = tcg_cpu_exec(env); | |
9a36085b JK |
1098 | } |
1099 | if (r == EXCP_DEBUG) { | |
83f338f7 | 1100 | cpu_handle_debug_exception(env); |
3c638d06 JK |
1101 | break; |
1102 | } | |
df646dfd | 1103 | } else if (env->stop || env->stopped) { |
296af7c9 BS |
1104 | break; |
1105 | } | |
1106 | } | |
c629a4bc | 1107 | exit_request = 0; |
16400322 | 1108 | return !all_cpu_threads_idle(); |
296af7c9 BS |
1109 | } |
1110 | ||
1111 | void set_numa_modes(void) | |
1112 | { | |
1113 | CPUState *env; | |
1114 | int i; | |
1115 | ||
1116 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
1117 | for (i = 0; i < nb_numa_nodes; i++) { | |
1118 | if (node_cpumask[i] & (1 << env->cpu_index)) { | |
1119 | env->numa_node = i; | |
1120 | } | |
1121 | } | |
1122 | } | |
1123 | } | |
1124 | ||
1125 | void set_cpu_log(const char *optarg) | |
1126 | { | |
1127 | int mask; | |
1128 | const CPULogItem *item; | |
1129 | ||
1130 | mask = cpu_str_to_log_mask(optarg); | |
1131 | if (!mask) { | |
1132 | printf("Log items (comma separated):\n"); | |
1133 | for (item = cpu_log_items; item->mask != 0; item++) { | |
1134 | printf("%-10s %s\n", item->name, item->help); | |
1135 | } | |
1136 | exit(1); | |
1137 | } | |
1138 | cpu_set_log(mask); | |
1139 | } | |
29e922b6 BS |
1140 | |
1141 | /* Return the virtual CPU time, based on the instruction counter. */ | |
1142 | int64_t cpu_get_icount(void) | |
1143 | { | |
1144 | int64_t icount; | |
1145 | CPUState *env = cpu_single_env;; | |
1146 | ||
1147 | icount = qemu_icount; | |
1148 | if (env) { | |
1149 | if (!can_do_io(env)) { | |
1150 | fprintf(stderr, "Bad clock read\n"); | |
1151 | } | |
1152 | icount -= (env->icount_decr.u16.low + env->icount_extra); | |
1153 | } | |
1154 | return qemu_icount_bias + (icount << icount_time_shift); | |
1155 | } | |
262353cb | 1156 | |
9a78eead | 1157 | void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) |
262353cb BS |
1158 | { |
1159 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
1160 | #if defined(cpu_list_id) | |
1161 | cpu_list_id(f, cpu_fprintf, optarg); | |
1162 | #elif defined(cpu_list) | |
1163 | cpu_list(f, cpu_fprintf); /* deprecated */ | |
1164 | #endif | |
1165 | } |