Commit | Line | Data |
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296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
26 | #include "config-host.h" | |
27 | ||
83c9089e | 28 | #include "monitor/monitor.h" |
9c17d615 | 29 | #include "sysemu/sysemu.h" |
022c62cb | 30 | #include "exec/gdbstub.h" |
9c17d615 PB |
31 | #include "sysemu/dma.h" |
32 | #include "sysemu/kvm.h" | |
de0b36b6 | 33 | #include "qmp-commands.h" |
296af7c9 | 34 | |
1de7afc9 | 35 | #include "qemu/thread.h" |
9c17d615 PB |
36 | #include "sysemu/cpus.h" |
37 | #include "sysemu/qtest.h" | |
1de7afc9 PB |
38 | #include "qemu/main-loop.h" |
39 | #include "qemu/bitmap.h" | |
0ff0fc19 JK |
40 | |
41 | #ifndef _WIN32 | |
1de7afc9 | 42 | #include "qemu/compatfd.h" |
0ff0fc19 | 43 | #endif |
296af7c9 | 44 | |
6d9cb73c JK |
45 | #ifdef CONFIG_LINUX |
46 | ||
47 | #include <sys/prctl.h> | |
48 | ||
c0532a76 MT |
49 | #ifndef PR_MCE_KILL |
50 | #define PR_MCE_KILL 33 | |
51 | #endif | |
52 | ||
6d9cb73c JK |
53 | #ifndef PR_MCE_KILL_SET |
54 | #define PR_MCE_KILL_SET 1 | |
55 | #endif | |
56 | ||
57 | #ifndef PR_MCE_KILL_EARLY | |
58 | #define PR_MCE_KILL_EARLY 1 | |
59 | #endif | |
60 | ||
61 | #endif /* CONFIG_LINUX */ | |
62 | ||
9349b4f9 | 63 | static CPUArchState *next_cpu; |
296af7c9 | 64 | |
a98ae1d8 | 65 | static bool cpu_thread_is_idle(CPUState *cpu) |
ac873f1e | 66 | { |
c64ca814 | 67 | if (cpu->stop || cpu->queued_work_first) { |
ac873f1e PM |
68 | return false; |
69 | } | |
f324e766 | 70 | if (cpu->stopped || !runstate_is_running()) { |
ac873f1e PM |
71 | return true; |
72 | } | |
259186a7 | 73 | if (!cpu->halted || qemu_cpu_has_work(cpu) || |
7ae26bd4 | 74 | kvm_async_interrupts_enabled()) { |
ac873f1e PM |
75 | return false; |
76 | } | |
77 | return true; | |
78 | } | |
79 | ||
80 | static bool all_cpu_threads_idle(void) | |
81 | { | |
82 | CPUArchState *env; | |
83 | ||
84 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
a98ae1d8 | 85 | if (!cpu_thread_is_idle(ENV_GET_CPU(env))) { |
ac873f1e PM |
86 | return false; |
87 | } | |
88 | } | |
89 | return true; | |
90 | } | |
91 | ||
946fb27c PB |
92 | /***********************************************************/ |
93 | /* guest cycle counter */ | |
94 | ||
95 | /* Conversion factor from emulated instructions to virtual clock ticks. */ | |
96 | static int icount_time_shift; | |
97 | /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ | |
98 | #define MAX_ICOUNT_SHIFT 10 | |
99 | /* Compensate for varying guest execution speed. */ | |
100 | static int64_t qemu_icount_bias; | |
101 | static QEMUTimer *icount_rt_timer; | |
102 | static QEMUTimer *icount_vm_timer; | |
103 | static QEMUTimer *icount_warp_timer; | |
104 | static int64_t vm_clock_warp_start; | |
105 | static int64_t qemu_icount; | |
106 | ||
107 | typedef struct TimersState { | |
108 | int64_t cpu_ticks_prev; | |
109 | int64_t cpu_ticks_offset; | |
110 | int64_t cpu_clock_offset; | |
111 | int32_t cpu_ticks_enabled; | |
112 | int64_t dummy; | |
113 | } TimersState; | |
114 | ||
115 | TimersState timers_state; | |
116 | ||
117 | /* Return the virtual CPU time, based on the instruction counter. */ | |
118 | int64_t cpu_get_icount(void) | |
119 | { | |
120 | int64_t icount; | |
9349b4f9 | 121 | CPUArchState *env = cpu_single_env; |
946fb27c PB |
122 | |
123 | icount = qemu_icount; | |
124 | if (env) { | |
125 | if (!can_do_io(env)) { | |
126 | fprintf(stderr, "Bad clock read\n"); | |
127 | } | |
128 | icount -= (env->icount_decr.u16.low + env->icount_extra); | |
129 | } | |
130 | return qemu_icount_bias + (icount << icount_time_shift); | |
131 | } | |
132 | ||
133 | /* return the host CPU cycle counter and handle stop/restart */ | |
134 | int64_t cpu_get_ticks(void) | |
135 | { | |
136 | if (use_icount) { | |
137 | return cpu_get_icount(); | |
138 | } | |
139 | if (!timers_state.cpu_ticks_enabled) { | |
140 | return timers_state.cpu_ticks_offset; | |
141 | } else { | |
142 | int64_t ticks; | |
143 | ticks = cpu_get_real_ticks(); | |
144 | if (timers_state.cpu_ticks_prev > ticks) { | |
145 | /* Note: non increasing ticks may happen if the host uses | |
146 | software suspend */ | |
147 | timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks; | |
148 | } | |
149 | timers_state.cpu_ticks_prev = ticks; | |
150 | return ticks + timers_state.cpu_ticks_offset; | |
151 | } | |
152 | } | |
153 | ||
154 | /* return the host CPU monotonic timer and handle stop/restart */ | |
155 | int64_t cpu_get_clock(void) | |
156 | { | |
157 | int64_t ti; | |
158 | if (!timers_state.cpu_ticks_enabled) { | |
159 | return timers_state.cpu_clock_offset; | |
160 | } else { | |
161 | ti = get_clock(); | |
162 | return ti + timers_state.cpu_clock_offset; | |
163 | } | |
164 | } | |
165 | ||
166 | /* enable cpu_get_ticks() */ | |
167 | void cpu_enable_ticks(void) | |
168 | { | |
169 | if (!timers_state.cpu_ticks_enabled) { | |
170 | timers_state.cpu_ticks_offset -= cpu_get_real_ticks(); | |
171 | timers_state.cpu_clock_offset -= get_clock(); | |
172 | timers_state.cpu_ticks_enabled = 1; | |
173 | } | |
174 | } | |
175 | ||
176 | /* disable cpu_get_ticks() : the clock is stopped. You must not call | |
177 | cpu_get_ticks() after that. */ | |
178 | void cpu_disable_ticks(void) | |
179 | { | |
180 | if (timers_state.cpu_ticks_enabled) { | |
181 | timers_state.cpu_ticks_offset = cpu_get_ticks(); | |
182 | timers_state.cpu_clock_offset = cpu_get_clock(); | |
183 | timers_state.cpu_ticks_enabled = 0; | |
184 | } | |
185 | } | |
186 | ||
187 | /* Correlation between real and virtual time is always going to be | |
188 | fairly approximate, so ignore small variation. | |
189 | When the guest is idle real and virtual time will be aligned in | |
190 | the IO wait loop. */ | |
191 | #define ICOUNT_WOBBLE (get_ticks_per_sec() / 10) | |
192 | ||
193 | static void icount_adjust(void) | |
194 | { | |
195 | int64_t cur_time; | |
196 | int64_t cur_icount; | |
197 | int64_t delta; | |
198 | static int64_t last_delta; | |
199 | /* If the VM is not running, then do nothing. */ | |
200 | if (!runstate_is_running()) { | |
201 | return; | |
202 | } | |
203 | cur_time = cpu_get_clock(); | |
204 | cur_icount = qemu_get_clock_ns(vm_clock); | |
205 | delta = cur_icount - cur_time; | |
206 | /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */ | |
207 | if (delta > 0 | |
208 | && last_delta + ICOUNT_WOBBLE < delta * 2 | |
209 | && icount_time_shift > 0) { | |
210 | /* The guest is getting too far ahead. Slow time down. */ | |
211 | icount_time_shift--; | |
212 | } | |
213 | if (delta < 0 | |
214 | && last_delta - ICOUNT_WOBBLE > delta * 2 | |
215 | && icount_time_shift < MAX_ICOUNT_SHIFT) { | |
216 | /* The guest is getting too far behind. Speed time up. */ | |
217 | icount_time_shift++; | |
218 | } | |
219 | last_delta = delta; | |
220 | qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift); | |
221 | } | |
222 | ||
223 | static void icount_adjust_rt(void *opaque) | |
224 | { | |
225 | qemu_mod_timer(icount_rt_timer, | |
226 | qemu_get_clock_ms(rt_clock) + 1000); | |
227 | icount_adjust(); | |
228 | } | |
229 | ||
230 | static void icount_adjust_vm(void *opaque) | |
231 | { | |
232 | qemu_mod_timer(icount_vm_timer, | |
233 | qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10); | |
234 | icount_adjust(); | |
235 | } | |
236 | ||
237 | static int64_t qemu_icount_round(int64_t count) | |
238 | { | |
239 | return (count + (1 << icount_time_shift) - 1) >> icount_time_shift; | |
240 | } | |
241 | ||
242 | static void icount_warp_rt(void *opaque) | |
243 | { | |
244 | if (vm_clock_warp_start == -1) { | |
245 | return; | |
246 | } | |
247 | ||
248 | if (runstate_is_running()) { | |
249 | int64_t clock = qemu_get_clock_ns(rt_clock); | |
250 | int64_t warp_delta = clock - vm_clock_warp_start; | |
251 | if (use_icount == 1) { | |
252 | qemu_icount_bias += warp_delta; | |
253 | } else { | |
254 | /* | |
255 | * In adaptive mode, do not let the vm_clock run too | |
256 | * far ahead of real time. | |
257 | */ | |
258 | int64_t cur_time = cpu_get_clock(); | |
259 | int64_t cur_icount = qemu_get_clock_ns(vm_clock); | |
260 | int64_t delta = cur_time - cur_icount; | |
261 | qemu_icount_bias += MIN(warp_delta, delta); | |
262 | } | |
263 | if (qemu_clock_expired(vm_clock)) { | |
264 | qemu_notify_event(); | |
265 | } | |
266 | } | |
267 | vm_clock_warp_start = -1; | |
268 | } | |
269 | ||
8156be56 PB |
270 | void qtest_clock_warp(int64_t dest) |
271 | { | |
272 | int64_t clock = qemu_get_clock_ns(vm_clock); | |
273 | assert(qtest_enabled()); | |
274 | while (clock < dest) { | |
275 | int64_t deadline = qemu_clock_deadline(vm_clock); | |
276 | int64_t warp = MIN(dest - clock, deadline); | |
277 | qemu_icount_bias += warp; | |
278 | qemu_run_timers(vm_clock); | |
279 | clock = qemu_get_clock_ns(vm_clock); | |
280 | } | |
281 | qemu_notify_event(); | |
282 | } | |
283 | ||
946fb27c PB |
284 | void qemu_clock_warp(QEMUClock *clock) |
285 | { | |
286 | int64_t deadline; | |
287 | ||
288 | /* | |
289 | * There are too many global variables to make the "warp" behavior | |
290 | * applicable to other clocks. But a clock argument removes the | |
291 | * need for if statements all over the place. | |
292 | */ | |
293 | if (clock != vm_clock || !use_icount) { | |
294 | return; | |
295 | } | |
296 | ||
297 | /* | |
298 | * If the CPUs have been sleeping, advance the vm_clock timer now. This | |
299 | * ensures that the deadline for the timer is computed correctly below. | |
300 | * This also makes sure that the insn counter is synchronized before the | |
301 | * CPU starts running, in case the CPU is woken by an event other than | |
302 | * the earliest vm_clock timer. | |
303 | */ | |
304 | icount_warp_rt(NULL); | |
305 | if (!all_cpu_threads_idle() || !qemu_clock_has_timers(vm_clock)) { | |
306 | qemu_del_timer(icount_warp_timer); | |
307 | return; | |
308 | } | |
309 | ||
8156be56 PB |
310 | if (qtest_enabled()) { |
311 | /* When testing, qtest commands advance icount. */ | |
312 | return; | |
313 | } | |
314 | ||
946fb27c PB |
315 | vm_clock_warp_start = qemu_get_clock_ns(rt_clock); |
316 | deadline = qemu_clock_deadline(vm_clock); | |
317 | if (deadline > 0) { | |
318 | /* | |
319 | * Ensure the vm_clock proceeds even when the virtual CPU goes to | |
320 | * sleep. Otherwise, the CPU might be waiting for a future timer | |
321 | * interrupt to wake it up, but the interrupt never comes because | |
322 | * the vCPU isn't running any insns and thus doesn't advance the | |
323 | * vm_clock. | |
324 | * | |
325 | * An extreme solution for this problem would be to never let VCPUs | |
326 | * sleep in icount mode if there is a pending vm_clock timer; rather | |
327 | * time could just advance to the next vm_clock event. Instead, we | |
328 | * do stop VCPUs and only advance vm_clock after some "real" time, | |
329 | * (related to the time left until the next event) has passed. This | |
330 | * rt_clock timer will do this. This avoids that the warps are too | |
331 | * visible externally---for example, you will not be sending network | |
07f35073 | 332 | * packets continuously instead of every 100ms. |
946fb27c PB |
333 | */ |
334 | qemu_mod_timer(icount_warp_timer, vm_clock_warp_start + deadline); | |
335 | } else { | |
336 | qemu_notify_event(); | |
337 | } | |
338 | } | |
339 | ||
340 | static const VMStateDescription vmstate_timers = { | |
341 | .name = "timer", | |
342 | .version_id = 2, | |
343 | .minimum_version_id = 1, | |
344 | .minimum_version_id_old = 1, | |
345 | .fields = (VMStateField[]) { | |
346 | VMSTATE_INT64(cpu_ticks_offset, TimersState), | |
347 | VMSTATE_INT64(dummy, TimersState), | |
348 | VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2), | |
349 | VMSTATE_END_OF_LIST() | |
350 | } | |
351 | }; | |
352 | ||
353 | void configure_icount(const char *option) | |
354 | { | |
355 | vmstate_register(NULL, 0, &vmstate_timers, &timers_state); | |
356 | if (!option) { | |
357 | return; | |
358 | } | |
359 | ||
360 | icount_warp_timer = qemu_new_timer_ns(rt_clock, icount_warp_rt, NULL); | |
361 | if (strcmp(option, "auto") != 0) { | |
362 | icount_time_shift = strtol(option, NULL, 0); | |
363 | use_icount = 1; | |
364 | return; | |
365 | } | |
366 | ||
367 | use_icount = 2; | |
368 | ||
369 | /* 125MIPS seems a reasonable initial guess at the guest speed. | |
370 | It will be corrected fairly quickly anyway. */ | |
371 | icount_time_shift = 3; | |
372 | ||
373 | /* Have both realtime and virtual time triggers for speed adjustment. | |
374 | The realtime trigger catches emulated time passing too slowly, | |
375 | the virtual time trigger catches emulated time passing too fast. | |
376 | Realtime triggers occur even when idle, so use them less frequently | |
377 | than VM triggers. */ | |
378 | icount_rt_timer = qemu_new_timer_ms(rt_clock, icount_adjust_rt, NULL); | |
379 | qemu_mod_timer(icount_rt_timer, | |
380 | qemu_get_clock_ms(rt_clock) + 1000); | |
381 | icount_vm_timer = qemu_new_timer_ns(vm_clock, icount_adjust_vm, NULL); | |
382 | qemu_mod_timer(icount_vm_timer, | |
383 | qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10); | |
384 | } | |
385 | ||
296af7c9 BS |
386 | /***********************************************************/ |
387 | void hw_error(const char *fmt, ...) | |
388 | { | |
389 | va_list ap; | |
9349b4f9 | 390 | CPUArchState *env; |
55e5c285 | 391 | CPUState *cpu; |
296af7c9 BS |
392 | |
393 | va_start(ap, fmt); | |
394 | fprintf(stderr, "qemu: hardware error: "); | |
395 | vfprintf(stderr, fmt, ap); | |
396 | fprintf(stderr, "\n"); | |
55e5c285 AF |
397 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
398 | cpu = ENV_GET_CPU(env); | |
399 | fprintf(stderr, "CPU #%d:\n", cpu->cpu_index); | |
878096ee | 400 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU); |
296af7c9 BS |
401 | } |
402 | va_end(ap); | |
403 | abort(); | |
404 | } | |
405 | ||
406 | void cpu_synchronize_all_states(void) | |
407 | { | |
cb446eca | 408 | CPUArchState *env; |
296af7c9 | 409 | |
cb446eca AF |
410 | for (env = first_cpu; env; env = env->next_cpu) { |
411 | cpu_synchronize_state(ENV_GET_CPU(env)); | |
296af7c9 BS |
412 | } |
413 | } | |
414 | ||
415 | void cpu_synchronize_all_post_reset(void) | |
416 | { | |
9349b4f9 | 417 | CPUArchState *cpu; |
296af7c9 BS |
418 | |
419 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
3f24a58f | 420 | cpu_synchronize_post_reset(ENV_GET_CPU(cpu)); |
296af7c9 BS |
421 | } |
422 | } | |
423 | ||
424 | void cpu_synchronize_all_post_init(void) | |
425 | { | |
9349b4f9 | 426 | CPUArchState *cpu; |
296af7c9 BS |
427 | |
428 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
3f24a58f | 429 | cpu_synchronize_post_init(ENV_GET_CPU(cpu)); |
296af7c9 BS |
430 | } |
431 | } | |
432 | ||
2fa45344 | 433 | bool cpu_is_stopped(CPUState *cpu) |
3ae9501c | 434 | { |
f324e766 | 435 | return !runstate_is_running() || cpu->stopped; |
3ae9501c MT |
436 | } |
437 | ||
1dfb4dd9 | 438 | static void do_vm_stop(RunState state) |
296af7c9 | 439 | { |
1354869c | 440 | if (runstate_is_running()) { |
296af7c9 | 441 | cpu_disable_ticks(); |
296af7c9 | 442 | pause_all_vcpus(); |
f5bbfba1 | 443 | runstate_set(state); |
1dfb4dd9 | 444 | vm_state_notify(0, state); |
922453bc | 445 | bdrv_drain_all(); |
55df6f33 | 446 | bdrv_flush_all(); |
296af7c9 BS |
447 | monitor_protocol_event(QEVENT_STOP, NULL); |
448 | } | |
449 | } | |
450 | ||
a1fcaa73 | 451 | static bool cpu_can_run(CPUState *cpu) |
296af7c9 | 452 | { |
4fdeee7c | 453 | if (cpu->stop) { |
a1fcaa73 | 454 | return false; |
0ab07c62 | 455 | } |
f324e766 | 456 | if (cpu->stopped || !runstate_is_running()) { |
a1fcaa73 | 457 | return false; |
0ab07c62 | 458 | } |
a1fcaa73 | 459 | return true; |
296af7c9 BS |
460 | } |
461 | ||
9349b4f9 | 462 | static void cpu_handle_guest_debug(CPUArchState *env) |
83f338f7 | 463 | { |
f324e766 AF |
464 | CPUState *cpu = ENV_GET_CPU(env); |
465 | ||
3c638d06 | 466 | gdb_set_stop_cpu(env); |
8cf71710 | 467 | qemu_system_debug_request(); |
f324e766 | 468 | cpu->stopped = true; |
3c638d06 JK |
469 | } |
470 | ||
714bd040 PB |
471 | static void cpu_signal(int sig) |
472 | { | |
473 | if (cpu_single_env) { | |
60a3e17a | 474 | cpu_exit(ENV_GET_CPU(cpu_single_env)); |
714bd040 PB |
475 | } |
476 | exit_request = 1; | |
477 | } | |
714bd040 | 478 | |
6d9cb73c JK |
479 | #ifdef CONFIG_LINUX |
480 | static void sigbus_reraise(void) | |
481 | { | |
482 | sigset_t set; | |
483 | struct sigaction action; | |
484 | ||
485 | memset(&action, 0, sizeof(action)); | |
486 | action.sa_handler = SIG_DFL; | |
487 | if (!sigaction(SIGBUS, &action, NULL)) { | |
488 | raise(SIGBUS); | |
489 | sigemptyset(&set); | |
490 | sigaddset(&set, SIGBUS); | |
491 | sigprocmask(SIG_UNBLOCK, &set, NULL); | |
492 | } | |
493 | perror("Failed to re-raise SIGBUS!\n"); | |
494 | abort(); | |
495 | } | |
496 | ||
497 | static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo, | |
498 | void *ctx) | |
499 | { | |
500 | if (kvm_on_sigbus(siginfo->ssi_code, | |
501 | (void *)(intptr_t)siginfo->ssi_addr)) { | |
502 | sigbus_reraise(); | |
503 | } | |
504 | } | |
505 | ||
506 | static void qemu_init_sigbus(void) | |
507 | { | |
508 | struct sigaction action; | |
509 | ||
510 | memset(&action, 0, sizeof(action)); | |
511 | action.sa_flags = SA_SIGINFO; | |
512 | action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler; | |
513 | sigaction(SIGBUS, &action, NULL); | |
514 | ||
515 | prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0); | |
516 | } | |
517 | ||
290adf38 | 518 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
519 | { |
520 | struct timespec ts = { 0, 0 }; | |
521 | siginfo_t siginfo; | |
522 | sigset_t waitset; | |
523 | sigset_t chkset; | |
524 | int r; | |
525 | ||
526 | sigemptyset(&waitset); | |
527 | sigaddset(&waitset, SIG_IPI); | |
528 | sigaddset(&waitset, SIGBUS); | |
529 | ||
530 | do { | |
531 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
532 | if (r == -1 && !(errno == EAGAIN || errno == EINTR)) { | |
533 | perror("sigtimedwait"); | |
534 | exit(1); | |
535 | } | |
536 | ||
537 | switch (r) { | |
538 | case SIGBUS: | |
290adf38 | 539 | if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) { |
1ab3c6c0 JK |
540 | sigbus_reraise(); |
541 | } | |
542 | break; | |
543 | default: | |
544 | break; | |
545 | } | |
546 | ||
547 | r = sigpending(&chkset); | |
548 | if (r == -1) { | |
549 | perror("sigpending"); | |
550 | exit(1); | |
551 | } | |
552 | } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS)); | |
1ab3c6c0 JK |
553 | } |
554 | ||
6d9cb73c JK |
555 | #else /* !CONFIG_LINUX */ |
556 | ||
557 | static void qemu_init_sigbus(void) | |
558 | { | |
559 | } | |
1ab3c6c0 | 560 | |
290adf38 | 561 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
562 | { |
563 | } | |
6d9cb73c JK |
564 | #endif /* !CONFIG_LINUX */ |
565 | ||
296af7c9 | 566 | #ifndef _WIN32 |
55f8d6ac JK |
567 | static void dummy_signal(int sig) |
568 | { | |
569 | } | |
55f8d6ac | 570 | |
13618e05 | 571 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
714bd040 PB |
572 | { |
573 | int r; | |
574 | sigset_t set; | |
575 | struct sigaction sigact; | |
576 | ||
577 | memset(&sigact, 0, sizeof(sigact)); | |
578 | sigact.sa_handler = dummy_signal; | |
579 | sigaction(SIG_IPI, &sigact, NULL); | |
580 | ||
714bd040 PB |
581 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
582 | sigdelset(&set, SIG_IPI); | |
714bd040 | 583 | sigdelset(&set, SIGBUS); |
491d6e80 | 584 | r = kvm_set_signal_mask(cpu, &set); |
714bd040 PB |
585 | if (r) { |
586 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
587 | exit(1); | |
588 | } | |
589 | } | |
590 | ||
591 | static void qemu_tcg_init_cpu_signals(void) | |
592 | { | |
714bd040 PB |
593 | sigset_t set; |
594 | struct sigaction sigact; | |
595 | ||
596 | memset(&sigact, 0, sizeof(sigact)); | |
597 | sigact.sa_handler = cpu_signal; | |
598 | sigaction(SIG_IPI, &sigact, NULL); | |
599 | ||
600 | sigemptyset(&set); | |
601 | sigaddset(&set, SIG_IPI); | |
602 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
714bd040 PB |
603 | } |
604 | ||
55f8d6ac | 605 | #else /* _WIN32 */ |
13618e05 | 606 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
ff48eb5f | 607 | { |
714bd040 PB |
608 | abort(); |
609 | } | |
ff48eb5f | 610 | |
714bd040 PB |
611 | static void qemu_tcg_init_cpu_signals(void) |
612 | { | |
ff48eb5f | 613 | } |
714bd040 | 614 | #endif /* _WIN32 */ |
ff48eb5f | 615 | |
b2532d88 | 616 | static QemuMutex qemu_global_mutex; |
46daff13 PB |
617 | static QemuCond qemu_io_proceeded_cond; |
618 | static bool iothread_requesting_mutex; | |
296af7c9 BS |
619 | |
620 | static QemuThread io_thread; | |
621 | ||
622 | static QemuThread *tcg_cpu_thread; | |
623 | static QemuCond *tcg_halt_cond; | |
624 | ||
296af7c9 BS |
625 | /* cpu creation */ |
626 | static QemuCond qemu_cpu_cond; | |
627 | /* system init */ | |
296af7c9 | 628 | static QemuCond qemu_pause_cond; |
e82bcec2 | 629 | static QemuCond qemu_work_cond; |
296af7c9 | 630 | |
d3b12f5d | 631 | void qemu_init_cpu_loop(void) |
296af7c9 | 632 | { |
6d9cb73c | 633 | qemu_init_sigbus(); |
ed94592b | 634 | qemu_cond_init(&qemu_cpu_cond); |
ed94592b AL |
635 | qemu_cond_init(&qemu_pause_cond); |
636 | qemu_cond_init(&qemu_work_cond); | |
46daff13 | 637 | qemu_cond_init(&qemu_io_proceeded_cond); |
296af7c9 | 638 | qemu_mutex_init(&qemu_global_mutex); |
296af7c9 | 639 | |
b7680cb6 | 640 | qemu_thread_get_self(&io_thread); |
296af7c9 BS |
641 | } |
642 | ||
f100f0b3 | 643 | void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
e82bcec2 MT |
644 | { |
645 | struct qemu_work_item wi; | |
646 | ||
60e82579 | 647 | if (qemu_cpu_is_self(cpu)) { |
e82bcec2 MT |
648 | func(data); |
649 | return; | |
650 | } | |
651 | ||
652 | wi.func = func; | |
653 | wi.data = data; | |
c64ca814 AF |
654 | if (cpu->queued_work_first == NULL) { |
655 | cpu->queued_work_first = &wi; | |
0ab07c62 | 656 | } else { |
c64ca814 | 657 | cpu->queued_work_last->next = &wi; |
0ab07c62 | 658 | } |
c64ca814 | 659 | cpu->queued_work_last = &wi; |
e82bcec2 MT |
660 | wi.next = NULL; |
661 | wi.done = false; | |
662 | ||
c08d7424 | 663 | qemu_cpu_kick(cpu); |
e82bcec2 | 664 | while (!wi.done) { |
9349b4f9 | 665 | CPUArchState *self_env = cpu_single_env; |
e82bcec2 MT |
666 | |
667 | qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex); | |
668 | cpu_single_env = self_env; | |
669 | } | |
670 | } | |
671 | ||
6d45b109 | 672 | static void flush_queued_work(CPUState *cpu) |
e82bcec2 MT |
673 | { |
674 | struct qemu_work_item *wi; | |
675 | ||
c64ca814 | 676 | if (cpu->queued_work_first == NULL) { |
e82bcec2 | 677 | return; |
0ab07c62 | 678 | } |
e82bcec2 | 679 | |
c64ca814 AF |
680 | while ((wi = cpu->queued_work_first)) { |
681 | cpu->queued_work_first = wi->next; | |
e82bcec2 MT |
682 | wi->func(wi->data); |
683 | wi->done = true; | |
684 | } | |
c64ca814 | 685 | cpu->queued_work_last = NULL; |
e82bcec2 MT |
686 | qemu_cond_broadcast(&qemu_work_cond); |
687 | } | |
688 | ||
509a0d78 | 689 | static void qemu_wait_io_event_common(CPUState *cpu) |
296af7c9 | 690 | { |
4fdeee7c AF |
691 | if (cpu->stop) { |
692 | cpu->stop = false; | |
f324e766 | 693 | cpu->stopped = true; |
296af7c9 BS |
694 | qemu_cond_signal(&qemu_pause_cond); |
695 | } | |
6d45b109 | 696 | flush_queued_work(cpu); |
216fc9a4 | 697 | cpu->thread_kicked = false; |
296af7c9 BS |
698 | } |
699 | ||
6cabe1f3 | 700 | static void qemu_tcg_wait_io_event(void) |
296af7c9 | 701 | { |
9349b4f9 | 702 | CPUArchState *env; |
6cabe1f3 | 703 | |
16400322 | 704 | while (all_cpu_threads_idle()) { |
ab33fcda PB |
705 | /* Start accounting real time to the virtual clock if the CPUs |
706 | are idle. */ | |
707 | qemu_clock_warp(vm_clock); | |
9705fbb5 | 708 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
16400322 | 709 | } |
296af7c9 | 710 | |
46daff13 PB |
711 | while (iothread_requesting_mutex) { |
712 | qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex); | |
713 | } | |
6cabe1f3 JK |
714 | |
715 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
509a0d78 | 716 | qemu_wait_io_event_common(ENV_GET_CPU(env)); |
6cabe1f3 | 717 | } |
296af7c9 BS |
718 | } |
719 | ||
fd529e8f | 720 | static void qemu_kvm_wait_io_event(CPUState *cpu) |
296af7c9 | 721 | { |
a98ae1d8 | 722 | while (cpu_thread_is_idle(cpu)) { |
f5c121b8 | 723 | qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); |
16400322 | 724 | } |
296af7c9 | 725 | |
290adf38 | 726 | qemu_kvm_eat_signals(cpu); |
509a0d78 | 727 | qemu_wait_io_event_common(cpu); |
296af7c9 BS |
728 | } |
729 | ||
7e97cd88 | 730 | static void *qemu_kvm_cpu_thread_fn(void *arg) |
296af7c9 | 731 | { |
9349b4f9 | 732 | CPUArchState *env = arg; |
814e612e | 733 | CPUState *cpu = ENV_GET_CPU(env); |
84b4915d | 734 | int r; |
296af7c9 | 735 | |
6164e6d6 | 736 | qemu_mutex_lock(&qemu_global_mutex); |
814e612e | 737 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 738 | cpu->thread_id = qemu_get_thread_id(); |
e479c207 | 739 | cpu_single_env = env; |
296af7c9 | 740 | |
504134d2 | 741 | r = kvm_init_vcpu(cpu); |
84b4915d JK |
742 | if (r < 0) { |
743 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
744 | exit(1); | |
745 | } | |
296af7c9 | 746 | |
13618e05 | 747 | qemu_kvm_init_cpu_signals(cpu); |
296af7c9 BS |
748 | |
749 | /* signal CPU creation */ | |
61a46217 | 750 | cpu->created = true; |
296af7c9 BS |
751 | qemu_cond_signal(&qemu_cpu_cond); |
752 | ||
296af7c9 | 753 | while (1) { |
a1fcaa73 | 754 | if (cpu_can_run(cpu)) { |
1458c363 | 755 | r = kvm_cpu_exec(cpu); |
83f338f7 | 756 | if (r == EXCP_DEBUG) { |
1009d2ed | 757 | cpu_handle_guest_debug(env); |
83f338f7 | 758 | } |
0ab07c62 | 759 | } |
fd529e8f | 760 | qemu_kvm_wait_io_event(cpu); |
296af7c9 BS |
761 | } |
762 | ||
763 | return NULL; | |
764 | } | |
765 | ||
c7f0f3b1 AL |
766 | static void *qemu_dummy_cpu_thread_fn(void *arg) |
767 | { | |
768 | #ifdef _WIN32 | |
769 | fprintf(stderr, "qtest is not supported under Windows\n"); | |
770 | exit(1); | |
771 | #else | |
772 | CPUArchState *env = arg; | |
814e612e | 773 | CPUState *cpu = ENV_GET_CPU(env); |
c7f0f3b1 AL |
774 | sigset_t waitset; |
775 | int r; | |
776 | ||
777 | qemu_mutex_lock_iothread(); | |
814e612e | 778 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 779 | cpu->thread_id = qemu_get_thread_id(); |
c7f0f3b1 AL |
780 | |
781 | sigemptyset(&waitset); | |
782 | sigaddset(&waitset, SIG_IPI); | |
783 | ||
784 | /* signal CPU creation */ | |
61a46217 | 785 | cpu->created = true; |
c7f0f3b1 AL |
786 | qemu_cond_signal(&qemu_cpu_cond); |
787 | ||
788 | cpu_single_env = env; | |
789 | while (1) { | |
790 | cpu_single_env = NULL; | |
791 | qemu_mutex_unlock_iothread(); | |
792 | do { | |
793 | int sig; | |
794 | r = sigwait(&waitset, &sig); | |
795 | } while (r == -1 && (errno == EAGAIN || errno == EINTR)); | |
796 | if (r == -1) { | |
797 | perror("sigwait"); | |
798 | exit(1); | |
799 | } | |
800 | qemu_mutex_lock_iothread(); | |
801 | cpu_single_env = env; | |
509a0d78 | 802 | qemu_wait_io_event_common(cpu); |
c7f0f3b1 AL |
803 | } |
804 | ||
805 | return NULL; | |
806 | #endif | |
807 | } | |
808 | ||
bdb7ca67 JK |
809 | static void tcg_exec_all(void); |
810 | ||
a37677c3 IM |
811 | static void tcg_signal_cpu_creation(CPUState *cpu, void *data) |
812 | { | |
813 | cpu->thread_id = qemu_get_thread_id(); | |
814 | cpu->created = true; | |
815 | } | |
816 | ||
7e97cd88 | 817 | static void *qemu_tcg_cpu_thread_fn(void *arg) |
296af7c9 | 818 | { |
c3586ba7 AF |
819 | CPUState *cpu = arg; |
820 | CPUArchState *env; | |
296af7c9 | 821 | |
55f8d6ac | 822 | qemu_tcg_init_cpu_signals(); |
814e612e | 823 | qemu_thread_get_self(cpu->thread); |
296af7c9 | 824 | |
296af7c9 | 825 | qemu_mutex_lock(&qemu_global_mutex); |
a37677c3 | 826 | qemu_for_each_cpu(tcg_signal_cpu_creation, NULL); |
296af7c9 BS |
827 | qemu_cond_signal(&qemu_cpu_cond); |
828 | ||
fa7d1867 | 829 | /* wait for initial kick-off after machine start */ |
f324e766 | 830 | while (ENV_GET_CPU(first_cpu)->stopped) { |
fa7d1867 | 831 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
8e564b4e JK |
832 | |
833 | /* process any pending work */ | |
834 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
509a0d78 | 835 | qemu_wait_io_event_common(ENV_GET_CPU(env)); |
8e564b4e | 836 | } |
0ab07c62 | 837 | } |
296af7c9 BS |
838 | |
839 | while (1) { | |
bdb7ca67 | 840 | tcg_exec_all(); |
946fb27c | 841 | if (use_icount && qemu_clock_deadline(vm_clock) <= 0) { |
3b2319a3 PB |
842 | qemu_notify_event(); |
843 | } | |
6cabe1f3 | 844 | qemu_tcg_wait_io_event(); |
296af7c9 BS |
845 | } |
846 | ||
847 | return NULL; | |
848 | } | |
849 | ||
2ff09a40 | 850 | static void qemu_cpu_kick_thread(CPUState *cpu) |
cc015e9a PB |
851 | { |
852 | #ifndef _WIN32 | |
853 | int err; | |
854 | ||
814e612e | 855 | err = pthread_kill(cpu->thread->thread, SIG_IPI); |
cc015e9a PB |
856 | if (err) { |
857 | fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); | |
858 | exit(1); | |
859 | } | |
860 | #else /* _WIN32 */ | |
60e82579 | 861 | if (!qemu_cpu_is_self(cpu)) { |
ed9164a3 OH |
862 | CONTEXT tcgContext; |
863 | ||
864 | if (SuspendThread(cpu->hThread) == (DWORD)-1) { | |
7f1721df | 865 | fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__, |
ed9164a3 OH |
866 | GetLastError()); |
867 | exit(1); | |
868 | } | |
869 | ||
870 | /* On multi-core systems, we are not sure that the thread is actually | |
871 | * suspended until we can get the context. | |
872 | */ | |
873 | tcgContext.ContextFlags = CONTEXT_CONTROL; | |
874 | while (GetThreadContext(cpu->hThread, &tcgContext) != 0) { | |
875 | continue; | |
876 | } | |
877 | ||
cc015e9a | 878 | cpu_signal(0); |
ed9164a3 OH |
879 | |
880 | if (ResumeThread(cpu->hThread) == (DWORD)-1) { | |
7f1721df | 881 | fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__, |
ed9164a3 OH |
882 | GetLastError()); |
883 | exit(1); | |
884 | } | |
cc015e9a PB |
885 | } |
886 | #endif | |
887 | } | |
888 | ||
c08d7424 | 889 | void qemu_cpu_kick(CPUState *cpu) |
296af7c9 | 890 | { |
f5c121b8 | 891 | qemu_cond_broadcast(cpu->halt_cond); |
216fc9a4 | 892 | if (!tcg_enabled() && !cpu->thread_kicked) { |
2ff09a40 | 893 | qemu_cpu_kick_thread(cpu); |
216fc9a4 | 894 | cpu->thread_kicked = true; |
aa2c364b | 895 | } |
296af7c9 BS |
896 | } |
897 | ||
46d62fac | 898 | void qemu_cpu_kick_self(void) |
296af7c9 | 899 | { |
b55c22c6 | 900 | #ifndef _WIN32 |
46d62fac | 901 | assert(cpu_single_env); |
216fc9a4 | 902 | CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env); |
296af7c9 | 903 | |
216fc9a4 | 904 | if (!cpu_single_cpu->thread_kicked) { |
2ff09a40 | 905 | qemu_cpu_kick_thread(cpu_single_cpu); |
216fc9a4 | 906 | cpu_single_cpu->thread_kicked = true; |
296af7c9 | 907 | } |
b55c22c6 PB |
908 | #else |
909 | abort(); | |
910 | #endif | |
296af7c9 BS |
911 | } |
912 | ||
60e82579 | 913 | bool qemu_cpu_is_self(CPUState *cpu) |
296af7c9 | 914 | { |
814e612e | 915 | return qemu_thread_is_self(cpu->thread); |
296af7c9 BS |
916 | } |
917 | ||
aa723c23 JQ |
918 | static bool qemu_in_vcpu_thread(void) |
919 | { | |
60e82579 | 920 | return cpu_single_env && qemu_cpu_is_self(ENV_GET_CPU(cpu_single_env)); |
aa723c23 JQ |
921 | } |
922 | ||
296af7c9 BS |
923 | void qemu_mutex_lock_iothread(void) |
924 | { | |
c7f0f3b1 | 925 | if (!tcg_enabled()) { |
296af7c9 | 926 | qemu_mutex_lock(&qemu_global_mutex); |
1a28cac3 | 927 | } else { |
46daff13 | 928 | iothread_requesting_mutex = true; |
1a28cac3 | 929 | if (qemu_mutex_trylock(&qemu_global_mutex)) { |
2ff09a40 | 930 | qemu_cpu_kick_thread(ENV_GET_CPU(first_cpu)); |
1a28cac3 MT |
931 | qemu_mutex_lock(&qemu_global_mutex); |
932 | } | |
46daff13 PB |
933 | iothread_requesting_mutex = false; |
934 | qemu_cond_broadcast(&qemu_io_proceeded_cond); | |
1a28cac3 | 935 | } |
296af7c9 BS |
936 | } |
937 | ||
938 | void qemu_mutex_unlock_iothread(void) | |
939 | { | |
940 | qemu_mutex_unlock(&qemu_global_mutex); | |
941 | } | |
942 | ||
943 | static int all_vcpus_paused(void) | |
944 | { | |
9349b4f9 | 945 | CPUArchState *penv = first_cpu; |
296af7c9 BS |
946 | |
947 | while (penv) { | |
f324e766 AF |
948 | CPUState *pcpu = ENV_GET_CPU(penv); |
949 | if (!pcpu->stopped) { | |
296af7c9 | 950 | return 0; |
0ab07c62 | 951 | } |
5207a5e0 | 952 | penv = penv->next_cpu; |
296af7c9 BS |
953 | } |
954 | ||
955 | return 1; | |
956 | } | |
957 | ||
958 | void pause_all_vcpus(void) | |
959 | { | |
9349b4f9 | 960 | CPUArchState *penv = first_cpu; |
296af7c9 | 961 | |
a5c57d64 | 962 | qemu_clock_enable(vm_clock, false); |
296af7c9 | 963 | while (penv) { |
4fdeee7c AF |
964 | CPUState *pcpu = ENV_GET_CPU(penv); |
965 | pcpu->stop = true; | |
c08d7424 | 966 | qemu_cpu_kick(pcpu); |
5207a5e0 | 967 | penv = penv->next_cpu; |
296af7c9 BS |
968 | } |
969 | ||
aa723c23 | 970 | if (qemu_in_vcpu_thread()) { |
d798e974 JK |
971 | cpu_stop_current(); |
972 | if (!kvm_enabled()) { | |
10858193 | 973 | penv = first_cpu; |
d798e974 | 974 | while (penv) { |
4fdeee7c | 975 | CPUState *pcpu = ENV_GET_CPU(penv); |
10858193 | 976 | pcpu->stop = false; |
f324e766 | 977 | pcpu->stopped = true; |
d798e974 JK |
978 | penv = penv->next_cpu; |
979 | } | |
980 | return; | |
981 | } | |
982 | } | |
983 | ||
296af7c9 | 984 | while (!all_vcpus_paused()) { |
be7d6c57 | 985 | qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex); |
296af7c9 BS |
986 | penv = first_cpu; |
987 | while (penv) { | |
c08d7424 | 988 | qemu_cpu_kick(ENV_GET_CPU(penv)); |
5207a5e0 | 989 | penv = penv->next_cpu; |
296af7c9 BS |
990 | } |
991 | } | |
992 | } | |
993 | ||
2993683b IM |
994 | void cpu_resume(CPUState *cpu) |
995 | { | |
996 | cpu->stop = false; | |
997 | cpu->stopped = false; | |
998 | qemu_cpu_kick(cpu); | |
999 | } | |
1000 | ||
296af7c9 BS |
1001 | void resume_all_vcpus(void) |
1002 | { | |
9349b4f9 | 1003 | CPUArchState *penv = first_cpu; |
296af7c9 | 1004 | |
47113ab6 | 1005 | qemu_clock_enable(vm_clock, true); |
296af7c9 | 1006 | while (penv) { |
4fdeee7c | 1007 | CPUState *pcpu = ENV_GET_CPU(penv); |
2993683b | 1008 | cpu_resume(pcpu); |
5207a5e0 | 1009 | penv = penv->next_cpu; |
296af7c9 BS |
1010 | } |
1011 | } | |
1012 | ||
e5ab30a2 | 1013 | static void qemu_tcg_init_vcpu(CPUState *cpu) |
296af7c9 | 1014 | { |
296af7c9 BS |
1015 | /* share a single thread for all cpus with TCG */ |
1016 | if (!tcg_cpu_thread) { | |
814e612e | 1017 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1018 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1019 | qemu_cond_init(cpu->halt_cond); | |
1020 | tcg_halt_cond = cpu->halt_cond; | |
c3586ba7 | 1021 | qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu, |
1ecf47bf PB |
1022 | QEMU_THREAD_JOINABLE); |
1023 | #ifdef _WIN32 | |
814e612e | 1024 | cpu->hThread = qemu_thread_get_handle(cpu->thread); |
1ecf47bf | 1025 | #endif |
61a46217 | 1026 | while (!cpu->created) { |
18a85728 | 1027 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1028 | } |
814e612e | 1029 | tcg_cpu_thread = cpu->thread; |
296af7c9 | 1030 | } else { |
814e612e | 1031 | cpu->thread = tcg_cpu_thread; |
f5c121b8 | 1032 | cpu->halt_cond = tcg_halt_cond; |
296af7c9 BS |
1033 | } |
1034 | } | |
1035 | ||
9349b4f9 | 1036 | static void qemu_kvm_start_vcpu(CPUArchState *env) |
296af7c9 | 1037 | { |
814e612e AF |
1038 | CPUState *cpu = ENV_GET_CPU(env); |
1039 | ||
1040 | cpu->thread = g_malloc0(sizeof(QemuThread)); | |
f5c121b8 AF |
1041 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1042 | qemu_cond_init(cpu->halt_cond); | |
814e612e | 1043 | qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, env, |
1ecf47bf | 1044 | QEMU_THREAD_JOINABLE); |
61a46217 | 1045 | while (!cpu->created) { |
18a85728 | 1046 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1047 | } |
296af7c9 BS |
1048 | } |
1049 | ||
c7f0f3b1 AL |
1050 | static void qemu_dummy_start_vcpu(CPUArchState *env) |
1051 | { | |
814e612e AF |
1052 | CPUState *cpu = ENV_GET_CPU(env); |
1053 | ||
1054 | cpu->thread = g_malloc0(sizeof(QemuThread)); | |
f5c121b8 AF |
1055 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1056 | qemu_cond_init(cpu->halt_cond); | |
814e612e | 1057 | qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, env, |
c7f0f3b1 | 1058 | QEMU_THREAD_JOINABLE); |
61a46217 | 1059 | while (!cpu->created) { |
c7f0f3b1 AL |
1060 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
1061 | } | |
1062 | } | |
1063 | ||
296af7c9 BS |
1064 | void qemu_init_vcpu(void *_env) |
1065 | { | |
9349b4f9 | 1066 | CPUArchState *env = _env; |
f324e766 | 1067 | CPUState *cpu = ENV_GET_CPU(env); |
296af7c9 | 1068 | |
ce3960eb AF |
1069 | cpu->nr_cores = smp_cores; |
1070 | cpu->nr_threads = smp_threads; | |
f324e766 | 1071 | cpu->stopped = true; |
0ab07c62 | 1072 | if (kvm_enabled()) { |
7e97cd88 | 1073 | qemu_kvm_start_vcpu(env); |
c7f0f3b1 | 1074 | } else if (tcg_enabled()) { |
e5ab30a2 | 1075 | qemu_tcg_init_vcpu(cpu); |
c7f0f3b1 AL |
1076 | } else { |
1077 | qemu_dummy_start_vcpu(env); | |
0ab07c62 | 1078 | } |
296af7c9 BS |
1079 | } |
1080 | ||
b4a3d965 | 1081 | void cpu_stop_current(void) |
296af7c9 | 1082 | { |
b4a3d965 | 1083 | if (cpu_single_env) { |
4fdeee7c AF |
1084 | CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env); |
1085 | cpu_single_cpu->stop = false; | |
f324e766 | 1086 | cpu_single_cpu->stopped = true; |
60a3e17a | 1087 | cpu_exit(cpu_single_cpu); |
67bb172f | 1088 | qemu_cond_signal(&qemu_pause_cond); |
b4a3d965 | 1089 | } |
296af7c9 BS |
1090 | } |
1091 | ||
1dfb4dd9 | 1092 | void vm_stop(RunState state) |
296af7c9 | 1093 | { |
aa723c23 | 1094 | if (qemu_in_vcpu_thread()) { |
1dfb4dd9 | 1095 | qemu_system_vmstop_request(state); |
296af7c9 BS |
1096 | /* |
1097 | * FIXME: should not return to device code in case | |
1098 | * vm_stop() has been requested. | |
1099 | */ | |
b4a3d965 | 1100 | cpu_stop_current(); |
296af7c9 BS |
1101 | return; |
1102 | } | |
1dfb4dd9 | 1103 | do_vm_stop(state); |
296af7c9 BS |
1104 | } |
1105 | ||
8a9236f1 LC |
1106 | /* does a state transition even if the VM is already stopped, |
1107 | current state is forgotten forever */ | |
1108 | void vm_stop_force_state(RunState state) | |
1109 | { | |
1110 | if (runstate_is_running()) { | |
1111 | vm_stop(state); | |
1112 | } else { | |
1113 | runstate_set(state); | |
1114 | } | |
1115 | } | |
1116 | ||
9349b4f9 | 1117 | static int tcg_cpu_exec(CPUArchState *env) |
296af7c9 BS |
1118 | { |
1119 | int ret; | |
1120 | #ifdef CONFIG_PROFILER | |
1121 | int64_t ti; | |
1122 | #endif | |
1123 | ||
1124 | #ifdef CONFIG_PROFILER | |
1125 | ti = profile_getclock(); | |
1126 | #endif | |
1127 | if (use_icount) { | |
1128 | int64_t count; | |
1129 | int decr; | |
1130 | qemu_icount -= (env->icount_decr.u16.low + env->icount_extra); | |
1131 | env->icount_decr.u16.low = 0; | |
1132 | env->icount_extra = 0; | |
946fb27c | 1133 | count = qemu_icount_round(qemu_clock_deadline(vm_clock)); |
296af7c9 BS |
1134 | qemu_icount += count; |
1135 | decr = (count > 0xffff) ? 0xffff : count; | |
1136 | count -= decr; | |
1137 | env->icount_decr.u16.low = decr; | |
1138 | env->icount_extra = count; | |
1139 | } | |
1140 | ret = cpu_exec(env); | |
1141 | #ifdef CONFIG_PROFILER | |
1142 | qemu_time += profile_getclock() - ti; | |
1143 | #endif | |
1144 | if (use_icount) { | |
1145 | /* Fold pending instructions back into the | |
1146 | instruction counter, and clear the interrupt flag. */ | |
1147 | qemu_icount -= (env->icount_decr.u16.low | |
1148 | + env->icount_extra); | |
1149 | env->icount_decr.u32 = 0; | |
1150 | env->icount_extra = 0; | |
1151 | } | |
1152 | return ret; | |
1153 | } | |
1154 | ||
bdb7ca67 | 1155 | static void tcg_exec_all(void) |
296af7c9 | 1156 | { |
9a36085b JK |
1157 | int r; |
1158 | ||
ab33fcda PB |
1159 | /* Account partial waits to the vm_clock. */ |
1160 | qemu_clock_warp(vm_clock); | |
1161 | ||
0ab07c62 | 1162 | if (next_cpu == NULL) { |
296af7c9 | 1163 | next_cpu = first_cpu; |
0ab07c62 | 1164 | } |
c629a4bc | 1165 | for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) { |
9349b4f9 | 1166 | CPUArchState *env = next_cpu; |
4fdeee7c | 1167 | CPUState *cpu = ENV_GET_CPU(env); |
296af7c9 BS |
1168 | |
1169 | qemu_clock_enable(vm_clock, | |
345f4426 | 1170 | (env->singlestep_enabled & SSTEP_NOTIMER) == 0); |
296af7c9 | 1171 | |
a1fcaa73 | 1172 | if (cpu_can_run(cpu)) { |
bdb7ca67 | 1173 | r = tcg_cpu_exec(env); |
9a36085b | 1174 | if (r == EXCP_DEBUG) { |
1009d2ed | 1175 | cpu_handle_guest_debug(env); |
3c638d06 JK |
1176 | break; |
1177 | } | |
f324e766 | 1178 | } else if (cpu->stop || cpu->stopped) { |
296af7c9 BS |
1179 | break; |
1180 | } | |
1181 | } | |
c629a4bc | 1182 | exit_request = 0; |
296af7c9 BS |
1183 | } |
1184 | ||
1185 | void set_numa_modes(void) | |
1186 | { | |
9349b4f9 | 1187 | CPUArchState *env; |
1b1ed8dc | 1188 | CPUState *cpu; |
296af7c9 BS |
1189 | int i; |
1190 | ||
1191 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
1b1ed8dc | 1192 | cpu = ENV_GET_CPU(env); |
296af7c9 | 1193 | for (i = 0; i < nb_numa_nodes; i++) { |
55e5c285 | 1194 | if (test_bit(cpu->cpu_index, node_cpumask[i])) { |
1b1ed8dc | 1195 | cpu->numa_node = i; |
296af7c9 BS |
1196 | } |
1197 | } | |
1198 | } | |
1199 | } | |
1200 | ||
9a78eead | 1201 | void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) |
262353cb BS |
1202 | { |
1203 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
e916cbf8 PM |
1204 | #if defined(cpu_list) |
1205 | cpu_list(f, cpu_fprintf); | |
262353cb BS |
1206 | #endif |
1207 | } | |
de0b36b6 LC |
1208 | |
1209 | CpuInfoList *qmp_query_cpus(Error **errp) | |
1210 | { | |
1211 | CpuInfoList *head = NULL, *cur_item = NULL; | |
9349b4f9 | 1212 | CPUArchState *env; |
de0b36b6 | 1213 | |
9f09e18a AF |
1214 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
1215 | CPUState *cpu = ENV_GET_CPU(env); | |
de0b36b6 LC |
1216 | CpuInfoList *info; |
1217 | ||
cb446eca | 1218 | cpu_synchronize_state(cpu); |
de0b36b6 LC |
1219 | |
1220 | info = g_malloc0(sizeof(*info)); | |
1221 | info->value = g_malloc0(sizeof(*info->value)); | |
55e5c285 | 1222 | info->value->CPU = cpu->cpu_index; |
de0b36b6 | 1223 | info->value->current = (env == first_cpu); |
259186a7 | 1224 | info->value->halted = cpu->halted; |
9f09e18a | 1225 | info->value->thread_id = cpu->thread_id; |
de0b36b6 LC |
1226 | #if defined(TARGET_I386) |
1227 | info->value->has_pc = true; | |
1228 | info->value->pc = env->eip + env->segs[R_CS].base; | |
1229 | #elif defined(TARGET_PPC) | |
1230 | info->value->has_nip = true; | |
1231 | info->value->nip = env->nip; | |
1232 | #elif defined(TARGET_SPARC) | |
1233 | info->value->has_pc = true; | |
1234 | info->value->pc = env->pc; | |
1235 | info->value->has_npc = true; | |
1236 | info->value->npc = env->npc; | |
1237 | #elif defined(TARGET_MIPS) | |
1238 | info->value->has_PC = true; | |
1239 | info->value->PC = env->active_tc.PC; | |
1240 | #endif | |
1241 | ||
1242 | /* XXX: waiting for the qapi to support GSList */ | |
1243 | if (!cur_item) { | |
1244 | head = cur_item = info; | |
1245 | } else { | |
1246 | cur_item->next = info; | |
1247 | cur_item = info; | |
1248 | } | |
1249 | } | |
1250 | ||
1251 | return head; | |
1252 | } | |
0cfd6a9a LC |
1253 | |
1254 | void qmp_memsave(int64_t addr, int64_t size, const char *filename, | |
1255 | bool has_cpu, int64_t cpu_index, Error **errp) | |
1256 | { | |
1257 | FILE *f; | |
1258 | uint32_t l; | |
9349b4f9 | 1259 | CPUArchState *env; |
55e5c285 | 1260 | CPUState *cpu; |
0cfd6a9a LC |
1261 | uint8_t buf[1024]; |
1262 | ||
1263 | if (!has_cpu) { | |
1264 | cpu_index = 0; | |
1265 | } | |
1266 | ||
151d1322 AF |
1267 | cpu = qemu_get_cpu(cpu_index); |
1268 | if (cpu == NULL) { | |
0cfd6a9a LC |
1269 | error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index", |
1270 | "a CPU number"); | |
1271 | return; | |
1272 | } | |
151d1322 | 1273 | env = cpu->env_ptr; |
0cfd6a9a LC |
1274 | |
1275 | f = fopen(filename, "wb"); | |
1276 | if (!f) { | |
618da851 | 1277 | error_setg_file_open(errp, errno, filename); |
0cfd6a9a LC |
1278 | return; |
1279 | } | |
1280 | ||
1281 | while (size != 0) { | |
1282 | l = sizeof(buf); | |
1283 | if (l > size) | |
1284 | l = size; | |
1285 | cpu_memory_rw_debug(env, addr, buf, l, 0); | |
1286 | if (fwrite(buf, 1, l, f) != l) { | |
1287 | error_set(errp, QERR_IO_ERROR); | |
1288 | goto exit; | |
1289 | } | |
1290 | addr += l; | |
1291 | size -= l; | |
1292 | } | |
1293 | ||
1294 | exit: | |
1295 | fclose(f); | |
1296 | } | |
6d3962bf LC |
1297 | |
1298 | void qmp_pmemsave(int64_t addr, int64_t size, const char *filename, | |
1299 | Error **errp) | |
1300 | { | |
1301 | FILE *f; | |
1302 | uint32_t l; | |
1303 | uint8_t buf[1024]; | |
1304 | ||
1305 | f = fopen(filename, "wb"); | |
1306 | if (!f) { | |
618da851 | 1307 | error_setg_file_open(errp, errno, filename); |
6d3962bf LC |
1308 | return; |
1309 | } | |
1310 | ||
1311 | while (size != 0) { | |
1312 | l = sizeof(buf); | |
1313 | if (l > size) | |
1314 | l = size; | |
1315 | cpu_physical_memory_rw(addr, buf, l, 0); | |
1316 | if (fwrite(buf, 1, l, f) != l) { | |
1317 | error_set(errp, QERR_IO_ERROR); | |
1318 | goto exit; | |
1319 | } | |
1320 | addr += l; | |
1321 | size -= l; | |
1322 | } | |
1323 | ||
1324 | exit: | |
1325 | fclose(f); | |
1326 | } | |
ab49ab5c LC |
1327 | |
1328 | void qmp_inject_nmi(Error **errp) | |
1329 | { | |
1330 | #if defined(TARGET_I386) | |
9349b4f9 | 1331 | CPUArchState *env; |
ab49ab5c LC |
1332 | |
1333 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
02c09195 | 1334 | if (!env->apic_state) { |
c3affe56 | 1335 | cpu_interrupt(CPU(x86_env_get_cpu(env)), CPU_INTERRUPT_NMI); |
02c09195 JK |
1336 | } else { |
1337 | apic_deliver_nmi(env->apic_state); | |
1338 | } | |
ab49ab5c LC |
1339 | } |
1340 | #else | |
1341 | error_set(errp, QERR_UNSUPPORTED); | |
1342 | #endif | |
1343 | } |