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Commit | Line | Data |
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296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
26 | #include "config-host.h" | |
27 | ||
83c9089e | 28 | #include "monitor/monitor.h" |
a4e15de9 | 29 | #include "qapi/qmp/qerror.h" |
9c17d615 | 30 | #include "sysemu/sysemu.h" |
022c62cb | 31 | #include "exec/gdbstub.h" |
9c17d615 PB |
32 | #include "sysemu/dma.h" |
33 | #include "sysemu/kvm.h" | |
de0b36b6 | 34 | #include "qmp-commands.h" |
296af7c9 | 35 | |
1de7afc9 | 36 | #include "qemu/thread.h" |
9c17d615 PB |
37 | #include "sysemu/cpus.h" |
38 | #include "sysemu/qtest.h" | |
1de7afc9 PB |
39 | #include "qemu/main-loop.h" |
40 | #include "qemu/bitmap.h" | |
cb365646 | 41 | #include "qemu/seqlock.h" |
a4e15de9 | 42 | #include "qapi-event.h" |
9cb805fd | 43 | #include "hw/nmi.h" |
0ff0fc19 JK |
44 | |
45 | #ifndef _WIN32 | |
1de7afc9 | 46 | #include "qemu/compatfd.h" |
0ff0fc19 | 47 | #endif |
296af7c9 | 48 | |
6d9cb73c JK |
49 | #ifdef CONFIG_LINUX |
50 | ||
51 | #include <sys/prctl.h> | |
52 | ||
c0532a76 MT |
53 | #ifndef PR_MCE_KILL |
54 | #define PR_MCE_KILL 33 | |
55 | #endif | |
56 | ||
6d9cb73c JK |
57 | #ifndef PR_MCE_KILL_SET |
58 | #define PR_MCE_KILL_SET 1 | |
59 | #endif | |
60 | ||
61 | #ifndef PR_MCE_KILL_EARLY | |
62 | #define PR_MCE_KILL_EARLY 1 | |
63 | #endif | |
64 | ||
65 | #endif /* CONFIG_LINUX */ | |
66 | ||
182735ef | 67 | static CPUState *next_cpu; |
27498bef ST |
68 | int64_t max_delay; |
69 | int64_t max_advance; | |
296af7c9 | 70 | |
321bc0b2 TC |
71 | bool cpu_is_stopped(CPUState *cpu) |
72 | { | |
73 | return cpu->stopped || !runstate_is_running(); | |
74 | } | |
75 | ||
a98ae1d8 | 76 | static bool cpu_thread_is_idle(CPUState *cpu) |
ac873f1e | 77 | { |
c64ca814 | 78 | if (cpu->stop || cpu->queued_work_first) { |
ac873f1e PM |
79 | return false; |
80 | } | |
321bc0b2 | 81 | if (cpu_is_stopped(cpu)) { |
ac873f1e PM |
82 | return true; |
83 | } | |
8c2e1b00 | 84 | if (!cpu->halted || cpu_has_work(cpu) || |
215e79c0 | 85 | kvm_halt_in_kernel()) { |
ac873f1e PM |
86 | return false; |
87 | } | |
88 | return true; | |
89 | } | |
90 | ||
91 | static bool all_cpu_threads_idle(void) | |
92 | { | |
182735ef | 93 | CPUState *cpu; |
ac873f1e | 94 | |
bdc44640 | 95 | CPU_FOREACH(cpu) { |
182735ef | 96 | if (!cpu_thread_is_idle(cpu)) { |
ac873f1e PM |
97 | return false; |
98 | } | |
99 | } | |
100 | return true; | |
101 | } | |
102 | ||
946fb27c PB |
103 | /***********************************************************/ |
104 | /* guest cycle counter */ | |
105 | ||
a3270e19 PB |
106 | /* Protected by TimersState seqlock */ |
107 | ||
5045e9d9 | 108 | static bool icount_sleep = true; |
71468395 | 109 | static int64_t vm_clock_warp_start = -1; |
946fb27c PB |
110 | /* Conversion factor from emulated instructions to virtual clock ticks. */ |
111 | static int icount_time_shift; | |
112 | /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ | |
113 | #define MAX_ICOUNT_SHIFT 10 | |
a3270e19 | 114 | |
946fb27c PB |
115 | static QEMUTimer *icount_rt_timer; |
116 | static QEMUTimer *icount_vm_timer; | |
117 | static QEMUTimer *icount_warp_timer; | |
946fb27c PB |
118 | |
119 | typedef struct TimersState { | |
cb365646 | 120 | /* Protected by BQL. */ |
946fb27c PB |
121 | int64_t cpu_ticks_prev; |
122 | int64_t cpu_ticks_offset; | |
cb365646 LPF |
123 | |
124 | /* cpu_clock_offset can be read out of BQL, so protect it with | |
125 | * this lock. | |
126 | */ | |
127 | QemuSeqLock vm_clock_seqlock; | |
946fb27c PB |
128 | int64_t cpu_clock_offset; |
129 | int32_t cpu_ticks_enabled; | |
130 | int64_t dummy; | |
c96778bb FK |
131 | |
132 | /* Compensate for varying guest execution speed. */ | |
133 | int64_t qemu_icount_bias; | |
134 | /* Only written by TCG thread */ | |
135 | int64_t qemu_icount; | |
946fb27c PB |
136 | } TimersState; |
137 | ||
d9cd4007 | 138 | static TimersState timers_state; |
946fb27c | 139 | |
2a62914b | 140 | int64_t cpu_get_icount_raw(void) |
946fb27c PB |
141 | { |
142 | int64_t icount; | |
4917cf44 | 143 | CPUState *cpu = current_cpu; |
946fb27c | 144 | |
c96778bb | 145 | icount = timers_state.qemu_icount; |
4917cf44 | 146 | if (cpu) { |
99df7dce | 147 | if (!cpu_can_do_io(cpu)) { |
2a62914b PD |
148 | fprintf(stderr, "Bad icount read\n"); |
149 | exit(1); | |
946fb27c | 150 | } |
28ecfd7a | 151 | icount -= (cpu->icount_decr.u16.low + cpu->icount_extra); |
946fb27c | 152 | } |
2a62914b PD |
153 | return icount; |
154 | } | |
155 | ||
156 | /* Return the virtual CPU time, based on the instruction counter. */ | |
157 | static int64_t cpu_get_icount_locked(void) | |
158 | { | |
159 | int64_t icount = cpu_get_icount_raw(); | |
3f031313 | 160 | return timers_state.qemu_icount_bias + cpu_icount_to_ns(icount); |
946fb27c PB |
161 | } |
162 | ||
17a15f1b PB |
163 | int64_t cpu_get_icount(void) |
164 | { | |
165 | int64_t icount; | |
166 | unsigned start; | |
167 | ||
168 | do { | |
169 | start = seqlock_read_begin(&timers_state.vm_clock_seqlock); | |
170 | icount = cpu_get_icount_locked(); | |
171 | } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, start)); | |
172 | ||
173 | return icount; | |
174 | } | |
175 | ||
3f031313 FK |
176 | int64_t cpu_icount_to_ns(int64_t icount) |
177 | { | |
178 | return icount << icount_time_shift; | |
179 | } | |
180 | ||
946fb27c | 181 | /* return the host CPU cycle counter and handle stop/restart */ |
cb365646 | 182 | /* Caller must hold the BQL */ |
946fb27c PB |
183 | int64_t cpu_get_ticks(void) |
184 | { | |
5f3e3101 PB |
185 | int64_t ticks; |
186 | ||
946fb27c PB |
187 | if (use_icount) { |
188 | return cpu_get_icount(); | |
189 | } | |
5f3e3101 PB |
190 | |
191 | ticks = timers_state.cpu_ticks_offset; | |
192 | if (timers_state.cpu_ticks_enabled) { | |
193 | ticks += cpu_get_real_ticks(); | |
194 | } | |
195 | ||
196 | if (timers_state.cpu_ticks_prev > ticks) { | |
197 | /* Note: non increasing ticks may happen if the host uses | |
198 | software suspend */ | |
199 | timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks; | |
200 | ticks = timers_state.cpu_ticks_prev; | |
946fb27c | 201 | } |
5f3e3101 PB |
202 | |
203 | timers_state.cpu_ticks_prev = ticks; | |
204 | return ticks; | |
946fb27c PB |
205 | } |
206 | ||
cb365646 | 207 | static int64_t cpu_get_clock_locked(void) |
946fb27c | 208 | { |
5f3e3101 | 209 | int64_t ticks; |
cb365646 | 210 | |
5f3e3101 PB |
211 | ticks = timers_state.cpu_clock_offset; |
212 | if (timers_state.cpu_ticks_enabled) { | |
213 | ticks += get_clock(); | |
946fb27c | 214 | } |
cb365646 | 215 | |
5f3e3101 | 216 | return ticks; |
cb365646 LPF |
217 | } |
218 | ||
219 | /* return the host CPU monotonic timer and handle stop/restart */ | |
220 | int64_t cpu_get_clock(void) | |
221 | { | |
222 | int64_t ti; | |
223 | unsigned start; | |
224 | ||
225 | do { | |
226 | start = seqlock_read_begin(&timers_state.vm_clock_seqlock); | |
227 | ti = cpu_get_clock_locked(); | |
228 | } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, start)); | |
229 | ||
230 | return ti; | |
946fb27c PB |
231 | } |
232 | ||
cb365646 LPF |
233 | /* enable cpu_get_ticks() |
234 | * Caller must hold BQL which server as mutex for vm_clock_seqlock. | |
235 | */ | |
946fb27c PB |
236 | void cpu_enable_ticks(void) |
237 | { | |
cb365646 LPF |
238 | /* Here, the really thing protected by seqlock is cpu_clock_offset. */ |
239 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
946fb27c PB |
240 | if (!timers_state.cpu_ticks_enabled) { |
241 | timers_state.cpu_ticks_offset -= cpu_get_real_ticks(); | |
242 | timers_state.cpu_clock_offset -= get_clock(); | |
243 | timers_state.cpu_ticks_enabled = 1; | |
244 | } | |
cb365646 | 245 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
246 | } |
247 | ||
248 | /* disable cpu_get_ticks() : the clock is stopped. You must not call | |
cb365646 LPF |
249 | * cpu_get_ticks() after that. |
250 | * Caller must hold BQL which server as mutex for vm_clock_seqlock. | |
251 | */ | |
946fb27c PB |
252 | void cpu_disable_ticks(void) |
253 | { | |
cb365646 LPF |
254 | /* Here, the really thing protected by seqlock is cpu_clock_offset. */ |
255 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
946fb27c | 256 | if (timers_state.cpu_ticks_enabled) { |
5f3e3101 | 257 | timers_state.cpu_ticks_offset += cpu_get_real_ticks(); |
cb365646 | 258 | timers_state.cpu_clock_offset = cpu_get_clock_locked(); |
946fb27c PB |
259 | timers_state.cpu_ticks_enabled = 0; |
260 | } | |
cb365646 | 261 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
262 | } |
263 | ||
264 | /* Correlation between real and virtual time is always going to be | |
265 | fairly approximate, so ignore small variation. | |
266 | When the guest is idle real and virtual time will be aligned in | |
267 | the IO wait loop. */ | |
268 | #define ICOUNT_WOBBLE (get_ticks_per_sec() / 10) | |
269 | ||
270 | static void icount_adjust(void) | |
271 | { | |
272 | int64_t cur_time; | |
273 | int64_t cur_icount; | |
274 | int64_t delta; | |
a3270e19 PB |
275 | |
276 | /* Protected by TimersState mutex. */ | |
946fb27c | 277 | static int64_t last_delta; |
468cc7cf | 278 | |
946fb27c PB |
279 | /* If the VM is not running, then do nothing. */ |
280 | if (!runstate_is_running()) { | |
281 | return; | |
282 | } | |
468cc7cf | 283 | |
17a15f1b PB |
284 | seqlock_write_lock(&timers_state.vm_clock_seqlock); |
285 | cur_time = cpu_get_clock_locked(); | |
286 | cur_icount = cpu_get_icount_locked(); | |
468cc7cf | 287 | |
946fb27c PB |
288 | delta = cur_icount - cur_time; |
289 | /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */ | |
290 | if (delta > 0 | |
291 | && last_delta + ICOUNT_WOBBLE < delta * 2 | |
292 | && icount_time_shift > 0) { | |
293 | /* The guest is getting too far ahead. Slow time down. */ | |
294 | icount_time_shift--; | |
295 | } | |
296 | if (delta < 0 | |
297 | && last_delta - ICOUNT_WOBBLE > delta * 2 | |
298 | && icount_time_shift < MAX_ICOUNT_SHIFT) { | |
299 | /* The guest is getting too far behind. Speed time up. */ | |
300 | icount_time_shift++; | |
301 | } | |
302 | last_delta = delta; | |
c96778bb FK |
303 | timers_state.qemu_icount_bias = cur_icount |
304 | - (timers_state.qemu_icount << icount_time_shift); | |
17a15f1b | 305 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
946fb27c PB |
306 | } |
307 | ||
308 | static void icount_adjust_rt(void *opaque) | |
309 | { | |
40daca54 | 310 | timer_mod(icount_rt_timer, |
1979b908 | 311 | qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL_RT) + 1000); |
946fb27c PB |
312 | icount_adjust(); |
313 | } | |
314 | ||
315 | static void icount_adjust_vm(void *opaque) | |
316 | { | |
40daca54 AB |
317 | timer_mod(icount_vm_timer, |
318 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
319 | get_ticks_per_sec() / 10); | |
946fb27c PB |
320 | icount_adjust(); |
321 | } | |
322 | ||
323 | static int64_t qemu_icount_round(int64_t count) | |
324 | { | |
325 | return (count + (1 << icount_time_shift) - 1) >> icount_time_shift; | |
326 | } | |
327 | ||
328 | static void icount_warp_rt(void *opaque) | |
329 | { | |
17a15f1b PB |
330 | /* The icount_warp_timer is rescheduled soon after vm_clock_warp_start |
331 | * changes from -1 to another value, so the race here is okay. | |
332 | */ | |
333 | if (atomic_read(&vm_clock_warp_start) == -1) { | |
946fb27c PB |
334 | return; |
335 | } | |
336 | ||
17a15f1b | 337 | seqlock_write_lock(&timers_state.vm_clock_seqlock); |
946fb27c | 338 | if (runstate_is_running()) { |
bf2a7ddb | 339 | int64_t clock = cpu_get_clock_locked(); |
8ed961d9 PB |
340 | int64_t warp_delta; |
341 | ||
342 | warp_delta = clock - vm_clock_warp_start; | |
343 | if (use_icount == 2) { | |
946fb27c | 344 | /* |
40daca54 | 345 | * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too |
946fb27c PB |
346 | * far ahead of real time. |
347 | */ | |
17a15f1b | 348 | int64_t cur_icount = cpu_get_icount_locked(); |
bf2a7ddb | 349 | int64_t delta = clock - cur_icount; |
8ed961d9 | 350 | warp_delta = MIN(warp_delta, delta); |
946fb27c | 351 | } |
c96778bb | 352 | timers_state.qemu_icount_bias += warp_delta; |
946fb27c PB |
353 | } |
354 | vm_clock_warp_start = -1; | |
17a15f1b | 355 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
8ed961d9 PB |
356 | |
357 | if (qemu_clock_expired(QEMU_CLOCK_VIRTUAL)) { | |
358 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); | |
359 | } | |
946fb27c PB |
360 | } |
361 | ||
8156be56 PB |
362 | void qtest_clock_warp(int64_t dest) |
363 | { | |
40daca54 | 364 | int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
efef88b3 | 365 | AioContext *aio_context; |
8156be56 | 366 | assert(qtest_enabled()); |
efef88b3 | 367 | aio_context = qemu_get_aio_context(); |
8156be56 | 368 | while (clock < dest) { |
40daca54 | 369 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
c9299e2f | 370 | int64_t warp = qemu_soonest_timeout(dest - clock, deadline); |
efef88b3 | 371 | |
17a15f1b | 372 | seqlock_write_lock(&timers_state.vm_clock_seqlock); |
c96778bb | 373 | timers_state.qemu_icount_bias += warp; |
17a15f1b PB |
374 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); |
375 | ||
40daca54 | 376 | qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL); |
efef88b3 | 377 | timerlist_run_timers(aio_context->tlg.tl[QEMU_CLOCK_VIRTUAL]); |
40daca54 | 378 | clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
8156be56 | 379 | } |
40daca54 | 380 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
381 | } |
382 | ||
40daca54 | 383 | void qemu_clock_warp(QEMUClockType type) |
946fb27c | 384 | { |
ce78d18c | 385 | int64_t clock; |
946fb27c PB |
386 | int64_t deadline; |
387 | ||
388 | /* | |
389 | * There are too many global variables to make the "warp" behavior | |
390 | * applicable to other clocks. But a clock argument removes the | |
391 | * need for if statements all over the place. | |
392 | */ | |
40daca54 | 393 | if (type != QEMU_CLOCK_VIRTUAL || !use_icount) { |
946fb27c PB |
394 | return; |
395 | } | |
396 | ||
5045e9d9 VC |
397 | if (icount_sleep) { |
398 | /* | |
399 | * If the CPUs have been sleeping, advance QEMU_CLOCK_VIRTUAL timer now. | |
400 | * This ensures that the deadline for the timer is computed correctly | |
401 | * below. | |
402 | * This also makes sure that the insn counter is synchronized before | |
403 | * the CPU starts running, in case the CPU is woken by an event other | |
404 | * than the earliest QEMU_CLOCK_VIRTUAL timer. | |
405 | */ | |
406 | icount_warp_rt(NULL); | |
407 | timer_del(icount_warp_timer); | |
408 | } | |
ce78d18c | 409 | if (!all_cpu_threads_idle()) { |
946fb27c PB |
410 | return; |
411 | } | |
412 | ||
8156be56 PB |
413 | if (qtest_enabled()) { |
414 | /* When testing, qtest commands advance icount. */ | |
415 | return; | |
416 | } | |
417 | ||
ac70aafc | 418 | /* We want to use the earliest deadline from ALL vm_clocks */ |
bf2a7ddb | 419 | clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); |
40daca54 | 420 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ce78d18c | 421 | if (deadline < 0) { |
d7a0f71d VC |
422 | static bool notified; |
423 | if (!icount_sleep && !notified) { | |
424 | error_report("WARNING: icount sleep disabled and no active timers"); | |
425 | notified = true; | |
426 | } | |
ce78d18c | 427 | return; |
ac70aafc AB |
428 | } |
429 | ||
946fb27c PB |
430 | if (deadline > 0) { |
431 | /* | |
40daca54 | 432 | * Ensure QEMU_CLOCK_VIRTUAL proceeds even when the virtual CPU goes to |
946fb27c PB |
433 | * sleep. Otherwise, the CPU might be waiting for a future timer |
434 | * interrupt to wake it up, but the interrupt never comes because | |
435 | * the vCPU isn't running any insns and thus doesn't advance the | |
40daca54 | 436 | * QEMU_CLOCK_VIRTUAL. |
946fb27c | 437 | */ |
5045e9d9 VC |
438 | if (!icount_sleep) { |
439 | /* | |
440 | * We never let VCPUs sleep in no sleep icount mode. | |
441 | * If there is a pending QEMU_CLOCK_VIRTUAL timer we just advance | |
442 | * to the next QEMU_CLOCK_VIRTUAL event and notify it. | |
443 | * It is useful when we want a deterministic execution time, | |
444 | * isolated from host latencies. | |
445 | */ | |
446 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
447 | timers_state.qemu_icount_bias += deadline; | |
448 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); | |
449 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); | |
450 | } else { | |
451 | /* | |
452 | * We do stop VCPUs and only advance QEMU_CLOCK_VIRTUAL after some | |
453 | * "real" time, (related to the time left until the next event) has | |
454 | * passed. The QEMU_CLOCK_VIRTUAL_RT clock will do this. | |
455 | * This avoids that the warps are visible externally; for example, | |
456 | * you will not be sending network packets continuously instead of | |
457 | * every 100ms. | |
458 | */ | |
459 | seqlock_write_lock(&timers_state.vm_clock_seqlock); | |
460 | if (vm_clock_warp_start == -1 || vm_clock_warp_start > clock) { | |
461 | vm_clock_warp_start = clock; | |
462 | } | |
463 | seqlock_write_unlock(&timers_state.vm_clock_seqlock); | |
464 | timer_mod_anticipate(icount_warp_timer, clock + deadline); | |
ce78d18c | 465 | } |
ac70aafc | 466 | } else if (deadline == 0) { |
40daca54 | 467 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
946fb27c PB |
468 | } |
469 | } | |
470 | ||
d09eae37 FK |
471 | static bool icount_state_needed(void *opaque) |
472 | { | |
473 | return use_icount; | |
474 | } | |
475 | ||
476 | /* | |
477 | * This is a subsection for icount migration. | |
478 | */ | |
479 | static const VMStateDescription icount_vmstate_timers = { | |
480 | .name = "timer/icount", | |
481 | .version_id = 1, | |
482 | .minimum_version_id = 1, | |
5cd8cada | 483 | .needed = icount_state_needed, |
d09eae37 FK |
484 | .fields = (VMStateField[]) { |
485 | VMSTATE_INT64(qemu_icount_bias, TimersState), | |
486 | VMSTATE_INT64(qemu_icount, TimersState), | |
487 | VMSTATE_END_OF_LIST() | |
488 | } | |
489 | }; | |
490 | ||
946fb27c PB |
491 | static const VMStateDescription vmstate_timers = { |
492 | .name = "timer", | |
493 | .version_id = 2, | |
494 | .minimum_version_id = 1, | |
35d08458 | 495 | .fields = (VMStateField[]) { |
946fb27c PB |
496 | VMSTATE_INT64(cpu_ticks_offset, TimersState), |
497 | VMSTATE_INT64(dummy, TimersState), | |
498 | VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2), | |
499 | VMSTATE_END_OF_LIST() | |
d09eae37 | 500 | }, |
5cd8cada JQ |
501 | .subsections = (const VMStateDescription*[]) { |
502 | &icount_vmstate_timers, | |
503 | NULL | |
946fb27c PB |
504 | } |
505 | }; | |
506 | ||
4603ea01 PD |
507 | void cpu_ticks_init(void) |
508 | { | |
509 | seqlock_init(&timers_state.vm_clock_seqlock, NULL); | |
510 | vmstate_register(NULL, 0, &vmstate_timers, &timers_state); | |
511 | } | |
512 | ||
1ad9580b | 513 | void configure_icount(QemuOpts *opts, Error **errp) |
946fb27c | 514 | { |
1ad9580b | 515 | const char *option; |
a8bfac37 | 516 | char *rem_str = NULL; |
1ad9580b | 517 | |
1ad9580b | 518 | option = qemu_opt_get(opts, "shift"); |
946fb27c | 519 | if (!option) { |
a8bfac37 ST |
520 | if (qemu_opt_get(opts, "align") != NULL) { |
521 | error_setg(errp, "Please specify shift option when using align"); | |
522 | } | |
946fb27c PB |
523 | return; |
524 | } | |
f1f4b57e VC |
525 | |
526 | icount_sleep = qemu_opt_get_bool(opts, "sleep", true); | |
5045e9d9 VC |
527 | if (icount_sleep) { |
528 | icount_warp_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL_RT, | |
529 | icount_warp_rt, NULL); | |
530 | } | |
f1f4b57e | 531 | |
a8bfac37 | 532 | icount_align_option = qemu_opt_get_bool(opts, "align", false); |
f1f4b57e VC |
533 | |
534 | if (icount_align_option && !icount_sleep) { | |
535 | error_setg(errp, "align=on and sleep=no are incompatible"); | |
536 | } | |
946fb27c | 537 | if (strcmp(option, "auto") != 0) { |
a8bfac37 ST |
538 | errno = 0; |
539 | icount_time_shift = strtol(option, &rem_str, 0); | |
540 | if (errno != 0 || *rem_str != '\0' || !strlen(option)) { | |
541 | error_setg(errp, "icount: Invalid shift value"); | |
542 | } | |
946fb27c PB |
543 | use_icount = 1; |
544 | return; | |
a8bfac37 ST |
545 | } else if (icount_align_option) { |
546 | error_setg(errp, "shift=auto and align=on are incompatible"); | |
f1f4b57e VC |
547 | } else if (!icount_sleep) { |
548 | error_setg(errp, "shift=auto and sleep=no are incompatible"); | |
946fb27c PB |
549 | } |
550 | ||
551 | use_icount = 2; | |
552 | ||
553 | /* 125MIPS seems a reasonable initial guess at the guest speed. | |
554 | It will be corrected fairly quickly anyway. */ | |
555 | icount_time_shift = 3; | |
556 | ||
557 | /* Have both realtime and virtual time triggers for speed adjustment. | |
558 | The realtime trigger catches emulated time passing too slowly, | |
559 | the virtual time trigger catches emulated time passing too fast. | |
560 | Realtime triggers occur even when idle, so use them less frequently | |
561 | than VM triggers. */ | |
bf2a7ddb PD |
562 | icount_rt_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL_RT, |
563 | icount_adjust_rt, NULL); | |
40daca54 | 564 | timer_mod(icount_rt_timer, |
bf2a7ddb | 565 | qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL_RT) + 1000); |
40daca54 AB |
566 | icount_vm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, |
567 | icount_adjust_vm, NULL); | |
568 | timer_mod(icount_vm_timer, | |
569 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
570 | get_ticks_per_sec() / 10); | |
946fb27c PB |
571 | } |
572 | ||
296af7c9 BS |
573 | /***********************************************************/ |
574 | void hw_error(const char *fmt, ...) | |
575 | { | |
576 | va_list ap; | |
55e5c285 | 577 | CPUState *cpu; |
296af7c9 BS |
578 | |
579 | va_start(ap, fmt); | |
580 | fprintf(stderr, "qemu: hardware error: "); | |
581 | vfprintf(stderr, fmt, ap); | |
582 | fprintf(stderr, "\n"); | |
bdc44640 | 583 | CPU_FOREACH(cpu) { |
55e5c285 | 584 | fprintf(stderr, "CPU #%d:\n", cpu->cpu_index); |
878096ee | 585 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU); |
296af7c9 BS |
586 | } |
587 | va_end(ap); | |
588 | abort(); | |
589 | } | |
590 | ||
591 | void cpu_synchronize_all_states(void) | |
592 | { | |
182735ef | 593 | CPUState *cpu; |
296af7c9 | 594 | |
bdc44640 | 595 | CPU_FOREACH(cpu) { |
182735ef | 596 | cpu_synchronize_state(cpu); |
296af7c9 BS |
597 | } |
598 | } | |
599 | ||
600 | void cpu_synchronize_all_post_reset(void) | |
601 | { | |
182735ef | 602 | CPUState *cpu; |
296af7c9 | 603 | |
bdc44640 | 604 | CPU_FOREACH(cpu) { |
182735ef | 605 | cpu_synchronize_post_reset(cpu); |
296af7c9 BS |
606 | } |
607 | } | |
608 | ||
609 | void cpu_synchronize_all_post_init(void) | |
610 | { | |
182735ef | 611 | CPUState *cpu; |
296af7c9 | 612 | |
bdc44640 | 613 | CPU_FOREACH(cpu) { |
182735ef | 614 | cpu_synchronize_post_init(cpu); |
296af7c9 BS |
615 | } |
616 | } | |
617 | ||
de9d61e8 MT |
618 | void cpu_clean_all_dirty(void) |
619 | { | |
620 | CPUState *cpu; | |
621 | ||
622 | CPU_FOREACH(cpu) { | |
623 | cpu_clean_state(cpu); | |
624 | } | |
625 | } | |
626 | ||
56983463 | 627 | static int do_vm_stop(RunState state) |
296af7c9 | 628 | { |
56983463 KW |
629 | int ret = 0; |
630 | ||
1354869c | 631 | if (runstate_is_running()) { |
296af7c9 | 632 | cpu_disable_ticks(); |
296af7c9 | 633 | pause_all_vcpus(); |
f5bbfba1 | 634 | runstate_set(state); |
1dfb4dd9 | 635 | vm_state_notify(0, state); |
a4e15de9 | 636 | qapi_event_send_stop(&error_abort); |
296af7c9 | 637 | } |
56983463 | 638 | |
594a45ce KW |
639 | bdrv_drain_all(); |
640 | ret = bdrv_flush_all(); | |
641 | ||
56983463 | 642 | return ret; |
296af7c9 BS |
643 | } |
644 | ||
a1fcaa73 | 645 | static bool cpu_can_run(CPUState *cpu) |
296af7c9 | 646 | { |
4fdeee7c | 647 | if (cpu->stop) { |
a1fcaa73 | 648 | return false; |
0ab07c62 | 649 | } |
321bc0b2 | 650 | if (cpu_is_stopped(cpu)) { |
a1fcaa73 | 651 | return false; |
0ab07c62 | 652 | } |
a1fcaa73 | 653 | return true; |
296af7c9 BS |
654 | } |
655 | ||
91325046 | 656 | static void cpu_handle_guest_debug(CPUState *cpu) |
83f338f7 | 657 | { |
64f6b346 | 658 | gdb_set_stop_cpu(cpu); |
8cf71710 | 659 | qemu_system_debug_request(); |
f324e766 | 660 | cpu->stopped = true; |
3c638d06 JK |
661 | } |
662 | ||
714bd040 PB |
663 | static void cpu_signal(int sig) |
664 | { | |
4917cf44 AF |
665 | if (current_cpu) { |
666 | cpu_exit(current_cpu); | |
714bd040 PB |
667 | } |
668 | exit_request = 1; | |
669 | } | |
714bd040 | 670 | |
6d9cb73c JK |
671 | #ifdef CONFIG_LINUX |
672 | static void sigbus_reraise(void) | |
673 | { | |
674 | sigset_t set; | |
675 | struct sigaction action; | |
676 | ||
677 | memset(&action, 0, sizeof(action)); | |
678 | action.sa_handler = SIG_DFL; | |
679 | if (!sigaction(SIGBUS, &action, NULL)) { | |
680 | raise(SIGBUS); | |
681 | sigemptyset(&set); | |
682 | sigaddset(&set, SIGBUS); | |
683 | sigprocmask(SIG_UNBLOCK, &set, NULL); | |
684 | } | |
685 | perror("Failed to re-raise SIGBUS!\n"); | |
686 | abort(); | |
687 | } | |
688 | ||
689 | static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo, | |
690 | void *ctx) | |
691 | { | |
692 | if (kvm_on_sigbus(siginfo->ssi_code, | |
693 | (void *)(intptr_t)siginfo->ssi_addr)) { | |
694 | sigbus_reraise(); | |
695 | } | |
696 | } | |
697 | ||
698 | static void qemu_init_sigbus(void) | |
699 | { | |
700 | struct sigaction action; | |
701 | ||
702 | memset(&action, 0, sizeof(action)); | |
703 | action.sa_flags = SA_SIGINFO; | |
704 | action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler; | |
705 | sigaction(SIGBUS, &action, NULL); | |
706 | ||
707 | prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0); | |
708 | } | |
709 | ||
290adf38 | 710 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
711 | { |
712 | struct timespec ts = { 0, 0 }; | |
713 | siginfo_t siginfo; | |
714 | sigset_t waitset; | |
715 | sigset_t chkset; | |
716 | int r; | |
717 | ||
718 | sigemptyset(&waitset); | |
719 | sigaddset(&waitset, SIG_IPI); | |
720 | sigaddset(&waitset, SIGBUS); | |
721 | ||
722 | do { | |
723 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
724 | if (r == -1 && !(errno == EAGAIN || errno == EINTR)) { | |
725 | perror("sigtimedwait"); | |
726 | exit(1); | |
727 | } | |
728 | ||
729 | switch (r) { | |
730 | case SIGBUS: | |
290adf38 | 731 | if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) { |
1ab3c6c0 JK |
732 | sigbus_reraise(); |
733 | } | |
734 | break; | |
735 | default: | |
736 | break; | |
737 | } | |
738 | ||
739 | r = sigpending(&chkset); | |
740 | if (r == -1) { | |
741 | perror("sigpending"); | |
742 | exit(1); | |
743 | } | |
744 | } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS)); | |
1ab3c6c0 JK |
745 | } |
746 | ||
6d9cb73c JK |
747 | #else /* !CONFIG_LINUX */ |
748 | ||
749 | static void qemu_init_sigbus(void) | |
750 | { | |
751 | } | |
1ab3c6c0 | 752 | |
290adf38 | 753 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
754 | { |
755 | } | |
6d9cb73c JK |
756 | #endif /* !CONFIG_LINUX */ |
757 | ||
296af7c9 | 758 | #ifndef _WIN32 |
55f8d6ac JK |
759 | static void dummy_signal(int sig) |
760 | { | |
761 | } | |
55f8d6ac | 762 | |
13618e05 | 763 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
714bd040 PB |
764 | { |
765 | int r; | |
766 | sigset_t set; | |
767 | struct sigaction sigact; | |
768 | ||
769 | memset(&sigact, 0, sizeof(sigact)); | |
770 | sigact.sa_handler = dummy_signal; | |
771 | sigaction(SIG_IPI, &sigact, NULL); | |
772 | ||
714bd040 PB |
773 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
774 | sigdelset(&set, SIG_IPI); | |
714bd040 | 775 | sigdelset(&set, SIGBUS); |
491d6e80 | 776 | r = kvm_set_signal_mask(cpu, &set); |
714bd040 PB |
777 | if (r) { |
778 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
779 | exit(1); | |
780 | } | |
781 | } | |
782 | ||
783 | static void qemu_tcg_init_cpu_signals(void) | |
784 | { | |
714bd040 PB |
785 | sigset_t set; |
786 | struct sigaction sigact; | |
787 | ||
788 | memset(&sigact, 0, sizeof(sigact)); | |
789 | sigact.sa_handler = cpu_signal; | |
790 | sigaction(SIG_IPI, &sigact, NULL); | |
791 | ||
792 | sigemptyset(&set); | |
793 | sigaddset(&set, SIG_IPI); | |
794 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
714bd040 PB |
795 | } |
796 | ||
55f8d6ac | 797 | #else /* _WIN32 */ |
13618e05 | 798 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
ff48eb5f | 799 | { |
714bd040 PB |
800 | abort(); |
801 | } | |
ff48eb5f | 802 | |
714bd040 PB |
803 | static void qemu_tcg_init_cpu_signals(void) |
804 | { | |
ff48eb5f | 805 | } |
714bd040 | 806 | #endif /* _WIN32 */ |
ff48eb5f | 807 | |
b2532d88 | 808 | static QemuMutex qemu_global_mutex; |
46daff13 | 809 | static QemuCond qemu_io_proceeded_cond; |
6b49809c | 810 | static unsigned iothread_requesting_mutex; |
296af7c9 BS |
811 | |
812 | static QemuThread io_thread; | |
813 | ||
814 | static QemuThread *tcg_cpu_thread; | |
815 | static QemuCond *tcg_halt_cond; | |
816 | ||
296af7c9 BS |
817 | /* cpu creation */ |
818 | static QemuCond qemu_cpu_cond; | |
819 | /* system init */ | |
296af7c9 | 820 | static QemuCond qemu_pause_cond; |
e82bcec2 | 821 | static QemuCond qemu_work_cond; |
296af7c9 | 822 | |
d3b12f5d | 823 | void qemu_init_cpu_loop(void) |
296af7c9 | 824 | { |
6d9cb73c | 825 | qemu_init_sigbus(); |
ed94592b | 826 | qemu_cond_init(&qemu_cpu_cond); |
ed94592b AL |
827 | qemu_cond_init(&qemu_pause_cond); |
828 | qemu_cond_init(&qemu_work_cond); | |
46daff13 | 829 | qemu_cond_init(&qemu_io_proceeded_cond); |
296af7c9 | 830 | qemu_mutex_init(&qemu_global_mutex); |
296af7c9 | 831 | |
b7680cb6 | 832 | qemu_thread_get_self(&io_thread); |
296af7c9 BS |
833 | } |
834 | ||
f100f0b3 | 835 | void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
e82bcec2 MT |
836 | { |
837 | struct qemu_work_item wi; | |
838 | ||
60e82579 | 839 | if (qemu_cpu_is_self(cpu)) { |
e82bcec2 MT |
840 | func(data); |
841 | return; | |
842 | } | |
843 | ||
844 | wi.func = func; | |
845 | wi.data = data; | |
3c02270d | 846 | wi.free = false; |
c64ca814 AF |
847 | if (cpu->queued_work_first == NULL) { |
848 | cpu->queued_work_first = &wi; | |
0ab07c62 | 849 | } else { |
c64ca814 | 850 | cpu->queued_work_last->next = &wi; |
0ab07c62 | 851 | } |
c64ca814 | 852 | cpu->queued_work_last = &wi; |
e82bcec2 MT |
853 | wi.next = NULL; |
854 | wi.done = false; | |
855 | ||
c08d7424 | 856 | qemu_cpu_kick(cpu); |
e82bcec2 | 857 | while (!wi.done) { |
4917cf44 | 858 | CPUState *self_cpu = current_cpu; |
e82bcec2 MT |
859 | |
860 | qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex); | |
4917cf44 | 861 | current_cpu = self_cpu; |
e82bcec2 MT |
862 | } |
863 | } | |
864 | ||
3c02270d CV |
865 | void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
866 | { | |
867 | struct qemu_work_item *wi; | |
868 | ||
869 | if (qemu_cpu_is_self(cpu)) { | |
870 | func(data); | |
871 | return; | |
872 | } | |
873 | ||
874 | wi = g_malloc0(sizeof(struct qemu_work_item)); | |
875 | wi->func = func; | |
876 | wi->data = data; | |
877 | wi->free = true; | |
878 | if (cpu->queued_work_first == NULL) { | |
879 | cpu->queued_work_first = wi; | |
880 | } else { | |
881 | cpu->queued_work_last->next = wi; | |
882 | } | |
883 | cpu->queued_work_last = wi; | |
884 | wi->next = NULL; | |
885 | wi->done = false; | |
886 | ||
887 | qemu_cpu_kick(cpu); | |
888 | } | |
889 | ||
6d45b109 | 890 | static void flush_queued_work(CPUState *cpu) |
e82bcec2 MT |
891 | { |
892 | struct qemu_work_item *wi; | |
893 | ||
c64ca814 | 894 | if (cpu->queued_work_first == NULL) { |
e82bcec2 | 895 | return; |
0ab07c62 | 896 | } |
e82bcec2 | 897 | |
c64ca814 AF |
898 | while ((wi = cpu->queued_work_first)) { |
899 | cpu->queued_work_first = wi->next; | |
e82bcec2 MT |
900 | wi->func(wi->data); |
901 | wi->done = true; | |
3c02270d CV |
902 | if (wi->free) { |
903 | g_free(wi); | |
904 | } | |
e82bcec2 | 905 | } |
c64ca814 | 906 | cpu->queued_work_last = NULL; |
e82bcec2 MT |
907 | qemu_cond_broadcast(&qemu_work_cond); |
908 | } | |
909 | ||
509a0d78 | 910 | static void qemu_wait_io_event_common(CPUState *cpu) |
296af7c9 | 911 | { |
4fdeee7c AF |
912 | if (cpu->stop) { |
913 | cpu->stop = false; | |
f324e766 | 914 | cpu->stopped = true; |
296af7c9 BS |
915 | qemu_cond_signal(&qemu_pause_cond); |
916 | } | |
6d45b109 | 917 | flush_queued_work(cpu); |
216fc9a4 | 918 | cpu->thread_kicked = false; |
296af7c9 BS |
919 | } |
920 | ||
6cabe1f3 | 921 | static void qemu_tcg_wait_io_event(void) |
296af7c9 | 922 | { |
182735ef | 923 | CPUState *cpu; |
6cabe1f3 | 924 | |
16400322 | 925 | while (all_cpu_threads_idle()) { |
ab33fcda PB |
926 | /* Start accounting real time to the virtual clock if the CPUs |
927 | are idle. */ | |
40daca54 | 928 | qemu_clock_warp(QEMU_CLOCK_VIRTUAL); |
9705fbb5 | 929 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
16400322 | 930 | } |
296af7c9 | 931 | |
46daff13 PB |
932 | while (iothread_requesting_mutex) { |
933 | qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex); | |
934 | } | |
6cabe1f3 | 935 | |
bdc44640 | 936 | CPU_FOREACH(cpu) { |
182735ef | 937 | qemu_wait_io_event_common(cpu); |
6cabe1f3 | 938 | } |
296af7c9 BS |
939 | } |
940 | ||
fd529e8f | 941 | static void qemu_kvm_wait_io_event(CPUState *cpu) |
296af7c9 | 942 | { |
a98ae1d8 | 943 | while (cpu_thread_is_idle(cpu)) { |
f5c121b8 | 944 | qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); |
16400322 | 945 | } |
296af7c9 | 946 | |
290adf38 | 947 | qemu_kvm_eat_signals(cpu); |
509a0d78 | 948 | qemu_wait_io_event_common(cpu); |
296af7c9 BS |
949 | } |
950 | ||
7e97cd88 | 951 | static void *qemu_kvm_cpu_thread_fn(void *arg) |
296af7c9 | 952 | { |
48a106bd | 953 | CPUState *cpu = arg; |
84b4915d | 954 | int r; |
296af7c9 | 955 | |
6164e6d6 | 956 | qemu_mutex_lock(&qemu_global_mutex); |
814e612e | 957 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 958 | cpu->thread_id = qemu_get_thread_id(); |
626cf8f4 | 959 | cpu->can_do_io = 1; |
4917cf44 | 960 | current_cpu = cpu; |
296af7c9 | 961 | |
504134d2 | 962 | r = kvm_init_vcpu(cpu); |
84b4915d JK |
963 | if (r < 0) { |
964 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
965 | exit(1); | |
966 | } | |
296af7c9 | 967 | |
13618e05 | 968 | qemu_kvm_init_cpu_signals(cpu); |
296af7c9 BS |
969 | |
970 | /* signal CPU creation */ | |
61a46217 | 971 | cpu->created = true; |
296af7c9 BS |
972 | qemu_cond_signal(&qemu_cpu_cond); |
973 | ||
296af7c9 | 974 | while (1) { |
a1fcaa73 | 975 | if (cpu_can_run(cpu)) { |
1458c363 | 976 | r = kvm_cpu_exec(cpu); |
83f338f7 | 977 | if (r == EXCP_DEBUG) { |
91325046 | 978 | cpu_handle_guest_debug(cpu); |
83f338f7 | 979 | } |
0ab07c62 | 980 | } |
fd529e8f | 981 | qemu_kvm_wait_io_event(cpu); |
296af7c9 BS |
982 | } |
983 | ||
984 | return NULL; | |
985 | } | |
986 | ||
c7f0f3b1 AL |
987 | static void *qemu_dummy_cpu_thread_fn(void *arg) |
988 | { | |
989 | #ifdef _WIN32 | |
990 | fprintf(stderr, "qtest is not supported under Windows\n"); | |
991 | exit(1); | |
992 | #else | |
10a9021d | 993 | CPUState *cpu = arg; |
c7f0f3b1 AL |
994 | sigset_t waitset; |
995 | int r; | |
996 | ||
997 | qemu_mutex_lock_iothread(); | |
814e612e | 998 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 999 | cpu->thread_id = qemu_get_thread_id(); |
626cf8f4 | 1000 | cpu->can_do_io = 1; |
c7f0f3b1 AL |
1001 | |
1002 | sigemptyset(&waitset); | |
1003 | sigaddset(&waitset, SIG_IPI); | |
1004 | ||
1005 | /* signal CPU creation */ | |
61a46217 | 1006 | cpu->created = true; |
c7f0f3b1 AL |
1007 | qemu_cond_signal(&qemu_cpu_cond); |
1008 | ||
4917cf44 | 1009 | current_cpu = cpu; |
c7f0f3b1 | 1010 | while (1) { |
4917cf44 | 1011 | current_cpu = NULL; |
c7f0f3b1 AL |
1012 | qemu_mutex_unlock_iothread(); |
1013 | do { | |
1014 | int sig; | |
1015 | r = sigwait(&waitset, &sig); | |
1016 | } while (r == -1 && (errno == EAGAIN || errno == EINTR)); | |
1017 | if (r == -1) { | |
1018 | perror("sigwait"); | |
1019 | exit(1); | |
1020 | } | |
1021 | qemu_mutex_lock_iothread(); | |
4917cf44 | 1022 | current_cpu = cpu; |
509a0d78 | 1023 | qemu_wait_io_event_common(cpu); |
c7f0f3b1 AL |
1024 | } |
1025 | ||
1026 | return NULL; | |
1027 | #endif | |
1028 | } | |
1029 | ||
bdb7ca67 JK |
1030 | static void tcg_exec_all(void); |
1031 | ||
7e97cd88 | 1032 | static void *qemu_tcg_cpu_thread_fn(void *arg) |
296af7c9 | 1033 | { |
c3586ba7 | 1034 | CPUState *cpu = arg; |
296af7c9 | 1035 | |
55f8d6ac | 1036 | qemu_tcg_init_cpu_signals(); |
814e612e | 1037 | qemu_thread_get_self(cpu->thread); |
296af7c9 | 1038 | |
296af7c9 | 1039 | qemu_mutex_lock(&qemu_global_mutex); |
38fcbd3f AF |
1040 | CPU_FOREACH(cpu) { |
1041 | cpu->thread_id = qemu_get_thread_id(); | |
1042 | cpu->created = true; | |
626cf8f4 | 1043 | cpu->can_do_io = 1; |
38fcbd3f | 1044 | } |
296af7c9 BS |
1045 | qemu_cond_signal(&qemu_cpu_cond); |
1046 | ||
fa7d1867 | 1047 | /* wait for initial kick-off after machine start */ |
c28e399c | 1048 | while (first_cpu->stopped) { |
fa7d1867 | 1049 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
8e564b4e JK |
1050 | |
1051 | /* process any pending work */ | |
bdc44640 | 1052 | CPU_FOREACH(cpu) { |
182735ef | 1053 | qemu_wait_io_event_common(cpu); |
8e564b4e | 1054 | } |
0ab07c62 | 1055 | } |
296af7c9 | 1056 | |
21618b3e PB |
1057 | /* process any pending work */ |
1058 | exit_request = 1; | |
1059 | ||
296af7c9 | 1060 | while (1) { |
bdb7ca67 | 1061 | tcg_exec_all(); |
ac70aafc AB |
1062 | |
1063 | if (use_icount) { | |
40daca54 | 1064 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
1065 | |
1066 | if (deadline == 0) { | |
40daca54 | 1067 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
ac70aafc | 1068 | } |
3b2319a3 | 1069 | } |
6cabe1f3 | 1070 | qemu_tcg_wait_io_event(); |
296af7c9 BS |
1071 | } |
1072 | ||
1073 | return NULL; | |
1074 | } | |
1075 | ||
2ff09a40 | 1076 | static void qemu_cpu_kick_thread(CPUState *cpu) |
cc015e9a PB |
1077 | { |
1078 | #ifndef _WIN32 | |
1079 | int err; | |
1080 | ||
814e612e | 1081 | err = pthread_kill(cpu->thread->thread, SIG_IPI); |
cc015e9a PB |
1082 | if (err) { |
1083 | fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); | |
1084 | exit(1); | |
1085 | } | |
1086 | #else /* _WIN32 */ | |
60e82579 | 1087 | if (!qemu_cpu_is_self(cpu)) { |
ed9164a3 OH |
1088 | CONTEXT tcgContext; |
1089 | ||
1090 | if (SuspendThread(cpu->hThread) == (DWORD)-1) { | |
7f1721df | 1091 | fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__, |
ed9164a3 OH |
1092 | GetLastError()); |
1093 | exit(1); | |
1094 | } | |
1095 | ||
1096 | /* On multi-core systems, we are not sure that the thread is actually | |
1097 | * suspended until we can get the context. | |
1098 | */ | |
1099 | tcgContext.ContextFlags = CONTEXT_CONTROL; | |
1100 | while (GetThreadContext(cpu->hThread, &tcgContext) != 0) { | |
1101 | continue; | |
1102 | } | |
1103 | ||
cc015e9a | 1104 | cpu_signal(0); |
ed9164a3 OH |
1105 | |
1106 | if (ResumeThread(cpu->hThread) == (DWORD)-1) { | |
7f1721df | 1107 | fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__, |
ed9164a3 OH |
1108 | GetLastError()); |
1109 | exit(1); | |
1110 | } | |
cc015e9a PB |
1111 | } |
1112 | #endif | |
1113 | } | |
1114 | ||
c08d7424 | 1115 | void qemu_cpu_kick(CPUState *cpu) |
296af7c9 | 1116 | { |
f5c121b8 | 1117 | qemu_cond_broadcast(cpu->halt_cond); |
216fc9a4 | 1118 | if (!tcg_enabled() && !cpu->thread_kicked) { |
2ff09a40 | 1119 | qemu_cpu_kick_thread(cpu); |
216fc9a4 | 1120 | cpu->thread_kicked = true; |
aa2c364b | 1121 | } |
296af7c9 BS |
1122 | } |
1123 | ||
46d62fac | 1124 | void qemu_cpu_kick_self(void) |
296af7c9 | 1125 | { |
b55c22c6 | 1126 | #ifndef _WIN32 |
4917cf44 | 1127 | assert(current_cpu); |
296af7c9 | 1128 | |
4917cf44 AF |
1129 | if (!current_cpu->thread_kicked) { |
1130 | qemu_cpu_kick_thread(current_cpu); | |
1131 | current_cpu->thread_kicked = true; | |
296af7c9 | 1132 | } |
b55c22c6 PB |
1133 | #else |
1134 | abort(); | |
1135 | #endif | |
296af7c9 BS |
1136 | } |
1137 | ||
60e82579 | 1138 | bool qemu_cpu_is_self(CPUState *cpu) |
296af7c9 | 1139 | { |
814e612e | 1140 | return qemu_thread_is_self(cpu->thread); |
296af7c9 BS |
1141 | } |
1142 | ||
79e2b9ae | 1143 | bool qemu_in_vcpu_thread(void) |
aa723c23 | 1144 | { |
4917cf44 | 1145 | return current_cpu && qemu_cpu_is_self(current_cpu); |
aa723c23 JQ |
1146 | } |
1147 | ||
296af7c9 BS |
1148 | void qemu_mutex_lock_iothread(void) |
1149 | { | |
21618b3e | 1150 | atomic_inc(&iothread_requesting_mutex); |
bdd459a0 | 1151 | if (!tcg_enabled() || !first_cpu || !first_cpu->thread) { |
296af7c9 | 1152 | qemu_mutex_lock(&qemu_global_mutex); |
21618b3e | 1153 | atomic_dec(&iothread_requesting_mutex); |
1a28cac3 | 1154 | } else { |
1a28cac3 | 1155 | if (qemu_mutex_trylock(&qemu_global_mutex)) { |
182735ef | 1156 | qemu_cpu_kick_thread(first_cpu); |
1a28cac3 MT |
1157 | qemu_mutex_lock(&qemu_global_mutex); |
1158 | } | |
6b49809c | 1159 | atomic_dec(&iothread_requesting_mutex); |
46daff13 | 1160 | qemu_cond_broadcast(&qemu_io_proceeded_cond); |
1a28cac3 | 1161 | } |
296af7c9 BS |
1162 | } |
1163 | ||
1164 | void qemu_mutex_unlock_iothread(void) | |
1165 | { | |
1166 | qemu_mutex_unlock(&qemu_global_mutex); | |
1167 | } | |
1168 | ||
1169 | static int all_vcpus_paused(void) | |
1170 | { | |
bdc44640 | 1171 | CPUState *cpu; |
296af7c9 | 1172 | |
bdc44640 | 1173 | CPU_FOREACH(cpu) { |
182735ef | 1174 | if (!cpu->stopped) { |
296af7c9 | 1175 | return 0; |
0ab07c62 | 1176 | } |
296af7c9 BS |
1177 | } |
1178 | ||
1179 | return 1; | |
1180 | } | |
1181 | ||
1182 | void pause_all_vcpus(void) | |
1183 | { | |
bdc44640 | 1184 | CPUState *cpu; |
296af7c9 | 1185 | |
40daca54 | 1186 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, false); |
bdc44640 | 1187 | CPU_FOREACH(cpu) { |
182735ef AF |
1188 | cpu->stop = true; |
1189 | qemu_cpu_kick(cpu); | |
296af7c9 BS |
1190 | } |
1191 | ||
aa723c23 | 1192 | if (qemu_in_vcpu_thread()) { |
d798e974 JK |
1193 | cpu_stop_current(); |
1194 | if (!kvm_enabled()) { | |
bdc44640 | 1195 | CPU_FOREACH(cpu) { |
182735ef AF |
1196 | cpu->stop = false; |
1197 | cpu->stopped = true; | |
d798e974 JK |
1198 | } |
1199 | return; | |
1200 | } | |
1201 | } | |
1202 | ||
296af7c9 | 1203 | while (!all_vcpus_paused()) { |
be7d6c57 | 1204 | qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex); |
bdc44640 | 1205 | CPU_FOREACH(cpu) { |
182735ef | 1206 | qemu_cpu_kick(cpu); |
296af7c9 BS |
1207 | } |
1208 | } | |
1209 | } | |
1210 | ||
2993683b IM |
1211 | void cpu_resume(CPUState *cpu) |
1212 | { | |
1213 | cpu->stop = false; | |
1214 | cpu->stopped = false; | |
1215 | qemu_cpu_kick(cpu); | |
1216 | } | |
1217 | ||
296af7c9 BS |
1218 | void resume_all_vcpus(void) |
1219 | { | |
bdc44640 | 1220 | CPUState *cpu; |
296af7c9 | 1221 | |
40daca54 | 1222 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true); |
bdc44640 | 1223 | CPU_FOREACH(cpu) { |
182735ef | 1224 | cpu_resume(cpu); |
296af7c9 BS |
1225 | } |
1226 | } | |
1227 | ||
4900116e DDAG |
1228 | /* For temporary buffers for forming a name */ |
1229 | #define VCPU_THREAD_NAME_SIZE 16 | |
1230 | ||
e5ab30a2 | 1231 | static void qemu_tcg_init_vcpu(CPUState *cpu) |
296af7c9 | 1232 | { |
4900116e DDAG |
1233 | char thread_name[VCPU_THREAD_NAME_SIZE]; |
1234 | ||
09daed84 EI |
1235 | tcg_cpu_address_space_init(cpu, cpu->as); |
1236 | ||
296af7c9 BS |
1237 | /* share a single thread for all cpus with TCG */ |
1238 | if (!tcg_cpu_thread) { | |
814e612e | 1239 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1240 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1241 | qemu_cond_init(cpu->halt_cond); | |
1242 | tcg_halt_cond = cpu->halt_cond; | |
4900116e DDAG |
1243 | snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/TCG", |
1244 | cpu->cpu_index); | |
1245 | qemu_thread_create(cpu->thread, thread_name, qemu_tcg_cpu_thread_fn, | |
1246 | cpu, QEMU_THREAD_JOINABLE); | |
1ecf47bf | 1247 | #ifdef _WIN32 |
814e612e | 1248 | cpu->hThread = qemu_thread_get_handle(cpu->thread); |
1ecf47bf | 1249 | #endif |
61a46217 | 1250 | while (!cpu->created) { |
18a85728 | 1251 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1252 | } |
814e612e | 1253 | tcg_cpu_thread = cpu->thread; |
296af7c9 | 1254 | } else { |
814e612e | 1255 | cpu->thread = tcg_cpu_thread; |
f5c121b8 | 1256 | cpu->halt_cond = tcg_halt_cond; |
296af7c9 BS |
1257 | } |
1258 | } | |
1259 | ||
48a106bd | 1260 | static void qemu_kvm_start_vcpu(CPUState *cpu) |
296af7c9 | 1261 | { |
4900116e DDAG |
1262 | char thread_name[VCPU_THREAD_NAME_SIZE]; |
1263 | ||
814e612e | 1264 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1265 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1266 | qemu_cond_init(cpu->halt_cond); | |
4900116e DDAG |
1267 | snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/KVM", |
1268 | cpu->cpu_index); | |
1269 | qemu_thread_create(cpu->thread, thread_name, qemu_kvm_cpu_thread_fn, | |
1270 | cpu, QEMU_THREAD_JOINABLE); | |
61a46217 | 1271 | while (!cpu->created) { |
18a85728 | 1272 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1273 | } |
296af7c9 BS |
1274 | } |
1275 | ||
10a9021d | 1276 | static void qemu_dummy_start_vcpu(CPUState *cpu) |
c7f0f3b1 | 1277 | { |
4900116e DDAG |
1278 | char thread_name[VCPU_THREAD_NAME_SIZE]; |
1279 | ||
814e612e | 1280 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1281 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1282 | qemu_cond_init(cpu->halt_cond); | |
4900116e DDAG |
1283 | snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/DUMMY", |
1284 | cpu->cpu_index); | |
1285 | qemu_thread_create(cpu->thread, thread_name, qemu_dummy_cpu_thread_fn, cpu, | |
c7f0f3b1 | 1286 | QEMU_THREAD_JOINABLE); |
61a46217 | 1287 | while (!cpu->created) { |
c7f0f3b1 AL |
1288 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
1289 | } | |
1290 | } | |
1291 | ||
c643bed9 | 1292 | void qemu_init_vcpu(CPUState *cpu) |
296af7c9 | 1293 | { |
ce3960eb AF |
1294 | cpu->nr_cores = smp_cores; |
1295 | cpu->nr_threads = smp_threads; | |
f324e766 | 1296 | cpu->stopped = true; |
0ab07c62 | 1297 | if (kvm_enabled()) { |
48a106bd | 1298 | qemu_kvm_start_vcpu(cpu); |
c7f0f3b1 | 1299 | } else if (tcg_enabled()) { |
e5ab30a2 | 1300 | qemu_tcg_init_vcpu(cpu); |
c7f0f3b1 | 1301 | } else { |
10a9021d | 1302 | qemu_dummy_start_vcpu(cpu); |
0ab07c62 | 1303 | } |
296af7c9 BS |
1304 | } |
1305 | ||
b4a3d965 | 1306 | void cpu_stop_current(void) |
296af7c9 | 1307 | { |
4917cf44 AF |
1308 | if (current_cpu) { |
1309 | current_cpu->stop = false; | |
1310 | current_cpu->stopped = true; | |
1311 | cpu_exit(current_cpu); | |
67bb172f | 1312 | qemu_cond_signal(&qemu_pause_cond); |
b4a3d965 | 1313 | } |
296af7c9 BS |
1314 | } |
1315 | ||
56983463 | 1316 | int vm_stop(RunState state) |
296af7c9 | 1317 | { |
aa723c23 | 1318 | if (qemu_in_vcpu_thread()) { |
74892d24 | 1319 | qemu_system_vmstop_request_prepare(); |
1dfb4dd9 | 1320 | qemu_system_vmstop_request(state); |
296af7c9 BS |
1321 | /* |
1322 | * FIXME: should not return to device code in case | |
1323 | * vm_stop() has been requested. | |
1324 | */ | |
b4a3d965 | 1325 | cpu_stop_current(); |
56983463 | 1326 | return 0; |
296af7c9 | 1327 | } |
56983463 KW |
1328 | |
1329 | return do_vm_stop(state); | |
296af7c9 BS |
1330 | } |
1331 | ||
8a9236f1 LC |
1332 | /* does a state transition even if the VM is already stopped, |
1333 | current state is forgotten forever */ | |
56983463 | 1334 | int vm_stop_force_state(RunState state) |
8a9236f1 LC |
1335 | { |
1336 | if (runstate_is_running()) { | |
56983463 | 1337 | return vm_stop(state); |
8a9236f1 LC |
1338 | } else { |
1339 | runstate_set(state); | |
594a45ce KW |
1340 | /* Make sure to return an error if the flush in a previous vm_stop() |
1341 | * failed. */ | |
1342 | return bdrv_flush_all(); | |
8a9236f1 LC |
1343 | } |
1344 | } | |
1345 | ||
9349b4f9 | 1346 | static int tcg_cpu_exec(CPUArchState *env) |
296af7c9 | 1347 | { |
efee7340 | 1348 | CPUState *cpu = ENV_GET_CPU(env); |
296af7c9 BS |
1349 | int ret; |
1350 | #ifdef CONFIG_PROFILER | |
1351 | int64_t ti; | |
1352 | #endif | |
1353 | ||
1354 | #ifdef CONFIG_PROFILER | |
1355 | ti = profile_getclock(); | |
1356 | #endif | |
1357 | if (use_icount) { | |
1358 | int64_t count; | |
ac70aafc | 1359 | int64_t deadline; |
296af7c9 | 1360 | int decr; |
c96778bb FK |
1361 | timers_state.qemu_icount -= (cpu->icount_decr.u16.low |
1362 | + cpu->icount_extra); | |
28ecfd7a | 1363 | cpu->icount_decr.u16.low = 0; |
efee7340 | 1364 | cpu->icount_extra = 0; |
40daca54 | 1365 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
1366 | |
1367 | /* Maintain prior (possibly buggy) behaviour where if no deadline | |
40daca54 | 1368 | * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than |
ac70aafc AB |
1369 | * INT32_MAX nanoseconds ahead, we still use INT32_MAX |
1370 | * nanoseconds. | |
1371 | */ | |
1372 | if ((deadline < 0) || (deadline > INT32_MAX)) { | |
1373 | deadline = INT32_MAX; | |
1374 | } | |
1375 | ||
1376 | count = qemu_icount_round(deadline); | |
c96778bb | 1377 | timers_state.qemu_icount += count; |
296af7c9 BS |
1378 | decr = (count > 0xffff) ? 0xffff : count; |
1379 | count -= decr; | |
28ecfd7a | 1380 | cpu->icount_decr.u16.low = decr; |
efee7340 | 1381 | cpu->icount_extra = count; |
296af7c9 BS |
1382 | } |
1383 | ret = cpu_exec(env); | |
1384 | #ifdef CONFIG_PROFILER | |
89d5cbdd | 1385 | tcg_time += profile_getclock() - ti; |
296af7c9 BS |
1386 | #endif |
1387 | if (use_icount) { | |
1388 | /* Fold pending instructions back into the | |
1389 | instruction counter, and clear the interrupt flag. */ | |
c96778bb FK |
1390 | timers_state.qemu_icount -= (cpu->icount_decr.u16.low |
1391 | + cpu->icount_extra); | |
28ecfd7a | 1392 | cpu->icount_decr.u32 = 0; |
efee7340 | 1393 | cpu->icount_extra = 0; |
296af7c9 BS |
1394 | } |
1395 | return ret; | |
1396 | } | |
1397 | ||
bdb7ca67 | 1398 | static void tcg_exec_all(void) |
296af7c9 | 1399 | { |
9a36085b JK |
1400 | int r; |
1401 | ||
40daca54 AB |
1402 | /* Account partial waits to QEMU_CLOCK_VIRTUAL. */ |
1403 | qemu_clock_warp(QEMU_CLOCK_VIRTUAL); | |
ab33fcda | 1404 | |
0ab07c62 | 1405 | if (next_cpu == NULL) { |
296af7c9 | 1406 | next_cpu = first_cpu; |
0ab07c62 | 1407 | } |
bdc44640 | 1408 | for (; next_cpu != NULL && !exit_request; next_cpu = CPU_NEXT(next_cpu)) { |
182735ef AF |
1409 | CPUState *cpu = next_cpu; |
1410 | CPUArchState *env = cpu->env_ptr; | |
296af7c9 | 1411 | |
40daca54 | 1412 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, |
ed2803da | 1413 | (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0); |
296af7c9 | 1414 | |
a1fcaa73 | 1415 | if (cpu_can_run(cpu)) { |
bdb7ca67 | 1416 | r = tcg_cpu_exec(env); |
9a36085b | 1417 | if (r == EXCP_DEBUG) { |
91325046 | 1418 | cpu_handle_guest_debug(cpu); |
3c638d06 JK |
1419 | break; |
1420 | } | |
f324e766 | 1421 | } else if (cpu->stop || cpu->stopped) { |
296af7c9 BS |
1422 | break; |
1423 | } | |
1424 | } | |
c629a4bc | 1425 | exit_request = 0; |
296af7c9 BS |
1426 | } |
1427 | ||
9a78eead | 1428 | void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) |
262353cb BS |
1429 | { |
1430 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
e916cbf8 PM |
1431 | #if defined(cpu_list) |
1432 | cpu_list(f, cpu_fprintf); | |
262353cb BS |
1433 | #endif |
1434 | } | |
de0b36b6 LC |
1435 | |
1436 | CpuInfoList *qmp_query_cpus(Error **errp) | |
1437 | { | |
1438 | CpuInfoList *head = NULL, *cur_item = NULL; | |
182735ef | 1439 | CPUState *cpu; |
de0b36b6 | 1440 | |
bdc44640 | 1441 | CPU_FOREACH(cpu) { |
de0b36b6 | 1442 | CpuInfoList *info; |
182735ef AF |
1443 | #if defined(TARGET_I386) |
1444 | X86CPU *x86_cpu = X86_CPU(cpu); | |
1445 | CPUX86State *env = &x86_cpu->env; | |
1446 | #elif defined(TARGET_PPC) | |
1447 | PowerPCCPU *ppc_cpu = POWERPC_CPU(cpu); | |
1448 | CPUPPCState *env = &ppc_cpu->env; | |
1449 | #elif defined(TARGET_SPARC) | |
1450 | SPARCCPU *sparc_cpu = SPARC_CPU(cpu); | |
1451 | CPUSPARCState *env = &sparc_cpu->env; | |
1452 | #elif defined(TARGET_MIPS) | |
1453 | MIPSCPU *mips_cpu = MIPS_CPU(cpu); | |
1454 | CPUMIPSState *env = &mips_cpu->env; | |
48e06fe0 BK |
1455 | #elif defined(TARGET_TRICORE) |
1456 | TriCoreCPU *tricore_cpu = TRICORE_CPU(cpu); | |
1457 | CPUTriCoreState *env = &tricore_cpu->env; | |
182735ef | 1458 | #endif |
de0b36b6 | 1459 | |
cb446eca | 1460 | cpu_synchronize_state(cpu); |
de0b36b6 LC |
1461 | |
1462 | info = g_malloc0(sizeof(*info)); | |
1463 | info->value = g_malloc0(sizeof(*info->value)); | |
55e5c285 | 1464 | info->value->CPU = cpu->cpu_index; |
182735ef | 1465 | info->value->current = (cpu == first_cpu); |
259186a7 | 1466 | info->value->halted = cpu->halted; |
58f88d4b | 1467 | info->value->qom_path = object_get_canonical_path(OBJECT(cpu)); |
9f09e18a | 1468 | info->value->thread_id = cpu->thread_id; |
de0b36b6 LC |
1469 | #if defined(TARGET_I386) |
1470 | info->value->has_pc = true; | |
1471 | info->value->pc = env->eip + env->segs[R_CS].base; | |
1472 | #elif defined(TARGET_PPC) | |
1473 | info->value->has_nip = true; | |
1474 | info->value->nip = env->nip; | |
1475 | #elif defined(TARGET_SPARC) | |
1476 | info->value->has_pc = true; | |
1477 | info->value->pc = env->pc; | |
1478 | info->value->has_npc = true; | |
1479 | info->value->npc = env->npc; | |
1480 | #elif defined(TARGET_MIPS) | |
1481 | info->value->has_PC = true; | |
1482 | info->value->PC = env->active_tc.PC; | |
48e06fe0 BK |
1483 | #elif defined(TARGET_TRICORE) |
1484 | info->value->has_PC = true; | |
1485 | info->value->PC = env->PC; | |
de0b36b6 LC |
1486 | #endif |
1487 | ||
1488 | /* XXX: waiting for the qapi to support GSList */ | |
1489 | if (!cur_item) { | |
1490 | head = cur_item = info; | |
1491 | } else { | |
1492 | cur_item->next = info; | |
1493 | cur_item = info; | |
1494 | } | |
1495 | } | |
1496 | ||
1497 | return head; | |
1498 | } | |
0cfd6a9a LC |
1499 | |
1500 | void qmp_memsave(int64_t addr, int64_t size, const char *filename, | |
1501 | bool has_cpu, int64_t cpu_index, Error **errp) | |
1502 | { | |
1503 | FILE *f; | |
1504 | uint32_t l; | |
55e5c285 | 1505 | CPUState *cpu; |
0cfd6a9a | 1506 | uint8_t buf[1024]; |
0dc9daf0 | 1507 | int64_t orig_addr = addr, orig_size = size; |
0cfd6a9a LC |
1508 | |
1509 | if (!has_cpu) { | |
1510 | cpu_index = 0; | |
1511 | } | |
1512 | ||
151d1322 AF |
1513 | cpu = qemu_get_cpu(cpu_index); |
1514 | if (cpu == NULL) { | |
0cfd6a9a LC |
1515 | error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index", |
1516 | "a CPU number"); | |
1517 | return; | |
1518 | } | |
1519 | ||
1520 | f = fopen(filename, "wb"); | |
1521 | if (!f) { | |
618da851 | 1522 | error_setg_file_open(errp, errno, filename); |
0cfd6a9a LC |
1523 | return; |
1524 | } | |
1525 | ||
1526 | while (size != 0) { | |
1527 | l = sizeof(buf); | |
1528 | if (l > size) | |
1529 | l = size; | |
2f4d0f59 | 1530 | if (cpu_memory_rw_debug(cpu, addr, buf, l, 0) != 0) { |
0dc9daf0 BP |
1531 | error_setg(errp, "Invalid addr 0x%016" PRIx64 "/size %" PRId64 |
1532 | " specified", orig_addr, orig_size); | |
2f4d0f59 AK |
1533 | goto exit; |
1534 | } | |
0cfd6a9a LC |
1535 | if (fwrite(buf, 1, l, f) != l) { |
1536 | error_set(errp, QERR_IO_ERROR); | |
1537 | goto exit; | |
1538 | } | |
1539 | addr += l; | |
1540 | size -= l; | |
1541 | } | |
1542 | ||
1543 | exit: | |
1544 | fclose(f); | |
1545 | } | |
6d3962bf LC |
1546 | |
1547 | void qmp_pmemsave(int64_t addr, int64_t size, const char *filename, | |
1548 | Error **errp) | |
1549 | { | |
1550 | FILE *f; | |
1551 | uint32_t l; | |
1552 | uint8_t buf[1024]; | |
1553 | ||
1554 | f = fopen(filename, "wb"); | |
1555 | if (!f) { | |
618da851 | 1556 | error_setg_file_open(errp, errno, filename); |
6d3962bf LC |
1557 | return; |
1558 | } | |
1559 | ||
1560 | while (size != 0) { | |
1561 | l = sizeof(buf); | |
1562 | if (l > size) | |
1563 | l = size; | |
eb6282f2 | 1564 | cpu_physical_memory_read(addr, buf, l); |
6d3962bf LC |
1565 | if (fwrite(buf, 1, l, f) != l) { |
1566 | error_set(errp, QERR_IO_ERROR); | |
1567 | goto exit; | |
1568 | } | |
1569 | addr += l; | |
1570 | size -= l; | |
1571 | } | |
1572 | ||
1573 | exit: | |
1574 | fclose(f); | |
1575 | } | |
ab49ab5c LC |
1576 | |
1577 | void qmp_inject_nmi(Error **errp) | |
1578 | { | |
1579 | #if defined(TARGET_I386) | |
182735ef AF |
1580 | CPUState *cs; |
1581 | ||
bdc44640 | 1582 | CPU_FOREACH(cs) { |
182735ef | 1583 | X86CPU *cpu = X86_CPU(cs); |
ab49ab5c | 1584 | |
02e51483 | 1585 | if (!cpu->apic_state) { |
182735ef | 1586 | cpu_interrupt(cs, CPU_INTERRUPT_NMI); |
02c09195 | 1587 | } else { |
02e51483 | 1588 | apic_deliver_nmi(cpu->apic_state); |
02c09195 | 1589 | } |
ab49ab5c LC |
1590 | } |
1591 | #else | |
9cb805fd | 1592 | nmi_monitor_handle(monitor_get_cpu_index(), errp); |
ab49ab5c LC |
1593 | #endif |
1594 | } | |
27498bef ST |
1595 | |
1596 | void dump_drift_info(FILE *f, fprintf_function cpu_fprintf) | |
1597 | { | |
1598 | if (!use_icount) { | |
1599 | return; | |
1600 | } | |
1601 | ||
1602 | cpu_fprintf(f, "Host - Guest clock %"PRIi64" ms\n", | |
1603 | (cpu_get_clock() - cpu_get_icount())/SCALE_MS); | |
1604 | if (icount_align_option) { | |
1605 | cpu_fprintf(f, "Max guest delay %"PRIi64" ms\n", -max_delay/SCALE_MS); | |
1606 | cpu_fprintf(f, "Max guest advance %"PRIi64" ms\n", max_advance/SCALE_MS); | |
1607 | } else { | |
1608 | cpu_fprintf(f, "Max guest delay NA\n"); | |
1609 | cpu_fprintf(f, "Max guest advance NA\n"); | |
1610 | } | |
1611 | } |