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296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
26 | #include "config-host.h" | |
27 | ||
28 | #include "monitor.h" | |
29 | #include "sysemu.h" | |
30 | #include "gdbstub.h" | |
31 | #include "dma.h" | |
32 | #include "kvm.h" | |
262ea18e | 33 | #include "exec-all.h" |
296af7c9 BS |
34 | |
35 | #include "cpus.h" | |
36 | ||
7277e027 BS |
37 | #ifdef SIGRTMIN |
38 | #define SIG_IPI (SIGRTMIN+4) | |
39 | #else | |
40 | #define SIG_IPI SIGUSR1 | |
41 | #endif | |
42 | ||
296af7c9 BS |
43 | static CPUState *cur_cpu; |
44 | static CPUState *next_cpu; | |
45 | ||
46 | /***********************************************************/ | |
47 | void hw_error(const char *fmt, ...) | |
48 | { | |
49 | va_list ap; | |
50 | CPUState *env; | |
51 | ||
52 | va_start(ap, fmt); | |
53 | fprintf(stderr, "qemu: hardware error: "); | |
54 | vfprintf(stderr, fmt, ap); | |
55 | fprintf(stderr, "\n"); | |
56 | for(env = first_cpu; env != NULL; env = env->next_cpu) { | |
57 | fprintf(stderr, "CPU #%d:\n", env->cpu_index); | |
58 | #ifdef TARGET_I386 | |
59 | cpu_dump_state(env, stderr, fprintf, X86_DUMP_FPU); | |
60 | #else | |
61 | cpu_dump_state(env, stderr, fprintf, 0); | |
62 | #endif | |
63 | } | |
64 | va_end(ap); | |
65 | abort(); | |
66 | } | |
67 | ||
68 | void cpu_synchronize_all_states(void) | |
69 | { | |
70 | CPUState *cpu; | |
71 | ||
72 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
73 | cpu_synchronize_state(cpu); | |
74 | } | |
75 | } | |
76 | ||
77 | void cpu_synchronize_all_post_reset(void) | |
78 | { | |
79 | CPUState *cpu; | |
80 | ||
81 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
82 | cpu_synchronize_post_reset(cpu); | |
83 | } | |
84 | } | |
85 | ||
86 | void cpu_synchronize_all_post_init(void) | |
87 | { | |
88 | CPUState *cpu; | |
89 | ||
90 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
91 | cpu_synchronize_post_init(cpu); | |
92 | } | |
93 | } | |
94 | ||
3ae9501c MT |
95 | int cpu_is_stopped(CPUState *env) |
96 | { | |
97 | return !vm_running || env->stopped; | |
98 | } | |
99 | ||
296af7c9 BS |
100 | static void do_vm_stop(int reason) |
101 | { | |
102 | if (vm_running) { | |
103 | cpu_disable_ticks(); | |
104 | vm_running = 0; | |
105 | pause_all_vcpus(); | |
106 | vm_state_notify(0, reason); | |
107 | monitor_protocol_event(QEVENT_STOP, NULL); | |
108 | } | |
109 | } | |
110 | ||
111 | static int cpu_can_run(CPUState *env) | |
112 | { | |
113 | if (env->stop) | |
114 | return 0; | |
55274a30 | 115 | if (env->stopped || !vm_running) |
296af7c9 BS |
116 | return 0; |
117 | return 1; | |
118 | } | |
119 | ||
120 | static int cpu_has_work(CPUState *env) | |
121 | { | |
122 | if (env->stop) | |
123 | return 1; | |
e82bcec2 MT |
124 | if (env->queued_work_first) |
125 | return 1; | |
55274a30 | 126 | if (env->stopped || !vm_running) |
296af7c9 BS |
127 | return 0; |
128 | if (!env->halted) | |
129 | return 1; | |
130 | if (qemu_cpu_has_work(env)) | |
131 | return 1; | |
132 | return 0; | |
133 | } | |
134 | ||
135 | static int tcg_has_work(void) | |
136 | { | |
137 | CPUState *env; | |
138 | ||
139 | for (env = first_cpu; env != NULL; env = env->next_cpu) | |
140 | if (cpu_has_work(env)) | |
141 | return 1; | |
142 | return 0; | |
143 | } | |
144 | ||
145 | #ifndef _WIN32 | |
146 | static int io_thread_fd = -1; | |
147 | ||
148 | static void qemu_event_increment(void) | |
149 | { | |
150 | /* Write 8 bytes to be compatible with eventfd. */ | |
26a82330 | 151 | static const uint64_t val = 1; |
296af7c9 BS |
152 | ssize_t ret; |
153 | ||
154 | if (io_thread_fd == -1) | |
155 | return; | |
156 | ||
157 | do { | |
158 | ret = write(io_thread_fd, &val, sizeof(val)); | |
159 | } while (ret < 0 && errno == EINTR); | |
160 | ||
161 | /* EAGAIN is fine, a read must be pending. */ | |
162 | if (ret < 0 && errno != EAGAIN) { | |
163 | fprintf(stderr, "qemu_event_increment: write() filed: %s\n", | |
164 | strerror(errno)); | |
165 | exit (1); | |
166 | } | |
167 | } | |
168 | ||
169 | static void qemu_event_read(void *opaque) | |
170 | { | |
171 | int fd = (unsigned long)opaque; | |
172 | ssize_t len; | |
173 | char buffer[512]; | |
174 | ||
175 | /* Drain the notify pipe. For eventfd, only 8 bytes will be read. */ | |
176 | do { | |
177 | len = read(fd, buffer, sizeof(buffer)); | |
178 | } while ((len == -1 && errno == EINTR) || len == sizeof(buffer)); | |
179 | } | |
180 | ||
181 | static int qemu_event_init(void) | |
182 | { | |
183 | int err; | |
184 | int fds[2]; | |
185 | ||
186 | err = qemu_eventfd(fds); | |
187 | if (err == -1) | |
188 | return -errno; | |
189 | ||
190 | err = fcntl_setfl(fds[0], O_NONBLOCK); | |
191 | if (err < 0) | |
192 | goto fail; | |
193 | ||
194 | err = fcntl_setfl(fds[1], O_NONBLOCK); | |
195 | if (err < 0) | |
196 | goto fail; | |
197 | ||
198 | qemu_set_fd_handler2(fds[0], NULL, qemu_event_read, NULL, | |
199 | (void *)(unsigned long)fds[0]); | |
200 | ||
201 | io_thread_fd = fds[1]; | |
202 | return 0; | |
203 | ||
204 | fail: | |
205 | close(fds[0]); | |
206 | close(fds[1]); | |
207 | return err; | |
208 | } | |
209 | #else | |
210 | HANDLE qemu_event_handle; | |
211 | ||
212 | static void dummy_event_handler(void *opaque) | |
213 | { | |
214 | } | |
215 | ||
216 | static int qemu_event_init(void) | |
217 | { | |
218 | qemu_event_handle = CreateEvent(NULL, FALSE, FALSE, NULL); | |
219 | if (!qemu_event_handle) { | |
220 | fprintf(stderr, "Failed CreateEvent: %ld\n", GetLastError()); | |
221 | return -1; | |
222 | } | |
223 | qemu_add_wait_object(qemu_event_handle, dummy_event_handler, NULL); | |
224 | return 0; | |
225 | } | |
226 | ||
227 | static void qemu_event_increment(void) | |
228 | { | |
229 | if (!SetEvent(qemu_event_handle)) { | |
230 | fprintf(stderr, "qemu_event_increment: SetEvent failed: %ld\n", | |
231 | GetLastError()); | |
232 | exit (1); | |
233 | } | |
234 | } | |
235 | #endif | |
236 | ||
237 | #ifndef CONFIG_IOTHREAD | |
238 | int qemu_init_main_loop(void) | |
239 | { | |
240 | return qemu_event_init(); | |
241 | } | |
242 | ||
7277e027 BS |
243 | void qemu_main_loop_start(void) |
244 | { | |
245 | } | |
246 | ||
296af7c9 BS |
247 | void qemu_init_vcpu(void *_env) |
248 | { | |
249 | CPUState *env = _env; | |
250 | ||
251 | env->nr_cores = smp_cores; | |
252 | env->nr_threads = smp_threads; | |
253 | if (kvm_enabled()) | |
254 | kvm_init_vcpu(env); | |
255 | return; | |
256 | } | |
257 | ||
258 | int qemu_cpu_self(void *env) | |
259 | { | |
260 | return 1; | |
261 | } | |
262 | ||
e82bcec2 MT |
263 | void run_on_cpu(CPUState *env, void (*func)(void *data), void *data) |
264 | { | |
265 | func(data); | |
266 | } | |
267 | ||
296af7c9 BS |
268 | void resume_all_vcpus(void) |
269 | { | |
270 | } | |
271 | ||
272 | void pause_all_vcpus(void) | |
273 | { | |
274 | } | |
275 | ||
276 | void qemu_cpu_kick(void *env) | |
277 | { | |
278 | return; | |
279 | } | |
280 | ||
281 | void qemu_notify_event(void) | |
282 | { | |
283 | CPUState *env = cpu_single_env; | |
284 | ||
285 | qemu_event_increment (); | |
286 | if (env) { | |
287 | cpu_exit(env); | |
288 | } | |
289 | if (next_cpu && env != next_cpu) { | |
290 | cpu_exit(next_cpu); | |
291 | } | |
292 | } | |
293 | ||
294 | void qemu_mutex_lock_iothread(void) {} | |
295 | void qemu_mutex_unlock_iothread(void) {} | |
296 | ||
297 | void vm_stop(int reason) | |
298 | { | |
299 | do_vm_stop(reason); | |
300 | } | |
301 | ||
302 | #else /* CONFIG_IOTHREAD */ | |
303 | ||
304 | #include "qemu-thread.h" | |
305 | ||
306 | QemuMutex qemu_global_mutex; | |
307 | static QemuMutex qemu_fair_mutex; | |
308 | ||
309 | static QemuThread io_thread; | |
310 | ||
311 | static QemuThread *tcg_cpu_thread; | |
312 | static QemuCond *tcg_halt_cond; | |
313 | ||
314 | static int qemu_system_ready; | |
315 | /* cpu creation */ | |
316 | static QemuCond qemu_cpu_cond; | |
317 | /* system init */ | |
318 | static QemuCond qemu_system_cond; | |
319 | static QemuCond qemu_pause_cond; | |
e82bcec2 | 320 | static QemuCond qemu_work_cond; |
296af7c9 | 321 | |
55541c8a PB |
322 | static void tcg_init_ipi(void); |
323 | static void kvm_init_ipi(CPUState *env); | |
296af7c9 BS |
324 | static void unblock_io_signals(void); |
325 | ||
326 | int qemu_init_main_loop(void) | |
327 | { | |
328 | int ret; | |
329 | ||
330 | ret = qemu_event_init(); | |
331 | if (ret) | |
332 | return ret; | |
333 | ||
334 | qemu_cond_init(&qemu_pause_cond); | |
f8ca7b43 | 335 | qemu_cond_init(&qemu_system_cond); |
296af7c9 BS |
336 | qemu_mutex_init(&qemu_fair_mutex); |
337 | qemu_mutex_init(&qemu_global_mutex); | |
338 | qemu_mutex_lock(&qemu_global_mutex); | |
339 | ||
340 | unblock_io_signals(); | |
341 | qemu_thread_self(&io_thread); | |
342 | ||
343 | return 0; | |
344 | } | |
345 | ||
7277e027 BS |
346 | void qemu_main_loop_start(void) |
347 | { | |
348 | qemu_system_ready = 1; | |
349 | qemu_cond_broadcast(&qemu_system_cond); | |
350 | } | |
351 | ||
e82bcec2 MT |
352 | void run_on_cpu(CPUState *env, void (*func)(void *data), void *data) |
353 | { | |
354 | struct qemu_work_item wi; | |
355 | ||
356 | if (qemu_cpu_self(env)) { | |
357 | func(data); | |
358 | return; | |
359 | } | |
360 | ||
361 | wi.func = func; | |
362 | wi.data = data; | |
363 | if (!env->queued_work_first) | |
364 | env->queued_work_first = &wi; | |
365 | else | |
366 | env->queued_work_last->next = &wi; | |
367 | env->queued_work_last = &wi; | |
368 | wi.next = NULL; | |
369 | wi.done = false; | |
370 | ||
371 | qemu_cpu_kick(env); | |
372 | while (!wi.done) { | |
373 | CPUState *self_env = cpu_single_env; | |
374 | ||
375 | qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex); | |
376 | cpu_single_env = self_env; | |
377 | } | |
378 | } | |
379 | ||
380 | static void flush_queued_work(CPUState *env) | |
381 | { | |
382 | struct qemu_work_item *wi; | |
383 | ||
384 | if (!env->queued_work_first) | |
385 | return; | |
386 | ||
387 | while ((wi = env->queued_work_first)) { | |
388 | env->queued_work_first = wi->next; | |
389 | wi->func(wi->data); | |
390 | wi->done = true; | |
391 | } | |
392 | env->queued_work_last = NULL; | |
393 | qemu_cond_broadcast(&qemu_work_cond); | |
394 | } | |
395 | ||
296af7c9 BS |
396 | static void qemu_wait_io_event_common(CPUState *env) |
397 | { | |
398 | if (env->stop) { | |
399 | env->stop = 0; | |
400 | env->stopped = 1; | |
401 | qemu_cond_signal(&qemu_pause_cond); | |
402 | } | |
e82bcec2 | 403 | flush_queued_work(env); |
296af7c9 BS |
404 | } |
405 | ||
406 | static void qemu_wait_io_event(CPUState *env) | |
407 | { | |
408 | while (!tcg_has_work()) | |
409 | qemu_cond_timedwait(env->halt_cond, &qemu_global_mutex, 1000); | |
410 | ||
411 | qemu_mutex_unlock(&qemu_global_mutex); | |
412 | ||
413 | /* | |
414 | * Users of qemu_global_mutex can be starved, having no chance | |
415 | * to acquire it since this path will get to it first. | |
416 | * So use another lock to provide fairness. | |
417 | */ | |
418 | qemu_mutex_lock(&qemu_fair_mutex); | |
419 | qemu_mutex_unlock(&qemu_fair_mutex); | |
420 | ||
421 | qemu_mutex_lock(&qemu_global_mutex); | |
422 | qemu_wait_io_event_common(env); | |
423 | } | |
424 | ||
425 | static void qemu_kvm_eat_signal(CPUState *env, int timeout) | |
426 | { | |
427 | struct timespec ts; | |
428 | int r, e; | |
429 | siginfo_t siginfo; | |
430 | sigset_t waitset; | |
431 | ||
432 | ts.tv_sec = timeout / 1000; | |
433 | ts.tv_nsec = (timeout % 1000) * 1000000; | |
434 | ||
435 | sigemptyset(&waitset); | |
436 | sigaddset(&waitset, SIG_IPI); | |
437 | ||
438 | qemu_mutex_unlock(&qemu_global_mutex); | |
439 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
440 | e = errno; | |
441 | qemu_mutex_lock(&qemu_global_mutex); | |
442 | ||
443 | if (r == -1 && !(e == EAGAIN || e == EINTR)) { | |
444 | fprintf(stderr, "sigtimedwait: %s\n", strerror(e)); | |
445 | exit(1); | |
446 | } | |
447 | } | |
448 | ||
449 | static void qemu_kvm_wait_io_event(CPUState *env) | |
450 | { | |
451 | while (!cpu_has_work(env)) | |
452 | qemu_cond_timedwait(env->halt_cond, &qemu_global_mutex, 1000); | |
453 | ||
454 | qemu_kvm_eat_signal(env, 0); | |
455 | qemu_wait_io_event_common(env); | |
456 | } | |
457 | ||
458 | static int qemu_cpu_exec(CPUState *env); | |
459 | ||
460 | static void *kvm_cpu_thread_fn(void *arg) | |
461 | { | |
462 | CPUState *env = arg; | |
463 | ||
6164e6d6 | 464 | qemu_mutex_lock(&qemu_global_mutex); |
296af7c9 BS |
465 | qemu_thread_self(env->thread); |
466 | if (kvm_enabled()) | |
467 | kvm_init_vcpu(env); | |
468 | ||
55541c8a | 469 | kvm_init_ipi(env); |
296af7c9 BS |
470 | |
471 | /* signal CPU creation */ | |
296af7c9 BS |
472 | env->created = 1; |
473 | qemu_cond_signal(&qemu_cpu_cond); | |
474 | ||
475 | /* and wait for machine initialization */ | |
476 | while (!qemu_system_ready) | |
477 | qemu_cond_timedwait(&qemu_system_cond, &qemu_global_mutex, 100); | |
478 | ||
479 | while (1) { | |
480 | if (cpu_can_run(env)) | |
481 | qemu_cpu_exec(env); | |
482 | qemu_kvm_wait_io_event(env); | |
483 | } | |
484 | ||
485 | return NULL; | |
486 | } | |
487 | ||
488 | static void *tcg_cpu_thread_fn(void *arg) | |
489 | { | |
490 | CPUState *env = arg; | |
491 | ||
55541c8a | 492 | tcg_init_ipi(); |
296af7c9 BS |
493 | qemu_thread_self(env->thread); |
494 | ||
495 | /* signal CPU creation */ | |
496 | qemu_mutex_lock(&qemu_global_mutex); | |
497 | for (env = first_cpu; env != NULL; env = env->next_cpu) | |
498 | env->created = 1; | |
499 | qemu_cond_signal(&qemu_cpu_cond); | |
500 | ||
501 | /* and wait for machine initialization */ | |
502 | while (!qemu_system_ready) | |
503 | qemu_cond_timedwait(&qemu_system_cond, &qemu_global_mutex, 100); | |
504 | ||
505 | while (1) { | |
506 | tcg_cpu_exec(); | |
507 | qemu_wait_io_event(cur_cpu); | |
508 | } | |
509 | ||
510 | return NULL; | |
511 | } | |
512 | ||
513 | void qemu_cpu_kick(void *_env) | |
514 | { | |
515 | CPUState *env = _env; | |
516 | qemu_cond_broadcast(env->halt_cond); | |
1fbb22e5 | 517 | qemu_thread_signal(env->thread, SIG_IPI); |
296af7c9 BS |
518 | } |
519 | ||
520 | int qemu_cpu_self(void *_env) | |
521 | { | |
522 | CPUState *env = _env; | |
523 | QemuThread this; | |
524 | ||
525 | qemu_thread_self(&this); | |
526 | ||
527 | return qemu_thread_equal(&this, env->thread); | |
528 | } | |
529 | ||
530 | static void cpu_signal(int sig) | |
531 | { | |
532 | if (cpu_single_env) | |
533 | cpu_exit(cpu_single_env); | |
1a28cac3 | 534 | exit_request = 1; |
296af7c9 BS |
535 | } |
536 | ||
55541c8a | 537 | static void tcg_init_ipi(void) |
296af7c9 BS |
538 | { |
539 | sigset_t set; | |
540 | struct sigaction sigact; | |
541 | ||
55541c8a PB |
542 | memset(&sigact, 0, sizeof(sigact)); |
543 | sigact.sa_handler = cpu_signal; | |
544 | sigaction(SIG_IPI, &sigact, NULL); | |
296af7c9 BS |
545 | |
546 | sigemptyset(&set); | |
547 | sigaddset(&set, SIG_IPI); | |
548 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
296af7c9 BS |
549 | } |
550 | ||
551 | static void dummy_signal(int sig) | |
552 | { | |
553 | } | |
554 | ||
55541c8a | 555 | static void kvm_init_ipi(CPUState *env) |
296af7c9 BS |
556 | { |
557 | int r; | |
558 | sigset_t set; | |
559 | struct sigaction sigact; | |
560 | ||
296af7c9 BS |
561 | memset(&sigact, 0, sizeof(sigact)); |
562 | sigact.sa_handler = dummy_signal; | |
563 | sigaction(SIG_IPI, &sigact, NULL); | |
564 | ||
55541c8a PB |
565 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
566 | sigdelset(&set, SIG_IPI); | |
296af7c9 BS |
567 | r = kvm_set_signal_mask(env, &set); |
568 | if (r) { | |
569 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(r)); | |
570 | exit(1); | |
571 | } | |
572 | } | |
573 | ||
574 | static void unblock_io_signals(void) | |
575 | { | |
576 | sigset_t set; | |
577 | ||
578 | sigemptyset(&set); | |
579 | sigaddset(&set, SIGUSR2); | |
580 | sigaddset(&set, SIGIO); | |
581 | sigaddset(&set, SIGALRM); | |
582 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
583 | ||
584 | sigemptyset(&set); | |
585 | sigaddset(&set, SIG_IPI); | |
586 | pthread_sigmask(SIG_BLOCK, &set, NULL); | |
587 | } | |
588 | ||
296af7c9 BS |
589 | void qemu_mutex_lock_iothread(void) |
590 | { | |
591 | if (kvm_enabled()) { | |
592 | qemu_mutex_lock(&qemu_fair_mutex); | |
593 | qemu_mutex_lock(&qemu_global_mutex); | |
594 | qemu_mutex_unlock(&qemu_fair_mutex); | |
1a28cac3 MT |
595 | } else { |
596 | qemu_mutex_lock(&qemu_fair_mutex); | |
597 | if (qemu_mutex_trylock(&qemu_global_mutex)) { | |
598 | qemu_thread_signal(tcg_cpu_thread, SIG_IPI); | |
599 | qemu_mutex_lock(&qemu_global_mutex); | |
600 | } | |
601 | qemu_mutex_unlock(&qemu_fair_mutex); | |
602 | } | |
296af7c9 BS |
603 | } |
604 | ||
605 | void qemu_mutex_unlock_iothread(void) | |
606 | { | |
607 | qemu_mutex_unlock(&qemu_global_mutex); | |
608 | } | |
609 | ||
610 | static int all_vcpus_paused(void) | |
611 | { | |
612 | CPUState *penv = first_cpu; | |
613 | ||
614 | while (penv) { | |
615 | if (!penv->stopped) | |
616 | return 0; | |
617 | penv = (CPUState *)penv->next_cpu; | |
618 | } | |
619 | ||
620 | return 1; | |
621 | } | |
622 | ||
623 | void pause_all_vcpus(void) | |
624 | { | |
625 | CPUState *penv = first_cpu; | |
626 | ||
627 | while (penv) { | |
628 | penv->stop = 1; | |
296af7c9 BS |
629 | qemu_cpu_kick(penv); |
630 | penv = (CPUState *)penv->next_cpu; | |
631 | } | |
632 | ||
633 | while (!all_vcpus_paused()) { | |
634 | qemu_cond_timedwait(&qemu_pause_cond, &qemu_global_mutex, 100); | |
635 | penv = first_cpu; | |
636 | while (penv) { | |
1fbb22e5 | 637 | qemu_cpu_kick(penv); |
296af7c9 BS |
638 | penv = (CPUState *)penv->next_cpu; |
639 | } | |
640 | } | |
641 | } | |
642 | ||
643 | void resume_all_vcpus(void) | |
644 | { | |
645 | CPUState *penv = first_cpu; | |
646 | ||
647 | while (penv) { | |
648 | penv->stop = 0; | |
649 | penv->stopped = 0; | |
296af7c9 BS |
650 | qemu_cpu_kick(penv); |
651 | penv = (CPUState *)penv->next_cpu; | |
652 | } | |
653 | } | |
654 | ||
655 | static void tcg_init_vcpu(void *_env) | |
656 | { | |
657 | CPUState *env = _env; | |
658 | /* share a single thread for all cpus with TCG */ | |
659 | if (!tcg_cpu_thread) { | |
660 | env->thread = qemu_mallocz(sizeof(QemuThread)); | |
661 | env->halt_cond = qemu_mallocz(sizeof(QemuCond)); | |
662 | qemu_cond_init(env->halt_cond); | |
663 | qemu_thread_create(env->thread, tcg_cpu_thread_fn, env); | |
664 | while (env->created == 0) | |
665 | qemu_cond_timedwait(&qemu_cpu_cond, &qemu_global_mutex, 100); | |
666 | tcg_cpu_thread = env->thread; | |
667 | tcg_halt_cond = env->halt_cond; | |
668 | } else { | |
669 | env->thread = tcg_cpu_thread; | |
670 | env->halt_cond = tcg_halt_cond; | |
671 | } | |
672 | } | |
673 | ||
674 | static void kvm_start_vcpu(CPUState *env) | |
675 | { | |
676 | env->thread = qemu_mallocz(sizeof(QemuThread)); | |
677 | env->halt_cond = qemu_mallocz(sizeof(QemuCond)); | |
678 | qemu_cond_init(env->halt_cond); | |
679 | qemu_thread_create(env->thread, kvm_cpu_thread_fn, env); | |
680 | while (env->created == 0) | |
681 | qemu_cond_timedwait(&qemu_cpu_cond, &qemu_global_mutex, 100); | |
682 | } | |
683 | ||
684 | void qemu_init_vcpu(void *_env) | |
685 | { | |
686 | CPUState *env = _env; | |
687 | ||
688 | env->nr_cores = smp_cores; | |
689 | env->nr_threads = smp_threads; | |
690 | if (kvm_enabled()) | |
691 | kvm_start_vcpu(env); | |
692 | else | |
693 | tcg_init_vcpu(env); | |
694 | } | |
695 | ||
696 | void qemu_notify_event(void) | |
697 | { | |
698 | qemu_event_increment(); | |
699 | } | |
700 | ||
701 | static void qemu_system_vmstop_request(int reason) | |
702 | { | |
703 | vmstop_requested = reason; | |
704 | qemu_notify_event(); | |
705 | } | |
706 | ||
707 | void vm_stop(int reason) | |
708 | { | |
709 | QemuThread me; | |
710 | qemu_thread_self(&me); | |
711 | ||
712 | if (!qemu_thread_equal(&me, &io_thread)) { | |
713 | qemu_system_vmstop_request(reason); | |
714 | /* | |
715 | * FIXME: should not return to device code in case | |
716 | * vm_stop() has been requested. | |
717 | */ | |
718 | if (cpu_single_env) { | |
719 | cpu_exit(cpu_single_env); | |
720 | cpu_single_env->stop = 1; | |
721 | } | |
722 | return; | |
723 | } | |
724 | do_vm_stop(reason); | |
725 | } | |
726 | ||
727 | #endif | |
728 | ||
729 | static int qemu_cpu_exec(CPUState *env) | |
730 | { | |
731 | int ret; | |
732 | #ifdef CONFIG_PROFILER | |
733 | int64_t ti; | |
734 | #endif | |
735 | ||
736 | #ifdef CONFIG_PROFILER | |
737 | ti = profile_getclock(); | |
738 | #endif | |
739 | if (use_icount) { | |
740 | int64_t count; | |
741 | int decr; | |
742 | qemu_icount -= (env->icount_decr.u16.low + env->icount_extra); | |
743 | env->icount_decr.u16.low = 0; | |
744 | env->icount_extra = 0; | |
745 | count = qemu_icount_round (qemu_next_deadline()); | |
746 | qemu_icount += count; | |
747 | decr = (count > 0xffff) ? 0xffff : count; | |
748 | count -= decr; | |
749 | env->icount_decr.u16.low = decr; | |
750 | env->icount_extra = count; | |
751 | } | |
752 | ret = cpu_exec(env); | |
753 | #ifdef CONFIG_PROFILER | |
754 | qemu_time += profile_getclock() - ti; | |
755 | #endif | |
756 | if (use_icount) { | |
757 | /* Fold pending instructions back into the | |
758 | instruction counter, and clear the interrupt flag. */ | |
759 | qemu_icount -= (env->icount_decr.u16.low | |
760 | + env->icount_extra); | |
761 | env->icount_decr.u32 = 0; | |
762 | env->icount_extra = 0; | |
763 | } | |
764 | return ret; | |
765 | } | |
766 | ||
767 | bool tcg_cpu_exec(void) | |
768 | { | |
769 | int ret = 0; | |
770 | ||
771 | if (next_cpu == NULL) | |
772 | next_cpu = first_cpu; | |
c629a4bc | 773 | for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) { |
296af7c9 BS |
774 | CPUState *env = cur_cpu = next_cpu; |
775 | ||
776 | qemu_clock_enable(vm_clock, | |
777 | (cur_cpu->singlestep_enabled & SSTEP_NOTIMER) == 0); | |
778 | ||
779 | if (qemu_alarm_pending()) | |
780 | break; | |
781 | if (cpu_can_run(env)) | |
782 | ret = qemu_cpu_exec(env); | |
783 | else if (env->stop) | |
784 | break; | |
785 | ||
786 | if (ret == EXCP_DEBUG) { | |
787 | gdb_set_stop_cpu(env); | |
788 | debug_requested = EXCP_DEBUG; | |
789 | break; | |
790 | } | |
791 | } | |
c629a4bc | 792 | exit_request = 0; |
296af7c9 BS |
793 | return tcg_has_work(); |
794 | } | |
795 | ||
796 | void set_numa_modes(void) | |
797 | { | |
798 | CPUState *env; | |
799 | int i; | |
800 | ||
801 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
802 | for (i = 0; i < nb_numa_nodes; i++) { | |
803 | if (node_cpumask[i] & (1 << env->cpu_index)) { | |
804 | env->numa_node = i; | |
805 | } | |
806 | } | |
807 | } | |
808 | } | |
809 | ||
810 | void set_cpu_log(const char *optarg) | |
811 | { | |
812 | int mask; | |
813 | const CPULogItem *item; | |
814 | ||
815 | mask = cpu_str_to_log_mask(optarg); | |
816 | if (!mask) { | |
817 | printf("Log items (comma separated):\n"); | |
818 | for (item = cpu_log_items; item->mask != 0; item++) { | |
819 | printf("%-10s %s\n", item->name, item->help); | |
820 | } | |
821 | exit(1); | |
822 | } | |
823 | cpu_set_log(mask); | |
824 | } | |
29e922b6 BS |
825 | |
826 | /* Return the virtual CPU time, based on the instruction counter. */ | |
827 | int64_t cpu_get_icount(void) | |
828 | { | |
829 | int64_t icount; | |
830 | CPUState *env = cpu_single_env;; | |
831 | ||
832 | icount = qemu_icount; | |
833 | if (env) { | |
834 | if (!can_do_io(env)) { | |
835 | fprintf(stderr, "Bad clock read\n"); | |
836 | } | |
837 | icount -= (env->icount_decr.u16.low + env->icount_extra); | |
838 | } | |
839 | return qemu_icount_bias + (icount << icount_time_shift); | |
840 | } | |
262353cb BS |
841 | |
842 | void list_cpus(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...), | |
843 | const char *optarg) | |
844 | { | |
845 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
846 | #if defined(cpu_list_id) | |
847 | cpu_list_id(f, cpu_fprintf, optarg); | |
848 | #elif defined(cpu_list) | |
849 | cpu_list(f, cpu_fprintf); /* deprecated */ | |
850 | #endif | |
851 | } |