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Commit | Line | Data |
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296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
26 | #include "config-host.h" | |
27 | ||
83c9089e | 28 | #include "monitor/monitor.h" |
9c17d615 | 29 | #include "sysemu/sysemu.h" |
022c62cb | 30 | #include "exec/gdbstub.h" |
9c17d615 PB |
31 | #include "sysemu/dma.h" |
32 | #include "sysemu/kvm.h" | |
de0b36b6 | 33 | #include "qmp-commands.h" |
296af7c9 | 34 | |
1de7afc9 | 35 | #include "qemu/thread.h" |
9c17d615 PB |
36 | #include "sysemu/cpus.h" |
37 | #include "sysemu/qtest.h" | |
1de7afc9 PB |
38 | #include "qemu/main-loop.h" |
39 | #include "qemu/bitmap.h" | |
0ff0fc19 JK |
40 | |
41 | #ifndef _WIN32 | |
1de7afc9 | 42 | #include "qemu/compatfd.h" |
0ff0fc19 | 43 | #endif |
296af7c9 | 44 | |
6d9cb73c JK |
45 | #ifdef CONFIG_LINUX |
46 | ||
47 | #include <sys/prctl.h> | |
48 | ||
c0532a76 MT |
49 | #ifndef PR_MCE_KILL |
50 | #define PR_MCE_KILL 33 | |
51 | #endif | |
52 | ||
6d9cb73c JK |
53 | #ifndef PR_MCE_KILL_SET |
54 | #define PR_MCE_KILL_SET 1 | |
55 | #endif | |
56 | ||
57 | #ifndef PR_MCE_KILL_EARLY | |
58 | #define PR_MCE_KILL_EARLY 1 | |
59 | #endif | |
60 | ||
61 | #endif /* CONFIG_LINUX */ | |
62 | ||
182735ef | 63 | static CPUState *next_cpu; |
296af7c9 | 64 | |
321bc0b2 TC |
65 | bool cpu_is_stopped(CPUState *cpu) |
66 | { | |
67 | return cpu->stopped || !runstate_is_running(); | |
68 | } | |
69 | ||
a98ae1d8 | 70 | static bool cpu_thread_is_idle(CPUState *cpu) |
ac873f1e | 71 | { |
c64ca814 | 72 | if (cpu->stop || cpu->queued_work_first) { |
ac873f1e PM |
73 | return false; |
74 | } | |
321bc0b2 | 75 | if (cpu_is_stopped(cpu)) { |
ac873f1e PM |
76 | return true; |
77 | } | |
259186a7 | 78 | if (!cpu->halted || qemu_cpu_has_work(cpu) || |
215e79c0 | 79 | kvm_halt_in_kernel()) { |
ac873f1e PM |
80 | return false; |
81 | } | |
82 | return true; | |
83 | } | |
84 | ||
85 | static bool all_cpu_threads_idle(void) | |
86 | { | |
182735ef | 87 | CPUState *cpu; |
ac873f1e | 88 | |
bdc44640 | 89 | CPU_FOREACH(cpu) { |
182735ef | 90 | if (!cpu_thread_is_idle(cpu)) { |
ac873f1e PM |
91 | return false; |
92 | } | |
93 | } | |
94 | return true; | |
95 | } | |
96 | ||
946fb27c PB |
97 | /***********************************************************/ |
98 | /* guest cycle counter */ | |
99 | ||
100 | /* Conversion factor from emulated instructions to virtual clock ticks. */ | |
101 | static int icount_time_shift; | |
102 | /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ | |
103 | #define MAX_ICOUNT_SHIFT 10 | |
104 | /* Compensate for varying guest execution speed. */ | |
105 | static int64_t qemu_icount_bias; | |
106 | static QEMUTimer *icount_rt_timer; | |
107 | static QEMUTimer *icount_vm_timer; | |
108 | static QEMUTimer *icount_warp_timer; | |
109 | static int64_t vm_clock_warp_start; | |
110 | static int64_t qemu_icount; | |
111 | ||
112 | typedef struct TimersState { | |
113 | int64_t cpu_ticks_prev; | |
114 | int64_t cpu_ticks_offset; | |
115 | int64_t cpu_clock_offset; | |
116 | int32_t cpu_ticks_enabled; | |
117 | int64_t dummy; | |
118 | } TimersState; | |
119 | ||
d9cd4007 | 120 | static TimersState timers_state; |
946fb27c PB |
121 | |
122 | /* Return the virtual CPU time, based on the instruction counter. */ | |
123 | int64_t cpu_get_icount(void) | |
124 | { | |
125 | int64_t icount; | |
4917cf44 | 126 | CPUState *cpu = current_cpu; |
946fb27c PB |
127 | |
128 | icount = qemu_icount; | |
4917cf44 AF |
129 | if (cpu) { |
130 | CPUArchState *env = cpu->env_ptr; | |
946fb27c PB |
131 | if (!can_do_io(env)) { |
132 | fprintf(stderr, "Bad clock read\n"); | |
133 | } | |
134 | icount -= (env->icount_decr.u16.low + env->icount_extra); | |
135 | } | |
136 | return qemu_icount_bias + (icount << icount_time_shift); | |
137 | } | |
138 | ||
139 | /* return the host CPU cycle counter and handle stop/restart */ | |
140 | int64_t cpu_get_ticks(void) | |
141 | { | |
142 | if (use_icount) { | |
143 | return cpu_get_icount(); | |
144 | } | |
145 | if (!timers_state.cpu_ticks_enabled) { | |
146 | return timers_state.cpu_ticks_offset; | |
147 | } else { | |
148 | int64_t ticks; | |
149 | ticks = cpu_get_real_ticks(); | |
150 | if (timers_state.cpu_ticks_prev > ticks) { | |
151 | /* Note: non increasing ticks may happen if the host uses | |
152 | software suspend */ | |
153 | timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks; | |
154 | } | |
155 | timers_state.cpu_ticks_prev = ticks; | |
156 | return ticks + timers_state.cpu_ticks_offset; | |
157 | } | |
158 | } | |
159 | ||
160 | /* return the host CPU monotonic timer and handle stop/restart */ | |
161 | int64_t cpu_get_clock(void) | |
162 | { | |
163 | int64_t ti; | |
164 | if (!timers_state.cpu_ticks_enabled) { | |
165 | return timers_state.cpu_clock_offset; | |
166 | } else { | |
167 | ti = get_clock(); | |
168 | return ti + timers_state.cpu_clock_offset; | |
169 | } | |
170 | } | |
171 | ||
172 | /* enable cpu_get_ticks() */ | |
173 | void cpu_enable_ticks(void) | |
174 | { | |
175 | if (!timers_state.cpu_ticks_enabled) { | |
176 | timers_state.cpu_ticks_offset -= cpu_get_real_ticks(); | |
177 | timers_state.cpu_clock_offset -= get_clock(); | |
178 | timers_state.cpu_ticks_enabled = 1; | |
179 | } | |
180 | } | |
181 | ||
182 | /* disable cpu_get_ticks() : the clock is stopped. You must not call | |
183 | cpu_get_ticks() after that. */ | |
184 | void cpu_disable_ticks(void) | |
185 | { | |
186 | if (timers_state.cpu_ticks_enabled) { | |
187 | timers_state.cpu_ticks_offset = cpu_get_ticks(); | |
188 | timers_state.cpu_clock_offset = cpu_get_clock(); | |
189 | timers_state.cpu_ticks_enabled = 0; | |
190 | } | |
191 | } | |
192 | ||
193 | /* Correlation between real and virtual time is always going to be | |
194 | fairly approximate, so ignore small variation. | |
195 | When the guest is idle real and virtual time will be aligned in | |
196 | the IO wait loop. */ | |
197 | #define ICOUNT_WOBBLE (get_ticks_per_sec() / 10) | |
198 | ||
199 | static void icount_adjust(void) | |
200 | { | |
201 | int64_t cur_time; | |
202 | int64_t cur_icount; | |
203 | int64_t delta; | |
204 | static int64_t last_delta; | |
205 | /* If the VM is not running, then do nothing. */ | |
206 | if (!runstate_is_running()) { | |
207 | return; | |
208 | } | |
209 | cur_time = cpu_get_clock(); | |
40daca54 | 210 | cur_icount = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
946fb27c PB |
211 | delta = cur_icount - cur_time; |
212 | /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */ | |
213 | if (delta > 0 | |
214 | && last_delta + ICOUNT_WOBBLE < delta * 2 | |
215 | && icount_time_shift > 0) { | |
216 | /* The guest is getting too far ahead. Slow time down. */ | |
217 | icount_time_shift--; | |
218 | } | |
219 | if (delta < 0 | |
220 | && last_delta - ICOUNT_WOBBLE > delta * 2 | |
221 | && icount_time_shift < MAX_ICOUNT_SHIFT) { | |
222 | /* The guest is getting too far behind. Speed time up. */ | |
223 | icount_time_shift++; | |
224 | } | |
225 | last_delta = delta; | |
226 | qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift); | |
227 | } | |
228 | ||
229 | static void icount_adjust_rt(void *opaque) | |
230 | { | |
40daca54 AB |
231 | timer_mod(icount_rt_timer, |
232 | qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000); | |
946fb27c PB |
233 | icount_adjust(); |
234 | } | |
235 | ||
236 | static void icount_adjust_vm(void *opaque) | |
237 | { | |
40daca54 AB |
238 | timer_mod(icount_vm_timer, |
239 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
240 | get_ticks_per_sec() / 10); | |
946fb27c PB |
241 | icount_adjust(); |
242 | } | |
243 | ||
244 | static int64_t qemu_icount_round(int64_t count) | |
245 | { | |
246 | return (count + (1 << icount_time_shift) - 1) >> icount_time_shift; | |
247 | } | |
248 | ||
249 | static void icount_warp_rt(void *opaque) | |
250 | { | |
251 | if (vm_clock_warp_start == -1) { | |
252 | return; | |
253 | } | |
254 | ||
255 | if (runstate_is_running()) { | |
40daca54 | 256 | int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
946fb27c PB |
257 | int64_t warp_delta = clock - vm_clock_warp_start; |
258 | if (use_icount == 1) { | |
259 | qemu_icount_bias += warp_delta; | |
260 | } else { | |
261 | /* | |
40daca54 | 262 | * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too |
946fb27c PB |
263 | * far ahead of real time. |
264 | */ | |
265 | int64_t cur_time = cpu_get_clock(); | |
40daca54 | 266 | int64_t cur_icount = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
946fb27c PB |
267 | int64_t delta = cur_time - cur_icount; |
268 | qemu_icount_bias += MIN(warp_delta, delta); | |
269 | } | |
40daca54 AB |
270 | if (qemu_clock_expired(QEMU_CLOCK_VIRTUAL)) { |
271 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); | |
946fb27c PB |
272 | } |
273 | } | |
274 | vm_clock_warp_start = -1; | |
275 | } | |
276 | ||
8156be56 PB |
277 | void qtest_clock_warp(int64_t dest) |
278 | { | |
40daca54 | 279 | int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
280 | assert(qtest_enabled()); |
281 | while (clock < dest) { | |
40daca54 | 282 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
283 | int64_t warp = MIN(dest - clock, deadline); |
284 | qemu_icount_bias += warp; | |
40daca54 AB |
285 | qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL); |
286 | clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); | |
8156be56 | 287 | } |
40daca54 | 288 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
289 | } |
290 | ||
40daca54 | 291 | void qemu_clock_warp(QEMUClockType type) |
946fb27c PB |
292 | { |
293 | int64_t deadline; | |
294 | ||
295 | /* | |
296 | * There are too many global variables to make the "warp" behavior | |
297 | * applicable to other clocks. But a clock argument removes the | |
298 | * need for if statements all over the place. | |
299 | */ | |
40daca54 | 300 | if (type != QEMU_CLOCK_VIRTUAL || !use_icount) { |
946fb27c PB |
301 | return; |
302 | } | |
303 | ||
304 | /* | |
40daca54 AB |
305 | * If the CPUs have been sleeping, advance QEMU_CLOCK_VIRTUAL timer now. |
306 | * This ensures that the deadline for the timer is computed correctly below. | |
946fb27c PB |
307 | * This also makes sure that the insn counter is synchronized before the |
308 | * CPU starts running, in case the CPU is woken by an event other than | |
40daca54 | 309 | * the earliest QEMU_CLOCK_VIRTUAL timer. |
946fb27c PB |
310 | */ |
311 | icount_warp_rt(NULL); | |
40daca54 AB |
312 | if (!all_cpu_threads_idle() || !qemu_clock_has_timers(QEMU_CLOCK_VIRTUAL)) { |
313 | timer_del(icount_warp_timer); | |
946fb27c PB |
314 | return; |
315 | } | |
316 | ||
8156be56 PB |
317 | if (qtest_enabled()) { |
318 | /* When testing, qtest commands advance icount. */ | |
319 | return; | |
320 | } | |
321 | ||
40daca54 | 322 | vm_clock_warp_start = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); |
ac70aafc | 323 | /* We want to use the earliest deadline from ALL vm_clocks */ |
40daca54 | 324 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
325 | |
326 | /* Maintain prior (possibly buggy) behaviour where if no deadline | |
40daca54 | 327 | * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than |
ac70aafc AB |
328 | * INT32_MAX nanoseconds ahead, we still use INT32_MAX |
329 | * nanoseconds. | |
330 | */ | |
331 | if ((deadline < 0) || (deadline > INT32_MAX)) { | |
332 | deadline = INT32_MAX; | |
333 | } | |
334 | ||
946fb27c PB |
335 | if (deadline > 0) { |
336 | /* | |
40daca54 | 337 | * Ensure QEMU_CLOCK_VIRTUAL proceeds even when the virtual CPU goes to |
946fb27c PB |
338 | * sleep. Otherwise, the CPU might be waiting for a future timer |
339 | * interrupt to wake it up, but the interrupt never comes because | |
340 | * the vCPU isn't running any insns and thus doesn't advance the | |
40daca54 | 341 | * QEMU_CLOCK_VIRTUAL. |
946fb27c PB |
342 | * |
343 | * An extreme solution for this problem would be to never let VCPUs | |
40daca54 AB |
344 | * sleep in icount mode if there is a pending QEMU_CLOCK_VIRTUAL |
345 | * timer; rather time could just advance to the next QEMU_CLOCK_VIRTUAL | |
346 | * event. Instead, we do stop VCPUs and only advance QEMU_CLOCK_VIRTUAL | |
347 | * after some e"real" time, (related to the time left until the next | |
348 | * event) has passed. The QEMU_CLOCK_REALTIME timer will do this. | |
349 | * This avoids that the warps are visible externally; for example, | |
350 | * you will not be sending network packets continuously instead of | |
351 | * every 100ms. | |
946fb27c | 352 | */ |
40daca54 | 353 | timer_mod(icount_warp_timer, vm_clock_warp_start + deadline); |
ac70aafc | 354 | } else if (deadline == 0) { |
40daca54 | 355 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
946fb27c PB |
356 | } |
357 | } | |
358 | ||
359 | static const VMStateDescription vmstate_timers = { | |
360 | .name = "timer", | |
361 | .version_id = 2, | |
362 | .minimum_version_id = 1, | |
363 | .minimum_version_id_old = 1, | |
364 | .fields = (VMStateField[]) { | |
365 | VMSTATE_INT64(cpu_ticks_offset, TimersState), | |
366 | VMSTATE_INT64(dummy, TimersState), | |
367 | VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2), | |
368 | VMSTATE_END_OF_LIST() | |
369 | } | |
370 | }; | |
371 | ||
372 | void configure_icount(const char *option) | |
373 | { | |
374 | vmstate_register(NULL, 0, &vmstate_timers, &timers_state); | |
375 | if (!option) { | |
376 | return; | |
377 | } | |
378 | ||
40daca54 AB |
379 | icount_warp_timer = timer_new_ns(QEMU_CLOCK_REALTIME, |
380 | icount_warp_rt, NULL); | |
946fb27c PB |
381 | if (strcmp(option, "auto") != 0) { |
382 | icount_time_shift = strtol(option, NULL, 0); | |
383 | use_icount = 1; | |
384 | return; | |
385 | } | |
386 | ||
387 | use_icount = 2; | |
388 | ||
389 | /* 125MIPS seems a reasonable initial guess at the guest speed. | |
390 | It will be corrected fairly quickly anyway. */ | |
391 | icount_time_shift = 3; | |
392 | ||
393 | /* Have both realtime and virtual time triggers for speed adjustment. | |
394 | The realtime trigger catches emulated time passing too slowly, | |
395 | the virtual time trigger catches emulated time passing too fast. | |
396 | Realtime triggers occur even when idle, so use them less frequently | |
397 | than VM triggers. */ | |
40daca54 AB |
398 | icount_rt_timer = timer_new_ms(QEMU_CLOCK_REALTIME, |
399 | icount_adjust_rt, NULL); | |
400 | timer_mod(icount_rt_timer, | |
401 | qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + 1000); | |
402 | icount_vm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, | |
403 | icount_adjust_vm, NULL); | |
404 | timer_mod(icount_vm_timer, | |
405 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
406 | get_ticks_per_sec() / 10); | |
946fb27c PB |
407 | } |
408 | ||
296af7c9 BS |
409 | /***********************************************************/ |
410 | void hw_error(const char *fmt, ...) | |
411 | { | |
412 | va_list ap; | |
55e5c285 | 413 | CPUState *cpu; |
296af7c9 BS |
414 | |
415 | va_start(ap, fmt); | |
416 | fprintf(stderr, "qemu: hardware error: "); | |
417 | vfprintf(stderr, fmt, ap); | |
418 | fprintf(stderr, "\n"); | |
bdc44640 | 419 | CPU_FOREACH(cpu) { |
55e5c285 | 420 | fprintf(stderr, "CPU #%d:\n", cpu->cpu_index); |
878096ee | 421 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU); |
296af7c9 BS |
422 | } |
423 | va_end(ap); | |
424 | abort(); | |
425 | } | |
426 | ||
427 | void cpu_synchronize_all_states(void) | |
428 | { | |
182735ef | 429 | CPUState *cpu; |
296af7c9 | 430 | |
bdc44640 | 431 | CPU_FOREACH(cpu) { |
182735ef | 432 | cpu_synchronize_state(cpu); |
296af7c9 BS |
433 | } |
434 | } | |
435 | ||
436 | void cpu_synchronize_all_post_reset(void) | |
437 | { | |
182735ef | 438 | CPUState *cpu; |
296af7c9 | 439 | |
bdc44640 | 440 | CPU_FOREACH(cpu) { |
182735ef | 441 | cpu_synchronize_post_reset(cpu); |
296af7c9 BS |
442 | } |
443 | } | |
444 | ||
445 | void cpu_synchronize_all_post_init(void) | |
446 | { | |
182735ef | 447 | CPUState *cpu; |
296af7c9 | 448 | |
bdc44640 | 449 | CPU_FOREACH(cpu) { |
182735ef | 450 | cpu_synchronize_post_init(cpu); |
296af7c9 BS |
451 | } |
452 | } | |
453 | ||
56983463 | 454 | static int do_vm_stop(RunState state) |
296af7c9 | 455 | { |
56983463 KW |
456 | int ret = 0; |
457 | ||
1354869c | 458 | if (runstate_is_running()) { |
296af7c9 | 459 | cpu_disable_ticks(); |
296af7c9 | 460 | pause_all_vcpus(); |
f5bbfba1 | 461 | runstate_set(state); |
1dfb4dd9 | 462 | vm_state_notify(0, state); |
296af7c9 BS |
463 | monitor_protocol_event(QEVENT_STOP, NULL); |
464 | } | |
56983463 | 465 | |
594a45ce KW |
466 | bdrv_drain_all(); |
467 | ret = bdrv_flush_all(); | |
468 | ||
56983463 | 469 | return ret; |
296af7c9 BS |
470 | } |
471 | ||
a1fcaa73 | 472 | static bool cpu_can_run(CPUState *cpu) |
296af7c9 | 473 | { |
4fdeee7c | 474 | if (cpu->stop) { |
a1fcaa73 | 475 | return false; |
0ab07c62 | 476 | } |
321bc0b2 | 477 | if (cpu_is_stopped(cpu)) { |
a1fcaa73 | 478 | return false; |
0ab07c62 | 479 | } |
a1fcaa73 | 480 | return true; |
296af7c9 BS |
481 | } |
482 | ||
91325046 | 483 | static void cpu_handle_guest_debug(CPUState *cpu) |
83f338f7 | 484 | { |
64f6b346 | 485 | gdb_set_stop_cpu(cpu); |
8cf71710 | 486 | qemu_system_debug_request(); |
f324e766 | 487 | cpu->stopped = true; |
3c638d06 JK |
488 | } |
489 | ||
714bd040 PB |
490 | static void cpu_signal(int sig) |
491 | { | |
4917cf44 AF |
492 | if (current_cpu) { |
493 | cpu_exit(current_cpu); | |
714bd040 PB |
494 | } |
495 | exit_request = 1; | |
496 | } | |
714bd040 | 497 | |
6d9cb73c JK |
498 | #ifdef CONFIG_LINUX |
499 | static void sigbus_reraise(void) | |
500 | { | |
501 | sigset_t set; | |
502 | struct sigaction action; | |
503 | ||
504 | memset(&action, 0, sizeof(action)); | |
505 | action.sa_handler = SIG_DFL; | |
506 | if (!sigaction(SIGBUS, &action, NULL)) { | |
507 | raise(SIGBUS); | |
508 | sigemptyset(&set); | |
509 | sigaddset(&set, SIGBUS); | |
510 | sigprocmask(SIG_UNBLOCK, &set, NULL); | |
511 | } | |
512 | perror("Failed to re-raise SIGBUS!\n"); | |
513 | abort(); | |
514 | } | |
515 | ||
516 | static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo, | |
517 | void *ctx) | |
518 | { | |
519 | if (kvm_on_sigbus(siginfo->ssi_code, | |
520 | (void *)(intptr_t)siginfo->ssi_addr)) { | |
521 | sigbus_reraise(); | |
522 | } | |
523 | } | |
524 | ||
525 | static void qemu_init_sigbus(void) | |
526 | { | |
527 | struct sigaction action; | |
528 | ||
529 | memset(&action, 0, sizeof(action)); | |
530 | action.sa_flags = SA_SIGINFO; | |
531 | action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler; | |
532 | sigaction(SIGBUS, &action, NULL); | |
533 | ||
534 | prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0); | |
535 | } | |
536 | ||
290adf38 | 537 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
538 | { |
539 | struct timespec ts = { 0, 0 }; | |
540 | siginfo_t siginfo; | |
541 | sigset_t waitset; | |
542 | sigset_t chkset; | |
543 | int r; | |
544 | ||
545 | sigemptyset(&waitset); | |
546 | sigaddset(&waitset, SIG_IPI); | |
547 | sigaddset(&waitset, SIGBUS); | |
548 | ||
549 | do { | |
550 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
551 | if (r == -1 && !(errno == EAGAIN || errno == EINTR)) { | |
552 | perror("sigtimedwait"); | |
553 | exit(1); | |
554 | } | |
555 | ||
556 | switch (r) { | |
557 | case SIGBUS: | |
290adf38 | 558 | if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) { |
1ab3c6c0 JK |
559 | sigbus_reraise(); |
560 | } | |
561 | break; | |
562 | default: | |
563 | break; | |
564 | } | |
565 | ||
566 | r = sigpending(&chkset); | |
567 | if (r == -1) { | |
568 | perror("sigpending"); | |
569 | exit(1); | |
570 | } | |
571 | } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS)); | |
1ab3c6c0 JK |
572 | } |
573 | ||
6d9cb73c JK |
574 | #else /* !CONFIG_LINUX */ |
575 | ||
576 | static void qemu_init_sigbus(void) | |
577 | { | |
578 | } | |
1ab3c6c0 | 579 | |
290adf38 | 580 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
581 | { |
582 | } | |
6d9cb73c JK |
583 | #endif /* !CONFIG_LINUX */ |
584 | ||
296af7c9 | 585 | #ifndef _WIN32 |
55f8d6ac JK |
586 | static void dummy_signal(int sig) |
587 | { | |
588 | } | |
55f8d6ac | 589 | |
13618e05 | 590 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
714bd040 PB |
591 | { |
592 | int r; | |
593 | sigset_t set; | |
594 | struct sigaction sigact; | |
595 | ||
596 | memset(&sigact, 0, sizeof(sigact)); | |
597 | sigact.sa_handler = dummy_signal; | |
598 | sigaction(SIG_IPI, &sigact, NULL); | |
599 | ||
714bd040 PB |
600 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
601 | sigdelset(&set, SIG_IPI); | |
714bd040 | 602 | sigdelset(&set, SIGBUS); |
491d6e80 | 603 | r = kvm_set_signal_mask(cpu, &set); |
714bd040 PB |
604 | if (r) { |
605 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
606 | exit(1); | |
607 | } | |
608 | } | |
609 | ||
610 | static void qemu_tcg_init_cpu_signals(void) | |
611 | { | |
714bd040 PB |
612 | sigset_t set; |
613 | struct sigaction sigact; | |
614 | ||
615 | memset(&sigact, 0, sizeof(sigact)); | |
616 | sigact.sa_handler = cpu_signal; | |
617 | sigaction(SIG_IPI, &sigact, NULL); | |
618 | ||
619 | sigemptyset(&set); | |
620 | sigaddset(&set, SIG_IPI); | |
621 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
714bd040 PB |
622 | } |
623 | ||
55f8d6ac | 624 | #else /* _WIN32 */ |
13618e05 | 625 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
ff48eb5f | 626 | { |
714bd040 PB |
627 | abort(); |
628 | } | |
ff48eb5f | 629 | |
714bd040 PB |
630 | static void qemu_tcg_init_cpu_signals(void) |
631 | { | |
ff48eb5f | 632 | } |
714bd040 | 633 | #endif /* _WIN32 */ |
ff48eb5f | 634 | |
b2532d88 | 635 | static QemuMutex qemu_global_mutex; |
46daff13 PB |
636 | static QemuCond qemu_io_proceeded_cond; |
637 | static bool iothread_requesting_mutex; | |
296af7c9 BS |
638 | |
639 | static QemuThread io_thread; | |
640 | ||
641 | static QemuThread *tcg_cpu_thread; | |
642 | static QemuCond *tcg_halt_cond; | |
643 | ||
296af7c9 BS |
644 | /* cpu creation */ |
645 | static QemuCond qemu_cpu_cond; | |
646 | /* system init */ | |
296af7c9 | 647 | static QemuCond qemu_pause_cond; |
e82bcec2 | 648 | static QemuCond qemu_work_cond; |
296af7c9 | 649 | |
d3b12f5d | 650 | void qemu_init_cpu_loop(void) |
296af7c9 | 651 | { |
6d9cb73c | 652 | qemu_init_sigbus(); |
ed94592b | 653 | qemu_cond_init(&qemu_cpu_cond); |
ed94592b AL |
654 | qemu_cond_init(&qemu_pause_cond); |
655 | qemu_cond_init(&qemu_work_cond); | |
46daff13 | 656 | qemu_cond_init(&qemu_io_proceeded_cond); |
296af7c9 | 657 | qemu_mutex_init(&qemu_global_mutex); |
296af7c9 | 658 | |
b7680cb6 | 659 | qemu_thread_get_self(&io_thread); |
296af7c9 BS |
660 | } |
661 | ||
f100f0b3 | 662 | void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
e82bcec2 MT |
663 | { |
664 | struct qemu_work_item wi; | |
665 | ||
60e82579 | 666 | if (qemu_cpu_is_self(cpu)) { |
e82bcec2 MT |
667 | func(data); |
668 | return; | |
669 | } | |
670 | ||
671 | wi.func = func; | |
672 | wi.data = data; | |
3c02270d | 673 | wi.free = false; |
c64ca814 AF |
674 | if (cpu->queued_work_first == NULL) { |
675 | cpu->queued_work_first = &wi; | |
0ab07c62 | 676 | } else { |
c64ca814 | 677 | cpu->queued_work_last->next = &wi; |
0ab07c62 | 678 | } |
c64ca814 | 679 | cpu->queued_work_last = &wi; |
e82bcec2 MT |
680 | wi.next = NULL; |
681 | wi.done = false; | |
682 | ||
c08d7424 | 683 | qemu_cpu_kick(cpu); |
e82bcec2 | 684 | while (!wi.done) { |
4917cf44 | 685 | CPUState *self_cpu = current_cpu; |
e82bcec2 MT |
686 | |
687 | qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex); | |
4917cf44 | 688 | current_cpu = self_cpu; |
e82bcec2 MT |
689 | } |
690 | } | |
691 | ||
3c02270d CV |
692 | void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) |
693 | { | |
694 | struct qemu_work_item *wi; | |
695 | ||
696 | if (qemu_cpu_is_self(cpu)) { | |
697 | func(data); | |
698 | return; | |
699 | } | |
700 | ||
701 | wi = g_malloc0(sizeof(struct qemu_work_item)); | |
702 | wi->func = func; | |
703 | wi->data = data; | |
704 | wi->free = true; | |
705 | if (cpu->queued_work_first == NULL) { | |
706 | cpu->queued_work_first = wi; | |
707 | } else { | |
708 | cpu->queued_work_last->next = wi; | |
709 | } | |
710 | cpu->queued_work_last = wi; | |
711 | wi->next = NULL; | |
712 | wi->done = false; | |
713 | ||
714 | qemu_cpu_kick(cpu); | |
715 | } | |
716 | ||
6d45b109 | 717 | static void flush_queued_work(CPUState *cpu) |
e82bcec2 MT |
718 | { |
719 | struct qemu_work_item *wi; | |
720 | ||
c64ca814 | 721 | if (cpu->queued_work_first == NULL) { |
e82bcec2 | 722 | return; |
0ab07c62 | 723 | } |
e82bcec2 | 724 | |
c64ca814 AF |
725 | while ((wi = cpu->queued_work_first)) { |
726 | cpu->queued_work_first = wi->next; | |
e82bcec2 MT |
727 | wi->func(wi->data); |
728 | wi->done = true; | |
3c02270d CV |
729 | if (wi->free) { |
730 | g_free(wi); | |
731 | } | |
e82bcec2 | 732 | } |
c64ca814 | 733 | cpu->queued_work_last = NULL; |
e82bcec2 MT |
734 | qemu_cond_broadcast(&qemu_work_cond); |
735 | } | |
736 | ||
509a0d78 | 737 | static void qemu_wait_io_event_common(CPUState *cpu) |
296af7c9 | 738 | { |
4fdeee7c AF |
739 | if (cpu->stop) { |
740 | cpu->stop = false; | |
f324e766 | 741 | cpu->stopped = true; |
296af7c9 BS |
742 | qemu_cond_signal(&qemu_pause_cond); |
743 | } | |
6d45b109 | 744 | flush_queued_work(cpu); |
216fc9a4 | 745 | cpu->thread_kicked = false; |
296af7c9 BS |
746 | } |
747 | ||
6cabe1f3 | 748 | static void qemu_tcg_wait_io_event(void) |
296af7c9 | 749 | { |
182735ef | 750 | CPUState *cpu; |
6cabe1f3 | 751 | |
16400322 | 752 | while (all_cpu_threads_idle()) { |
ab33fcda PB |
753 | /* Start accounting real time to the virtual clock if the CPUs |
754 | are idle. */ | |
40daca54 | 755 | qemu_clock_warp(QEMU_CLOCK_VIRTUAL); |
9705fbb5 | 756 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
16400322 | 757 | } |
296af7c9 | 758 | |
46daff13 PB |
759 | while (iothread_requesting_mutex) { |
760 | qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex); | |
761 | } | |
6cabe1f3 | 762 | |
bdc44640 | 763 | CPU_FOREACH(cpu) { |
182735ef | 764 | qemu_wait_io_event_common(cpu); |
6cabe1f3 | 765 | } |
296af7c9 BS |
766 | } |
767 | ||
fd529e8f | 768 | static void qemu_kvm_wait_io_event(CPUState *cpu) |
296af7c9 | 769 | { |
a98ae1d8 | 770 | while (cpu_thread_is_idle(cpu)) { |
f5c121b8 | 771 | qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); |
16400322 | 772 | } |
296af7c9 | 773 | |
290adf38 | 774 | qemu_kvm_eat_signals(cpu); |
509a0d78 | 775 | qemu_wait_io_event_common(cpu); |
296af7c9 BS |
776 | } |
777 | ||
7e97cd88 | 778 | static void *qemu_kvm_cpu_thread_fn(void *arg) |
296af7c9 | 779 | { |
48a106bd | 780 | CPUState *cpu = arg; |
84b4915d | 781 | int r; |
296af7c9 | 782 | |
6164e6d6 | 783 | qemu_mutex_lock(&qemu_global_mutex); |
814e612e | 784 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 785 | cpu->thread_id = qemu_get_thread_id(); |
4917cf44 | 786 | current_cpu = cpu; |
296af7c9 | 787 | |
504134d2 | 788 | r = kvm_init_vcpu(cpu); |
84b4915d JK |
789 | if (r < 0) { |
790 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
791 | exit(1); | |
792 | } | |
296af7c9 | 793 | |
13618e05 | 794 | qemu_kvm_init_cpu_signals(cpu); |
296af7c9 BS |
795 | |
796 | /* signal CPU creation */ | |
61a46217 | 797 | cpu->created = true; |
296af7c9 BS |
798 | qemu_cond_signal(&qemu_cpu_cond); |
799 | ||
296af7c9 | 800 | while (1) { |
a1fcaa73 | 801 | if (cpu_can_run(cpu)) { |
1458c363 | 802 | r = kvm_cpu_exec(cpu); |
83f338f7 | 803 | if (r == EXCP_DEBUG) { |
91325046 | 804 | cpu_handle_guest_debug(cpu); |
83f338f7 | 805 | } |
0ab07c62 | 806 | } |
fd529e8f | 807 | qemu_kvm_wait_io_event(cpu); |
296af7c9 BS |
808 | } |
809 | ||
810 | return NULL; | |
811 | } | |
812 | ||
c7f0f3b1 AL |
813 | static void *qemu_dummy_cpu_thread_fn(void *arg) |
814 | { | |
815 | #ifdef _WIN32 | |
816 | fprintf(stderr, "qtest is not supported under Windows\n"); | |
817 | exit(1); | |
818 | #else | |
10a9021d | 819 | CPUState *cpu = arg; |
c7f0f3b1 AL |
820 | sigset_t waitset; |
821 | int r; | |
822 | ||
823 | qemu_mutex_lock_iothread(); | |
814e612e | 824 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 825 | cpu->thread_id = qemu_get_thread_id(); |
c7f0f3b1 AL |
826 | |
827 | sigemptyset(&waitset); | |
828 | sigaddset(&waitset, SIG_IPI); | |
829 | ||
830 | /* signal CPU creation */ | |
61a46217 | 831 | cpu->created = true; |
c7f0f3b1 AL |
832 | qemu_cond_signal(&qemu_cpu_cond); |
833 | ||
4917cf44 | 834 | current_cpu = cpu; |
c7f0f3b1 | 835 | while (1) { |
4917cf44 | 836 | current_cpu = NULL; |
c7f0f3b1 AL |
837 | qemu_mutex_unlock_iothread(); |
838 | do { | |
839 | int sig; | |
840 | r = sigwait(&waitset, &sig); | |
841 | } while (r == -1 && (errno == EAGAIN || errno == EINTR)); | |
842 | if (r == -1) { | |
843 | perror("sigwait"); | |
844 | exit(1); | |
845 | } | |
846 | qemu_mutex_lock_iothread(); | |
4917cf44 | 847 | current_cpu = cpu; |
509a0d78 | 848 | qemu_wait_io_event_common(cpu); |
c7f0f3b1 AL |
849 | } |
850 | ||
851 | return NULL; | |
852 | #endif | |
853 | } | |
854 | ||
bdb7ca67 JK |
855 | static void tcg_exec_all(void); |
856 | ||
7e97cd88 | 857 | static void *qemu_tcg_cpu_thread_fn(void *arg) |
296af7c9 | 858 | { |
c3586ba7 | 859 | CPUState *cpu = arg; |
296af7c9 | 860 | |
55f8d6ac | 861 | qemu_tcg_init_cpu_signals(); |
814e612e | 862 | qemu_thread_get_self(cpu->thread); |
296af7c9 | 863 | |
296af7c9 | 864 | qemu_mutex_lock(&qemu_global_mutex); |
38fcbd3f AF |
865 | CPU_FOREACH(cpu) { |
866 | cpu->thread_id = qemu_get_thread_id(); | |
867 | cpu->created = true; | |
868 | } | |
296af7c9 BS |
869 | qemu_cond_signal(&qemu_cpu_cond); |
870 | ||
fa7d1867 | 871 | /* wait for initial kick-off after machine start */ |
bdc44640 | 872 | while (QTAILQ_FIRST(&cpus)->stopped) { |
fa7d1867 | 873 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
8e564b4e JK |
874 | |
875 | /* process any pending work */ | |
bdc44640 | 876 | CPU_FOREACH(cpu) { |
182735ef | 877 | qemu_wait_io_event_common(cpu); |
8e564b4e | 878 | } |
0ab07c62 | 879 | } |
296af7c9 BS |
880 | |
881 | while (1) { | |
bdb7ca67 | 882 | tcg_exec_all(); |
ac70aafc AB |
883 | |
884 | if (use_icount) { | |
40daca54 | 885 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
886 | |
887 | if (deadline == 0) { | |
40daca54 | 888 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
ac70aafc | 889 | } |
3b2319a3 | 890 | } |
6cabe1f3 | 891 | qemu_tcg_wait_io_event(); |
296af7c9 BS |
892 | } |
893 | ||
894 | return NULL; | |
895 | } | |
896 | ||
2ff09a40 | 897 | static void qemu_cpu_kick_thread(CPUState *cpu) |
cc015e9a PB |
898 | { |
899 | #ifndef _WIN32 | |
900 | int err; | |
901 | ||
814e612e | 902 | err = pthread_kill(cpu->thread->thread, SIG_IPI); |
cc015e9a PB |
903 | if (err) { |
904 | fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); | |
905 | exit(1); | |
906 | } | |
907 | #else /* _WIN32 */ | |
60e82579 | 908 | if (!qemu_cpu_is_self(cpu)) { |
ed9164a3 OH |
909 | CONTEXT tcgContext; |
910 | ||
911 | if (SuspendThread(cpu->hThread) == (DWORD)-1) { | |
7f1721df | 912 | fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__, |
ed9164a3 OH |
913 | GetLastError()); |
914 | exit(1); | |
915 | } | |
916 | ||
917 | /* On multi-core systems, we are not sure that the thread is actually | |
918 | * suspended until we can get the context. | |
919 | */ | |
920 | tcgContext.ContextFlags = CONTEXT_CONTROL; | |
921 | while (GetThreadContext(cpu->hThread, &tcgContext) != 0) { | |
922 | continue; | |
923 | } | |
924 | ||
cc015e9a | 925 | cpu_signal(0); |
ed9164a3 OH |
926 | |
927 | if (ResumeThread(cpu->hThread) == (DWORD)-1) { | |
7f1721df | 928 | fprintf(stderr, "qemu:%s: GetLastError:%lu\n", __func__, |
ed9164a3 OH |
929 | GetLastError()); |
930 | exit(1); | |
931 | } | |
cc015e9a PB |
932 | } |
933 | #endif | |
934 | } | |
935 | ||
c08d7424 | 936 | void qemu_cpu_kick(CPUState *cpu) |
296af7c9 | 937 | { |
f5c121b8 | 938 | qemu_cond_broadcast(cpu->halt_cond); |
216fc9a4 | 939 | if (!tcg_enabled() && !cpu->thread_kicked) { |
2ff09a40 | 940 | qemu_cpu_kick_thread(cpu); |
216fc9a4 | 941 | cpu->thread_kicked = true; |
aa2c364b | 942 | } |
296af7c9 BS |
943 | } |
944 | ||
46d62fac | 945 | void qemu_cpu_kick_self(void) |
296af7c9 | 946 | { |
b55c22c6 | 947 | #ifndef _WIN32 |
4917cf44 | 948 | assert(current_cpu); |
296af7c9 | 949 | |
4917cf44 AF |
950 | if (!current_cpu->thread_kicked) { |
951 | qemu_cpu_kick_thread(current_cpu); | |
952 | current_cpu->thread_kicked = true; | |
296af7c9 | 953 | } |
b55c22c6 PB |
954 | #else |
955 | abort(); | |
956 | #endif | |
296af7c9 BS |
957 | } |
958 | ||
60e82579 | 959 | bool qemu_cpu_is_self(CPUState *cpu) |
296af7c9 | 960 | { |
814e612e | 961 | return qemu_thread_is_self(cpu->thread); |
296af7c9 BS |
962 | } |
963 | ||
aa723c23 JQ |
964 | static bool qemu_in_vcpu_thread(void) |
965 | { | |
4917cf44 | 966 | return current_cpu && qemu_cpu_is_self(current_cpu); |
aa723c23 JQ |
967 | } |
968 | ||
296af7c9 BS |
969 | void qemu_mutex_lock_iothread(void) |
970 | { | |
c7f0f3b1 | 971 | if (!tcg_enabled()) { |
296af7c9 | 972 | qemu_mutex_lock(&qemu_global_mutex); |
1a28cac3 | 973 | } else { |
46daff13 | 974 | iothread_requesting_mutex = true; |
1a28cac3 | 975 | if (qemu_mutex_trylock(&qemu_global_mutex)) { |
182735ef | 976 | qemu_cpu_kick_thread(first_cpu); |
1a28cac3 MT |
977 | qemu_mutex_lock(&qemu_global_mutex); |
978 | } | |
46daff13 PB |
979 | iothread_requesting_mutex = false; |
980 | qemu_cond_broadcast(&qemu_io_proceeded_cond); | |
1a28cac3 | 981 | } |
296af7c9 BS |
982 | } |
983 | ||
984 | void qemu_mutex_unlock_iothread(void) | |
985 | { | |
986 | qemu_mutex_unlock(&qemu_global_mutex); | |
987 | } | |
988 | ||
989 | static int all_vcpus_paused(void) | |
990 | { | |
bdc44640 | 991 | CPUState *cpu; |
296af7c9 | 992 | |
bdc44640 | 993 | CPU_FOREACH(cpu) { |
182735ef | 994 | if (!cpu->stopped) { |
296af7c9 | 995 | return 0; |
0ab07c62 | 996 | } |
296af7c9 BS |
997 | } |
998 | ||
999 | return 1; | |
1000 | } | |
1001 | ||
1002 | void pause_all_vcpus(void) | |
1003 | { | |
bdc44640 | 1004 | CPUState *cpu; |
296af7c9 | 1005 | |
40daca54 | 1006 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, false); |
bdc44640 | 1007 | CPU_FOREACH(cpu) { |
182735ef AF |
1008 | cpu->stop = true; |
1009 | qemu_cpu_kick(cpu); | |
296af7c9 BS |
1010 | } |
1011 | ||
aa723c23 | 1012 | if (qemu_in_vcpu_thread()) { |
d798e974 JK |
1013 | cpu_stop_current(); |
1014 | if (!kvm_enabled()) { | |
bdc44640 | 1015 | CPU_FOREACH(cpu) { |
182735ef AF |
1016 | cpu->stop = false; |
1017 | cpu->stopped = true; | |
d798e974 JK |
1018 | } |
1019 | return; | |
1020 | } | |
1021 | } | |
1022 | ||
296af7c9 | 1023 | while (!all_vcpus_paused()) { |
be7d6c57 | 1024 | qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex); |
bdc44640 | 1025 | CPU_FOREACH(cpu) { |
182735ef | 1026 | qemu_cpu_kick(cpu); |
296af7c9 BS |
1027 | } |
1028 | } | |
1029 | } | |
1030 | ||
2993683b IM |
1031 | void cpu_resume(CPUState *cpu) |
1032 | { | |
1033 | cpu->stop = false; | |
1034 | cpu->stopped = false; | |
1035 | qemu_cpu_kick(cpu); | |
1036 | } | |
1037 | ||
296af7c9 BS |
1038 | void resume_all_vcpus(void) |
1039 | { | |
bdc44640 | 1040 | CPUState *cpu; |
296af7c9 | 1041 | |
40daca54 | 1042 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true); |
bdc44640 | 1043 | CPU_FOREACH(cpu) { |
182735ef | 1044 | cpu_resume(cpu); |
296af7c9 BS |
1045 | } |
1046 | } | |
1047 | ||
e5ab30a2 | 1048 | static void qemu_tcg_init_vcpu(CPUState *cpu) |
296af7c9 | 1049 | { |
296af7c9 BS |
1050 | /* share a single thread for all cpus with TCG */ |
1051 | if (!tcg_cpu_thread) { | |
814e612e | 1052 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1053 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1054 | qemu_cond_init(cpu->halt_cond); | |
1055 | tcg_halt_cond = cpu->halt_cond; | |
c3586ba7 | 1056 | qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu, |
1ecf47bf PB |
1057 | QEMU_THREAD_JOINABLE); |
1058 | #ifdef _WIN32 | |
814e612e | 1059 | cpu->hThread = qemu_thread_get_handle(cpu->thread); |
1ecf47bf | 1060 | #endif |
61a46217 | 1061 | while (!cpu->created) { |
18a85728 | 1062 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1063 | } |
814e612e | 1064 | tcg_cpu_thread = cpu->thread; |
296af7c9 | 1065 | } else { |
814e612e | 1066 | cpu->thread = tcg_cpu_thread; |
f5c121b8 | 1067 | cpu->halt_cond = tcg_halt_cond; |
296af7c9 BS |
1068 | } |
1069 | } | |
1070 | ||
48a106bd | 1071 | static void qemu_kvm_start_vcpu(CPUState *cpu) |
296af7c9 | 1072 | { |
814e612e | 1073 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1074 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1075 | qemu_cond_init(cpu->halt_cond); | |
48a106bd | 1076 | qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, cpu, |
1ecf47bf | 1077 | QEMU_THREAD_JOINABLE); |
61a46217 | 1078 | while (!cpu->created) { |
18a85728 | 1079 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1080 | } |
296af7c9 BS |
1081 | } |
1082 | ||
10a9021d | 1083 | static void qemu_dummy_start_vcpu(CPUState *cpu) |
c7f0f3b1 | 1084 | { |
814e612e | 1085 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1086 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1087 | qemu_cond_init(cpu->halt_cond); | |
10a9021d | 1088 | qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, cpu, |
c7f0f3b1 | 1089 | QEMU_THREAD_JOINABLE); |
61a46217 | 1090 | while (!cpu->created) { |
c7f0f3b1 AL |
1091 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
1092 | } | |
1093 | } | |
1094 | ||
c643bed9 | 1095 | void qemu_init_vcpu(CPUState *cpu) |
296af7c9 | 1096 | { |
ce3960eb AF |
1097 | cpu->nr_cores = smp_cores; |
1098 | cpu->nr_threads = smp_threads; | |
f324e766 | 1099 | cpu->stopped = true; |
0ab07c62 | 1100 | if (kvm_enabled()) { |
48a106bd | 1101 | qemu_kvm_start_vcpu(cpu); |
c7f0f3b1 | 1102 | } else if (tcg_enabled()) { |
e5ab30a2 | 1103 | qemu_tcg_init_vcpu(cpu); |
c7f0f3b1 | 1104 | } else { |
10a9021d | 1105 | qemu_dummy_start_vcpu(cpu); |
0ab07c62 | 1106 | } |
296af7c9 BS |
1107 | } |
1108 | ||
b4a3d965 | 1109 | void cpu_stop_current(void) |
296af7c9 | 1110 | { |
4917cf44 AF |
1111 | if (current_cpu) { |
1112 | current_cpu->stop = false; | |
1113 | current_cpu->stopped = true; | |
1114 | cpu_exit(current_cpu); | |
67bb172f | 1115 | qemu_cond_signal(&qemu_pause_cond); |
b4a3d965 | 1116 | } |
296af7c9 BS |
1117 | } |
1118 | ||
56983463 | 1119 | int vm_stop(RunState state) |
296af7c9 | 1120 | { |
aa723c23 | 1121 | if (qemu_in_vcpu_thread()) { |
1dfb4dd9 | 1122 | qemu_system_vmstop_request(state); |
296af7c9 BS |
1123 | /* |
1124 | * FIXME: should not return to device code in case | |
1125 | * vm_stop() has been requested. | |
1126 | */ | |
b4a3d965 | 1127 | cpu_stop_current(); |
56983463 | 1128 | return 0; |
296af7c9 | 1129 | } |
56983463 KW |
1130 | |
1131 | return do_vm_stop(state); | |
296af7c9 BS |
1132 | } |
1133 | ||
8a9236f1 LC |
1134 | /* does a state transition even if the VM is already stopped, |
1135 | current state is forgotten forever */ | |
56983463 | 1136 | int vm_stop_force_state(RunState state) |
8a9236f1 LC |
1137 | { |
1138 | if (runstate_is_running()) { | |
56983463 | 1139 | return vm_stop(state); |
8a9236f1 LC |
1140 | } else { |
1141 | runstate_set(state); | |
594a45ce KW |
1142 | /* Make sure to return an error if the flush in a previous vm_stop() |
1143 | * failed. */ | |
1144 | return bdrv_flush_all(); | |
8a9236f1 LC |
1145 | } |
1146 | } | |
1147 | ||
9349b4f9 | 1148 | static int tcg_cpu_exec(CPUArchState *env) |
296af7c9 BS |
1149 | { |
1150 | int ret; | |
1151 | #ifdef CONFIG_PROFILER | |
1152 | int64_t ti; | |
1153 | #endif | |
1154 | ||
1155 | #ifdef CONFIG_PROFILER | |
1156 | ti = profile_getclock(); | |
1157 | #endif | |
1158 | if (use_icount) { | |
1159 | int64_t count; | |
ac70aafc | 1160 | int64_t deadline; |
296af7c9 BS |
1161 | int decr; |
1162 | qemu_icount -= (env->icount_decr.u16.low + env->icount_extra); | |
1163 | env->icount_decr.u16.low = 0; | |
1164 | env->icount_extra = 0; | |
40daca54 | 1165 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ac70aafc AB |
1166 | |
1167 | /* Maintain prior (possibly buggy) behaviour where if no deadline | |
40daca54 | 1168 | * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than |
ac70aafc AB |
1169 | * INT32_MAX nanoseconds ahead, we still use INT32_MAX |
1170 | * nanoseconds. | |
1171 | */ | |
1172 | if ((deadline < 0) || (deadline > INT32_MAX)) { | |
1173 | deadline = INT32_MAX; | |
1174 | } | |
1175 | ||
1176 | count = qemu_icount_round(deadline); | |
296af7c9 BS |
1177 | qemu_icount += count; |
1178 | decr = (count > 0xffff) ? 0xffff : count; | |
1179 | count -= decr; | |
1180 | env->icount_decr.u16.low = decr; | |
1181 | env->icount_extra = count; | |
1182 | } | |
1183 | ret = cpu_exec(env); | |
1184 | #ifdef CONFIG_PROFILER | |
1185 | qemu_time += profile_getclock() - ti; | |
1186 | #endif | |
1187 | if (use_icount) { | |
1188 | /* Fold pending instructions back into the | |
1189 | instruction counter, and clear the interrupt flag. */ | |
1190 | qemu_icount -= (env->icount_decr.u16.low | |
1191 | + env->icount_extra); | |
1192 | env->icount_decr.u32 = 0; | |
1193 | env->icount_extra = 0; | |
1194 | } | |
1195 | return ret; | |
1196 | } | |
1197 | ||
bdb7ca67 | 1198 | static void tcg_exec_all(void) |
296af7c9 | 1199 | { |
9a36085b JK |
1200 | int r; |
1201 | ||
40daca54 AB |
1202 | /* Account partial waits to QEMU_CLOCK_VIRTUAL. */ |
1203 | qemu_clock_warp(QEMU_CLOCK_VIRTUAL); | |
ab33fcda | 1204 | |
0ab07c62 | 1205 | if (next_cpu == NULL) { |
296af7c9 | 1206 | next_cpu = first_cpu; |
0ab07c62 | 1207 | } |
bdc44640 | 1208 | for (; next_cpu != NULL && !exit_request; next_cpu = CPU_NEXT(next_cpu)) { |
182735ef AF |
1209 | CPUState *cpu = next_cpu; |
1210 | CPUArchState *env = cpu->env_ptr; | |
296af7c9 | 1211 | |
40daca54 | 1212 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, |
ed2803da | 1213 | (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0); |
296af7c9 | 1214 | |
a1fcaa73 | 1215 | if (cpu_can_run(cpu)) { |
bdb7ca67 | 1216 | r = tcg_cpu_exec(env); |
9a36085b | 1217 | if (r == EXCP_DEBUG) { |
91325046 | 1218 | cpu_handle_guest_debug(cpu); |
3c638d06 JK |
1219 | break; |
1220 | } | |
f324e766 | 1221 | } else if (cpu->stop || cpu->stopped) { |
296af7c9 BS |
1222 | break; |
1223 | } | |
1224 | } | |
c629a4bc | 1225 | exit_request = 0; |
296af7c9 BS |
1226 | } |
1227 | ||
1228 | void set_numa_modes(void) | |
1229 | { | |
1b1ed8dc | 1230 | CPUState *cpu; |
296af7c9 BS |
1231 | int i; |
1232 | ||
bdc44640 | 1233 | CPU_FOREACH(cpu) { |
296af7c9 | 1234 | for (i = 0; i < nb_numa_nodes; i++) { |
55e5c285 | 1235 | if (test_bit(cpu->cpu_index, node_cpumask[i])) { |
1b1ed8dc | 1236 | cpu->numa_node = i; |
296af7c9 BS |
1237 | } |
1238 | } | |
1239 | } | |
1240 | } | |
1241 | ||
9a78eead | 1242 | void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) |
262353cb BS |
1243 | { |
1244 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
e916cbf8 PM |
1245 | #if defined(cpu_list) |
1246 | cpu_list(f, cpu_fprintf); | |
262353cb BS |
1247 | #endif |
1248 | } | |
de0b36b6 LC |
1249 | |
1250 | CpuInfoList *qmp_query_cpus(Error **errp) | |
1251 | { | |
1252 | CpuInfoList *head = NULL, *cur_item = NULL; | |
182735ef | 1253 | CPUState *cpu; |
de0b36b6 | 1254 | |
bdc44640 | 1255 | CPU_FOREACH(cpu) { |
de0b36b6 | 1256 | CpuInfoList *info; |
182735ef AF |
1257 | #if defined(TARGET_I386) |
1258 | X86CPU *x86_cpu = X86_CPU(cpu); | |
1259 | CPUX86State *env = &x86_cpu->env; | |
1260 | #elif defined(TARGET_PPC) | |
1261 | PowerPCCPU *ppc_cpu = POWERPC_CPU(cpu); | |
1262 | CPUPPCState *env = &ppc_cpu->env; | |
1263 | #elif defined(TARGET_SPARC) | |
1264 | SPARCCPU *sparc_cpu = SPARC_CPU(cpu); | |
1265 | CPUSPARCState *env = &sparc_cpu->env; | |
1266 | #elif defined(TARGET_MIPS) | |
1267 | MIPSCPU *mips_cpu = MIPS_CPU(cpu); | |
1268 | CPUMIPSState *env = &mips_cpu->env; | |
1269 | #endif | |
de0b36b6 | 1270 | |
cb446eca | 1271 | cpu_synchronize_state(cpu); |
de0b36b6 LC |
1272 | |
1273 | info = g_malloc0(sizeof(*info)); | |
1274 | info->value = g_malloc0(sizeof(*info->value)); | |
55e5c285 | 1275 | info->value->CPU = cpu->cpu_index; |
182735ef | 1276 | info->value->current = (cpu == first_cpu); |
259186a7 | 1277 | info->value->halted = cpu->halted; |
9f09e18a | 1278 | info->value->thread_id = cpu->thread_id; |
de0b36b6 LC |
1279 | #if defined(TARGET_I386) |
1280 | info->value->has_pc = true; | |
1281 | info->value->pc = env->eip + env->segs[R_CS].base; | |
1282 | #elif defined(TARGET_PPC) | |
1283 | info->value->has_nip = true; | |
1284 | info->value->nip = env->nip; | |
1285 | #elif defined(TARGET_SPARC) | |
1286 | info->value->has_pc = true; | |
1287 | info->value->pc = env->pc; | |
1288 | info->value->has_npc = true; | |
1289 | info->value->npc = env->npc; | |
1290 | #elif defined(TARGET_MIPS) | |
1291 | info->value->has_PC = true; | |
1292 | info->value->PC = env->active_tc.PC; | |
1293 | #endif | |
1294 | ||
1295 | /* XXX: waiting for the qapi to support GSList */ | |
1296 | if (!cur_item) { | |
1297 | head = cur_item = info; | |
1298 | } else { | |
1299 | cur_item->next = info; | |
1300 | cur_item = info; | |
1301 | } | |
1302 | } | |
1303 | ||
1304 | return head; | |
1305 | } | |
0cfd6a9a LC |
1306 | |
1307 | void qmp_memsave(int64_t addr, int64_t size, const char *filename, | |
1308 | bool has_cpu, int64_t cpu_index, Error **errp) | |
1309 | { | |
1310 | FILE *f; | |
1311 | uint32_t l; | |
55e5c285 | 1312 | CPUState *cpu; |
0cfd6a9a LC |
1313 | uint8_t buf[1024]; |
1314 | ||
1315 | if (!has_cpu) { | |
1316 | cpu_index = 0; | |
1317 | } | |
1318 | ||
151d1322 AF |
1319 | cpu = qemu_get_cpu(cpu_index); |
1320 | if (cpu == NULL) { | |
0cfd6a9a LC |
1321 | error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index", |
1322 | "a CPU number"); | |
1323 | return; | |
1324 | } | |
1325 | ||
1326 | f = fopen(filename, "wb"); | |
1327 | if (!f) { | |
618da851 | 1328 | error_setg_file_open(errp, errno, filename); |
0cfd6a9a LC |
1329 | return; |
1330 | } | |
1331 | ||
1332 | while (size != 0) { | |
1333 | l = sizeof(buf); | |
1334 | if (l > size) | |
1335 | l = size; | |
f17ec444 | 1336 | cpu_memory_rw_debug(cpu, addr, buf, l, 0); |
0cfd6a9a LC |
1337 | if (fwrite(buf, 1, l, f) != l) { |
1338 | error_set(errp, QERR_IO_ERROR); | |
1339 | goto exit; | |
1340 | } | |
1341 | addr += l; | |
1342 | size -= l; | |
1343 | } | |
1344 | ||
1345 | exit: | |
1346 | fclose(f); | |
1347 | } | |
6d3962bf LC |
1348 | |
1349 | void qmp_pmemsave(int64_t addr, int64_t size, const char *filename, | |
1350 | Error **errp) | |
1351 | { | |
1352 | FILE *f; | |
1353 | uint32_t l; | |
1354 | uint8_t buf[1024]; | |
1355 | ||
1356 | f = fopen(filename, "wb"); | |
1357 | if (!f) { | |
618da851 | 1358 | error_setg_file_open(errp, errno, filename); |
6d3962bf LC |
1359 | return; |
1360 | } | |
1361 | ||
1362 | while (size != 0) { | |
1363 | l = sizeof(buf); | |
1364 | if (l > size) | |
1365 | l = size; | |
1366 | cpu_physical_memory_rw(addr, buf, l, 0); | |
1367 | if (fwrite(buf, 1, l, f) != l) { | |
1368 | error_set(errp, QERR_IO_ERROR); | |
1369 | goto exit; | |
1370 | } | |
1371 | addr += l; | |
1372 | size -= l; | |
1373 | } | |
1374 | ||
1375 | exit: | |
1376 | fclose(f); | |
1377 | } | |
ab49ab5c LC |
1378 | |
1379 | void qmp_inject_nmi(Error **errp) | |
1380 | { | |
1381 | #if defined(TARGET_I386) | |
182735ef AF |
1382 | CPUState *cs; |
1383 | ||
bdc44640 | 1384 | CPU_FOREACH(cs) { |
182735ef AF |
1385 | X86CPU *cpu = X86_CPU(cs); |
1386 | CPUX86State *env = &cpu->env; | |
ab49ab5c | 1387 | |
02c09195 | 1388 | if (!env->apic_state) { |
182735ef | 1389 | cpu_interrupt(cs, CPU_INTERRUPT_NMI); |
02c09195 JK |
1390 | } else { |
1391 | apic_deliver_nmi(env->apic_state); | |
1392 | } | |
ab49ab5c | 1393 | } |
7f7f9752 ED |
1394 | #elif defined(TARGET_S390X) |
1395 | CPUState *cs; | |
1396 | S390CPU *cpu; | |
1397 | ||
bdc44640 | 1398 | CPU_FOREACH(cs) { |
7f7f9752 ED |
1399 | cpu = S390_CPU(cs); |
1400 | if (cpu->env.cpu_num == monitor_get_cpu_index()) { | |
1401 | if (s390_cpu_restart(S390_CPU(cs)) == -1) { | |
1402 | error_set(errp, QERR_UNSUPPORTED); | |
1403 | return; | |
1404 | } | |
1405 | break; | |
1406 | } | |
1407 | } | |
ab49ab5c LC |
1408 | #else |
1409 | error_set(errp, QERR_UNSUPPORTED); | |
1410 | #endif | |
1411 | } |