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Commit | Line | Data |
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296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
7b31bbc2 | 26 | #include "qemu/osdep.h" |
33c11879 | 27 | #include "qemu-common.h" |
8d4e9146 | 28 | #include "qemu/config-file.h" |
33c11879 | 29 | #include "cpu.h" |
83c9089e | 30 | #include "monitor/monitor.h" |
a4e15de9 | 31 | #include "qapi/qmp/qerror.h" |
d49b6836 | 32 | #include "qemu/error-report.h" |
9c17d615 | 33 | #include "sysemu/sysemu.h" |
da31d594 | 34 | #include "sysemu/block-backend.h" |
022c62cb | 35 | #include "exec/gdbstub.h" |
9c17d615 | 36 | #include "sysemu/dma.h" |
b3946626 | 37 | #include "sysemu/hw_accel.h" |
9c17d615 | 38 | #include "sysemu/kvm.h" |
b0cb0a66 | 39 | #include "sysemu/hax.h" |
de0b36b6 | 40 | #include "qmp-commands.h" |
63c91552 | 41 | #include "exec/exec-all.h" |
296af7c9 | 42 | |
1de7afc9 | 43 | #include "qemu/thread.h" |
9c17d615 PB |
44 | #include "sysemu/cpus.h" |
45 | #include "sysemu/qtest.h" | |
1de7afc9 PB |
46 | #include "qemu/main-loop.h" |
47 | #include "qemu/bitmap.h" | |
cb365646 | 48 | #include "qemu/seqlock.h" |
8d4e9146 | 49 | #include "tcg.h" |
a4e15de9 | 50 | #include "qapi-event.h" |
9cb805fd | 51 | #include "hw/nmi.h" |
8b427044 | 52 | #include "sysemu/replay.h" |
0ff0fc19 | 53 | |
6d9cb73c JK |
54 | #ifdef CONFIG_LINUX |
55 | ||
56 | #include <sys/prctl.h> | |
57 | ||
c0532a76 MT |
58 | #ifndef PR_MCE_KILL |
59 | #define PR_MCE_KILL 33 | |
60 | #endif | |
61 | ||
6d9cb73c JK |
62 | #ifndef PR_MCE_KILL_SET |
63 | #define PR_MCE_KILL_SET 1 | |
64 | #endif | |
65 | ||
66 | #ifndef PR_MCE_KILL_EARLY | |
67 | #define PR_MCE_KILL_EARLY 1 | |
68 | #endif | |
69 | ||
70 | #endif /* CONFIG_LINUX */ | |
71 | ||
27498bef ST |
72 | int64_t max_delay; |
73 | int64_t max_advance; | |
296af7c9 | 74 | |
2adcc85d JH |
75 | /* vcpu throttling controls */ |
76 | static QEMUTimer *throttle_timer; | |
77 | static unsigned int throttle_percentage; | |
78 | ||
79 | #define CPU_THROTTLE_PCT_MIN 1 | |
80 | #define CPU_THROTTLE_PCT_MAX 99 | |
81 | #define CPU_THROTTLE_TIMESLICE_NS 10000000 | |
82 | ||
321bc0b2 TC |
83 | bool cpu_is_stopped(CPUState *cpu) |
84 | { | |
85 | return cpu->stopped || !runstate_is_running(); | |
86 | } | |
87 | ||
a98ae1d8 | 88 | static bool cpu_thread_is_idle(CPUState *cpu) |
ac873f1e | 89 | { |
c64ca814 | 90 | if (cpu->stop || cpu->queued_work_first) { |
ac873f1e PM |
91 | return false; |
92 | } | |
321bc0b2 | 93 | if (cpu_is_stopped(cpu)) { |
ac873f1e PM |
94 | return true; |
95 | } | |
8c2e1b00 | 96 | if (!cpu->halted || cpu_has_work(cpu) || |
215e79c0 | 97 | kvm_halt_in_kernel()) { |
ac873f1e PM |
98 | return false; |
99 | } | |
100 | return true; | |
101 | } | |
102 | ||
103 | static bool all_cpu_threads_idle(void) | |
104 | { | |
182735ef | 105 | CPUState *cpu; |
ac873f1e | 106 | |
bdc44640 | 107 | CPU_FOREACH(cpu) { |
182735ef | 108 | if (!cpu_thread_is_idle(cpu)) { |
ac873f1e PM |
109 | return false; |
110 | } | |
111 | } | |
112 | return true; | |
113 | } | |
114 | ||
946fb27c PB |
115 | /***********************************************************/ |
116 | /* guest cycle counter */ | |
117 | ||
a3270e19 PB |
118 | /* Protected by TimersState seqlock */ |
119 | ||
5045e9d9 | 120 | static bool icount_sleep = true; |
71468395 | 121 | static int64_t vm_clock_warp_start = -1; |
946fb27c PB |
122 | /* Conversion factor from emulated instructions to virtual clock ticks. */ |
123 | static int icount_time_shift; | |
124 | /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ | |
125 | #define MAX_ICOUNT_SHIFT 10 | |
a3270e19 | 126 | |
946fb27c PB |
127 | static QEMUTimer *icount_rt_timer; |
128 | static QEMUTimer *icount_vm_timer; | |
129 | static QEMUTimer *icount_warp_timer; | |
946fb27c PB |
130 | |
131 | typedef struct TimersState { | |
cb365646 | 132 | /* Protected by BQL. */ |
946fb27c PB |
133 | int64_t cpu_ticks_prev; |
134 | int64_t cpu_ticks_offset; | |
cb365646 LPF |
135 | |
136 | /* cpu_clock_offset can be read out of BQL, so protect it with | |
137 | * this lock. | |
138 | */ | |
139 | QemuSeqLock vm_clock_seqlock; | |
946fb27c PB |
140 | int64_t cpu_clock_offset; |
141 | int32_t cpu_ticks_enabled; | |
142 | int64_t dummy; | |
c96778bb FK |
143 | |
144 | /* Compensate for varying guest execution speed. */ | |
145 | int64_t qemu_icount_bias; | |
146 | /* Only written by TCG thread */ | |
147 | int64_t qemu_icount; | |
946fb27c PB |
148 | } TimersState; |
149 | ||
d9cd4007 | 150 | static TimersState timers_state; |
8d4e9146 FK |
151 | bool mttcg_enabled; |
152 | ||
153 | /* | |
154 | * We default to false if we know other options have been enabled | |
155 | * which are currently incompatible with MTTCG. Otherwise when each | |
156 | * guest (target) has been updated to support: | |
157 | * - atomic instructions | |
158 | * - memory ordering primitives (barriers) | |
159 | * they can set the appropriate CONFIG flags in ${target}-softmmu.mak | |
160 | * | |
161 | * Once a guest architecture has been converted to the new primitives | |
162 | * there are two remaining limitations to check. | |
163 | * | |
164 | * - The guest can't be oversized (e.g. 64 bit guest on 32 bit host) | |
165 | * - The host must have a stronger memory order than the guest | |
166 | * | |
167 | * It may be possible in future to support strong guests on weak hosts | |
168 | * but that will require tagging all load/stores in a guest with their | |
169 | * implicit memory order requirements which would likely slow things | |
170 | * down a lot. | |
171 | */ | |
172 | ||
173 | static bool check_tcg_memory_orders_compatible(void) | |
174 | { | |
175 | #if defined(TCG_GUEST_DEFAULT_MO) && defined(TCG_TARGET_DEFAULT_MO) | |
176 | return (TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) == 0; | |
177 | #else | |
178 | return false; | |
179 | #endif | |
180 | } | |
181 | ||
182 | static bool default_mttcg_enabled(void) | |
183 | { | |
184 | QemuOpts *icount_opts = qemu_find_opts_singleton("icount"); | |
185 | const char *rr = qemu_opt_get(icount_opts, "rr"); | |
186 | ||
187 | if (rr || TCG_OVERSIZED_GUEST) { | |
188 | return false; | |
189 | } else { | |
190 | #ifdef TARGET_SUPPORTS_MTTCG | |
191 | return check_tcg_memory_orders_compatible(); | |
192 | #else | |
193 | return false; | |
194 | #endif | |
195 | } | |
196 | } | |
197 | ||
198 | void qemu_tcg_configure(QemuOpts *opts, Error **errp) | |
199 | { | |
200 | const char *t = qemu_opt_get(opts, "thread"); | |
201 | if (t) { | |
202 | if (strcmp(t, "multi") == 0) { | |
203 | if (TCG_OVERSIZED_GUEST) { | |
204 | error_setg(errp, "No MTTCG when guest word size > hosts"); | |
205 | } else { | |
206 | if (!check_tcg_memory_orders_compatible()) { | |
207 | error_report("Guest expects a stronger memory ordering " | |
208 | "than the host provides"); | |
209 | error_printf("This may cause strange/hard to debug errors"); | |
210 | } | |
211 | mttcg_enabled = true; | |
212 | } | |
213 | } else if (strcmp(t, "single") == 0) { | |
214 | mttcg_enabled = false; | |
215 | } else { | |
216 | error_setg(errp, "Invalid 'thread' setting %s", t); | |
217 | } | |
218 | } else { | |
219 | mttcg_enabled = default_mttcg_enabled(); | |
220 | } | |
221 | } | |
946fb27c | 222 | |
2a62914b | 223 | int64_t cpu_get_icount_raw(void) |
946fb27c PB |
224 | { |
225 | int64_t icount; | |
4917cf44 | 226 | CPUState *cpu = current_cpu; |
946fb27c | 227 | |
c96778bb | 228 | icount = timers_state.qemu_icount; |
4917cf44 | 229 | if (cpu) { |
414b15c9 | 230 | if (!cpu->can_do_io) { |
2a62914b PD |
231 | fprintf(stderr, "Bad icount read\n"); |
232 | exit(1); | |
946fb27c | 233 | } |
28ecfd7a | 234 | icount -= (cpu->icount_decr.u16.low + cpu->icount_extra); |
946fb27c | 235 | } |
2a62914b PD |
236 | return icount; |
237 | } | |
238 | ||
239 | /* Return the virtual CPU time, based on the instruction counter. */ | |
240 | static int64_t cpu_get_icount_locked(void) | |
241 | { | |
242 | int64_t icount = cpu_get_icount_raw(); | |
3f031313 | 243 | return timers_state.qemu_icount_bias + cpu_icount_to_ns(icount); |
946fb27c PB |
244 | } |
245 | ||
17a15f1b PB |
246 | int64_t cpu_get_icount(void) |
247 | { | |
248 | int64_t icount; | |
249 | unsigned start; | |
250 | ||
251 | do { | |
252 | start = seqlock_read_begin(&timers_state.vm_clock_seqlock); | |
253 | icount = cpu_get_icount_locked(); | |
254 | } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, start)); | |
255 | ||
256 | return icount; | |
257 | } | |
258 | ||
3f031313 FK |
259 | int64_t cpu_icount_to_ns(int64_t icount) |
260 | { | |
261 | return icount << icount_time_shift; | |
262 | } | |
263 | ||
d90f3cca C |
264 | /* return the time elapsed in VM between vm_start and vm_stop. Unless |
265 | * icount is active, cpu_get_ticks() uses units of the host CPU cycle | |
266 | * counter. | |
267 | * | |
268 | * Caller must hold the BQL | |
269 | */ | |
946fb27c PB |
270 | int64_t cpu_get_ticks(void) |
271 | { | |
5f3e3101 PB |
272 | int64_t ticks; |
273 | ||
946fb27c PB |
274 | if (use_icount) { |
275 | return cpu_get_icount(); | |
276 | } | |
5f3e3101 PB |
277 | |
278 | ticks = timers_state.cpu_ticks_offset; | |
279 | if (timers_state.cpu_ticks_enabled) { | |
4a7428c5 | 280 | ticks += cpu_get_host_ticks(); |
5f3e3101 PB |
281 | } |
282 | ||
283 | if (timers_state.cpu_ticks_prev > ticks) { | |
284 | /* Note: non increasing ticks may happen if the host uses | |
285 | software suspend */ | |
286 | timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks; | |
287 | ticks = timers_state.cpu_ticks_prev; | |
946fb27c | 288 | } |
5f3e3101 PB |
289 | |
290 | timers_state.cpu_ticks_prev = ticks; | |
291 | return ticks; | |
946fb27c PB |
292 | } |
293 | ||
cb365646 | 294 | static int64_t cpu_get_clock_locked(void) |
946fb27c | 295 | { |
1d45cea5 | 296 | int64_t time; |
cb365646 | 297 | |
1d45cea5 | 298 | time = timers_state.cpu_clock_offset; |
5f3e3101 | 299 | if (timers_state.cpu_ticks_enabled) { |
1d45cea5 | 300 | time += get_clock(); |
946fb27c | 301 | } |
cb365646 | 302 | |
1d45cea5 | 303 | return time; |
cb365646 LPF |
304 | } |
305 | ||
d90f3cca | 306 | /* Return the monotonic time elapsed in VM, i.e., |
8212ff86 PM |
307 | * the time between vm_start and vm_stop |
308 | */ | |
cb365646 LPF |
309 | int64_t cpu_get_clock(void) |
310 | { | |
311 | int64_t ti; | |
312 | unsigned start; | |
313 | ||
314 | do { | |
315 | start = seqlock_read_begin(&timers_state.vm_clock_seqlock); | |
316 | ti = cpu_get_clock_locked(); | |
317 | } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, start)); | |
318 | ||
319 | return ti; | |
946fb27c PB |
320 | } |
321 | ||
cb365646 | 322 | /* enable cpu_get_ticks() |
3224e878 | 323 | * Caller must hold BQL which serves as mutex for vm_clock_seqlock. |
cb365646 | 324 | */ |
946fb27c PB |
325 | void cpu_enable_ticks(void) |
326 | { | |
cb365646 | 327 | /* Here, the really thing protected by seqlock is cpu_clock_offset. */ |
03719e44 | 328 | seqlock_write_begin(&timers_state.vm_clock_seqlock); |
946fb27c | 329 | if (!timers_state.cpu_ticks_enabled) { |
4a7428c5 | 330 | timers_state.cpu_ticks_offset -= cpu_get_host_ticks(); |
946fb27c PB |
331 | timers_state.cpu_clock_offset -= get_clock(); |
332 | timers_state.cpu_ticks_enabled = 1; | |
333 | } | |
03719e44 | 334 | seqlock_write_end(&timers_state.vm_clock_seqlock); |
946fb27c PB |
335 | } |
336 | ||
337 | /* disable cpu_get_ticks() : the clock is stopped. You must not call | |
cb365646 | 338 | * cpu_get_ticks() after that. |
3224e878 | 339 | * Caller must hold BQL which serves as mutex for vm_clock_seqlock. |
cb365646 | 340 | */ |
946fb27c PB |
341 | void cpu_disable_ticks(void) |
342 | { | |
cb365646 | 343 | /* Here, the really thing protected by seqlock is cpu_clock_offset. */ |
03719e44 | 344 | seqlock_write_begin(&timers_state.vm_clock_seqlock); |
946fb27c | 345 | if (timers_state.cpu_ticks_enabled) { |
4a7428c5 | 346 | timers_state.cpu_ticks_offset += cpu_get_host_ticks(); |
cb365646 | 347 | timers_state.cpu_clock_offset = cpu_get_clock_locked(); |
946fb27c PB |
348 | timers_state.cpu_ticks_enabled = 0; |
349 | } | |
03719e44 | 350 | seqlock_write_end(&timers_state.vm_clock_seqlock); |
946fb27c PB |
351 | } |
352 | ||
353 | /* Correlation between real and virtual time is always going to be | |
354 | fairly approximate, so ignore small variation. | |
355 | When the guest is idle real and virtual time will be aligned in | |
356 | the IO wait loop. */ | |
73bcb24d | 357 | #define ICOUNT_WOBBLE (NANOSECONDS_PER_SECOND / 10) |
946fb27c PB |
358 | |
359 | static void icount_adjust(void) | |
360 | { | |
361 | int64_t cur_time; | |
362 | int64_t cur_icount; | |
363 | int64_t delta; | |
a3270e19 PB |
364 | |
365 | /* Protected by TimersState mutex. */ | |
946fb27c | 366 | static int64_t last_delta; |
468cc7cf | 367 | |
946fb27c PB |
368 | /* If the VM is not running, then do nothing. */ |
369 | if (!runstate_is_running()) { | |
370 | return; | |
371 | } | |
468cc7cf | 372 | |
03719e44 | 373 | seqlock_write_begin(&timers_state.vm_clock_seqlock); |
17a15f1b PB |
374 | cur_time = cpu_get_clock_locked(); |
375 | cur_icount = cpu_get_icount_locked(); | |
468cc7cf | 376 | |
946fb27c PB |
377 | delta = cur_icount - cur_time; |
378 | /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */ | |
379 | if (delta > 0 | |
380 | && last_delta + ICOUNT_WOBBLE < delta * 2 | |
381 | && icount_time_shift > 0) { | |
382 | /* The guest is getting too far ahead. Slow time down. */ | |
383 | icount_time_shift--; | |
384 | } | |
385 | if (delta < 0 | |
386 | && last_delta - ICOUNT_WOBBLE > delta * 2 | |
387 | && icount_time_shift < MAX_ICOUNT_SHIFT) { | |
388 | /* The guest is getting too far behind. Speed time up. */ | |
389 | icount_time_shift++; | |
390 | } | |
391 | last_delta = delta; | |
c96778bb FK |
392 | timers_state.qemu_icount_bias = cur_icount |
393 | - (timers_state.qemu_icount << icount_time_shift); | |
03719e44 | 394 | seqlock_write_end(&timers_state.vm_clock_seqlock); |
946fb27c PB |
395 | } |
396 | ||
397 | static void icount_adjust_rt(void *opaque) | |
398 | { | |
40daca54 | 399 | timer_mod(icount_rt_timer, |
1979b908 | 400 | qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL_RT) + 1000); |
946fb27c PB |
401 | icount_adjust(); |
402 | } | |
403 | ||
404 | static void icount_adjust_vm(void *opaque) | |
405 | { | |
40daca54 AB |
406 | timer_mod(icount_vm_timer, |
407 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
73bcb24d | 408 | NANOSECONDS_PER_SECOND / 10); |
946fb27c PB |
409 | icount_adjust(); |
410 | } | |
411 | ||
412 | static int64_t qemu_icount_round(int64_t count) | |
413 | { | |
414 | return (count + (1 << icount_time_shift) - 1) >> icount_time_shift; | |
415 | } | |
416 | ||
efab87cf | 417 | static void icount_warp_rt(void) |
946fb27c | 418 | { |
ccffff48 AB |
419 | unsigned seq; |
420 | int64_t warp_start; | |
421 | ||
17a15f1b PB |
422 | /* The icount_warp_timer is rescheduled soon after vm_clock_warp_start |
423 | * changes from -1 to another value, so the race here is okay. | |
424 | */ | |
ccffff48 AB |
425 | do { |
426 | seq = seqlock_read_begin(&timers_state.vm_clock_seqlock); | |
427 | warp_start = vm_clock_warp_start; | |
428 | } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, seq)); | |
429 | ||
430 | if (warp_start == -1) { | |
946fb27c PB |
431 | return; |
432 | } | |
433 | ||
03719e44 | 434 | seqlock_write_begin(&timers_state.vm_clock_seqlock); |
946fb27c | 435 | if (runstate_is_running()) { |
8eda206e PD |
436 | int64_t clock = REPLAY_CLOCK(REPLAY_CLOCK_VIRTUAL_RT, |
437 | cpu_get_clock_locked()); | |
8ed961d9 PB |
438 | int64_t warp_delta; |
439 | ||
440 | warp_delta = clock - vm_clock_warp_start; | |
441 | if (use_icount == 2) { | |
946fb27c | 442 | /* |
40daca54 | 443 | * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too |
946fb27c PB |
444 | * far ahead of real time. |
445 | */ | |
17a15f1b | 446 | int64_t cur_icount = cpu_get_icount_locked(); |
bf2a7ddb | 447 | int64_t delta = clock - cur_icount; |
8ed961d9 | 448 | warp_delta = MIN(warp_delta, delta); |
946fb27c | 449 | } |
c96778bb | 450 | timers_state.qemu_icount_bias += warp_delta; |
946fb27c PB |
451 | } |
452 | vm_clock_warp_start = -1; | |
03719e44 | 453 | seqlock_write_end(&timers_state.vm_clock_seqlock); |
8ed961d9 PB |
454 | |
455 | if (qemu_clock_expired(QEMU_CLOCK_VIRTUAL)) { | |
456 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); | |
457 | } | |
946fb27c PB |
458 | } |
459 | ||
e76d1798 | 460 | static void icount_timer_cb(void *opaque) |
efab87cf | 461 | { |
e76d1798 PD |
462 | /* No need for a checkpoint because the timer already synchronizes |
463 | * with CHECKPOINT_CLOCK_VIRTUAL_RT. | |
464 | */ | |
465 | icount_warp_rt(); | |
efab87cf PD |
466 | } |
467 | ||
8156be56 PB |
468 | void qtest_clock_warp(int64_t dest) |
469 | { | |
40daca54 | 470 | int64_t clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
efef88b3 | 471 | AioContext *aio_context; |
8156be56 | 472 | assert(qtest_enabled()); |
efef88b3 | 473 | aio_context = qemu_get_aio_context(); |
8156be56 | 474 | while (clock < dest) { |
40daca54 | 475 | int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
c9299e2f | 476 | int64_t warp = qemu_soonest_timeout(dest - clock, deadline); |
efef88b3 | 477 | |
03719e44 | 478 | seqlock_write_begin(&timers_state.vm_clock_seqlock); |
c96778bb | 479 | timers_state.qemu_icount_bias += warp; |
03719e44 | 480 | seqlock_write_end(&timers_state.vm_clock_seqlock); |
17a15f1b | 481 | |
40daca54 | 482 | qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL); |
efef88b3 | 483 | timerlist_run_timers(aio_context->tlg.tl[QEMU_CLOCK_VIRTUAL]); |
40daca54 | 484 | clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
8156be56 | 485 | } |
40daca54 | 486 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
8156be56 PB |
487 | } |
488 | ||
e76d1798 | 489 | void qemu_start_warp_timer(void) |
946fb27c | 490 | { |
ce78d18c | 491 | int64_t clock; |
946fb27c PB |
492 | int64_t deadline; |
493 | ||
e76d1798 | 494 | if (!use_icount) { |
946fb27c PB |
495 | return; |
496 | } | |
497 | ||
8bd7f71d PD |
498 | /* Nothing to do if the VM is stopped: QEMU_CLOCK_VIRTUAL timers |
499 | * do not fire, so computing the deadline does not make sense. | |
500 | */ | |
501 | if (!runstate_is_running()) { | |
502 | return; | |
503 | } | |
504 | ||
505 | /* warp clock deterministically in record/replay mode */ | |
e76d1798 | 506 | if (!replay_checkpoint(CHECKPOINT_CLOCK_WARP_START)) { |
8bd7f71d PD |
507 | return; |
508 | } | |
509 | ||
ce78d18c | 510 | if (!all_cpu_threads_idle()) { |
946fb27c PB |
511 | return; |
512 | } | |
513 | ||
8156be56 PB |
514 | if (qtest_enabled()) { |
515 | /* When testing, qtest commands advance icount. */ | |
e76d1798 | 516 | return; |
8156be56 PB |
517 | } |
518 | ||
ac70aafc | 519 | /* We want to use the earliest deadline from ALL vm_clocks */ |
bf2a7ddb | 520 | clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); |
40daca54 | 521 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); |
ce78d18c | 522 | if (deadline < 0) { |
d7a0f71d VC |
523 | static bool notified; |
524 | if (!icount_sleep && !notified) { | |
525 | error_report("WARNING: icount sleep disabled and no active timers"); | |
526 | notified = true; | |
527 | } | |
ce78d18c | 528 | return; |
ac70aafc AB |
529 | } |
530 | ||
946fb27c PB |
531 | if (deadline > 0) { |
532 | /* | |
40daca54 | 533 | * Ensure QEMU_CLOCK_VIRTUAL proceeds even when the virtual CPU goes to |
946fb27c PB |
534 | * sleep. Otherwise, the CPU might be waiting for a future timer |
535 | * interrupt to wake it up, but the interrupt never comes because | |
536 | * the vCPU isn't running any insns and thus doesn't advance the | |
40daca54 | 537 | * QEMU_CLOCK_VIRTUAL. |
946fb27c | 538 | */ |
5045e9d9 VC |
539 | if (!icount_sleep) { |
540 | /* | |
541 | * We never let VCPUs sleep in no sleep icount mode. | |
542 | * If there is a pending QEMU_CLOCK_VIRTUAL timer we just advance | |
543 | * to the next QEMU_CLOCK_VIRTUAL event and notify it. | |
544 | * It is useful when we want a deterministic execution time, | |
545 | * isolated from host latencies. | |
546 | */ | |
03719e44 | 547 | seqlock_write_begin(&timers_state.vm_clock_seqlock); |
5045e9d9 | 548 | timers_state.qemu_icount_bias += deadline; |
03719e44 | 549 | seqlock_write_end(&timers_state.vm_clock_seqlock); |
5045e9d9 VC |
550 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
551 | } else { | |
552 | /* | |
553 | * We do stop VCPUs and only advance QEMU_CLOCK_VIRTUAL after some | |
554 | * "real" time, (related to the time left until the next event) has | |
555 | * passed. The QEMU_CLOCK_VIRTUAL_RT clock will do this. | |
556 | * This avoids that the warps are visible externally; for example, | |
557 | * you will not be sending network packets continuously instead of | |
558 | * every 100ms. | |
559 | */ | |
03719e44 | 560 | seqlock_write_begin(&timers_state.vm_clock_seqlock); |
5045e9d9 VC |
561 | if (vm_clock_warp_start == -1 || vm_clock_warp_start > clock) { |
562 | vm_clock_warp_start = clock; | |
563 | } | |
03719e44 | 564 | seqlock_write_end(&timers_state.vm_clock_seqlock); |
5045e9d9 | 565 | timer_mod_anticipate(icount_warp_timer, clock + deadline); |
ce78d18c | 566 | } |
ac70aafc | 567 | } else if (deadline == 0) { |
40daca54 | 568 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); |
946fb27c PB |
569 | } |
570 | } | |
571 | ||
e76d1798 PD |
572 | static void qemu_account_warp_timer(void) |
573 | { | |
574 | if (!use_icount || !icount_sleep) { | |
575 | return; | |
576 | } | |
577 | ||
578 | /* Nothing to do if the VM is stopped: QEMU_CLOCK_VIRTUAL timers | |
579 | * do not fire, so computing the deadline does not make sense. | |
580 | */ | |
581 | if (!runstate_is_running()) { | |
582 | return; | |
583 | } | |
584 | ||
585 | /* warp clock deterministically in record/replay mode */ | |
586 | if (!replay_checkpoint(CHECKPOINT_CLOCK_WARP_ACCOUNT)) { | |
587 | return; | |
588 | } | |
589 | ||
590 | timer_del(icount_warp_timer); | |
591 | icount_warp_rt(); | |
592 | } | |
593 | ||
d09eae37 FK |
594 | static bool icount_state_needed(void *opaque) |
595 | { | |
596 | return use_icount; | |
597 | } | |
598 | ||
599 | /* | |
600 | * This is a subsection for icount migration. | |
601 | */ | |
602 | static const VMStateDescription icount_vmstate_timers = { | |
603 | .name = "timer/icount", | |
604 | .version_id = 1, | |
605 | .minimum_version_id = 1, | |
5cd8cada | 606 | .needed = icount_state_needed, |
d09eae37 FK |
607 | .fields = (VMStateField[]) { |
608 | VMSTATE_INT64(qemu_icount_bias, TimersState), | |
609 | VMSTATE_INT64(qemu_icount, TimersState), | |
610 | VMSTATE_END_OF_LIST() | |
611 | } | |
612 | }; | |
613 | ||
946fb27c PB |
614 | static const VMStateDescription vmstate_timers = { |
615 | .name = "timer", | |
616 | .version_id = 2, | |
617 | .minimum_version_id = 1, | |
35d08458 | 618 | .fields = (VMStateField[]) { |
946fb27c PB |
619 | VMSTATE_INT64(cpu_ticks_offset, TimersState), |
620 | VMSTATE_INT64(dummy, TimersState), | |
621 | VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2), | |
622 | VMSTATE_END_OF_LIST() | |
d09eae37 | 623 | }, |
5cd8cada JQ |
624 | .subsections = (const VMStateDescription*[]) { |
625 | &icount_vmstate_timers, | |
626 | NULL | |
946fb27c PB |
627 | } |
628 | }; | |
629 | ||
14e6fe12 | 630 | static void cpu_throttle_thread(CPUState *cpu, run_on_cpu_data opaque) |
2adcc85d | 631 | { |
2adcc85d JH |
632 | double pct; |
633 | double throttle_ratio; | |
634 | long sleeptime_ns; | |
635 | ||
636 | if (!cpu_throttle_get_percentage()) { | |
637 | return; | |
638 | } | |
639 | ||
640 | pct = (double)cpu_throttle_get_percentage()/100; | |
641 | throttle_ratio = pct / (1 - pct); | |
642 | sleeptime_ns = (long)(throttle_ratio * CPU_THROTTLE_TIMESLICE_NS); | |
643 | ||
644 | qemu_mutex_unlock_iothread(); | |
645 | atomic_set(&cpu->throttle_thread_scheduled, 0); | |
646 | g_usleep(sleeptime_ns / 1000); /* Convert ns to us for usleep call */ | |
647 | qemu_mutex_lock_iothread(); | |
648 | } | |
649 | ||
650 | static void cpu_throttle_timer_tick(void *opaque) | |
651 | { | |
652 | CPUState *cpu; | |
653 | double pct; | |
654 | ||
655 | /* Stop the timer if needed */ | |
656 | if (!cpu_throttle_get_percentage()) { | |
657 | return; | |
658 | } | |
659 | CPU_FOREACH(cpu) { | |
660 | if (!atomic_xchg(&cpu->throttle_thread_scheduled, 1)) { | |
14e6fe12 PB |
661 | async_run_on_cpu(cpu, cpu_throttle_thread, |
662 | RUN_ON_CPU_NULL); | |
2adcc85d JH |
663 | } |
664 | } | |
665 | ||
666 | pct = (double)cpu_throttle_get_percentage()/100; | |
667 | timer_mod(throttle_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT) + | |
668 | CPU_THROTTLE_TIMESLICE_NS / (1-pct)); | |
669 | } | |
670 | ||
671 | void cpu_throttle_set(int new_throttle_pct) | |
672 | { | |
673 | /* Ensure throttle percentage is within valid range */ | |
674 | new_throttle_pct = MIN(new_throttle_pct, CPU_THROTTLE_PCT_MAX); | |
675 | new_throttle_pct = MAX(new_throttle_pct, CPU_THROTTLE_PCT_MIN); | |
676 | ||
677 | atomic_set(&throttle_percentage, new_throttle_pct); | |
678 | ||
679 | timer_mod(throttle_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT) + | |
680 | CPU_THROTTLE_TIMESLICE_NS); | |
681 | } | |
682 | ||
683 | void cpu_throttle_stop(void) | |
684 | { | |
685 | atomic_set(&throttle_percentage, 0); | |
686 | } | |
687 | ||
688 | bool cpu_throttle_active(void) | |
689 | { | |
690 | return (cpu_throttle_get_percentage() != 0); | |
691 | } | |
692 | ||
693 | int cpu_throttle_get_percentage(void) | |
694 | { | |
695 | return atomic_read(&throttle_percentage); | |
696 | } | |
697 | ||
4603ea01 PD |
698 | void cpu_ticks_init(void) |
699 | { | |
ccdb3c1f | 700 | seqlock_init(&timers_state.vm_clock_seqlock); |
4603ea01 | 701 | vmstate_register(NULL, 0, &vmstate_timers, &timers_state); |
2adcc85d JH |
702 | throttle_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL_RT, |
703 | cpu_throttle_timer_tick, NULL); | |
4603ea01 PD |
704 | } |
705 | ||
1ad9580b | 706 | void configure_icount(QemuOpts *opts, Error **errp) |
946fb27c | 707 | { |
1ad9580b | 708 | const char *option; |
a8bfac37 | 709 | char *rem_str = NULL; |
1ad9580b | 710 | |
1ad9580b | 711 | option = qemu_opt_get(opts, "shift"); |
946fb27c | 712 | if (!option) { |
a8bfac37 ST |
713 | if (qemu_opt_get(opts, "align") != NULL) { |
714 | error_setg(errp, "Please specify shift option when using align"); | |
715 | } | |
946fb27c PB |
716 | return; |
717 | } | |
f1f4b57e VC |
718 | |
719 | icount_sleep = qemu_opt_get_bool(opts, "sleep", true); | |
5045e9d9 VC |
720 | if (icount_sleep) { |
721 | icount_warp_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL_RT, | |
e76d1798 | 722 | icount_timer_cb, NULL); |
5045e9d9 | 723 | } |
f1f4b57e | 724 | |
a8bfac37 | 725 | icount_align_option = qemu_opt_get_bool(opts, "align", false); |
f1f4b57e VC |
726 | |
727 | if (icount_align_option && !icount_sleep) { | |
778d9f9b | 728 | error_setg(errp, "align=on and sleep=off are incompatible"); |
f1f4b57e | 729 | } |
946fb27c | 730 | if (strcmp(option, "auto") != 0) { |
a8bfac37 ST |
731 | errno = 0; |
732 | icount_time_shift = strtol(option, &rem_str, 0); | |
733 | if (errno != 0 || *rem_str != '\0' || !strlen(option)) { | |
734 | error_setg(errp, "icount: Invalid shift value"); | |
735 | } | |
946fb27c PB |
736 | use_icount = 1; |
737 | return; | |
a8bfac37 ST |
738 | } else if (icount_align_option) { |
739 | error_setg(errp, "shift=auto and align=on are incompatible"); | |
f1f4b57e | 740 | } else if (!icount_sleep) { |
778d9f9b | 741 | error_setg(errp, "shift=auto and sleep=off are incompatible"); |
946fb27c PB |
742 | } |
743 | ||
744 | use_icount = 2; | |
745 | ||
746 | /* 125MIPS seems a reasonable initial guess at the guest speed. | |
747 | It will be corrected fairly quickly anyway. */ | |
748 | icount_time_shift = 3; | |
749 | ||
750 | /* Have both realtime and virtual time triggers for speed adjustment. | |
751 | The realtime trigger catches emulated time passing too slowly, | |
752 | the virtual time trigger catches emulated time passing too fast. | |
753 | Realtime triggers occur even when idle, so use them less frequently | |
754 | than VM triggers. */ | |
bf2a7ddb PD |
755 | icount_rt_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL_RT, |
756 | icount_adjust_rt, NULL); | |
40daca54 | 757 | timer_mod(icount_rt_timer, |
bf2a7ddb | 758 | qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL_RT) + 1000); |
40daca54 AB |
759 | icount_vm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, |
760 | icount_adjust_vm, NULL); | |
761 | timer_mod(icount_vm_timer, | |
762 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
73bcb24d | 763 | NANOSECONDS_PER_SECOND / 10); |
946fb27c PB |
764 | } |
765 | ||
6546706d AB |
766 | /***********************************************************/ |
767 | /* TCG vCPU kick timer | |
768 | * | |
769 | * The kick timer is responsible for moving single threaded vCPU | |
770 | * emulation on to the next vCPU. If more than one vCPU is running a | |
771 | * timer event with force a cpu->exit so the next vCPU can get | |
772 | * scheduled. | |
773 | * | |
774 | * The timer is removed if all vCPUs are idle and restarted again once | |
775 | * idleness is complete. | |
776 | */ | |
777 | ||
778 | static QEMUTimer *tcg_kick_vcpu_timer; | |
791158d9 | 779 | static CPUState *tcg_current_rr_cpu; |
6546706d AB |
780 | |
781 | #define TCG_KICK_PERIOD (NANOSECONDS_PER_SECOND / 10) | |
782 | ||
783 | static inline int64_t qemu_tcg_next_kick(void) | |
784 | { | |
785 | return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + TCG_KICK_PERIOD; | |
786 | } | |
787 | ||
791158d9 AB |
788 | /* Kick the currently round-robin scheduled vCPU */ |
789 | static void qemu_cpu_kick_rr_cpu(void) | |
790 | { | |
791 | CPUState *cpu; | |
791158d9 AB |
792 | do { |
793 | cpu = atomic_mb_read(&tcg_current_rr_cpu); | |
794 | if (cpu) { | |
795 | cpu_exit(cpu); | |
796 | } | |
797 | } while (cpu != atomic_mb_read(&tcg_current_rr_cpu)); | |
798 | } | |
799 | ||
6546706d AB |
800 | static void kick_tcg_thread(void *opaque) |
801 | { | |
802 | timer_mod(tcg_kick_vcpu_timer, qemu_tcg_next_kick()); | |
791158d9 | 803 | qemu_cpu_kick_rr_cpu(); |
6546706d AB |
804 | } |
805 | ||
806 | static void start_tcg_kick_timer(void) | |
807 | { | |
37257942 | 808 | if (!mttcg_enabled && !tcg_kick_vcpu_timer && CPU_NEXT(first_cpu)) { |
6546706d AB |
809 | tcg_kick_vcpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, |
810 | kick_tcg_thread, NULL); | |
811 | timer_mod(tcg_kick_vcpu_timer, qemu_tcg_next_kick()); | |
812 | } | |
813 | } | |
814 | ||
815 | static void stop_tcg_kick_timer(void) | |
816 | { | |
817 | if (tcg_kick_vcpu_timer) { | |
818 | timer_del(tcg_kick_vcpu_timer); | |
819 | tcg_kick_vcpu_timer = NULL; | |
820 | } | |
821 | } | |
822 | ||
296af7c9 BS |
823 | /***********************************************************/ |
824 | void hw_error(const char *fmt, ...) | |
825 | { | |
826 | va_list ap; | |
55e5c285 | 827 | CPUState *cpu; |
296af7c9 BS |
828 | |
829 | va_start(ap, fmt); | |
830 | fprintf(stderr, "qemu: hardware error: "); | |
831 | vfprintf(stderr, fmt, ap); | |
832 | fprintf(stderr, "\n"); | |
bdc44640 | 833 | CPU_FOREACH(cpu) { |
55e5c285 | 834 | fprintf(stderr, "CPU #%d:\n", cpu->cpu_index); |
878096ee | 835 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU); |
296af7c9 BS |
836 | } |
837 | va_end(ap); | |
838 | abort(); | |
839 | } | |
840 | ||
841 | void cpu_synchronize_all_states(void) | |
842 | { | |
182735ef | 843 | CPUState *cpu; |
296af7c9 | 844 | |
bdc44640 | 845 | CPU_FOREACH(cpu) { |
182735ef | 846 | cpu_synchronize_state(cpu); |
296af7c9 BS |
847 | } |
848 | } | |
849 | ||
850 | void cpu_synchronize_all_post_reset(void) | |
851 | { | |
182735ef | 852 | CPUState *cpu; |
296af7c9 | 853 | |
bdc44640 | 854 | CPU_FOREACH(cpu) { |
182735ef | 855 | cpu_synchronize_post_reset(cpu); |
296af7c9 BS |
856 | } |
857 | } | |
858 | ||
859 | void cpu_synchronize_all_post_init(void) | |
860 | { | |
182735ef | 861 | CPUState *cpu; |
296af7c9 | 862 | |
bdc44640 | 863 | CPU_FOREACH(cpu) { |
182735ef | 864 | cpu_synchronize_post_init(cpu); |
296af7c9 BS |
865 | } |
866 | } | |
867 | ||
56983463 | 868 | static int do_vm_stop(RunState state) |
296af7c9 | 869 | { |
56983463 KW |
870 | int ret = 0; |
871 | ||
1354869c | 872 | if (runstate_is_running()) { |
296af7c9 | 873 | cpu_disable_ticks(); |
296af7c9 | 874 | pause_all_vcpus(); |
f5bbfba1 | 875 | runstate_set(state); |
1dfb4dd9 | 876 | vm_state_notify(0, state); |
a4e15de9 | 877 | qapi_event_send_stop(&error_abort); |
296af7c9 | 878 | } |
56983463 | 879 | |
594a45ce | 880 | bdrv_drain_all(); |
6d0ceb80 | 881 | replay_disable_events(); |
22af08ea | 882 | ret = bdrv_flush_all(); |
594a45ce | 883 | |
56983463 | 884 | return ret; |
296af7c9 BS |
885 | } |
886 | ||
a1fcaa73 | 887 | static bool cpu_can_run(CPUState *cpu) |
296af7c9 | 888 | { |
4fdeee7c | 889 | if (cpu->stop) { |
a1fcaa73 | 890 | return false; |
0ab07c62 | 891 | } |
321bc0b2 | 892 | if (cpu_is_stopped(cpu)) { |
a1fcaa73 | 893 | return false; |
0ab07c62 | 894 | } |
a1fcaa73 | 895 | return true; |
296af7c9 BS |
896 | } |
897 | ||
91325046 | 898 | static void cpu_handle_guest_debug(CPUState *cpu) |
83f338f7 | 899 | { |
64f6b346 | 900 | gdb_set_stop_cpu(cpu); |
8cf71710 | 901 | qemu_system_debug_request(); |
f324e766 | 902 | cpu->stopped = true; |
3c638d06 JK |
903 | } |
904 | ||
6d9cb73c JK |
905 | #ifdef CONFIG_LINUX |
906 | static void sigbus_reraise(void) | |
907 | { | |
908 | sigset_t set; | |
909 | struct sigaction action; | |
910 | ||
911 | memset(&action, 0, sizeof(action)); | |
912 | action.sa_handler = SIG_DFL; | |
913 | if (!sigaction(SIGBUS, &action, NULL)) { | |
914 | raise(SIGBUS); | |
915 | sigemptyset(&set); | |
916 | sigaddset(&set, SIGBUS); | |
a2d1761d | 917 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); |
6d9cb73c JK |
918 | } |
919 | perror("Failed to re-raise SIGBUS!\n"); | |
920 | abort(); | |
921 | } | |
922 | ||
d98d4072 | 923 | static void sigbus_handler(int n, siginfo_t *siginfo, void *ctx) |
6d9cb73c | 924 | { |
d98d4072 | 925 | if (kvm_on_sigbus(siginfo->si_code, siginfo->si_addr)) { |
6d9cb73c JK |
926 | sigbus_reraise(); |
927 | } | |
928 | } | |
929 | ||
930 | static void qemu_init_sigbus(void) | |
931 | { | |
932 | struct sigaction action; | |
933 | ||
934 | memset(&action, 0, sizeof(action)); | |
935 | action.sa_flags = SA_SIGINFO; | |
d98d4072 | 936 | action.sa_sigaction = sigbus_handler; |
6d9cb73c JK |
937 | sigaction(SIGBUS, &action, NULL); |
938 | ||
939 | prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0); | |
940 | } | |
941 | ||
290adf38 | 942 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
943 | { |
944 | struct timespec ts = { 0, 0 }; | |
945 | siginfo_t siginfo; | |
946 | sigset_t waitset; | |
947 | sigset_t chkset; | |
948 | int r; | |
949 | ||
950 | sigemptyset(&waitset); | |
951 | sigaddset(&waitset, SIG_IPI); | |
952 | sigaddset(&waitset, SIGBUS); | |
953 | ||
954 | do { | |
955 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
956 | if (r == -1 && !(errno == EAGAIN || errno == EINTR)) { | |
957 | perror("sigtimedwait"); | |
958 | exit(1); | |
959 | } | |
960 | ||
961 | switch (r) { | |
962 | case SIGBUS: | |
290adf38 | 963 | if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) { |
1ab3c6c0 JK |
964 | sigbus_reraise(); |
965 | } | |
966 | break; | |
967 | default: | |
968 | break; | |
969 | } | |
970 | ||
971 | r = sigpending(&chkset); | |
972 | if (r == -1) { | |
973 | perror("sigpending"); | |
974 | exit(1); | |
975 | } | |
976 | } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS)); | |
1ab3c6c0 JK |
977 | } |
978 | ||
6d9cb73c JK |
979 | #else /* !CONFIG_LINUX */ |
980 | ||
981 | static void qemu_init_sigbus(void) | |
982 | { | |
983 | } | |
1ab3c6c0 | 984 | |
290adf38 | 985 | static void qemu_kvm_eat_signals(CPUState *cpu) |
1ab3c6c0 JK |
986 | { |
987 | } | |
6d9cb73c JK |
988 | #endif /* !CONFIG_LINUX */ |
989 | ||
296af7c9 | 990 | #ifndef _WIN32 |
55f8d6ac JK |
991 | static void dummy_signal(int sig) |
992 | { | |
993 | } | |
55f8d6ac | 994 | |
13618e05 | 995 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
714bd040 PB |
996 | { |
997 | int r; | |
998 | sigset_t set; | |
999 | struct sigaction sigact; | |
1000 | ||
1001 | memset(&sigact, 0, sizeof(sigact)); | |
1002 | sigact.sa_handler = dummy_signal; | |
1003 | sigaction(SIG_IPI, &sigact, NULL); | |
1004 | ||
714bd040 PB |
1005 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
1006 | sigdelset(&set, SIG_IPI); | |
714bd040 | 1007 | sigdelset(&set, SIGBUS); |
491d6e80 | 1008 | r = kvm_set_signal_mask(cpu, &set); |
714bd040 PB |
1009 | if (r) { |
1010 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
1011 | exit(1); | |
1012 | } | |
1013 | } | |
1014 | ||
55f8d6ac | 1015 | #else /* _WIN32 */ |
13618e05 | 1016 | static void qemu_kvm_init_cpu_signals(CPUState *cpu) |
ff48eb5f | 1017 | { |
714bd040 PB |
1018 | abort(); |
1019 | } | |
714bd040 | 1020 | #endif /* _WIN32 */ |
ff48eb5f | 1021 | |
b2532d88 | 1022 | static QemuMutex qemu_global_mutex; |
296af7c9 BS |
1023 | |
1024 | static QemuThread io_thread; | |
1025 | ||
296af7c9 BS |
1026 | /* cpu creation */ |
1027 | static QemuCond qemu_cpu_cond; | |
1028 | /* system init */ | |
296af7c9 BS |
1029 | static QemuCond qemu_pause_cond; |
1030 | ||
d3b12f5d | 1031 | void qemu_init_cpu_loop(void) |
296af7c9 | 1032 | { |
6d9cb73c | 1033 | qemu_init_sigbus(); |
ed94592b | 1034 | qemu_cond_init(&qemu_cpu_cond); |
ed94592b | 1035 | qemu_cond_init(&qemu_pause_cond); |
296af7c9 | 1036 | qemu_mutex_init(&qemu_global_mutex); |
296af7c9 | 1037 | |
b7680cb6 | 1038 | qemu_thread_get_self(&io_thread); |
296af7c9 BS |
1039 | } |
1040 | ||
14e6fe12 | 1041 | void run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data) |
e82bcec2 | 1042 | { |
d148d90e | 1043 | do_run_on_cpu(cpu, func, data, &qemu_global_mutex); |
3c02270d CV |
1044 | } |
1045 | ||
4c055ab5 GZ |
1046 | static void qemu_kvm_destroy_vcpu(CPUState *cpu) |
1047 | { | |
1048 | if (kvm_destroy_vcpu(cpu) < 0) { | |
1049 | error_report("kvm_destroy_vcpu failed"); | |
1050 | exit(EXIT_FAILURE); | |
1051 | } | |
1052 | } | |
1053 | ||
1054 | static void qemu_tcg_destroy_vcpu(CPUState *cpu) | |
1055 | { | |
1056 | } | |
1057 | ||
509a0d78 | 1058 | static void qemu_wait_io_event_common(CPUState *cpu) |
296af7c9 | 1059 | { |
37257942 | 1060 | atomic_mb_set(&cpu->thread_kicked, false); |
4fdeee7c AF |
1061 | if (cpu->stop) { |
1062 | cpu->stop = false; | |
f324e766 | 1063 | cpu->stopped = true; |
96bce683 | 1064 | qemu_cond_broadcast(&qemu_pause_cond); |
296af7c9 | 1065 | } |
a5403c69 | 1066 | process_queued_cpu_work(cpu); |
37257942 AB |
1067 | } |
1068 | ||
1069 | static bool qemu_tcg_should_sleep(CPUState *cpu) | |
1070 | { | |
1071 | if (mttcg_enabled) { | |
1072 | return cpu_thread_is_idle(cpu); | |
1073 | } else { | |
1074 | return all_cpu_threads_idle(); | |
1075 | } | |
296af7c9 BS |
1076 | } |
1077 | ||
d5f8d613 | 1078 | static void qemu_tcg_wait_io_event(CPUState *cpu) |
296af7c9 | 1079 | { |
37257942 | 1080 | while (qemu_tcg_should_sleep(cpu)) { |
6546706d | 1081 | stop_tcg_kick_timer(); |
d5f8d613 | 1082 | qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); |
16400322 | 1083 | } |
296af7c9 | 1084 | |
6546706d AB |
1085 | start_tcg_kick_timer(); |
1086 | ||
37257942 | 1087 | qemu_wait_io_event_common(cpu); |
296af7c9 BS |
1088 | } |
1089 | ||
fd529e8f | 1090 | static void qemu_kvm_wait_io_event(CPUState *cpu) |
296af7c9 | 1091 | { |
a98ae1d8 | 1092 | while (cpu_thread_is_idle(cpu)) { |
f5c121b8 | 1093 | qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); |
16400322 | 1094 | } |
296af7c9 | 1095 | |
290adf38 | 1096 | qemu_kvm_eat_signals(cpu); |
509a0d78 | 1097 | qemu_wait_io_event_common(cpu); |
296af7c9 BS |
1098 | } |
1099 | ||
7e97cd88 | 1100 | static void *qemu_kvm_cpu_thread_fn(void *arg) |
296af7c9 | 1101 | { |
48a106bd | 1102 | CPUState *cpu = arg; |
84b4915d | 1103 | int r; |
296af7c9 | 1104 | |
ab28bd23 PB |
1105 | rcu_register_thread(); |
1106 | ||
2e7f7a3c | 1107 | qemu_mutex_lock_iothread(); |
814e612e | 1108 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 1109 | cpu->thread_id = qemu_get_thread_id(); |
626cf8f4 | 1110 | cpu->can_do_io = 1; |
4917cf44 | 1111 | current_cpu = cpu; |
296af7c9 | 1112 | |
504134d2 | 1113 | r = kvm_init_vcpu(cpu); |
84b4915d JK |
1114 | if (r < 0) { |
1115 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
1116 | exit(1); | |
1117 | } | |
296af7c9 | 1118 | |
13618e05 | 1119 | qemu_kvm_init_cpu_signals(cpu); |
296af7c9 BS |
1120 | |
1121 | /* signal CPU creation */ | |
61a46217 | 1122 | cpu->created = true; |
296af7c9 BS |
1123 | qemu_cond_signal(&qemu_cpu_cond); |
1124 | ||
4c055ab5 | 1125 | do { |
a1fcaa73 | 1126 | if (cpu_can_run(cpu)) { |
1458c363 | 1127 | r = kvm_cpu_exec(cpu); |
83f338f7 | 1128 | if (r == EXCP_DEBUG) { |
91325046 | 1129 | cpu_handle_guest_debug(cpu); |
83f338f7 | 1130 | } |
0ab07c62 | 1131 | } |
fd529e8f | 1132 | qemu_kvm_wait_io_event(cpu); |
4c055ab5 | 1133 | } while (!cpu->unplug || cpu_can_run(cpu)); |
296af7c9 | 1134 | |
4c055ab5 | 1135 | qemu_kvm_destroy_vcpu(cpu); |
2c579042 BR |
1136 | cpu->created = false; |
1137 | qemu_cond_signal(&qemu_cpu_cond); | |
4c055ab5 | 1138 | qemu_mutex_unlock_iothread(); |
296af7c9 BS |
1139 | return NULL; |
1140 | } | |
1141 | ||
c7f0f3b1 AL |
1142 | static void *qemu_dummy_cpu_thread_fn(void *arg) |
1143 | { | |
1144 | #ifdef _WIN32 | |
1145 | fprintf(stderr, "qtest is not supported under Windows\n"); | |
1146 | exit(1); | |
1147 | #else | |
10a9021d | 1148 | CPUState *cpu = arg; |
c7f0f3b1 AL |
1149 | sigset_t waitset; |
1150 | int r; | |
1151 | ||
ab28bd23 PB |
1152 | rcu_register_thread(); |
1153 | ||
c7f0f3b1 | 1154 | qemu_mutex_lock_iothread(); |
814e612e | 1155 | qemu_thread_get_self(cpu->thread); |
9f09e18a | 1156 | cpu->thread_id = qemu_get_thread_id(); |
626cf8f4 | 1157 | cpu->can_do_io = 1; |
37257942 | 1158 | current_cpu = cpu; |
c7f0f3b1 AL |
1159 | |
1160 | sigemptyset(&waitset); | |
1161 | sigaddset(&waitset, SIG_IPI); | |
1162 | ||
1163 | /* signal CPU creation */ | |
61a46217 | 1164 | cpu->created = true; |
c7f0f3b1 AL |
1165 | qemu_cond_signal(&qemu_cpu_cond); |
1166 | ||
c7f0f3b1 | 1167 | while (1) { |
c7f0f3b1 AL |
1168 | qemu_mutex_unlock_iothread(); |
1169 | do { | |
1170 | int sig; | |
1171 | r = sigwait(&waitset, &sig); | |
1172 | } while (r == -1 && (errno == EAGAIN || errno == EINTR)); | |
1173 | if (r == -1) { | |
1174 | perror("sigwait"); | |
1175 | exit(1); | |
1176 | } | |
1177 | qemu_mutex_lock_iothread(); | |
509a0d78 | 1178 | qemu_wait_io_event_common(cpu); |
c7f0f3b1 AL |
1179 | } |
1180 | ||
1181 | return NULL; | |
1182 | #endif | |
1183 | } | |
1184 | ||
1be7fcb8 AB |
1185 | static int64_t tcg_get_icount_limit(void) |
1186 | { | |
1187 | int64_t deadline; | |
1188 | ||
1189 | if (replay_mode != REPLAY_MODE_PLAY) { | |
1190 | deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); | |
1191 | ||
1192 | /* Maintain prior (possibly buggy) behaviour where if no deadline | |
1193 | * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than | |
1194 | * INT32_MAX nanoseconds ahead, we still use INT32_MAX | |
1195 | * nanoseconds. | |
1196 | */ | |
1197 | if ((deadline < 0) || (deadline > INT32_MAX)) { | |
1198 | deadline = INT32_MAX; | |
1199 | } | |
1200 | ||
1201 | return qemu_icount_round(deadline); | |
1202 | } else { | |
1203 | return replay_get_instructions(); | |
1204 | } | |
1205 | } | |
1206 | ||
12e9700d AB |
1207 | static void handle_icount_deadline(void) |
1208 | { | |
1209 | if (use_icount) { | |
1210 | int64_t deadline = | |
1211 | qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); | |
1212 | ||
1213 | if (deadline == 0) { | |
1214 | qemu_clock_notify(QEMU_CLOCK_VIRTUAL); | |
1215 | } | |
1216 | } | |
1217 | } | |
1218 | ||
1be7fcb8 AB |
1219 | static int tcg_cpu_exec(CPUState *cpu) |
1220 | { | |
1221 | int ret; | |
1222 | #ifdef CONFIG_PROFILER | |
1223 | int64_t ti; | |
1224 | #endif | |
1225 | ||
1226 | #ifdef CONFIG_PROFILER | |
1227 | ti = profile_getclock(); | |
1228 | #endif | |
1229 | if (use_icount) { | |
1230 | int64_t count; | |
1231 | int decr; | |
1232 | timers_state.qemu_icount -= (cpu->icount_decr.u16.low | |
1233 | + cpu->icount_extra); | |
1234 | cpu->icount_decr.u16.low = 0; | |
1235 | cpu->icount_extra = 0; | |
1236 | count = tcg_get_icount_limit(); | |
1237 | timers_state.qemu_icount += count; | |
1238 | decr = (count > 0xffff) ? 0xffff : count; | |
1239 | count -= decr; | |
1240 | cpu->icount_decr.u16.low = decr; | |
1241 | cpu->icount_extra = count; | |
1242 | } | |
8d04fb55 | 1243 | qemu_mutex_unlock_iothread(); |
1be7fcb8 AB |
1244 | cpu_exec_start(cpu); |
1245 | ret = cpu_exec(cpu); | |
1246 | cpu_exec_end(cpu); | |
8d04fb55 | 1247 | qemu_mutex_lock_iothread(); |
1be7fcb8 AB |
1248 | #ifdef CONFIG_PROFILER |
1249 | tcg_time += profile_getclock() - ti; | |
1250 | #endif | |
1251 | if (use_icount) { | |
1252 | /* Fold pending instructions back into the | |
1253 | instruction counter, and clear the interrupt flag. */ | |
1254 | timers_state.qemu_icount -= (cpu->icount_decr.u16.low | |
1255 | + cpu->icount_extra); | |
1256 | cpu->icount_decr.u32 = 0; | |
1257 | cpu->icount_extra = 0; | |
1258 | replay_account_executed_instructions(); | |
1259 | } | |
1260 | return ret; | |
1261 | } | |
1262 | ||
c93bbbef AB |
1263 | /* Destroy any remaining vCPUs which have been unplugged and have |
1264 | * finished running | |
1265 | */ | |
1266 | static void deal_with_unplugged_cpus(void) | |
1be7fcb8 | 1267 | { |
c93bbbef | 1268 | CPUState *cpu; |
1be7fcb8 | 1269 | |
c93bbbef AB |
1270 | CPU_FOREACH(cpu) { |
1271 | if (cpu->unplug && !cpu_can_run(cpu)) { | |
1272 | qemu_tcg_destroy_vcpu(cpu); | |
1273 | cpu->created = false; | |
1274 | qemu_cond_signal(&qemu_cpu_cond); | |
1be7fcb8 AB |
1275 | break; |
1276 | } | |
1277 | } | |
1be7fcb8 | 1278 | } |
bdb7ca67 | 1279 | |
6546706d AB |
1280 | /* Single-threaded TCG |
1281 | * | |
1282 | * In the single-threaded case each vCPU is simulated in turn. If | |
1283 | * there is more than a single vCPU we create a simple timer to kick | |
1284 | * the vCPU and ensure we don't get stuck in a tight loop in one vCPU. | |
1285 | * This is done explicitly rather than relying on side-effects | |
1286 | * elsewhere. | |
1287 | */ | |
1288 | ||
37257942 | 1289 | static void *qemu_tcg_rr_cpu_thread_fn(void *arg) |
296af7c9 | 1290 | { |
c3586ba7 | 1291 | CPUState *cpu = arg; |
296af7c9 | 1292 | |
ab28bd23 PB |
1293 | rcu_register_thread(); |
1294 | ||
2e7f7a3c | 1295 | qemu_mutex_lock_iothread(); |
814e612e | 1296 | qemu_thread_get_self(cpu->thread); |
296af7c9 | 1297 | |
38fcbd3f AF |
1298 | CPU_FOREACH(cpu) { |
1299 | cpu->thread_id = qemu_get_thread_id(); | |
1300 | cpu->created = true; | |
626cf8f4 | 1301 | cpu->can_do_io = 1; |
38fcbd3f | 1302 | } |
296af7c9 BS |
1303 | qemu_cond_signal(&qemu_cpu_cond); |
1304 | ||
fa7d1867 | 1305 | /* wait for initial kick-off after machine start */ |
c28e399c | 1306 | while (first_cpu->stopped) { |
d5f8d613 | 1307 | qemu_cond_wait(first_cpu->halt_cond, &qemu_global_mutex); |
8e564b4e JK |
1308 | |
1309 | /* process any pending work */ | |
bdc44640 | 1310 | CPU_FOREACH(cpu) { |
37257942 | 1311 | current_cpu = cpu; |
182735ef | 1312 | qemu_wait_io_event_common(cpu); |
8e564b4e | 1313 | } |
0ab07c62 | 1314 | } |
296af7c9 | 1315 | |
6546706d AB |
1316 | start_tcg_kick_timer(); |
1317 | ||
c93bbbef AB |
1318 | cpu = first_cpu; |
1319 | ||
e5143e30 AB |
1320 | /* process any pending work */ |
1321 | cpu->exit_request = 1; | |
1322 | ||
296af7c9 | 1323 | while (1) { |
c93bbbef AB |
1324 | /* Account partial waits to QEMU_CLOCK_VIRTUAL. */ |
1325 | qemu_account_warp_timer(); | |
1326 | ||
1327 | if (!cpu) { | |
1328 | cpu = first_cpu; | |
1329 | } | |
1330 | ||
e5143e30 AB |
1331 | while (cpu && !cpu->queued_work_first && !cpu->exit_request) { |
1332 | ||
791158d9 | 1333 | atomic_mb_set(&tcg_current_rr_cpu, cpu); |
37257942 | 1334 | current_cpu = cpu; |
c93bbbef AB |
1335 | |
1336 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, | |
1337 | (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0); | |
1338 | ||
1339 | if (cpu_can_run(cpu)) { | |
1340 | int r; | |
1341 | r = tcg_cpu_exec(cpu); | |
1342 | if (r == EXCP_DEBUG) { | |
1343 | cpu_handle_guest_debug(cpu); | |
1344 | break; | |
08e73c48 PK |
1345 | } else if (r == EXCP_ATOMIC) { |
1346 | qemu_mutex_unlock_iothread(); | |
1347 | cpu_exec_step_atomic(cpu); | |
1348 | qemu_mutex_lock_iothread(); | |
1349 | break; | |
c93bbbef | 1350 | } |
37257942 | 1351 | } else if (cpu->stop) { |
c93bbbef AB |
1352 | if (cpu->unplug) { |
1353 | cpu = CPU_NEXT(cpu); | |
1354 | } | |
1355 | break; | |
1356 | } | |
1357 | ||
e5143e30 AB |
1358 | cpu = CPU_NEXT(cpu); |
1359 | } /* while (cpu && !cpu->exit_request).. */ | |
1360 | ||
791158d9 AB |
1361 | /* Does not need atomic_mb_set because a spurious wakeup is okay. */ |
1362 | atomic_set(&tcg_current_rr_cpu, NULL); | |
c93bbbef | 1363 | |
e5143e30 AB |
1364 | if (cpu && cpu->exit_request) { |
1365 | atomic_mb_set(&cpu->exit_request, 0); | |
1366 | } | |
ac70aafc | 1367 | |
12e9700d | 1368 | handle_icount_deadline(); |
ac70aafc | 1369 | |
37257942 | 1370 | qemu_tcg_wait_io_event(cpu ? cpu : QTAILQ_FIRST(&cpus)); |
c93bbbef | 1371 | deal_with_unplugged_cpus(); |
296af7c9 BS |
1372 | } |
1373 | ||
1374 | return NULL; | |
1375 | } | |
1376 | ||
b0cb0a66 VP |
1377 | static void *qemu_hax_cpu_thread_fn(void *arg) |
1378 | { | |
1379 | CPUState *cpu = arg; | |
1380 | int r; | |
1381 | qemu_thread_get_self(cpu->thread); | |
1382 | qemu_mutex_lock(&qemu_global_mutex); | |
1383 | ||
1384 | cpu->thread_id = qemu_get_thread_id(); | |
1385 | cpu->created = true; | |
1386 | cpu->halted = 0; | |
1387 | current_cpu = cpu; | |
1388 | ||
1389 | hax_init_vcpu(cpu); | |
1390 | qemu_cond_signal(&qemu_cpu_cond); | |
1391 | ||
1392 | while (1) { | |
1393 | if (cpu_can_run(cpu)) { | |
1394 | r = hax_smp_cpu_exec(cpu); | |
1395 | if (r == EXCP_DEBUG) { | |
1396 | cpu_handle_guest_debug(cpu); | |
1397 | } | |
1398 | } | |
1399 | ||
1400 | while (cpu_thread_is_idle(cpu)) { | |
1401 | qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex); | |
1402 | } | |
1403 | #ifdef _WIN32 | |
1404 | SleepEx(0, TRUE); | |
1405 | #endif | |
1406 | qemu_wait_io_event_common(cpu); | |
1407 | } | |
1408 | return NULL; | |
1409 | } | |
1410 | ||
1411 | #ifdef _WIN32 | |
1412 | static void CALLBACK dummy_apc_func(ULONG_PTR unused) | |
1413 | { | |
1414 | } | |
1415 | #endif | |
1416 | ||
37257942 AB |
1417 | /* Multi-threaded TCG |
1418 | * | |
1419 | * In the multi-threaded case each vCPU has its own thread. The TLS | |
1420 | * variable current_cpu can be used deep in the code to find the | |
1421 | * current CPUState for a given thread. | |
1422 | */ | |
1423 | ||
1424 | static void *qemu_tcg_cpu_thread_fn(void *arg) | |
1425 | { | |
1426 | CPUState *cpu = arg; | |
1427 | ||
1428 | rcu_register_thread(); | |
1429 | ||
1430 | qemu_mutex_lock_iothread(); | |
1431 | qemu_thread_get_self(cpu->thread); | |
1432 | ||
1433 | cpu->thread_id = qemu_get_thread_id(); | |
1434 | cpu->created = true; | |
1435 | cpu->can_do_io = 1; | |
1436 | current_cpu = cpu; | |
1437 | qemu_cond_signal(&qemu_cpu_cond); | |
1438 | ||
1439 | /* process any pending work */ | |
1440 | cpu->exit_request = 1; | |
1441 | ||
1442 | while (1) { | |
1443 | if (cpu_can_run(cpu)) { | |
1444 | int r; | |
1445 | r = tcg_cpu_exec(cpu); | |
1446 | switch (r) { | |
1447 | case EXCP_DEBUG: | |
1448 | cpu_handle_guest_debug(cpu); | |
1449 | break; | |
1450 | case EXCP_HALTED: | |
1451 | /* during start-up the vCPU is reset and the thread is | |
1452 | * kicked several times. If we don't ensure we go back | |
1453 | * to sleep in the halted state we won't cleanly | |
1454 | * start-up when the vCPU is enabled. | |
1455 | * | |
1456 | * cpu->halted should ensure we sleep in wait_io_event | |
1457 | */ | |
1458 | g_assert(cpu->halted); | |
1459 | break; | |
08e73c48 PK |
1460 | case EXCP_ATOMIC: |
1461 | qemu_mutex_unlock_iothread(); | |
1462 | cpu_exec_step_atomic(cpu); | |
1463 | qemu_mutex_lock_iothread(); | |
37257942 AB |
1464 | default: |
1465 | /* Ignore everything else? */ | |
1466 | break; | |
1467 | } | |
1468 | } | |
1469 | ||
1470 | handle_icount_deadline(); | |
1471 | ||
1472 | atomic_mb_set(&cpu->exit_request, 0); | |
1473 | qemu_tcg_wait_io_event(cpu); | |
1474 | } | |
1475 | ||
1476 | return NULL; | |
1477 | } | |
1478 | ||
2ff09a40 | 1479 | static void qemu_cpu_kick_thread(CPUState *cpu) |
cc015e9a PB |
1480 | { |
1481 | #ifndef _WIN32 | |
1482 | int err; | |
1483 | ||
e0c38211 PB |
1484 | if (cpu->thread_kicked) { |
1485 | return; | |
9102deda | 1486 | } |
e0c38211 | 1487 | cpu->thread_kicked = true; |
814e612e | 1488 | err = pthread_kill(cpu->thread->thread, SIG_IPI); |
cc015e9a PB |
1489 | if (err) { |
1490 | fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); | |
1491 | exit(1); | |
1492 | } | |
1493 | #else /* _WIN32 */ | |
b0cb0a66 VP |
1494 | if (!qemu_cpu_is_self(cpu)) { |
1495 | if (!QueueUserAPC(dummy_apc_func, cpu->hThread, 0)) { | |
1496 | fprintf(stderr, "%s: QueueUserAPC failed with error %lu\n", | |
1497 | __func__, GetLastError()); | |
1498 | exit(1); | |
1499 | } | |
1500 | } | |
e0c38211 PB |
1501 | #endif |
1502 | } | |
ed9164a3 | 1503 | |
c08d7424 | 1504 | void qemu_cpu_kick(CPUState *cpu) |
296af7c9 | 1505 | { |
f5c121b8 | 1506 | qemu_cond_broadcast(cpu->halt_cond); |
e0c38211 | 1507 | if (tcg_enabled()) { |
791158d9 | 1508 | cpu_exit(cpu); |
37257942 | 1509 | /* NOP unless doing single-thread RR */ |
791158d9 | 1510 | qemu_cpu_kick_rr_cpu(); |
e0c38211 | 1511 | } else { |
b0cb0a66 VP |
1512 | if (hax_enabled()) { |
1513 | /* | |
1514 | * FIXME: race condition with the exit_request check in | |
1515 | * hax_vcpu_hax_exec | |
1516 | */ | |
1517 | cpu->exit_request = 1; | |
1518 | } | |
e0c38211 PB |
1519 | qemu_cpu_kick_thread(cpu); |
1520 | } | |
296af7c9 BS |
1521 | } |
1522 | ||
46d62fac | 1523 | void qemu_cpu_kick_self(void) |
296af7c9 | 1524 | { |
4917cf44 | 1525 | assert(current_cpu); |
9102deda | 1526 | qemu_cpu_kick_thread(current_cpu); |
296af7c9 BS |
1527 | } |
1528 | ||
60e82579 | 1529 | bool qemu_cpu_is_self(CPUState *cpu) |
296af7c9 | 1530 | { |
814e612e | 1531 | return qemu_thread_is_self(cpu->thread); |
296af7c9 BS |
1532 | } |
1533 | ||
79e2b9ae | 1534 | bool qemu_in_vcpu_thread(void) |
aa723c23 | 1535 | { |
4917cf44 | 1536 | return current_cpu && qemu_cpu_is_self(current_cpu); |
aa723c23 JQ |
1537 | } |
1538 | ||
afbe7053 PB |
1539 | static __thread bool iothread_locked = false; |
1540 | ||
1541 | bool qemu_mutex_iothread_locked(void) | |
1542 | { | |
1543 | return iothread_locked; | |
1544 | } | |
1545 | ||
296af7c9 BS |
1546 | void qemu_mutex_lock_iothread(void) |
1547 | { | |
8d04fb55 JK |
1548 | g_assert(!qemu_mutex_iothread_locked()); |
1549 | qemu_mutex_lock(&qemu_global_mutex); | |
afbe7053 | 1550 | iothread_locked = true; |
296af7c9 BS |
1551 | } |
1552 | ||
1553 | void qemu_mutex_unlock_iothread(void) | |
1554 | { | |
8d04fb55 | 1555 | g_assert(qemu_mutex_iothread_locked()); |
afbe7053 | 1556 | iothread_locked = false; |
296af7c9 BS |
1557 | qemu_mutex_unlock(&qemu_global_mutex); |
1558 | } | |
1559 | ||
e8faee06 | 1560 | static bool all_vcpus_paused(void) |
296af7c9 | 1561 | { |
bdc44640 | 1562 | CPUState *cpu; |
296af7c9 | 1563 | |
bdc44640 | 1564 | CPU_FOREACH(cpu) { |
182735ef | 1565 | if (!cpu->stopped) { |
e8faee06 | 1566 | return false; |
0ab07c62 | 1567 | } |
296af7c9 BS |
1568 | } |
1569 | ||
e8faee06 | 1570 | return true; |
296af7c9 BS |
1571 | } |
1572 | ||
1573 | void pause_all_vcpus(void) | |
1574 | { | |
bdc44640 | 1575 | CPUState *cpu; |
296af7c9 | 1576 | |
40daca54 | 1577 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, false); |
bdc44640 | 1578 | CPU_FOREACH(cpu) { |
182735ef AF |
1579 | cpu->stop = true; |
1580 | qemu_cpu_kick(cpu); | |
296af7c9 BS |
1581 | } |
1582 | ||
aa723c23 | 1583 | if (qemu_in_vcpu_thread()) { |
d798e974 | 1584 | cpu_stop_current(); |
d798e974 JK |
1585 | } |
1586 | ||
296af7c9 | 1587 | while (!all_vcpus_paused()) { |
be7d6c57 | 1588 | qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex); |
bdc44640 | 1589 | CPU_FOREACH(cpu) { |
182735ef | 1590 | qemu_cpu_kick(cpu); |
296af7c9 BS |
1591 | } |
1592 | } | |
1593 | } | |
1594 | ||
2993683b IM |
1595 | void cpu_resume(CPUState *cpu) |
1596 | { | |
1597 | cpu->stop = false; | |
1598 | cpu->stopped = false; | |
1599 | qemu_cpu_kick(cpu); | |
1600 | } | |
1601 | ||
296af7c9 BS |
1602 | void resume_all_vcpus(void) |
1603 | { | |
bdc44640 | 1604 | CPUState *cpu; |
296af7c9 | 1605 | |
40daca54 | 1606 | qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true); |
bdc44640 | 1607 | CPU_FOREACH(cpu) { |
182735ef | 1608 | cpu_resume(cpu); |
296af7c9 BS |
1609 | } |
1610 | } | |
1611 | ||
4c055ab5 GZ |
1612 | void cpu_remove(CPUState *cpu) |
1613 | { | |
1614 | cpu->stop = true; | |
1615 | cpu->unplug = true; | |
1616 | qemu_cpu_kick(cpu); | |
1617 | } | |
1618 | ||
2c579042 BR |
1619 | void cpu_remove_sync(CPUState *cpu) |
1620 | { | |
1621 | cpu_remove(cpu); | |
1622 | while (cpu->created) { | |
1623 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); | |
1624 | } | |
1625 | } | |
1626 | ||
4900116e DDAG |
1627 | /* For temporary buffers for forming a name */ |
1628 | #define VCPU_THREAD_NAME_SIZE 16 | |
1629 | ||
e5ab30a2 | 1630 | static void qemu_tcg_init_vcpu(CPUState *cpu) |
296af7c9 | 1631 | { |
4900116e | 1632 | char thread_name[VCPU_THREAD_NAME_SIZE]; |
37257942 AB |
1633 | static QemuCond *single_tcg_halt_cond; |
1634 | static QemuThread *single_tcg_cpu_thread; | |
4900116e | 1635 | |
37257942 | 1636 | if (qemu_tcg_mttcg_enabled() || !single_tcg_cpu_thread) { |
814e612e | 1637 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1638 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1639 | qemu_cond_init(cpu->halt_cond); | |
37257942 AB |
1640 | |
1641 | if (qemu_tcg_mttcg_enabled()) { | |
1642 | /* create a thread per vCPU with TCG (MTTCG) */ | |
1643 | parallel_cpus = true; | |
1644 | snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/TCG", | |
4900116e | 1645 | cpu->cpu_index); |
37257942 AB |
1646 | |
1647 | qemu_thread_create(cpu->thread, thread_name, qemu_tcg_cpu_thread_fn, | |
1648 | cpu, QEMU_THREAD_JOINABLE); | |
1649 | ||
1650 | } else { | |
1651 | /* share a single thread for all cpus with TCG */ | |
1652 | snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "ALL CPUs/TCG"); | |
1653 | qemu_thread_create(cpu->thread, thread_name, | |
1654 | qemu_tcg_rr_cpu_thread_fn, | |
1655 | cpu, QEMU_THREAD_JOINABLE); | |
1656 | ||
1657 | single_tcg_halt_cond = cpu->halt_cond; | |
1658 | single_tcg_cpu_thread = cpu->thread; | |
1659 | } | |
1ecf47bf | 1660 | #ifdef _WIN32 |
814e612e | 1661 | cpu->hThread = qemu_thread_get_handle(cpu->thread); |
1ecf47bf | 1662 | #endif |
61a46217 | 1663 | while (!cpu->created) { |
18a85728 | 1664 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1665 | } |
296af7c9 | 1666 | } else { |
37257942 AB |
1667 | /* For non-MTTCG cases we share the thread */ |
1668 | cpu->thread = single_tcg_cpu_thread; | |
1669 | cpu->halt_cond = single_tcg_halt_cond; | |
296af7c9 BS |
1670 | } |
1671 | } | |
1672 | ||
b0cb0a66 VP |
1673 | static void qemu_hax_start_vcpu(CPUState *cpu) |
1674 | { | |
1675 | char thread_name[VCPU_THREAD_NAME_SIZE]; | |
1676 | ||
1677 | cpu->thread = g_malloc0(sizeof(QemuThread)); | |
1678 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); | |
1679 | qemu_cond_init(cpu->halt_cond); | |
1680 | ||
1681 | snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/HAX", | |
1682 | cpu->cpu_index); | |
1683 | qemu_thread_create(cpu->thread, thread_name, qemu_hax_cpu_thread_fn, | |
1684 | cpu, QEMU_THREAD_JOINABLE); | |
1685 | #ifdef _WIN32 | |
1686 | cpu->hThread = qemu_thread_get_handle(cpu->thread); | |
1687 | #endif | |
1688 | while (!cpu->created) { | |
1689 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); | |
1690 | } | |
1691 | } | |
1692 | ||
48a106bd | 1693 | static void qemu_kvm_start_vcpu(CPUState *cpu) |
296af7c9 | 1694 | { |
4900116e DDAG |
1695 | char thread_name[VCPU_THREAD_NAME_SIZE]; |
1696 | ||
814e612e | 1697 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1698 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1699 | qemu_cond_init(cpu->halt_cond); | |
4900116e DDAG |
1700 | snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/KVM", |
1701 | cpu->cpu_index); | |
1702 | qemu_thread_create(cpu->thread, thread_name, qemu_kvm_cpu_thread_fn, | |
1703 | cpu, QEMU_THREAD_JOINABLE); | |
61a46217 | 1704 | while (!cpu->created) { |
18a85728 | 1705 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1706 | } |
296af7c9 BS |
1707 | } |
1708 | ||
10a9021d | 1709 | static void qemu_dummy_start_vcpu(CPUState *cpu) |
c7f0f3b1 | 1710 | { |
4900116e DDAG |
1711 | char thread_name[VCPU_THREAD_NAME_SIZE]; |
1712 | ||
814e612e | 1713 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
f5c121b8 AF |
1714 | cpu->halt_cond = g_malloc0(sizeof(QemuCond)); |
1715 | qemu_cond_init(cpu->halt_cond); | |
4900116e DDAG |
1716 | snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/DUMMY", |
1717 | cpu->cpu_index); | |
1718 | qemu_thread_create(cpu->thread, thread_name, qemu_dummy_cpu_thread_fn, cpu, | |
c7f0f3b1 | 1719 | QEMU_THREAD_JOINABLE); |
61a46217 | 1720 | while (!cpu->created) { |
c7f0f3b1 AL |
1721 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
1722 | } | |
1723 | } | |
1724 | ||
c643bed9 | 1725 | void qemu_init_vcpu(CPUState *cpu) |
296af7c9 | 1726 | { |
ce3960eb AF |
1727 | cpu->nr_cores = smp_cores; |
1728 | cpu->nr_threads = smp_threads; | |
f324e766 | 1729 | cpu->stopped = true; |
56943e8c PM |
1730 | |
1731 | if (!cpu->as) { | |
1732 | /* If the target cpu hasn't set up any address spaces itself, | |
1733 | * give it the default one. | |
1734 | */ | |
6731d864 PC |
1735 | AddressSpace *as = address_space_init_shareable(cpu->memory, |
1736 | "cpu-memory"); | |
12ebc9a7 | 1737 | cpu->num_ases = 1; |
6731d864 | 1738 | cpu_address_space_init(cpu, as, 0); |
56943e8c PM |
1739 | } |
1740 | ||
0ab07c62 | 1741 | if (kvm_enabled()) { |
48a106bd | 1742 | qemu_kvm_start_vcpu(cpu); |
b0cb0a66 VP |
1743 | } else if (hax_enabled()) { |
1744 | qemu_hax_start_vcpu(cpu); | |
c7f0f3b1 | 1745 | } else if (tcg_enabled()) { |
e5ab30a2 | 1746 | qemu_tcg_init_vcpu(cpu); |
c7f0f3b1 | 1747 | } else { |
10a9021d | 1748 | qemu_dummy_start_vcpu(cpu); |
0ab07c62 | 1749 | } |
296af7c9 BS |
1750 | } |
1751 | ||
b4a3d965 | 1752 | void cpu_stop_current(void) |
296af7c9 | 1753 | { |
4917cf44 AF |
1754 | if (current_cpu) { |
1755 | current_cpu->stop = false; | |
1756 | current_cpu->stopped = true; | |
1757 | cpu_exit(current_cpu); | |
96bce683 | 1758 | qemu_cond_broadcast(&qemu_pause_cond); |
b4a3d965 | 1759 | } |
296af7c9 BS |
1760 | } |
1761 | ||
56983463 | 1762 | int vm_stop(RunState state) |
296af7c9 | 1763 | { |
aa723c23 | 1764 | if (qemu_in_vcpu_thread()) { |
74892d24 | 1765 | qemu_system_vmstop_request_prepare(); |
1dfb4dd9 | 1766 | qemu_system_vmstop_request(state); |
296af7c9 BS |
1767 | /* |
1768 | * FIXME: should not return to device code in case | |
1769 | * vm_stop() has been requested. | |
1770 | */ | |
b4a3d965 | 1771 | cpu_stop_current(); |
56983463 | 1772 | return 0; |
296af7c9 | 1773 | } |
56983463 KW |
1774 | |
1775 | return do_vm_stop(state); | |
296af7c9 BS |
1776 | } |
1777 | ||
2d76e823 CI |
1778 | /** |
1779 | * Prepare for (re)starting the VM. | |
1780 | * Returns -1 if the vCPUs are not to be restarted (e.g. if they are already | |
1781 | * running or in case of an error condition), 0 otherwise. | |
1782 | */ | |
1783 | int vm_prepare_start(void) | |
1784 | { | |
1785 | RunState requested; | |
1786 | int res = 0; | |
1787 | ||
1788 | qemu_vmstop_requested(&requested); | |
1789 | if (runstate_is_running() && requested == RUN_STATE__MAX) { | |
1790 | return -1; | |
1791 | } | |
1792 | ||
1793 | /* Ensure that a STOP/RESUME pair of events is emitted if a | |
1794 | * vmstop request was pending. The BLOCK_IO_ERROR event, for | |
1795 | * example, according to documentation is always followed by | |
1796 | * the STOP event. | |
1797 | */ | |
1798 | if (runstate_is_running()) { | |
1799 | qapi_event_send_stop(&error_abort); | |
1800 | res = -1; | |
1801 | } else { | |
1802 | replay_enable_events(); | |
1803 | cpu_enable_ticks(); | |
1804 | runstate_set(RUN_STATE_RUNNING); | |
1805 | vm_state_notify(1, RUN_STATE_RUNNING); | |
1806 | } | |
1807 | ||
1808 | /* We are sending this now, but the CPUs will be resumed shortly later */ | |
1809 | qapi_event_send_resume(&error_abort); | |
1810 | return res; | |
1811 | } | |
1812 | ||
1813 | void vm_start(void) | |
1814 | { | |
1815 | if (!vm_prepare_start()) { | |
1816 | resume_all_vcpus(); | |
1817 | } | |
1818 | } | |
1819 | ||
8a9236f1 LC |
1820 | /* does a state transition even if the VM is already stopped, |
1821 | current state is forgotten forever */ | |
56983463 | 1822 | int vm_stop_force_state(RunState state) |
8a9236f1 LC |
1823 | { |
1824 | if (runstate_is_running()) { | |
56983463 | 1825 | return vm_stop(state); |
8a9236f1 LC |
1826 | } else { |
1827 | runstate_set(state); | |
b2780d32 WC |
1828 | |
1829 | bdrv_drain_all(); | |
594a45ce KW |
1830 | /* Make sure to return an error if the flush in a previous vm_stop() |
1831 | * failed. */ | |
22af08ea | 1832 | return bdrv_flush_all(); |
8a9236f1 LC |
1833 | } |
1834 | } | |
1835 | ||
9a78eead | 1836 | void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) |
262353cb BS |
1837 | { |
1838 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
e916cbf8 PM |
1839 | #if defined(cpu_list) |
1840 | cpu_list(f, cpu_fprintf); | |
262353cb BS |
1841 | #endif |
1842 | } | |
de0b36b6 LC |
1843 | |
1844 | CpuInfoList *qmp_query_cpus(Error **errp) | |
1845 | { | |
1846 | CpuInfoList *head = NULL, *cur_item = NULL; | |
182735ef | 1847 | CPUState *cpu; |
de0b36b6 | 1848 | |
bdc44640 | 1849 | CPU_FOREACH(cpu) { |
de0b36b6 | 1850 | CpuInfoList *info; |
182735ef AF |
1851 | #if defined(TARGET_I386) |
1852 | X86CPU *x86_cpu = X86_CPU(cpu); | |
1853 | CPUX86State *env = &x86_cpu->env; | |
1854 | #elif defined(TARGET_PPC) | |
1855 | PowerPCCPU *ppc_cpu = POWERPC_CPU(cpu); | |
1856 | CPUPPCState *env = &ppc_cpu->env; | |
1857 | #elif defined(TARGET_SPARC) | |
1858 | SPARCCPU *sparc_cpu = SPARC_CPU(cpu); | |
1859 | CPUSPARCState *env = &sparc_cpu->env; | |
1860 | #elif defined(TARGET_MIPS) | |
1861 | MIPSCPU *mips_cpu = MIPS_CPU(cpu); | |
1862 | CPUMIPSState *env = &mips_cpu->env; | |
48e06fe0 BK |
1863 | #elif defined(TARGET_TRICORE) |
1864 | TriCoreCPU *tricore_cpu = TRICORE_CPU(cpu); | |
1865 | CPUTriCoreState *env = &tricore_cpu->env; | |
182735ef | 1866 | #endif |
de0b36b6 | 1867 | |
cb446eca | 1868 | cpu_synchronize_state(cpu); |
de0b36b6 LC |
1869 | |
1870 | info = g_malloc0(sizeof(*info)); | |
1871 | info->value = g_malloc0(sizeof(*info->value)); | |
55e5c285 | 1872 | info->value->CPU = cpu->cpu_index; |
182735ef | 1873 | info->value->current = (cpu == first_cpu); |
259186a7 | 1874 | info->value->halted = cpu->halted; |
58f88d4b | 1875 | info->value->qom_path = object_get_canonical_path(OBJECT(cpu)); |
9f09e18a | 1876 | info->value->thread_id = cpu->thread_id; |
de0b36b6 | 1877 | #if defined(TARGET_I386) |
86f4b687 | 1878 | info->value->arch = CPU_INFO_ARCH_X86; |
544a3731 | 1879 | info->value->u.x86.pc = env->eip + env->segs[R_CS].base; |
de0b36b6 | 1880 | #elif defined(TARGET_PPC) |
86f4b687 | 1881 | info->value->arch = CPU_INFO_ARCH_PPC; |
544a3731 | 1882 | info->value->u.ppc.nip = env->nip; |
de0b36b6 | 1883 | #elif defined(TARGET_SPARC) |
86f4b687 | 1884 | info->value->arch = CPU_INFO_ARCH_SPARC; |
544a3731 EB |
1885 | info->value->u.q_sparc.pc = env->pc; |
1886 | info->value->u.q_sparc.npc = env->npc; | |
de0b36b6 | 1887 | #elif defined(TARGET_MIPS) |
86f4b687 | 1888 | info->value->arch = CPU_INFO_ARCH_MIPS; |
544a3731 | 1889 | info->value->u.q_mips.PC = env->active_tc.PC; |
48e06fe0 | 1890 | #elif defined(TARGET_TRICORE) |
86f4b687 | 1891 | info->value->arch = CPU_INFO_ARCH_TRICORE; |
544a3731 | 1892 | info->value->u.tricore.PC = env->PC; |
86f4b687 EB |
1893 | #else |
1894 | info->value->arch = CPU_INFO_ARCH_OTHER; | |
de0b36b6 LC |
1895 | #endif |
1896 | ||
1897 | /* XXX: waiting for the qapi to support GSList */ | |
1898 | if (!cur_item) { | |
1899 | head = cur_item = info; | |
1900 | } else { | |
1901 | cur_item->next = info; | |
1902 | cur_item = info; | |
1903 | } | |
1904 | } | |
1905 | ||
1906 | return head; | |
1907 | } | |
0cfd6a9a LC |
1908 | |
1909 | void qmp_memsave(int64_t addr, int64_t size, const char *filename, | |
1910 | bool has_cpu, int64_t cpu_index, Error **errp) | |
1911 | { | |
1912 | FILE *f; | |
1913 | uint32_t l; | |
55e5c285 | 1914 | CPUState *cpu; |
0cfd6a9a | 1915 | uint8_t buf[1024]; |
0dc9daf0 | 1916 | int64_t orig_addr = addr, orig_size = size; |
0cfd6a9a LC |
1917 | |
1918 | if (!has_cpu) { | |
1919 | cpu_index = 0; | |
1920 | } | |
1921 | ||
151d1322 AF |
1922 | cpu = qemu_get_cpu(cpu_index); |
1923 | if (cpu == NULL) { | |
c6bd8c70 MA |
1924 | error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index", |
1925 | "a CPU number"); | |
0cfd6a9a LC |
1926 | return; |
1927 | } | |
1928 | ||
1929 | f = fopen(filename, "wb"); | |
1930 | if (!f) { | |
618da851 | 1931 | error_setg_file_open(errp, errno, filename); |
0cfd6a9a LC |
1932 | return; |
1933 | } | |
1934 | ||
1935 | while (size != 0) { | |
1936 | l = sizeof(buf); | |
1937 | if (l > size) | |
1938 | l = size; | |
2f4d0f59 | 1939 | if (cpu_memory_rw_debug(cpu, addr, buf, l, 0) != 0) { |
0dc9daf0 BP |
1940 | error_setg(errp, "Invalid addr 0x%016" PRIx64 "/size %" PRId64 |
1941 | " specified", orig_addr, orig_size); | |
2f4d0f59 AK |
1942 | goto exit; |
1943 | } | |
0cfd6a9a | 1944 | if (fwrite(buf, 1, l, f) != l) { |
c6bd8c70 | 1945 | error_setg(errp, QERR_IO_ERROR); |
0cfd6a9a LC |
1946 | goto exit; |
1947 | } | |
1948 | addr += l; | |
1949 | size -= l; | |
1950 | } | |
1951 | ||
1952 | exit: | |
1953 | fclose(f); | |
1954 | } | |
6d3962bf LC |
1955 | |
1956 | void qmp_pmemsave(int64_t addr, int64_t size, const char *filename, | |
1957 | Error **errp) | |
1958 | { | |
1959 | FILE *f; | |
1960 | uint32_t l; | |
1961 | uint8_t buf[1024]; | |
1962 | ||
1963 | f = fopen(filename, "wb"); | |
1964 | if (!f) { | |
618da851 | 1965 | error_setg_file_open(errp, errno, filename); |
6d3962bf LC |
1966 | return; |
1967 | } | |
1968 | ||
1969 | while (size != 0) { | |
1970 | l = sizeof(buf); | |
1971 | if (l > size) | |
1972 | l = size; | |
eb6282f2 | 1973 | cpu_physical_memory_read(addr, buf, l); |
6d3962bf | 1974 | if (fwrite(buf, 1, l, f) != l) { |
c6bd8c70 | 1975 | error_setg(errp, QERR_IO_ERROR); |
6d3962bf LC |
1976 | goto exit; |
1977 | } | |
1978 | addr += l; | |
1979 | size -= l; | |
1980 | } | |
1981 | ||
1982 | exit: | |
1983 | fclose(f); | |
1984 | } | |
ab49ab5c LC |
1985 | |
1986 | void qmp_inject_nmi(Error **errp) | |
1987 | { | |
9cb805fd | 1988 | nmi_monitor_handle(monitor_get_cpu_index(), errp); |
ab49ab5c | 1989 | } |
27498bef ST |
1990 | |
1991 | void dump_drift_info(FILE *f, fprintf_function cpu_fprintf) | |
1992 | { | |
1993 | if (!use_icount) { | |
1994 | return; | |
1995 | } | |
1996 | ||
1997 | cpu_fprintf(f, "Host - Guest clock %"PRIi64" ms\n", | |
1998 | (cpu_get_clock() - cpu_get_icount())/SCALE_MS); | |
1999 | if (icount_align_option) { | |
2000 | cpu_fprintf(f, "Max guest delay %"PRIi64" ms\n", -max_delay/SCALE_MS); | |
2001 | cpu_fprintf(f, "Max guest advance %"PRIi64" ms\n", max_advance/SCALE_MS); | |
2002 | } else { | |
2003 | cpu_fprintf(f, "Max guest delay NA\n"); | |
2004 | cpu_fprintf(f, "Max guest advance NA\n"); | |
2005 | } | |
2006 | } |