[J-u-boot.git] / include / phy.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright 2011 Freescale Semiconductor, Inc.
 *	Andy Fleming <[email protected]>
 *
 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
 */

#ifndef _PHY_H
#define _PHY_H

#include <log.h>
#include <phy_interface.h>
#include <dm/ofnode.h>
#include <dm/read.h>
#include <linux/errno.h>
#include <linux/list.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/mdio.h>

struct udevice;

#define PHY_FIXED_ID		0xa5a55a5a
#define PHY_NCSI_ID            0xbeefcafe

/*
 * There is no actual id for this.
 * This is just a dummy id for gmii2rgmmi converter.
 */
#define PHY_GMII2RGMII_ID	0x5a5a5a5a

#define PHY_MAX_ADDR 32

#define PHY_FLAG_BROKEN_RESET	(1 << 0) /* soft reset not supported */

#define PHY_DEFAULT_FEATURES	(SUPPORTED_Autoneg | \
				 SUPPORTED_TP | \
				 SUPPORTED_MII)

#define PHY_10BT_FEATURES	(SUPPORTED_10baseT_Half | \
				 SUPPORTED_10baseT_Full)

#define PHY_100BT_FEATURES	(SUPPORTED_100baseT_Half | \
				 SUPPORTED_100baseT_Full)

#define PHY_1000BT_FEATURES	(SUPPORTED_1000baseT_Half | \
				 SUPPORTED_1000baseT_Full)

#define PHY_BASIC_FEATURES	(PHY_10BT_FEATURES | \
				 PHY_100BT_FEATURES | \
				 PHY_DEFAULT_FEATURES)

#define PHY_100BT1_FEATURES	(SUPPORTED_TP | \
				 SUPPORTED_MII | \
				 SUPPORTED_100baseT_Full)

#define PHY_GBIT_FEATURES	(PHY_BASIC_FEATURES | \
				 PHY_1000BT_FEATURES)

#define PHY_10G_FEATURES	(PHY_GBIT_FEATURES | \
				SUPPORTED_10000baseT_Full)

#ifndef PHY_ANEG_TIMEOUT
#define PHY_ANEG_TIMEOUT	4000
#endif


struct phy_device;

#define MDIO_NAME_LEN 32

struct mii_dev {
	struct list_head link;
	char name[MDIO_NAME_LEN];
	void *priv;
	int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
	int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
			u16 val);
	int (*reset)(struct mii_dev *bus);
	struct phy_device *phymap[PHY_MAX_ADDR];
	u32 phy_mask;
};

/* struct phy_driver: a structure which defines PHY behavior
 *
 * uid will contain a number which represents the PHY.  During
 * startup, the driver will poll the PHY to find out what its
 * UID--as defined by registers 2 and 3--is.  The 32-bit result
 * gotten from the PHY will be masked to
 * discard any bits which may change based on revision numbers
 * unimportant to functionality
 *
 */
struct phy_driver {
	char *name;
	unsigned int uid;
	unsigned int mask;
	unsigned int mmds;

	u32 features;

	/* Called to do any driver startup necessities */
	/* Will be called during phy_connect */
	int (*probe)(struct phy_device *phydev);

	/* Called to configure the PHY, and modify the controller
	 * based on the results.  Should be called after phy_connect */
	int (*config)(struct phy_device *phydev);

	/* Called when starting up the controller */
	int (*startup)(struct phy_device *phydev);

	/* Called when bringing down the controller */
	int (*shutdown)(struct phy_device *phydev);

	int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
	int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
			u16 val);

	/* Phy specific driver override for reading a MMD register */
	int (*read_mmd)(struct phy_device *phydev, int devad, int reg);

	/* Phy specific driver override for writing a MMD register */
	int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
			 u16 val);

	struct list_head list;

	/* driver private data */
	ulong data;
};

struct phy_device {
	/* Information about the PHY type */
	/* And management functions */
	struct mii_dev *bus;
	struct phy_driver *drv;
	void *priv;

	struct udevice *dev;
	ofnode node;

	/* forced speed & duplex (no autoneg)
	 * partner speed & duplex & pause (autoneg)
	 */
	int speed;
	int duplex;

	/* The most recently read link state */
	int link;
	int port;
	phy_interface_t interface;

	u32 advertising;
	u32 supported;
	u32 mmds;

	int autoneg;
	int addr;
	int pause;
	int asym_pause;
	u32 phy_id;
	bool is_c45;
	u32 flags;
};

struct fixed_link {
	int phy_id;
	int duplex;
	int link_speed;
	int pause;
	int asym_pause;
};

#ifdef CONFIG_PHYLIB_10G
extern struct phy_driver gen10g_driver;
#endif

/**
 * phy_init() - Initializes the PHY drivers
 * This function registers all available PHY drivers
 *
 * @return: 0 if OK, -ve on error
 */
int phy_init(void);

/**
 * phy_reset() - Resets the specified PHY
 * Issues a reset of the PHY and waits for it to complete
 *
 * @phydev:	PHY to reset
 * @return: 0 if OK, -ve on error
 */
int phy_reset(struct phy_device *phydev);

/**
 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
 * The function checks the PHY addresses flagged in phy_mask and returns a
 * phy_device pointer if it detects a PHY.
 * This function should only be called if just one PHY is expected to be present
 * in the set of addresses flagged in phy_mask.  If multiple PHYs are present,
 * it is undefined which of these PHYs is returned.
 *
 * @bus:	MII/MDIO bus to scan
 * @phy_mask:	bitmap of PYH addresses to scan
 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask);

#ifdef CONFIG_PHY_FIXED

/**
 * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
 * @node: OF node for the container of the fixed-link node
 *
 * Description: Creates a struct phy_device based on a fixed-link of_node
 * description. Can be used without phy_connect by drivers which do not expose
 * a UCLASS_ETH udevice.
 */
struct phy_device *fixed_phy_create(ofnode node);

#else

static inline struct phy_device *fixed_phy_create(ofnode node)
{
	return NULL;
}

#endif

/**
 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
 * @phydev:	PHY device
 * @dev:	Ethernet device
 * @interface:	type of MAC-PHY interface
 */
void phy_connect_dev(struct phy_device *phydev, struct udevice *dev,
		     phy_interface_t interface);

/**
 * phy_connect() - Creates a PHY device for the Ethernet interface
 * Creates a PHY device for the PHY at the given address, if one doesn't exist
 * already, and associates it with the Ethernet device.
 * The function may be called with addr <= 0, in this case addr value is ignored
 * and the bus is scanned to detect a PHY.  Scanning should only be used if only
 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
 * which PHY is returned.
 *
 * @bus:	MII/MDIO bus that hosts the PHY
 * @addr:	PHY address on MDIO bus
 * @dev:	Ethernet device to associate to the PHY
 * @interface:	type of MAC-PHY interface
 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_connect(struct mii_dev *bus, int addr,
				struct udevice *dev,
				phy_interface_t interface);
/**
 * phy_device_create() - Create a PHY device
 *
 * @bus:		MII/MDIO bus that hosts the PHY
 * @addr:		PHY address on MDIO bus
 * @phy_id:		where to store the ID retrieved
 * @is_c45:		Device Identifiers if is_c45
 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
				     u32 phy_id, bool is_c45);

/**
 * phy_connect_phy_id() - Connect to phy device by reading PHY id
 *			  from phy node.
 *
 * @bus:		MII/MDIO bus that hosts the PHY
 * @dev:		Ethernet device to associate to the PHY
 * @return:		pointer to phy_device if a PHY is found,
 *			or NULL otherwise
 */
struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
				      int phyaddr);

static inline ofnode phy_get_ofnode(struct phy_device *phydev)
{
	if (ofnode_valid(phydev->node))
		return phydev->node;
	else
		return dev_ofnode(phydev->dev);
}

int phy_read(struct phy_device *phydev, int devad, int regnum);
int phy_write(struct phy_device *phydev, int devad, int regnum, u16 val);
void phy_mmd_start_indirect(struct phy_device *phydev, int devad, int regnum);
int phy_read_mmd(struct phy_device *phydev, int devad, int regnum);
int phy_write_mmd(struct phy_device *phydev, int devad, int regnum, u16 val);
int phy_set_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);

int phy_startup(struct phy_device *phydev);
int phy_config(struct phy_device *phydev);
int phy_shutdown(struct phy_device *phydev);
int phy_register(struct phy_driver *drv);
int phy_set_supported(struct phy_device *phydev, u32 max_speed);
int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
	       u16 set);
int genphy_config_aneg(struct phy_device *phydev);
int genphy_restart_aneg(struct phy_device *phydev);
int genphy_update_link(struct phy_device *phydev);
int genphy_parse_link(struct phy_device *phydev);
int genphy_config(struct phy_device *phydev);
int genphy_startup(struct phy_device *phydev);
int genphy_shutdown(struct phy_device *phydev);
int gen10g_config(struct phy_device *phydev);
int gen10g_startup(struct phy_device *phydev);
int gen10g_shutdown(struct phy_device *phydev);
int gen10g_discover_mmds(struct phy_device *phydev);

int phy_b53_init(void);
int phy_mv88e61xx_init(void);
int phy_adin_init(void);
int phy_aquantia_init(void);
int phy_atheros_init(void);
int phy_broadcom_init(void);
int phy_cortina_init(void);
int phy_cortina_access_init(void);
int phy_davicom_init(void);
int phy_et1011c_init(void);
int phy_lxt_init(void);
int phy_marvell_init(void);
int phy_micrel_ksz8xxx_init(void);
int phy_micrel_ksz90x1_init(void);
int phy_meson_gxl_init(void);
int phy_natsemi_init(void);
int phy_nxp_c45_tja11xx_init(void);
int phy_nxp_tja11xx_init(void);
int phy_realtek_init(void);
int phy_smsc_init(void);
int phy_teranetics_init(void);
int phy_ti_init(void);
int phy_vitesse_init(void);
int phy_xilinx_init(void);
int phy_xway_init(void);
int phy_mscc_init(void);
int phy_fixed_init(void);
int phy_ncsi_init(void);
int phy_xilinx_gmii2rgmii_init(void);

int board_phy_config(struct phy_device *phydev);
int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);

/**
 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
 * is RGMII (all variants)
 * @phydev: the phy_device struct
 * @return: true if MII bus is RGMII or false if it is not
 */
static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
{
	return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
}

/**
 * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
 * is SGMII (all variants)
 * @phydev: the phy_device struct
 * @return: true if MII bus is SGMII or false if it is not
 */
static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
{
	return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
		phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
}

bool phy_interface_is_ncsi(void);

/* PHY UIDs for various PHYs that are referenced in external code */
#define PHY_UID_CS4340		0x13e51002
#define PHY_UID_CS4223		0x03e57003
#define PHY_UID_TN2020		0x00a19410
#define PHY_UID_IN112525_S03	0x02107440

#endif
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
5f184715 AF	2	/*
5f184715 AF	3	* Copyright 2011 Freescale Semiconductor, Inc.
b21f87a3	4	* Andy Fleming <[email protected]>
5f184715	5	*
5f184715 AF	6	* This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
	7	*/
	8
	9	#ifndef _PHY_H
	10	#define _PHY_H
	11
2a64ada7 SG	12	#include <log.h>
	13	#include <phy_interface.h>
	14	#include <dm/ofnode.h>
	15	#include <dm/read.h>
f2176515	16	#include <linux/errno.h>
5f184715 AF	17	#include <linux/list.h>
	18	#include <linux/mii.h>
	19	#include <linux/ethtool.h>
	20	#include <linux/mdio.h>
2a64ada7 SG	21
2a64ada7 SG	22	struct udevice;
5f184715	23
db40c1aa	24	#define PHY_FIXED_ID 0xa5a55a5a
f641a8ac SMJ	25	#define PHY_NCSI_ID 0xbeefcafe
f641a8ac SMJ	26
f41e588c SDPP	27	/*
	28	* There is no actual id for this.
	29	* This is just a dummy id for gmii2rgmmi converter.
	30	*/
	31	#define PHY_GMII2RGMII_ID 0x5a5a5a5a
db40c1aa	32
5f184715 AF	33	#define PHY_MAX_ADDR 32
5f184715 AF	34
ddcd1f30 SX	35	#define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
ddcd1f30 SX	36
4dae610b	37	#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg \| \
5f184715 AF	38	SUPPORTED_TP \| \
	39	SUPPORTED_MII)
	40
4dae610b FF	41	#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half \| \
	42	SUPPORTED_10baseT_Full)
	43
	44	#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half \| \
	45	SUPPORTED_100baseT_Full)
	46
	47	#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half \| \
5f184715 AF	48	SUPPORTED_1000baseT_Full)
5f184715 AF	49
4dae610b FF	50	#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES \| \
	51	PHY_100BT_FEATURES \| \
	52	PHY_DEFAULT_FEATURES)
	53
3ef2050a RPNO	54	#define PHY_100BT1_FEATURES (SUPPORTED_TP \| \
	55	SUPPORTED_MII \| \
	56	SUPPORTED_100baseT_Full)
	57
4dae610b FF	58	#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES \| \
	59	PHY_1000BT_FEATURES)
	60
5f184715 AF	61	#define PHY_10G_FEATURES (PHY_GBIT_FEATURES \| \
	62	SUPPORTED_10000baseT_Full)
	63
4fb3f0c8	64	#ifndef PHY_ANEG_TIMEOUT
5f184715	65	#define PHY_ANEG_TIMEOUT 4000
4fb3f0c8	66	#endif
5f184715 AF	67
5f184715 AF	68
5f184715 AF	69	struct phy_device;
	70
	71	#define MDIO_NAME_LEN 32
	72
	73	struct mii_dev {
	74	struct list_head link;
	75	char name[MDIO_NAME_LEN];
	76	void *priv;
	77	int (read)(struct mii_dev bus, int addr, int devad, int reg);
	78	int (write)(struct mii_dev bus, int addr, int devad, int reg,
	79	u16 val);
	80	int (reset)(struct mii_dev bus);
	81	struct phy_device *phymap[PHY_MAX_ADDR];
	82	u32 phy_mask;
	83	};
	84
	85	/* struct phy_driver: a structure which defines PHY behavior
	86	*
	87	* uid will contain a number which represents the PHY. During
	88	* startup, the driver will poll the PHY to find out what its
	89	* UID--as defined by registers 2 and 3--is. The 32-bit result
	90	* gotten from the PHY will be masked to
	91	* discard any bits which may change based on revision numbers
	92	* unimportant to functionality
	93	*
	94	*/
	95	struct phy_driver {
	96	char *name;
	97	unsigned int uid;
	98	unsigned int mask;
	99	unsigned int mmds;
	100
	101	u32 features;
	102
	103	/* Called to do any driver startup necessities */
	104	/* Will be called during phy_connect */
	105	int (probe)(struct phy_device phydev);
	106
	107	/* Called to configure the PHY, and modify the controller
	108	* based on the results. Should be called after phy_connect */
	109	int (config)(struct phy_device phydev);
	110
	111	/* Called when starting up the controller */
	112	int (startup)(struct phy_device phydev);
	113
	114	/* Called when bringing down the controller */
	115	int (shutdown)(struct phy_device phydev);
	116
b71841b9 SB	117	int (readext)(struct phy_device phydev, int addr, int devad, int reg);
	118	int (writeext)(struct phy_device phydev, int addr, int devad, int reg,
	119	u16 val);
4f6746dc CC	120
	121	/* Phy specific driver override for reading a MMD register */
	122	int (read_mmd)(struct phy_device phydev, int devad, int reg);
	123
	124	/* Phy specific driver override for writing a MMD register */
	125	int (write_mmd)(struct phy_device phydev, int devad, int reg,
	126	u16 val);
	127
5f184715	128	struct list_head list;
d718b697 AM	129
	130	/* driver private data */
	131	ulong data;
5f184715 AF	132	};
	133
	134	struct phy_device {
	135	/* Information about the PHY type */
	136	/* And management functions */
	137	struct mii_dev *bus;
	138	struct phy_driver *drv;
	139	void *priv;
	140
c74c8e66	141	struct udevice *dev;
eef0b8a9	142	ofnode node;
5f184715 AF	143
	144	/* forced speed & duplex (no autoneg)
	145	* partner speed & duplex & pause (autoneg)
	146	*/
	147	int speed;
	148	int duplex;
	149
	150	/* The most recently read link state */
	151	int link;
	152	int port;
	153	phy_interface_t interface;
	154
	155	u32 advertising;
	156	u32 supported;
	157	u32 mmds;
	158
	159	int autoneg;
	160	int addr;
	161	int pause;
	162	int asym_pause;
	163	u32 phy_id;
b3eabd82	164	bool is_c45;
5f184715 AF	165	u32 flags;
	166	};
	167
f55a776c SX	168	struct fixed_link {
	169	int phy_id;
	170	int duplex;
	171	int link_speed;
	172	int pause;
	173	int asym_pause;
	174	};
	175
5f184715 AF	176	#ifdef CONFIG_PHYLIB_10G
5f184715 AF	177	extern struct phy_driver gen10g_driver;
5f184715 AF	178	#endif
5f184715 AF	179
c38ac289 AM	180	/**
c38ac289 AM	181	* phy_init() - Initializes the PHY drivers
c38ac289 AM	182	* This function registers all available PHY drivers
c38ac289 AM	183	*
ea756fb8	184	* @return: 0 if OK, -ve on error
c38ac289	185	*/
5f184715	186	int phy_init(void);
c38ac289 AM	187
	188	/**
	189	* phy_reset() - Resets the specified PHY
c38ac289 AM	190	* Issues a reset of the PHY and waits for it to complete
	191	*
	192	* @phydev: PHY to reset
ea756fb8	193	* @return: 0 if OK, -ve on error
c38ac289	194	*/
5f184715	195	int phy_reset(struct phy_device *phydev);
c38ac289 AM	196
	197	/**
	198	* phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
c38ac289 AM	199	* The function checks the PHY addresses flagged in phy_mask and returns a
	200	* phy_device pointer if it detects a PHY.
	201	* This function should only be called if just one PHY is expected to be present
	202	* in the set of addresses flagged in phy_mask. If multiple PHYs are present,
	203	* it is undefined which of these PHYs is returned.
	204	*
	205	* @bus: MII/MDIO bus to scan
	206	* @phy_mask: bitmap of PYH addresses to scan
ea756fb8	207	* @return: pointer to phy_device if a PHY is found, or NULL otherwise
c38ac289	208	*/
e24b58f5	209	struct phy_device phy_find_by_mask(struct mii_dev bus, unsigned phy_mask);
c38ac289	210
d0781c95 VO	211	#ifdef CONFIG_PHY_FIXED
	212
	213	/**
	214	* fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
	215	* @node: OF node for the container of the fixed-link node
	216	*
	217	* Description: Creates a struct phy_device based on a fixed-link of_node
	218	* description. Can be used without phy_connect by drivers which do not expose
	219	* a UCLASS_ETH udevice.
	220	*/
	221	struct phy_device *fixed_phy_create(ofnode node);
	222
	223	#else
	224
	225	static inline struct phy_device *fixed_phy_create(ofnode node)
	226	{
	227	return NULL;
	228	}
	229
	230	#endif
	231
c38ac289 AM	232	/**
	233	* phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
	234	* @phydev: PHY device
	235	* @dev: Ethernet device
e24b58f5	236	* @interface: type of MAC-PHY interface
c38ac289	237	*/
e24b58f5 MB	238	void phy_connect_dev(struct phy_device phydev, struct udevice dev,
e24b58f5 MB	239	phy_interface_t interface);
c38ac289 AM	240
	241	/**
	242	* phy_connect() - Creates a PHY device for the Ethernet interface
c38ac289 AM	243	* Creates a PHY device for the PHY at the given address, if one doesn't exist
	244	* already, and associates it with the Ethernet device.
	245	* The function may be called with addr <= 0, in this case addr value is ignored
	246	* and the bus is scanned to detect a PHY. Scanning should only be used if only
	247	* one PHY is expected to be present on the MDIO bus, otherwise it is undefined
	248	* which PHY is returned.
	249	*
	250	* @bus: MII/MDIO bus that hosts the PHY
	251	* @addr: PHY address on MDIO bus
	252	* @dev: Ethernet device to associate to the PHY
	253	* @interface: type of MAC-PHY interface
ea756fb8	254	* @return: pointer to phy_device if a PHY is found, or NULL otherwise
c38ac289	255	*/
c74c8e66 SG	256	struct phy_device phy_connect(struct mii_dev bus, int addr,
	257	struct udevice *dev,
	258	phy_interface_t interface);
3249116d MS	259	/**
	260	* phy_device_create() - Create a PHY device
	261	*
	262	* @bus: MII/MDIO bus that hosts the PHY
	263	* @addr: PHY address on MDIO bus
	264	* @phy_id: where to store the ID retrieved
	265	* @is_c45: Device Identifiers if is_c45
3249116d MS	266	* @return: pointer to phy_device if a PHY is found, or NULL otherwise
	267	*/
	268	struct phy_device phy_device_create(struct mii_dev bus, int addr,
e24b58f5	269	u32 phy_id, bool is_c45);
c38ac289	270
a744a284 MS	271	/**
	272	* phy_connect_phy_id() - Connect to phy device by reading PHY id
	273	* from phy node.
	274	*
	275	* @bus: MII/MDIO bus that hosts the PHY
	276	* @dev: Ethernet device to associate to the PHY
a744a284 MS	277	* @return: pointer to phy_device if a PHY is found,
	278	* or NULL otherwise
	279	*/
	280	struct phy_device phy_connect_phy_id(struct mii_dev bus, struct udevice *dev,
7f418ea5	281	int phyaddr);
a744a284	282
eef0b8a9 GS	283	static inline ofnode phy_get_ofnode(struct phy_device *phydev)
	284	{
	285	if (ofnode_valid(phydev->node))
	286	return phydev->node;
	287	else
	288	return dev_ofnode(phydev->dev);
	289	}
65f2266e RF	290
	291	int phy_read(struct phy_device *phydev, int devad, int regnum);
	292	int phy_write(struct phy_device *phydev, int devad, int regnum, u16 val);
	293	void phy_mmd_start_indirect(struct phy_device *phydev, int devad, int regnum);
	294	int phy_read_mmd(struct phy_device *phydev, int devad, int regnum);
	295	int phy_write_mmd(struct phy_device *phydev, int devad, int regnum, u16 val);
	296	int phy_set_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
	297	int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
	298
5f184715 AF	299	int phy_startup(struct phy_device *phydev);
	300	int phy_config(struct phy_device *phydev);
	301	int phy_shutdown(struct phy_device *phydev);
	302	int phy_register(struct phy_driver *drv);
b18acb0a	303	int phy_set_supported(struct phy_device *phydev, u32 max_speed);
087baf80 AA	304	int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
087baf80 AA	305	u16 set);
5f184715	306	int genphy_config_aneg(struct phy_device *phydev);
8682aba7	307	int genphy_restart_aneg(struct phy_device *phydev);
5f184715	308	int genphy_update_link(struct phy_device *phydev);
e2043f5c	309	int genphy_parse_link(struct phy_device *phydev);
5f184715 AF	310	int genphy_config(struct phy_device *phydev);
	311	int genphy_startup(struct phy_device *phydev);
	312	int genphy_shutdown(struct phy_device *phydev);
	313	int gen10g_config(struct phy_device *phydev);
	314	int gen10g_startup(struct phy_device *phydev);
	315	int gen10g_shutdown(struct phy_device *phydev);
	316	int gen10g_discover_mmds(struct phy_device *phydev);
	317
137963d7	318	int phy_b53_init(void);
24ae3961	319	int phy_mv88e61xx_init(void);
d79f1a85	320	int phy_adin_init(void);
f7c38cf8	321	int phy_aquantia_init(void);
9082eeac AF	322	int phy_atheros_init(void);
9082eeac AF	323	int phy_broadcom_init(void);
9b18e519	324	int phy_cortina_init(void);
a70d7b01	325	int phy_cortina_access_init(void);
9082eeac	326	int phy_davicom_init(void);
f485c8a3	327	int phy_et1011c_init(void);
9082eeac AF	328	int phy_lxt_init(void);
9082eeac AF	329	int phy_marvell_init(void);
d397f7c4 AG	330	int phy_micrel_ksz8xxx_init(void);
d397f7c4 AG	331	int phy_micrel_ksz90x1_init(void);
8995a96d	332	int phy_meson_gxl_init(void);
9082eeac	333	int phy_natsemi_init(void);
01c67a38	334	int phy_nxp_c45_tja11xx_init(void);
a2f5c936	335	int phy_nxp_tja11xx_init(void);
9082eeac	336	int phy_realtek_init(void);
b6abf555	337	int phy_smsc_init(void);
9082eeac	338	int phy_teranetics_init(void);
721aed79	339	int phy_ti_init(void);
9082eeac	340	int phy_vitesse_init(void);
ed6fad3e	341	int phy_xilinx_init(void);
5e6c069b	342	int phy_xway_init(void);
a5fd13ad	343	int phy_mscc_init(void);
db40c1aa	344	int phy_fixed_init(void);
e2ffeaa1	345	int phy_ncsi_init(void);
f41e588c	346	int phy_xilinx_gmii2rgmii_init(void);
a836626c	347
2fb63964	348	int board_phy_config(struct phy_device *phydev);
5707d5ff	349	int get_phy_id(struct mii_dev bus, int addr, int devad, u32 phy_id);
2fb63964	350
3ab72fe8 DM	351	/**
	352	* phy_interface_is_rgmii - Convenience function for testing if a PHY interface
	353	* is RGMII (all variants)
	354	* @phydev: the phy_device struct
ea756fb8	355	* @return: true if MII bus is RGMII or false if it is not
3ab72fe8 DM	356	*/
	357	static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
	358	{
	359	return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
	360	phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
	361	}
	362
3c221af3 DM	363	/**
	364	* phy_interface_is_sgmii - Convenience function for testing if a PHY interface
	365	* is SGMII (all variants)
	366	* @phydev: the phy_device struct
ea756fb8	367	* @return: true if MII bus is SGMII or false if it is not
3c221af3 DM	368	*/
	369	static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
	370	{
	371	return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
	372	phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
	373	}
	374
09bd3d0b SMJ	375	bool phy_interface_is_ncsi(void);
09bd3d0b SMJ	376
a836626c	377	/* PHY UIDs for various PHYs that are referenced in external code */
0cf207ec WD	378	#define PHY_UID_CS4340 0x13e51002
0cf207ec WD	379	#define PHY_UID_CS4223 0x03e57003
1ddcf5ed PJ	380	#define PHY_UID_TN2020 0x00a19410
1ddcf5ed PJ	381	#define PHY_UID_IN112525_S03 0x02107440
a836626c	382
5f184715	383	#endif