[J-u-boot.git] / include / phy.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright 2011 Freescale Semiconductor, Inc.
 *	Andy Fleming <[email protected]>
 *
 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
 */

#ifndef _PHY_H
#define _PHY_H

#include <log.h>
#include <phy_interface.h>
#include <dm/ofnode.h>
#include <dm/read.h>
#include <linux/errno.h>
#include <linux/list.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/mdio.h>

struct udevice;

#define PHY_FIXED_ID		0xa5a55a5a
#define PHY_NCSI_ID            0xbeefcafe

/*
 * There is no actual id for this.
 * This is just a dummy id for gmii2rgmmi converter.
 */
#define PHY_GMII2RGMII_ID	0x5a5a5a5a

#define PHY_MAX_ADDR 32

#define PHY_FLAG_BROKEN_RESET	(1 << 0) /* soft reset not supported */

#define PHY_DEFAULT_FEATURES	(SUPPORTED_Autoneg | \
				 SUPPORTED_TP | \
				 SUPPORTED_MII)

#define PHY_10BT_FEATURES	(SUPPORTED_10baseT_Half | \
				 SUPPORTED_10baseT_Full)

#define PHY_100BT_FEATURES	(SUPPORTED_100baseT_Half | \
				 SUPPORTED_100baseT_Full)

#define PHY_1000BT_FEATURES	(SUPPORTED_1000baseT_Half | \
				 SUPPORTED_1000baseT_Full)

#define PHY_BASIC_FEATURES	(PHY_10BT_FEATURES | \
				 PHY_100BT_FEATURES | \
				 PHY_DEFAULT_FEATURES)

#define PHY_100BT1_FEATURES	(SUPPORTED_TP | \
				 SUPPORTED_MII | \
				 SUPPORTED_100baseT_Full)

#define PHY_GBIT_FEATURES	(PHY_BASIC_FEATURES | \
				 PHY_1000BT_FEATURES)

#define PHY_10G_FEATURES	(PHY_GBIT_FEATURES | \
				SUPPORTED_10000baseT_Full)

#ifndef PHY_ANEG_TIMEOUT
#define PHY_ANEG_TIMEOUT	4000
#endif


struct phy_device;

#define MDIO_NAME_LEN 32

struct mii_dev {
	struct list_head link;
	char name[MDIO_NAME_LEN];
	void *priv;
	int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
	int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
			u16 val);
	int (*reset)(struct mii_dev *bus);
	struct phy_device *phymap[PHY_MAX_ADDR];
	u32 phy_mask;
};

/* struct phy_driver: a structure which defines PHY behavior
 *
 * uid will contain a number which represents the PHY.  During
 * startup, the driver will poll the PHY to find out what its
 * UID--as defined by registers 2 and 3--is.  The 32-bit result
 * gotten from the PHY will be masked to
 * discard any bits which may change based on revision numbers
 * unimportant to functionality
 *
 */
struct phy_driver {
	char *name;
	unsigned int uid;
	unsigned int mask;
	unsigned int mmds;

	u32 features;

	/* Called to do any driver startup necessities */
	/* Will be called during phy_connect */
	int (*probe)(struct phy_device *phydev);

	/* Called to configure the PHY, and modify the controller
	 * based on the results.  Should be called after phy_connect */
	int (*config)(struct phy_device *phydev);

	/* Called when starting up the controller */
	int (*startup)(struct phy_device *phydev);

	/* Called when bringing down the controller */
	int (*shutdown)(struct phy_device *phydev);

	int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
	int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
			u16 val);

	/* Phy specific driver override for reading a MMD register */
	int (*read_mmd)(struct phy_device *phydev, int devad, int reg);

	/* Phy specific driver override for writing a MMD register */
	int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
			 u16 val);

	struct list_head list;

	/* driver private data */
	ulong data;
};

struct phy_device {
	/* Information about the PHY type */
	/* And management functions */
	struct mii_dev *bus;
	struct phy_driver *drv;
	void *priv;

#ifdef CONFIG_DM_ETH
	struct udevice *dev;
	ofnode node;
#else
	struct eth_device *dev;
#endif

	/* forced speed & duplex (no autoneg)
	 * partner speed & duplex & pause (autoneg)
	 */
	int speed;
	int duplex;

	/* The most recently read link state */
	int link;
	int port;
	phy_interface_t interface;

	u32 advertising;
	u32 supported;
	u32 mmds;

	int autoneg;
	int addr;
	int pause;
	int asym_pause;
	u32 phy_id;
	bool is_c45;
	u32 flags;
};

struct fixed_link {
	int phy_id;
	int duplex;
	int link_speed;
	int pause;
	int asym_pause;
};

/**
 * phy_read - Convenience function for reading a given PHY register
 * @phydev: the phy_device struct
 * @devad: The MMD to read from
 * @regnum: register number to read
 * @return: value for success or negative errno for failure
 */
static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
{
	struct mii_dev *bus = phydev->bus;

	if (!bus || !bus->read) {
		debug("%s: No bus configured\n", __func__);
		return -1;
	}

	return bus->read(bus, phydev->addr, devad, regnum);
}

/**
 * phy_write - Convenience function for writing a given PHY register
 * @phydev: the phy_device struct
 * @devad: The MMD to read from
 * @regnum: register number to write
 * @val: value to write to @regnum
 * @return: 0 for success or negative errno for failure
 */
static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
			u16 val)
{
	struct mii_dev *bus = phydev->bus;

	if (!bus || !bus->write) {
		debug("%s: No bus configured\n", __func__);
		return -1;
	}

	return bus->write(bus, phydev->addr, devad, regnum, val);
}

/**
 * phy_mmd_start_indirect - Convenience function for writing MMD registers
 * @phydev: the phy_device struct
 * @devad: The MMD to read from
 * @regnum: register number to write
 * @return: None
 */
static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
					  int regnum)
{
	/* Write the desired MMD Devad */
	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);

	/* Write the desired MMD register address */
	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);

	/* Select the Function : DATA with no post increment */
	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
		  (devad | MII_MMD_CTRL_NOINCR));
}

/**
 * phy_read_mmd - Convenience function for reading a register
 * from an MMD on a given PHY.
 * @phydev: The phy_device struct
 * @devad: The MMD to read from
 * @regnum: The register on the MMD to read
 * @return: Value for success or negative errno for failure
 */
static inline int phy_read_mmd(struct phy_device *phydev, int devad,
			       int regnum)
{
	struct phy_driver *drv = phydev->drv;

	if (regnum > (u16)~0 || devad > 32)
		return -EINVAL;

	/* driver-specific access */
	if (drv->read_mmd)
		return drv->read_mmd(phydev, devad, regnum);

	/* direct C45 / C22 access */
	if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
	    devad == MDIO_DEVAD_NONE || !devad)
		return phy_read(phydev, devad, regnum);

	/* indirect C22 access */
	phy_mmd_start_indirect(phydev, devad, regnum);

	/* Read the content of the MMD's selected register */
	return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
}

/**
 * phy_write_mmd - Convenience function for writing a register
 * on an MMD on a given PHY.
 * @phydev: The phy_device struct
 * @devad: The MMD to read from
 * @regnum: The register on the MMD to read
 * @val: value to write to @regnum
 * @return: 0 for success or negative errno for failure
 */
static inline int phy_write_mmd(struct phy_device *phydev, int devad,
				int regnum, u16 val)
{
	struct phy_driver *drv = phydev->drv;

	if (regnum > (u16)~0 || devad > 32)
		return -EINVAL;

	/* driver-specific access */
	if (drv->write_mmd)
		return drv->write_mmd(phydev, devad, regnum, val);

	/* direct C45 / C22 access */
	if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
	    devad == MDIO_DEVAD_NONE || !devad)
		return phy_write(phydev, devad, regnum, val);

	/* indirect C22 access */
	phy_mmd_start_indirect(phydev, devad, regnum);

	/* Write the data into MMD's selected register */
	return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
}

/**
 * phy_set_bits_mmd - Convenience function for setting bits in a register
 * on MMD
 * @phydev: the phy_device struct
 * @devad: the MMD containing register to modify
 * @regnum: register number to modify
 * @val: bits to set
 * @return: 0 for success or negative errno for failure
 */
static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
				   u32 regnum, u16 val)
{
	int value, ret;

	value = phy_read_mmd(phydev, devad, regnum);
	if (value < 0)
		return value;

	value |= val;

	ret = phy_write_mmd(phydev, devad, regnum, value);
	if (ret < 0)
		return ret;

	return 0;
}

/**
 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
 * on MMD
 * @phydev: the phy_device struct
 * @devad: the MMD containing register to modify
 * @regnum: register number to modify
 * @val: bits to clear
 * @return: 0 for success or negative errno for failure
 */
static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
				     u32 regnum, u16 val)
{
	int value, ret;

	value = phy_read_mmd(phydev, devad, regnum);
	if (value < 0)
		return value;

	value &= ~val;

	ret = phy_write_mmd(phydev, devad, regnum, value);
	if (ret < 0)
		return ret;

	return 0;
}

#ifdef CONFIG_PHYLIB_10G
extern struct phy_driver gen10g_driver;

/*
 * List all 10G interfaces here, the assumption being that PHYs on these
 * interfaces are C45
 */
static inline int is_10g_interface(phy_interface_t interface)
{
	return interface == PHY_INTERFACE_MODE_XGMII ||
	       interface == PHY_INTERFACE_MODE_USXGMII ||
	       interface == PHY_INTERFACE_MODE_10GBASER;
}

#endif

/**
 * phy_init() - Initializes the PHY drivers
 * This function registers all available PHY drivers
 *
 * @return: 0 if OK, -ve on error
 */
int phy_init(void);

/**
 * phy_reset() - Resets the specified PHY
 * Issues a reset of the PHY and waits for it to complete
 *
 * @phydev:	PHY to reset
 * @return: 0 if OK, -ve on error
 */
int phy_reset(struct phy_device *phydev);

/**
 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
 * The function checks the PHY addresses flagged in phy_mask and returns a
 * phy_device pointer if it detects a PHY.
 * This function should only be called if just one PHY is expected to be present
 * in the set of addresses flagged in phy_mask.  If multiple PHYs are present,
 * it is undefined which of these PHYs is returned.
 *
 * @bus:	MII/MDIO bus to scan
 * @phy_mask:	bitmap of PYH addresses to scan
 * @interface:	type of MAC-PHY interface
 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
		phy_interface_t interface);

#ifdef CONFIG_PHY_FIXED

/**
 * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
 * @node: OF node for the container of the fixed-link node
 *
 * Description: Creates a struct phy_device based on a fixed-link of_node
 * description. Can be used without phy_connect by drivers which do not expose
 * a UCLASS_ETH udevice.
 */
struct phy_device *fixed_phy_create(ofnode node);

#else

static inline struct phy_device *fixed_phy_create(ofnode node)
{
	return NULL;
}

#endif

#ifdef CONFIG_DM_ETH

/**
 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
 * @phydev:	PHY device
 * @dev:	Ethernet device
 */
void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);

/**
 * phy_connect() - Creates a PHY device for the Ethernet interface
 * Creates a PHY device for the PHY at the given address, if one doesn't exist
 * already, and associates it with the Ethernet device.
 * The function may be called with addr <= 0, in this case addr value is ignored
 * and the bus is scanned to detect a PHY.  Scanning should only be used if only
 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
 * which PHY is returned.
 *
 * @bus:	MII/MDIO bus that hosts the PHY
 * @addr:	PHY address on MDIO bus
 * @dev:	Ethernet device to associate to the PHY
 * @interface:	type of MAC-PHY interface
 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_connect(struct mii_dev *bus, int addr,
				struct udevice *dev,
				phy_interface_t interface);
/**
 * phy_device_create() - Create a PHY device
 *
 * @bus:		MII/MDIO bus that hosts the PHY
 * @addr:		PHY address on MDIO bus
 * @phy_id:		where to store the ID retrieved
 * @is_c45:		Device Identifiers if is_c45
 * @interface:		interface between the MAC and PHY
 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
				     u32 phy_id, bool is_c45,
				     phy_interface_t interface);

/**
 * phy_connect_phy_id() - Connect to phy device by reading PHY id
 *			  from phy node.
 *
 * @bus:		MII/MDIO bus that hosts the PHY
 * @dev:		Ethernet device to associate to the PHY
 * @interface:		Interface between the MAC and PHY
 * @return:		pointer to phy_device if a PHY is found,
 *			or NULL otherwise
 */
struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
				      int phyaddr, phy_interface_t interface);

static inline ofnode phy_get_ofnode(struct phy_device *phydev)
{
	if (ofnode_valid(phydev->node))
		return phydev->node;
	else
		return dev_ofnode(phydev->dev);
}
#else

/**
 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
 * @phydev:	PHY device
 * @dev:	Ethernet device
 */
void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);

/**
 * phy_connect() - Creates a PHY device for the Ethernet interface
 * Creates a PHY device for the PHY at the given address, if one doesn't exist
 * already, and associates it with the Ethernet device.
 * The function may be called with addr <= 0, in this case addr value is ignored
 * and the bus is scanned to detect a PHY.  Scanning should only be used if only
 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
 * which PHY is returned.
 *
 * @bus:	MII/MDIO bus that hosts the PHY
 * @addr:	PHY address on MDIO bus
 * @dev:	Ethernet device to associate to the PHY
 * @interface:	type of MAC-PHY interface
 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_connect(struct mii_dev *bus, int addr,
				struct eth_device *dev,
				phy_interface_t interface);

static inline ofnode phy_get_ofnode(struct phy_device *phydev)
{
	return ofnode_null();
}
#endif
int phy_startup(struct phy_device *phydev);
int phy_config(struct phy_device *phydev);
int phy_shutdown(struct phy_device *phydev);
int phy_register(struct phy_driver *drv);
int phy_set_supported(struct phy_device *phydev, u32 max_speed);
int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
	       u16 set);
int genphy_config_aneg(struct phy_device *phydev);
int genphy_restart_aneg(struct phy_device *phydev);
int genphy_update_link(struct phy_device *phydev);
int genphy_parse_link(struct phy_device *phydev);
int genphy_config(struct phy_device *phydev);
int genphy_startup(struct phy_device *phydev);
int genphy_shutdown(struct phy_device *phydev);
int gen10g_config(struct phy_device *phydev);
int gen10g_startup(struct phy_device *phydev);
int gen10g_shutdown(struct phy_device *phydev);
int gen10g_discover_mmds(struct phy_device *phydev);

int phy_b53_init(void);
int phy_mv88e61xx_init(void);
int phy_aquantia_init(void);
int phy_atheros_init(void);
int phy_broadcom_init(void);
int phy_cortina_init(void);
int phy_cortina_access_init(void);
int phy_davicom_init(void);
int phy_et1011c_init(void);
int phy_lxt_init(void);
int phy_marvell_init(void);
int phy_micrel_ksz8xxx_init(void);
int phy_micrel_ksz90x1_init(void);
int phy_meson_gxl_init(void);
int phy_natsemi_init(void);
int phy_nxp_c45_tja11xx_init(void);
int phy_nxp_tja11xx_init(void);
int phy_realtek_init(void);
int phy_smsc_init(void);
int phy_teranetics_init(void);
int phy_ti_init(void);
int phy_vitesse_init(void);
int phy_xilinx_init(void);
int phy_mscc_init(void);
int phy_fixed_init(void);
int phy_ncsi_init(void);
int phy_xilinx_gmii2rgmii_init(void);

int board_phy_config(struct phy_device *phydev);
int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);

/**
 * phy_get_interface_by_name() - Look up a PHY interface name
 *
 * @str:	PHY interface name, e.g. "mii"
 * @return: PHY_INTERFACE_MODE_... value, or -1 if not found
 */
int phy_get_interface_by_name(const char *str);

/**
 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
 * is RGMII (all variants)
 * @phydev: the phy_device struct
 * @return: true if MII bus is RGMII or false if it is not
 */
static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
{
	return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
}

/**
 * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
 * is SGMII (all variants)
 * @phydev: the phy_device struct
 * @return: true if MII bus is SGMII or false if it is not
 */
static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
{
	return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
		phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
}

/* PHY UIDs for various PHYs that are referenced in external code */
#define PHY_UID_CS4340		0x13e51002
#define PHY_UID_CS4223		0x03e57003
#define PHY_UID_TN2020		0x00a19410
#define PHY_UID_IN112525_S03	0x02107440

#endif
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
5f184715 AF	2	/*
5f184715 AF	3	* Copyright 2011 Freescale Semiconductor, Inc.
b21f87a3	4	* Andy Fleming <[email protected]>
5f184715	5	*
5f184715 AF	6	* This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
	7	*/
	8
	9	#ifndef _PHY_H
	10	#define _PHY_H
	11
2a64ada7 SG	12	#include <log.h>
	13	#include <phy_interface.h>
	14	#include <dm/ofnode.h>
	15	#include <dm/read.h>
f2176515	16	#include <linux/errno.h>
5f184715 AF	17	#include <linux/list.h>
	18	#include <linux/mii.h>
	19	#include <linux/ethtool.h>
	20	#include <linux/mdio.h>
2a64ada7 SG	21
2a64ada7 SG	22	struct udevice;
5f184715	23
db40c1aa	24	#define PHY_FIXED_ID 0xa5a55a5a
f641a8ac SMJ	25	#define PHY_NCSI_ID 0xbeefcafe
f641a8ac SMJ	26
f41e588c SDPP	27	/*
	28	* There is no actual id for this.
	29	* This is just a dummy id for gmii2rgmmi converter.
	30	*/
	31	#define PHY_GMII2RGMII_ID 0x5a5a5a5a
db40c1aa	32
5f184715 AF	33	#define PHY_MAX_ADDR 32
5f184715 AF	34
ddcd1f30 SX	35	#define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
ddcd1f30 SX	36
4dae610b	37	#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg \| \
5f184715 AF	38	SUPPORTED_TP \| \
	39	SUPPORTED_MII)
	40
4dae610b FF	41	#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half \| \
	42	SUPPORTED_10baseT_Full)
	43
	44	#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half \| \
	45	SUPPORTED_100baseT_Full)
	46
	47	#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half \| \
5f184715 AF	48	SUPPORTED_1000baseT_Full)
5f184715 AF	49
4dae610b FF	50	#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES \| \
	51	PHY_100BT_FEATURES \| \
	52	PHY_DEFAULT_FEATURES)
	53
3ef2050a RPNO	54	#define PHY_100BT1_FEATURES (SUPPORTED_TP \| \
	55	SUPPORTED_MII \| \
	56	SUPPORTED_100baseT_Full)
	57
4dae610b FF	58	#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES \| \
	59	PHY_1000BT_FEATURES)
	60
5f184715 AF	61	#define PHY_10G_FEATURES (PHY_GBIT_FEATURES \| \
	62	SUPPORTED_10000baseT_Full)
	63
4fb3f0c8	64	#ifndef PHY_ANEG_TIMEOUT
5f184715	65	#define PHY_ANEG_TIMEOUT 4000
4fb3f0c8	66	#endif
5f184715 AF	67
5f184715 AF	68
5f184715 AF	69	struct phy_device;
	70
	71	#define MDIO_NAME_LEN 32
	72
	73	struct mii_dev {
	74	struct list_head link;
	75	char name[MDIO_NAME_LEN];
	76	void *priv;
	77	int (read)(struct mii_dev bus, int addr, int devad, int reg);
	78	int (write)(struct mii_dev bus, int addr, int devad, int reg,
	79	u16 val);
	80	int (reset)(struct mii_dev bus);
	81	struct phy_device *phymap[PHY_MAX_ADDR];
	82	u32 phy_mask;
	83	};
	84
	85	/* struct phy_driver: a structure which defines PHY behavior
	86	*
	87	* uid will contain a number which represents the PHY. During
	88	* startup, the driver will poll the PHY to find out what its
	89	* UID--as defined by registers 2 and 3--is. The 32-bit result
	90	* gotten from the PHY will be masked to
	91	* discard any bits which may change based on revision numbers
	92	* unimportant to functionality
	93	*
	94	*/
	95	struct phy_driver {
	96	char *name;
	97	unsigned int uid;
	98	unsigned int mask;
	99	unsigned int mmds;
	100
	101	u32 features;
	102
	103	/* Called to do any driver startup necessities */
	104	/* Will be called during phy_connect */
	105	int (probe)(struct phy_device phydev);
	106
	107	/* Called to configure the PHY, and modify the controller
	108	* based on the results. Should be called after phy_connect */
	109	int (config)(struct phy_device phydev);
	110
	111	/* Called when starting up the controller */
	112	int (startup)(struct phy_device phydev);
	113
	114	/* Called when bringing down the controller */
	115	int (shutdown)(struct phy_device phydev);
	116
b71841b9 SB	117	int (readext)(struct phy_device phydev, int addr, int devad, int reg);
	118	int (writeext)(struct phy_device phydev, int addr, int devad, int reg,
	119	u16 val);
4f6746dc CC	120
	121	/* Phy specific driver override for reading a MMD register */
	122	int (read_mmd)(struct phy_device phydev, int devad, int reg);
	123
	124	/* Phy specific driver override for writing a MMD register */
	125	int (write_mmd)(struct phy_device phydev, int devad, int reg,
	126	u16 val);
	127
5f184715	128	struct list_head list;
d718b697 AM	129
	130	/* driver private data */
	131	ulong data;
5f184715 AF	132	};
	133
	134	struct phy_device {
	135	/* Information about the PHY type */
	136	/* And management functions */
	137	struct mii_dev *bus;
	138	struct phy_driver *drv;
	139	void *priv;
	140
c74c8e66 SG	141	#ifdef CONFIG_DM_ETH
c74c8e66 SG	142	struct udevice *dev;
eef0b8a9	143	ofnode node;
c74c8e66	144	#else
5f184715	145	struct eth_device *dev;
c74c8e66	146	#endif
5f184715 AF	147
	148	/* forced speed & duplex (no autoneg)
	149	* partner speed & duplex & pause (autoneg)
	150	*/
	151	int speed;
	152	int duplex;
	153
	154	/* The most recently read link state */
	155	int link;
	156	int port;
	157	phy_interface_t interface;
	158
	159	u32 advertising;
	160	u32 supported;
	161	u32 mmds;
	162
	163	int autoneg;
	164	int addr;
	165	int pause;
	166	int asym_pause;
	167	u32 phy_id;
b3eabd82	168	bool is_c45;
5f184715 AF	169	u32 flags;
	170	};
	171
f55a776c SX	172	struct fixed_link {
	173	int phy_id;
	174	int duplex;
	175	int link_speed;
	176	int pause;
	177	int asym_pause;
	178	};
	179
6325c8bc DM	180	/**
	181	* phy_read - Convenience function for reading a given PHY register
	182	* @phydev: the phy_device struct
	183	* @devad: The MMD to read from
	184	* @regnum: register number to read
	185	* @return: value for success or negative errno for failure
	186	*/
5f184715 AF	187	static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
	188	{
	189	struct mii_dev *bus = phydev->bus;
	190
e2ffeaa1 SMJ	191	if (!bus \|\| !bus->read) {
	192	debug("%s: No bus configured\n", __func__);
	193	return -1;
	194	}
	195
5f184715 AF	196	return bus->read(bus, phydev->addr, devad, regnum);
	197	}
	198
6325c8bc DM	199	/**
	200	* phy_write - Convenience function for writing a given PHY register
	201	* @phydev: the phy_device struct
	202	* @devad: The MMD to read from
	203	* @regnum: register number to write
	204	* @val: value to write to @regnum
	205	* @return: 0 for success or negative errno for failure
	206	*/
5f184715 AF	207	static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
	208	u16 val)
	209	{
	210	struct mii_dev *bus = phydev->bus;
	211
7def4e62	212	if (!bus \|\| !bus->write) {
e2ffeaa1 SMJ	213	debug("%s: No bus configured\n", __func__);
	214	return -1;
	215	}
	216
5f184715 AF	217	return bus->write(bus, phydev->addr, devad, regnum, val);
	218	}
	219
6325c8bc DM	220	/**
	221	* phy_mmd_start_indirect - Convenience function for writing MMD registers
	222	* @phydev: the phy_device struct
	223	* @devad: The MMD to read from
	224	* @regnum: register number to write
	225	* @return: None
	226	*/
4f6746dc CC	227	static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
	228	int regnum)
	229	{
	230	/* Write the desired MMD Devad */
	231	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
	232
	233	/* Write the desired MMD register address */
	234	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
	235
	236	/* Select the Function : DATA with no post increment */
	237	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
	238	(devad \| MII_MMD_CTRL_NOINCR));
	239	}
	240
6325c8bc DM	241	/**
	242	* phy_read_mmd - Convenience function for reading a register
	243	* from an MMD on a given PHY.
	244	* @phydev: The phy_device struct
	245	* @devad: The MMD to read from
	246	* @regnum: The register on the MMD to read
	247	* @return: Value for success or negative errno for failure
	248	*/
4f6746dc CC	249	static inline int phy_read_mmd(struct phy_device *phydev, int devad,
	250	int regnum)
	251	{
	252	struct phy_driver *drv = phydev->drv;
	253
	254	if (regnum > (u16)~0 \|\| devad > 32)
	255	return -EINVAL;
	256
	257	/* driver-specific access */
	258	if (drv->read_mmd)
	259	return drv->read_mmd(phydev, devad, regnum);
	260
	261	/* direct C45 / C22 access */
	262	if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES \|\|
	263	devad == MDIO_DEVAD_NONE \|\| !devad)
	264	return phy_read(phydev, devad, regnum);
	265
	266	/* indirect C22 access */
	267	phy_mmd_start_indirect(phydev, devad, regnum);
	268
	269	/* Read the content of the MMD's selected register */
	270	return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
	271	}
	272
6325c8bc DM	273	/**
	274	* phy_write_mmd - Convenience function for writing a register
	275	* on an MMD on a given PHY.
	276	* @phydev: The phy_device struct
	277	* @devad: The MMD to read from
	278	* @regnum: The register on the MMD to read
	279	* @val: value to write to @regnum
	280	* @return: 0 for success or negative errno for failure
	281	*/
4f6746dc CC	282	static inline int phy_write_mmd(struct phy_device *phydev, int devad,
	283	int regnum, u16 val)
	284	{
	285	struct phy_driver *drv = phydev->drv;
	286
	287	if (regnum > (u16)~0 \|\| devad > 32)
	288	return -EINVAL;
	289
	290	/* driver-specific access */
	291	if (drv->write_mmd)
	292	return drv->write_mmd(phydev, devad, regnum, val);
	293
	294	/* direct C45 / C22 access */
	295	if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES \|\|
	296	devad == MDIO_DEVAD_NONE \|\| !devad)
	297	return phy_write(phydev, devad, regnum, val);
	298
	299	/* indirect C22 access */
	300	phy_mmd_start_indirect(phydev, devad, regnum);
	301
	302	/* Write the data into MMD's selected register */
	303	return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
	304	}
	305
535247a9 DM	306	/**
	307	* phy_set_bits_mmd - Convenience function for setting bits in a register
	308	* on MMD
	309	* @phydev: the phy_device struct
	310	* @devad: the MMD containing register to modify
	311	* @regnum: register number to modify
	312	* @val: bits to set
	313	* @return: 0 for success or negative errno for failure
	314	*/
	315	static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
	316	u32 regnum, u16 val)
	317	{
	318	int value, ret;
	319
	320	value = phy_read_mmd(phydev, devad, regnum);
	321	if (value < 0)
	322	return value;
	323
	324	value \|= val;
	325
	326	ret = phy_write_mmd(phydev, devad, regnum, value);
	327	if (ret < 0)
	328	return ret;
	329
	330	return 0;
	331	}
	332
	333	/**
	334	* phy_clear_bits_mmd - Convenience function for clearing bits in a register
	335	* on MMD
	336	* @phydev: the phy_device struct
	337	* @devad: the MMD containing register to modify
	338	* @regnum: register number to modify
	339	* @val: bits to clear
	340	* @return: 0 for success or negative errno for failure
	341	*/
	342	static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
	343	u32 regnum, u16 val)
	344	{
	345	int value, ret;
	346
	347	value = phy_read_mmd(phydev, devad, regnum);
	348	if (value < 0)
	349	return value;
	350
	351	value &= ~val;
	352
	353	ret = phy_write_mmd(phydev, devad, regnum, value);
	354	if (ret < 0)
	355	return ret;
	356
	357	return 0;
	358	}
	359
5f184715 AF	360	#ifdef CONFIG_PHYLIB_10G
	361	extern struct phy_driver gen10g_driver;
	362
9810489c AM	363	/*
	364	* List all 10G interfaces here, the assumption being that PHYs on these
	365	* interfaces are C45
	366	*/
5f184715 AF	367	static inline int is_10g_interface(phy_interface_t interface)
5f184715 AF	368	{
9810489c AM	369	return interface == PHY_INTERFACE_MODE_XGMII \|\|
9810489c AM	370	interface == PHY_INTERFACE_MODE_USXGMII \|\|
77b11f76	371	interface == PHY_INTERFACE_MODE_10GBASER;
5f184715 AF	372	}
	373
	374	#endif
	375
c38ac289 AM	376	/**
c38ac289 AM	377	* phy_init() - Initializes the PHY drivers
c38ac289 AM	378	* This function registers all available PHY drivers
c38ac289 AM	379	*
ea756fb8	380	* @return: 0 if OK, -ve on error
c38ac289	381	*/
5f184715	382	int phy_init(void);
c38ac289 AM	383
	384	/**
	385	* phy_reset() - Resets the specified PHY
c38ac289 AM	386	* Issues a reset of the PHY and waits for it to complete
	387	*
	388	* @phydev: PHY to reset
ea756fb8	389	* @return: 0 if OK, -ve on error
c38ac289	390	*/
5f184715	391	int phy_reset(struct phy_device *phydev);
c38ac289 AM	392
	393	/**
	394	* phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
c38ac289 AM	395	* The function checks the PHY addresses flagged in phy_mask and returns a
	396	* phy_device pointer if it detects a PHY.
	397	* This function should only be called if just one PHY is expected to be present
	398	* in the set of addresses flagged in phy_mask. If multiple PHYs are present,
	399	* it is undefined which of these PHYs is returned.
	400	*
	401	* @bus: MII/MDIO bus to scan
	402	* @phy_mask: bitmap of PYH addresses to scan
	403	* @interface: type of MAC-PHY interface
ea756fb8	404	* @return: pointer to phy_device if a PHY is found, or NULL otherwise
c38ac289	405	*/
1adb406b TK	406	struct phy_device phy_find_by_mask(struct mii_dev bus, unsigned phy_mask,
1adb406b TK	407	phy_interface_t interface);
c38ac289	408
d0781c95 VO	409	#ifdef CONFIG_PHY_FIXED
	410
	411	/**
	412	* fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
	413	* @node: OF node for the container of the fixed-link node
	414	*
	415	* Description: Creates a struct phy_device based on a fixed-link of_node
	416	* description. Can be used without phy_connect by drivers which do not expose
	417	* a UCLASS_ETH udevice.
	418	*/
	419	struct phy_device *fixed_phy_create(ofnode node);
	420
	421	#else
	422
	423	static inline struct phy_device *fixed_phy_create(ofnode node)
	424	{
	425	return NULL;
	426	}
	427
	428	#endif
	429
c74c8e66	430	#ifdef CONFIG_DM_ETH
c38ac289 AM	431
	432	/**
	433	* phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
	434	* @phydev: PHY device
	435	* @dev: Ethernet device
	436	*/
c74c8e66	437	void phy_connect_dev(struct phy_device phydev, struct udevice dev);
c38ac289 AM	438
	439	/**
	440	* phy_connect() - Creates a PHY device for the Ethernet interface
c38ac289 AM	441	* Creates a PHY device for the PHY at the given address, if one doesn't exist
	442	* already, and associates it with the Ethernet device.
	443	* The function may be called with addr <= 0, in this case addr value is ignored
	444	* and the bus is scanned to detect a PHY. Scanning should only be used if only
	445	* one PHY is expected to be present on the MDIO bus, otherwise it is undefined
	446	* which PHY is returned.
	447	*
	448	* @bus: MII/MDIO bus that hosts the PHY
	449	* @addr: PHY address on MDIO bus
	450	* @dev: Ethernet device to associate to the PHY
	451	* @interface: type of MAC-PHY interface
ea756fb8	452	* @return: pointer to phy_device if a PHY is found, or NULL otherwise
c38ac289	453	*/
c74c8e66 SG	454	struct phy_device phy_connect(struct mii_dev bus, int addr,
	455	struct udevice *dev,
	456	phy_interface_t interface);
3249116d MS	457	/**
	458	* phy_device_create() - Create a PHY device
	459	*
	460	* @bus: MII/MDIO bus that hosts the PHY
	461	* @addr: PHY address on MDIO bus
	462	* @phy_id: where to store the ID retrieved
	463	* @is_c45: Device Identifiers if is_c45
	464	* @interface: interface between the MAC and PHY
	465	* @return: pointer to phy_device if a PHY is found, or NULL otherwise
	466	*/
	467	struct phy_device phy_device_create(struct mii_dev bus, int addr,
	468	u32 phy_id, bool is_c45,
	469	phy_interface_t interface);
c38ac289	470
a744a284 MS	471	/**
	472	* phy_connect_phy_id() - Connect to phy device by reading PHY id
	473	* from phy node.
	474	*
	475	* @bus: MII/MDIO bus that hosts the PHY
	476	* @dev: Ethernet device to associate to the PHY
	477	* @interface: Interface between the MAC and PHY
	478	* @return: pointer to phy_device if a PHY is found,
	479	* or NULL otherwise
	480	*/
	481	struct phy_device phy_connect_phy_id(struct mii_dev bus, struct udevice *dev,
9b529a97	482	int phyaddr, phy_interface_t interface);
a744a284	483
eef0b8a9 GS	484	static inline ofnode phy_get_ofnode(struct phy_device *phydev)
	485	{
	486	if (ofnode_valid(phydev->node))
	487	return phydev->node;
	488	else
	489	return dev_ofnode(phydev->dev);
	490	}
c74c8e66	491	#else
c38ac289 AM	492
	493	/**
	494	* phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
	495	* @phydev: PHY device
	496	* @dev: Ethernet device
	497	*/
1adb406b	498	void phy_connect_dev(struct phy_device phydev, struct eth_device dev);
c38ac289 AM	499
	500	/**
	501	* phy_connect() - Creates a PHY device for the Ethernet interface
c38ac289 AM	502	* Creates a PHY device for the PHY at the given address, if one doesn't exist
	503	* already, and associates it with the Ethernet device.
	504	* The function may be called with addr <= 0, in this case addr value is ignored
	505	* and the bus is scanned to detect a PHY. Scanning should only be used if only
	506	* one PHY is expected to be present on the MDIO bus, otherwise it is undefined
	507	* which PHY is returned.
	508	*
	509	* @bus: MII/MDIO bus that hosts the PHY
	510	* @addr: PHY address on MDIO bus
	511	* @dev: Ethernet device to associate to the PHY
	512	* @interface: type of MAC-PHY interface
ea756fb8	513	* @return: pointer to phy_device if a PHY is found, or NULL otherwise
c38ac289	514	*/
5f184715 AF	515	struct phy_device phy_connect(struct mii_dev bus, int addr,
	516	struct eth_device *dev,
	517	phy_interface_t interface);
c38ac289	518
eef0b8a9 GS	519	static inline ofnode phy_get_ofnode(struct phy_device *phydev)
	520	{
	521	return ofnode_null();
	522	}
c74c8e66	523	#endif
5f184715 AF	524	int phy_startup(struct phy_device *phydev);
	525	int phy_config(struct phy_device *phydev);
	526	int phy_shutdown(struct phy_device *phydev);
	527	int phy_register(struct phy_driver *drv);
b18acb0a	528	int phy_set_supported(struct phy_device *phydev, u32 max_speed);
087baf80 AA	529	int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
087baf80 AA	530	u16 set);
5f184715	531	int genphy_config_aneg(struct phy_device *phydev);
8682aba7	532	int genphy_restart_aneg(struct phy_device *phydev);
5f184715	533	int genphy_update_link(struct phy_device *phydev);
e2043f5c	534	int genphy_parse_link(struct phy_device *phydev);
5f184715 AF	535	int genphy_config(struct phy_device *phydev);
	536	int genphy_startup(struct phy_device *phydev);
	537	int genphy_shutdown(struct phy_device *phydev);
	538	int gen10g_config(struct phy_device *phydev);
	539	int gen10g_startup(struct phy_device *phydev);
	540	int gen10g_shutdown(struct phy_device *phydev);
	541	int gen10g_discover_mmds(struct phy_device *phydev);
	542
137963d7	543	int phy_b53_init(void);
24ae3961	544	int phy_mv88e61xx_init(void);
f7c38cf8	545	int phy_aquantia_init(void);
9082eeac AF	546	int phy_atheros_init(void);
9082eeac AF	547	int phy_broadcom_init(void);
9b18e519	548	int phy_cortina_init(void);
a70d7b01	549	int phy_cortina_access_init(void);
9082eeac	550	int phy_davicom_init(void);
f485c8a3	551	int phy_et1011c_init(void);
9082eeac AF	552	int phy_lxt_init(void);
9082eeac AF	553	int phy_marvell_init(void);
d397f7c4 AG	554	int phy_micrel_ksz8xxx_init(void);
d397f7c4 AG	555	int phy_micrel_ksz90x1_init(void);
8995a96d	556	int phy_meson_gxl_init(void);
9082eeac	557	int phy_natsemi_init(void);
01c67a38	558	int phy_nxp_c45_tja11xx_init(void);
a2f5c936	559	int phy_nxp_tja11xx_init(void);
9082eeac	560	int phy_realtek_init(void);
b6abf555	561	int phy_smsc_init(void);
9082eeac	562	int phy_teranetics_init(void);
721aed79	563	int phy_ti_init(void);
9082eeac	564	int phy_vitesse_init(void);
ed6fad3e	565	int phy_xilinx_init(void);
a5fd13ad	566	int phy_mscc_init(void);
db40c1aa	567	int phy_fixed_init(void);
e2ffeaa1	568	int phy_ncsi_init(void);
f41e588c	569	int phy_xilinx_gmii2rgmii_init(void);
a836626c	570
2fb63964	571	int board_phy_config(struct phy_device *phydev);
5707d5ff	572	int get_phy_id(struct mii_dev bus, int addr, int devad, u32 phy_id);
2fb63964	573
c74c8e66 SG	574	/**
	575	* phy_get_interface_by_name() - Look up a PHY interface name
	576	*
	577	* @str: PHY interface name, e.g. "mii"
ea756fb8	578	* @return: PHY_INTERFACE_MODE_... value, or -1 if not found
c74c8e66 SG	579	*/
	580	int phy_get_interface_by_name(const char *str);
	581
3ab72fe8 DM	582	/**
	583	* phy_interface_is_rgmii - Convenience function for testing if a PHY interface
	584	* is RGMII (all variants)
	585	* @phydev: the phy_device struct
ea756fb8	586	* @return: true if MII bus is RGMII or false if it is not
3ab72fe8 DM	587	*/
	588	static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
	589	{
	590	return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
	591	phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
	592	}
	593
3c221af3 DM	594	/**
	595	* phy_interface_is_sgmii - Convenience function for testing if a PHY interface
	596	* is SGMII (all variants)
	597	* @phydev: the phy_device struct
ea756fb8	598	* @return: true if MII bus is SGMII or false if it is not
3c221af3 DM	599	*/
	600	static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
	601	{
	602	return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
	603	phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
	604	}
	605
a836626c	606	/* PHY UIDs for various PHYs that are referenced in external code */
0cf207ec WD	607	#define PHY_UID_CS4340 0x13e51002
0cf207ec WD	608	#define PHY_UID_CS4223 0x03e57003
1ddcf5ed PJ	609	#define PHY_UID_TN2020 0x00a19410
1ddcf5ed PJ	610	#define PHY_UID_IN112525_S03 0x02107440
a836626c	611
5f184715	612	#endif