memory_region_init_io(&s->apb_config, &apb_config_ops, s, "apb-config",
0x10000);
/* at region 0 */
- sysbus_init_mmio_region(dev, &s->apb_config);
+ sysbus_init_mmio(dev, &s->apb_config);
memory_region_init_io(&s->pci_config, &pci_config_ops, s, "apb-pci-config",
0x1000000);
/* at region 1 */
- sysbus_init_mmio_region(dev, &s->pci_config);
+ sysbus_init_mmio(dev, &s->pci_config);
/* pci_ioport */
memory_region_init_io(&s->pci_ioport, &pci_ioport_ops, s,
"apb-pci-ioport", 0x10000);
/* at region 2 */
- sysbus_init_mmio_region(dev, &s->pci_ioport);
+ sysbus_init_mmio(dev, &s->pci_ioport);
return 0;
}
}
memory_region_init_io(&s->io_memory, &apic_io_ops, s, "apic",
MSI_ADDR_SIZE);
- sysbus_init_mmio_region(dev, &s->io_memory);
+ sysbus_init_mmio(dev, &s->io_memory);
s->timer = qemu_new_timer_ns(vm_clock, apic_timer, s);
s->idx = last_apic_idx++;
}
}
qdev_init_gpio_in(&dev->qdev, mpcore_rirq_set_irq, 64);
- sysbus_init_mmio_region(dev, sysbus_mmio_get_region(s->priv, 0));
+ sysbus_init_mmio(dev, sysbus_mmio_get_region(s->priv, 0));
return 0;
}
arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, dev);
memory_region_init_io(&s->iomem, &arm_sysctl_ops, s, "arm-sysctl", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&s->busdev.qdev, arm_sysctl_gpio_set, 2);
qdev_init_gpio_out(&s->busdev.qdev, &s->pl110_mux_ctrl, 1);
return 0;
s->timer[0]->irq = qi[0];
s->timer[1]->irq = qi[1];
memory_region_init_io(&s->iomem, &sp804_ops, s, "sp804", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
vmstate_register(&dev->qdev, -1, &vmstate_sp804, s);
return 0;
}
sysbus_init_irq(dev, &s->timer[2]->irq);
memory_region_init_io(&s->iomem, &icp_pit_ops, s, "icp_pit", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
/* This device has no state to save/restore. The component timers will
save themselves. */
return 0;
memory_region_init_io(&s->iomem, &bitband_ops, &s->base, "bitband",
0x02000000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
i2c_bus *bus;
memory_region_init(&s->dummy_iomem, "gpio_i2c", 0);
- sysbus_init_mmio_region(dev, &s->dummy_iomem);
+ sysbus_init_mmio(dev, &s->dummy_iomem);
bus = i2c_init_bus(&dev->qdev, "i2c");
s->bitbang = bitbang_i2c_init(bus);
/* set the north bridge register mapping */
memory_region_init_io(&s->iomem, &bonito_ops, s,
"north-bridge-register", BONITO_INTERNAL_REG_SIZE);
- sysbus_init_mmio_region(sysbus, &s->iomem);
+ sysbus_init_mmio(sysbus, &s->iomem);
sysbus_mmio_map(sysbus, 0, BONITO_INTERNAL_REG_BASE);
/* set the north bridge pci configure mapping */
memory_region_init_io(&s->pcihost->conf_mem, &bonito_pciconf_ops, s,
"north-bridge-pci-config", BONITO_PCICONFIG_SIZE);
- sysbus_init_mmio_region(sysbus, &s->pcihost->conf_mem);
+ sysbus_init_mmio(sysbus, &s->pcihost->conf_mem);
sysbus_mmio_map(sysbus, 1, BONITO_PCICONFIG_BASE);
/* set the south bridge pci configure mapping */
memory_region_init_io(&s->pcihost->data_mem, &bonito_spciconf_ops, s,
"south-bridge-pci-config", BONITO_SPCICONFIG_SIZE);
- sysbus_init_mmio_region(sysbus, &s->pcihost->data_mem);
+ sysbus_init_mmio(sysbus, &s->pcihost->data_mem);
sysbus_mmio_map(sysbus, 2, BONITO_SPCICONFIG_BASE);
memory_region_init_io(&s->iomem_ldma, &bonito_ldma_ops, s,
"ldma", 0x100);
- sysbus_init_mmio_region(sysbus, &s->iomem_ldma);
+ sysbus_init_mmio(sysbus, &s->iomem_ldma);
sysbus_mmio_map(sysbus, 3, 0xbfe00200);
memory_region_init_io(&s->iomem_cop, &bonito_cop_ops, s,
"cop", 0x100);
- sysbus_init_mmio_region(sysbus, &s->iomem_cop);
+ sysbus_init_mmio(sysbus, &s->iomem_cop);
sysbus_mmio_map(sysbus, 4, 0xbfe00300);
/* Map PCI IO Space 0x1fd0 0000 - 0x1fd1 0000 */
CSState *s = FROM_SYSBUS(CSState, dev);
memory_region_init_io(&s->iomem, &cs_mem_ops, s, "cs4321", CS_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
return 0;
&s->host_state, "pci-conf-idx", 0x1000);
memory_region_init_io(&s->host_state.data_mem, &pci_host_data_le_ops,
&s->host_state, "pci-data-idx", 0x1000);
- sysbus_init_mmio_region(dev, &s->host_state.conf_mem);
- sysbus_init_mmio_region(dev, &s->host_state.data_mem);
+ sysbus_init_mmio(dev, &s->host_state.conf_mem);
+ sysbus_init_mmio(dev, &s->host_state.data_mem);
return 0;
}
s->contents = g_malloc0(s->chip_size);
memory_region_init_io(&s->iomem, &nvram_ops, s, "nvram", s->chip_size);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
/* Read current file */
file = fopen(s->filename, "rb");
sysbus_init_irq(dev, &s->irq);
s->regs[0] = s->version;
memory_region_init_io(&s->iomem, &ecc_mem_ops, s, "ecc", ECC_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
if (s->version == ECC_MCC) { // SS-600MP only
memory_region_init_io(&s->iomem_diag, &ecc_diag_mem_ops, s,
"ecc.diag", ECC_DIAG_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem_diag);
+ sysbus_init_mmio(dev, &s->iomem_diag);
}
return 0;
memory_region_init_io(&s->iomem, &empty_slot_ops, s,
"empty-slot", s->size);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
memory_region_init_io(&s->mmio, &escc_mem_ops, s, "escc",
ESCC_SIZE << s->it_shift);
- sysbus_init_mmio_region(dev, &s->mmio);
+ sysbus_init_mmio(dev, &s->mmio);
if (s->chn[0].type == mouse) {
qemu_add_mouse_event_handler(sunmouse_event, &s->chn[0], 0,
memory_region_init_io(&s->iomem, &esp_mem_ops, s,
"esp", ESP_REGS << s->it_shift);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, esp_gpio_demux, 2);
s->dma_in->client.pull = NULL;
memory_region_init_io(&s->mmio, ð_ops, s, "etraxfs-eth", 0x5c);
- sysbus_init_mmio_region(dev, &s->mmio);
+ sysbus_init_mmio(dev, &s->mmio);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
s->nic = qemu_new_nic(&net_etraxfs_info, &s->conf,
sysbus_init_irq(dev, &s->parent_nmi);
memory_region_init_io(&s->mmio, &pic_ops, s, "etraxfs-pic", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->mmio);
+ sysbus_init_mmio(dev, &s->mmio);
return 0;
}
sysbus_init_irq(dev, &s->irq);
memory_region_init_io(&s->mmio, &ser_ops, s, "etraxfs-serial", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->mmio);
+ sysbus_init_mmio(dev, &s->mmio);
s->chr = qdev_init_chardev(&dev->qdev);
if (s->chr)
sysbus_init_irq(dev, &t->nmi);
memory_region_init_io(&t->mmio, &timer_ops, t, "etraxfs-timer", 0x5c);
- sysbus_init_mmio_region(dev, &t->mmio);
+ sysbus_init_mmio(dev, &t->mmio);
qemu_register_reset(etraxfs_timer_reset, t);
return 0;
}
int ret;
memory_region_init_io(&fdctrl->iomem, &fdctrl_mem_ops, fdctrl, "fdc", 0x08);
- sysbus_init_mmio_region(dev, &fdctrl->iomem);
+ sysbus_init_mmio(dev, &fdctrl->iomem);
sysbus_init_irq(dev, &fdctrl->irq);
qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
fdctrl->dma_chann = -1;
memory_region_init_io(&fdctrl->iomem, &fdctrl_mem_strict_ops, fdctrl,
"fdctrl", 0x08);
- sysbus_init_mmio_region(dev, &fdctrl->iomem);
+ sysbus_init_mmio(dev, &fdctrl->iomem);
sysbus_init_irq(dev, &fdctrl->irq);
qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
memory_region_init_io(&s->ctl_iomem, &fw_cfg_ctl_mem_ops, s,
"fwcfg.ctl", FW_CFG_SIZE);
- sysbus_init_mmio_region(dev, &s->ctl_iomem);
+ sysbus_init_mmio(dev, &s->ctl_iomem);
memory_region_init_io(&s->data_iomem, &fw_cfg_data_mem_ops, s,
"fwcfg.data", FW_CFG_DATA_SIZE);
- sysbus_init_mmio_region(dev, &s->data_iomem);
+ sysbus_init_mmio(dev, &s->data_iomem);
/* In case ctl and data overlap: */
memory_region_init_io(&s->comb_iomem, &fw_cfg_comb_mem_ops, s,
"fwcfg", FW_CFG_SIZE);
g364fb_init(&dev->qdev, s);
sysbus_init_irq(dev, &s->irq);
- sysbus_init_mmio_region(dev, &s->mem_ctrl);
- sysbus_init_mmio_region(dev, &s->mem_vram);
+ sysbus_init_mmio(dev, &s->mem_ctrl);
+ sysbus_init_mmio(dev, &s->mem_vram);
return 0;
}
&s->host_state, "pci-conf-idx", 0x1000);
memory_region_init_io(&s->host_state.data_mem, &pci_host_data_le_ops,
&s->host_state, "pci-data-idx", 0x1000);
- sysbus_init_mmio_region(dev, &s->host_state.conf_mem);
- sysbus_init_mmio_region(dev, &s->host_state.data_mem);
+ sysbus_init_mmio(dev, &s->host_state.conf_mem);
+ sysbus_init_mmio(dev, &s->host_state.data_mem);
qemu_register_reset(pci_grackle_reset, &s->host_state);
return 0;
memory_region_init_io(&uart->iomem, &grlib_apbuart_ops, uart,
"uart", UART_REG_SIZE);
- sysbus_init_mmio_region(dev, &uart->iomem);
+ sysbus_init_mmio(dev, &uart->iomem);
return 0;
}
memory_region_init_io(&unit->iomem, &grlib_gptimer_ops, unit, "gptimer",
UNIT_REG_SIZE + GPTIMER_REG_SIZE * unit->nr_timers);
- sysbus_init_mmio_region(dev, &unit->iomem);
+ sysbus_init_mmio(dev, &unit->iomem);
return 0;
}
irqmp->state = g_malloc0(sizeof *irqmp->state);
- sysbus_init_mmio_region(dev, &irqmp->iomem);
+ sysbus_init_mmio(dev, &irqmp->iomem);
return 0;
}
/* HPET Area */
memory_region_init_io(&s->iomem, &hpet_ram_ops, s, "hpet", 0x400);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
memory_region_init_io(&s->iomem, &integratorcm_ops, s,
"integratorcm", 0x00800000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
integratorcm_do_remap(s, 1);
/* ??? Save/restore. */
sysbus_init_irq(dev, &s->parent_irq);
sysbus_init_irq(dev, &s->parent_fiq);
memory_region_init_io(&s->iomem, &icp_pic_ops, s, "icp-pic", 0x00800000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
}
memory_region_init_io(&s->io_memory, &ioapic_io_ops, s, "ioapic", 0x1000);
- sysbus_init_mmio_region(dev, &s->io_memory);
+ sysbus_init_mmio(dev, &s->io_memory);
qdev_init_gpio_in(&dev->qdev, ioapic_set_irq, IOAPIC_NUM_PINS);
int i;
memory_region_init_io(&s->mmio, &lan9118_mem_ops, s, "lan9118-mmio", 0x100);
- sysbus_init_mmio_region(dev, &s->mmio);
+ sysbus_init_mmio(dev, &s->mmio);
sysbus_init_irq(dev, &s->irq);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
qdev_init_gpio_in(&dev->qdev, parent_lance_reset, 1);
- sysbus_init_mmio_region(dev, &s->mmio);
+ sysbus_init_mmio(dev, &s->mmio);
sysbus_init_irq(dev, &s->irq);
LM32SysState *s = FROM_SYSBUS(typeof(*s), dev);
memory_region_init_io(&s->iomem, &sys_ops , s, "sys", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
/* Note: This device is not created in the board initialization,
* instead it has to be added with the -device parameter. Therefore,
ptimer_set_freq(s->ptimer, s->freq_hz);
memory_region_init_io(&s->iomem, &timer_ops, s, "timer", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
sysbus_init_irq(dev, &s->irq);
memory_region_init_io(&s->iomem, &uart_ops, s, "uart", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
s->chr = qdev_init_chardev(&dev->qdev);
if (s->chr) {
sysbus_init_irq(dev, &s->IRQ);
memory_region_init_io(&s->iomem, &nvram_ops, s, "m48t59.nvram", s->size);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
m48t59_init_common(s);
return 0;
memory_region_init_io(&s->iomem, &mv88w8618_audio_ops, s,
"audio", MP_AUDIO_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
memory_region_init_io(&s->regs_region, &ac97_mmio_ops, s,
"milkymist-ac97", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->regs_region);
+ sysbus_init_mmio(dev, &s->regs_region);
return 0;
}
memory_region_init_io(&s->regs_region, &hpdmc_mmio_ops, s,
"milkymist-hpdmc", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->regs_region);
+ sysbus_init_mmio(dev, &s->regs_region);
return 0;
}
memory_region_init_io(&s->regs_region, &memcard_mmio_ops, s,
"milkymist-memcard", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->regs_region);
+ sysbus_init_mmio(dev, &s->regs_region);
return 0;
}
memory_region_init_io(&s->regs_region, &minimac2_ops, s,
"milkymist-minimac2", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->regs_region);
+ sysbus_init_mmio(dev, &s->regs_region);
/* register buffers memory */
memory_region_init_ram(&s->buffers, NULL, "milkymist-minimac2.buffers",
memory_region_init_io(&s->regs_region, &pfpu_mmio_ops, s,
"milkymist-pfpu", MICROCODE_END * 4);
- sysbus_init_mmio_region(dev, &s->regs_region);
+ sysbus_init_mmio(dev, &s->regs_region);
return 0;
}
memory_region_init_io(&s->regs_region, &softusb_mmio_ops, s,
"milkymist-softusb", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->regs_region);
+ sysbus_init_mmio(dev, &s->regs_region);
/* register pmem and dmem */
memory_region_init_ram(&s->pmem, NULL, "milkymist-softusb.pmem",
memory_region_init_io(&s->regs_region, &sysctl_mmio_ops, s,
"milkymist-sysctl", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->regs_region);
+ sysbus_init_mmio(dev, &s->regs_region);
return 0;
}
memory_region_init_io(&s->regs_region, &tmu2_mmio_ops, s,
"milkymist-tmu2", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->regs_region);
+ sysbus_init_mmio(dev, &s->regs_region);
return 0;
}
memory_region_init_io(&s->regs_region, &uart_mmio_ops, s,
"milkymist-uart", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->regs_region);
+ sysbus_init_mmio(dev, &s->regs_region);
s->chr = qdev_init_chardev(&dev->qdev);
if (s->chr) {
memory_region_init_io(&s->regs_region, &vgafb_mmio_ops, s,
"milkymist-vgafb", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->regs_region);
+ sysbus_init_mmio(dev, &s->regs_region);
s->ds = graphic_console_init(vgafb_update_display,
vgafb_invalidate_display,
MIPSnetState *s = DO_UPCAST(MIPSnetState, busdev, dev);
memory_region_init_io(&s->io, &mipsnet_ioport_ops, s, "mipsnet-io", 36);
- sysbus_init_mmio_region(dev, &s->io);
+ sysbus_init_mmio(dev, &s->io);
sysbus_init_irq(dev, &s->irq);
s->nic = qemu_new_nic(&net_mipsnet_info, &s->conf,
memory_region_init_io(&s->iomem, &mpc8544_guts_ops, s,
"mpc6544.guts", MPC8544_GUTS_MMIO_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
gic_init(&s->gic, s->num_cpu);
mpcore_priv_map_setup(s);
- sysbus_init_mmio_region(dev, &s->container);
+ sysbus_init_mmio(dev, &s->container);
for (i = 0; i < s->num_cpu * 2; i++) {
mpcore_timer_init(s, &s->timer[i], i);
}
memory_region_init_io(&s->iomem, &mst_fpga_ops, s,
"fpga", 0x00100000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
dev->qdev.info->name, dev->qdev.id, s);
memory_region_init_io(&s->iomem, &mv88w8618_eth_ops, s, "mv88w8618-eth",
MP_ETH_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
memory_region_init_io(&s->iomem, &musicpal_lcd_ops, s,
"musicpal-lcd", MP_LCD_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
s->ds = graphic_console_init(lcd_refresh, lcd_invalidate,
NULL, NULL, s);
sysbus_init_irq(dev, &s->parent_irq);
memory_region_init_io(&s->iomem, &mv88w8618_pic_ops, s,
"musicpal-pic", MP_PIC_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
memory_region_init_io(&s->iomem, &mv88w8618_pit_ops, s,
"musicpal-pit", MP_PIT_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
s->cfgr0 = 0xfffe4285; /* Default as set by U-Boot for 8 MB flash */
memory_region_init_io(&s->iomem, &mv88w8618_flashcfg_ops, s,
"musicpal-flashcfg", MP_FLASHCFG_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
memory_region_init_io(iomem, &mv88w8618_wlan_ops, NULL,
"musicpal-wlan", MP_WLAN_SIZE);
- sysbus_init_mmio_region(dev, iomem);
+ sysbus_init_mmio(dev, iomem);
return 0;
}
memory_region_init_io(&s->iomem, &musicpal_gpio_ops, s,
"musicpal-gpio", MP_GPIO_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_out(&dev->qdev, s->out, ARRAY_SIZE(s->out));
musicpal_key_state *s = FROM_SYSBUS(musicpal_key_state, dev);
memory_region_init(&s->iomem, "dummy", 0);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
s->kbd_extended = 0;
s->pressed_keys = 0;
sysbus_init_irq(dev, &s->omap1.irq);
memory_region_init_io(&s->iomem, &omap_gpio_ops, &s->omap1,
"omap.gpio", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
s->modulecount = (s->mpu_model < omap2430) ? 4 : 5;
memory_region_init_io(&s->iomem, &omap2_gpif_top_ops, s,
"omap2.gpio", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
} else {
s->modulecount = 6;
}
sysbus_init_irq(dev, &m->wkup);
memory_region_init_io(&m->iomem, &omap2_gpio_module_ops, m,
"omap.gpio-module", 0x1000);
- sysbus_init_mmio_region(dev, &m->iomem);
+ sysbus_init_mmio(dev, &m->iomem);
}
return 0;
}
qdev_init_gpio_in(&dev->qdev, omap_set_intr, s->nbanks * 32);
memory_region_init_io(&s->mmio, &omap_inth_mem_ops, s,
"omap-intc", s->size);
- sysbus_init_mmio_region(dev, &s->mmio);
+ sysbus_init_mmio(dev, &s->mmio);
return 0;
}
qdev_init_gpio_in(&dev->qdev, omap_set_intr_noedge, s->nbanks * 32);
memory_region_init_io(&s->mmio, &omap2_inth_mem_ops, s,
"omap2-intc", 0x1000);
- sysbus_init_mmio_region(dev, &s->mmio);
+ sysbus_init_mmio(dev, &s->mmio);
return 0;
}
s->data[1][1] = ram + ((0x8010 + (1 << (PAGE_SHIFT - 6))) << s->shift);
onenand_mem_setup(s);
sysbus_init_irq(dev, &s->intr);
- sysbus_init_mmio_region(dev, &s->container);
+ sysbus_init_mmio(dev, &s->container);
vmstate_register(&dev->qdev,
((s->shift & 0x7f) << 24)
| ((s->id.man & 0xff) << 16)
memory_region_init_io(&s->reg_io, &open_eth_reg_ops, s,
"open_eth.regs", 0x54);
- sysbus_init_mmio_region(dev, &s->reg_io);
+ sysbus_init_mmio(dev, &s->reg_io);
memory_region_init_io(&s->desc_io, &open_eth_desc_ops, s,
"open_eth.desc", 0x400);
- sysbus_init_mmio_region(dev, &s->desc_io);
+ sysbus_init_mmio(dev, &s->desc_io);
sysbus_init_irq(dev, &s->irq);
pl011_state *s = FROM_SYSBUS(pl011_state, dev);
memory_region_init_io(&s->iomem, &pl011_ops, s, "pl011", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->id = id;
s->chr = qdev_init_chardev(&dev->qdev);
pl022_state *s = FROM_SYSBUS(pl022_state, dev);
memory_region_init_io(&s->iomem, &pl022_ops, s, "pl022", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->ssi = ssi_create_bus(&dev->qdev, "ssi");
pl022_reset(s);
struct tm tm;
memory_region_init_io(&s->iomem, &pl031_ops, s, "pl031", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
/* ??? We assume vm_clock is zero at this point. */
/* Connect the device to the sysbus */
memory_region_init_io(&s->iomem, &pl041_ops, s, "pl041", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
/* Init the codec */
pl050_state *s = FROM_SYSBUS(pl050_state, dev);
memory_region_init_io(&s->iomem, &pl050_ops, s, "pl050", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->is_mouse = is_mouse;
if (s->is_mouse)
pl061_state *s = FROM_SYSBUS(pl061_state, dev);
s->id = id;
memory_region_init_io(&s->iomem, &pl061_ops, s, "pl061", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_in(&dev->qdev, pl061_set_irq, 8);
qdev_init_gpio_out(&dev->qdev, s->out, 8);
pl080_state *s = FROM_SYSBUS(pl080_state, dev);
memory_region_init_io(&s->iomem, &pl080_ops, s, "pl080", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->nchannels = nchannels;
return 0;
pl110_state *s = FROM_SYSBUS(pl110_state, dev);
memory_region_init_io(&s->iomem, &pl110_ops, s, "pl110", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_in(&s->busdev.qdev, pl110_mux_ctrl_set, 1);
s->ds = graphic_console_init(pl110_update_display,
DriveInfo *dinfo;
memory_region_init_io(&s->iomem, &pl181_ops, s, "pl181", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq[0]);
sysbus_init_irq(dev, &s->irq[1]);
qdev_init_gpio_out(&s->busdev.qdev, s->cardstatus, 2);
pl190_state *s = FROM_SYSBUS(pl190_state, dev);
memory_region_init_io(&s->iomem, &pl190_ops, s, "pl190", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, pl190_set_irq, 32);
sysbus_init_irq(dev, &s->irq);
sysbus_init_irq(dev, &s->fiq);
memory_region_init_io(&s->iomem, &spin_rw_ops, s, "e500 spin pv device",
sizeof(SpinInfo) * MAX_CPUS);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
qemu_register_reset(spin_reset, s);
sysbus_init_irq(dev, &s->irq);
memory_region_init_io(&s->iomem, &pxa2xx_ssp_ops, s, "pxa2xx-ssp", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
register_savevm(&dev->qdev, "pxa2xx_ssp", -1, 0,
pxa2xx_ssp_save, pxa2xx_ssp_load, s);
sysbus_init_irq(dev, &s->rtc_irq);
memory_region_init_io(&s->iomem, &pxa2xx_rtc_ops, s, "pxa2xx-rtc", 0x10000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
memory_region_init_io(&s->iomem, &pxa2xx_i2c_ops, s,
"pxa2xx-i2x", s->region_size);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
return 0;
memory_region_init_io(&s->iomem, &pxa2xx_dma_ops, s,
"pxa2xx.dma", 0x00010000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
return 0;
qdev_init_gpio_out(&dev->qdev, s->handler, s->lines);
memory_region_init_io(&s->iomem, &pxa_gpio_ops, s, "pxa2xx-gpio", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq0);
sysbus_init_irq(dev, &s->irq1);
sysbus_init_irq(dev, &s->irqX);
/* Enable IC memory-mapped registers access. */
memory_region_init_io(&s->iomem, &pxa2xx_pic_ops, s,
"pxa2xx-pic", 0x00100000);
- sysbus_init_mmio_region(sysbus_from_qdev(dev), &s->iomem);
+ sysbus_init_mmio(sysbus_from_qdev(dev), &s->iomem);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
/* Enable IC coprocessor access. */
memory_region_init_io(&s->iomem, &pxa2xx_timer_ops, s,
"pxa2xx-timer", 0x00001000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
s->bitbang = bitbang_i2c_init(bus);
memory_region_init_io(&s->iomem, &realview_i2c_ops, s,
"realview-i2c", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
gic_init(&s->gic);
realview_gic_map_setup(s);
- sysbus_init_mmio_region(dev, &s->container);
+ sysbus_init_mmio(dev, &s->container);
return 0;
}
}
memory_region_init_io(&s->iomem, &sbi_mem_ops, s, "sbi", SBI_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
0, 0x224);
isa_mmio_setup(&s->isa, 0x40000);
sysbus_init_mmio_cb2(dev, sh_pci_map, sh_pci_unmap);
- sysbus_init_mmio_region(dev, &s->memconfig_a7);
- sysbus_init_mmio_region(dev, &s->isa);
+ sysbus_init_mmio(dev, &s->memconfig_a7);
+ sysbus_init_mmio(dev, &s->isa);
s->dev = pci_create_simple(s->bus, PCI_DEVFN(0, 0), "sh_pci_host");
return 0;
}
qdev_init_gpio_in(&dev->qdev, slavio_set_irq_all, 32 + MAX_CPUS);
memory_region_init_io(&s->iomem, &slavio_intctlm_mem_ops, s,
"master-interrupt-controller", INTCTLM_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
for (i = 0; i < MAX_CPUS; i++) {
snprintf(slave_name, sizeof(slave_name),
}
memory_region_init_io(&s->slaves[i].iomem, &slavio_intctl_mem_ops,
&s->slaves[i], slave_name, INTCTL_SIZE);
- sysbus_init_mmio_region(dev, &s->slaves[i].iomem);
+ sysbus_init_mmio(dev, &s->slaves[i].iomem);
s->slaves[i].cpu = i;
s->slaves[i].master = s;
}
/* Power management (APC) XXX: not a Slavio device */
memory_region_init_io(&s->iomem, &apc_mem_ops, s,
"apc", MISC_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
/* Slavio control */
memory_region_init_io(&s->cfg_iomem, &slavio_cfg_mem_ops, s,
"configuration", MISC_SIZE);
- sysbus_init_mmio_region(dev, &s->cfg_iomem);
+ sysbus_init_mmio(dev, &s->cfg_iomem);
/* Diagnostics */
memory_region_init_io(&s->diag_iomem, &slavio_diag_mem_ops, s,
"diagnostic", MISC_SIZE);
- sysbus_init_mmio_region(dev, &s->diag_iomem);
+ sysbus_init_mmio(dev, &s->diag_iomem);
/* Modem control */
memory_region_init_io(&s->mdm_iomem, &slavio_mdm_mem_ops, s,
"modem", MISC_SIZE);
- sysbus_init_mmio_region(dev, &s->mdm_iomem);
+ sysbus_init_mmio(dev, &s->mdm_iomem);
/* 16 bit registers */
/* ss600mp diag LEDs */
memory_region_init_io(&s->led_iomem, &slavio_led_mem_ops, s,
"leds", MISC_SIZE);
- sysbus_init_mmio_region(dev, &s->led_iomem);
+ sysbus_init_mmio(dev, &s->led_iomem);
/* 32 bit registers */
/* System control */
memory_region_init_io(&s->sysctrl_iomem, &slavio_sysctrl_mem_ops, s,
"system-control", MISC_SIZE);
- sysbus_init_mmio_region(dev, &s->sysctrl_iomem);
+ sysbus_init_mmio(dev, &s->sysctrl_iomem);
/* AUX 1 (Misc System Functions) */
memory_region_init_io(&s->aux1_iomem, &slavio_aux1_mem_ops, s,
"misc-system-functions", MISC_SIZE);
- sysbus_init_mmio_region(dev, &s->aux1_iomem);
+ sysbus_init_mmio(dev, &s->aux1_iomem);
/* AUX 2 (Software Powerdown Control) */
memory_region_init_io(&s->aux2_iomem, &slavio_aux2_mem_ops, s,
"software-powerdown-control", MISC_SIZE);
- sysbus_init_mmio_region(dev, &s->aux2_iomem);
+ sysbus_init_mmio(dev, &s->aux2_iomem);
qdev_init_gpio_in(&dev->qdev, slavio_set_power_fail, 1);
snprintf(timer_name, sizeof(timer_name), "timer-%i", i);
memory_region_init_io(&tc->iomem, &slavio_timer_mem_ops, tc,
timer_name, size);
- sysbus_init_mmio_region(dev, &tc->iomem);
+ sysbus_init_mmio(dev, &tc->iomem);
sysbus_init_irq(dev, &s->cputimer[i].irq);
}
smc91c111_state *s = FROM_SYSBUS(smc91c111_state, dev);
memory_region_init_io(&s->mmio, &smc91c111_mem_ops, s,
"smc91c111-mmio", 16);
- sysbus_init_mmio_region(dev, &s->mmio);
+ sysbus_init_mmio(dev, &s->mmio);
sysbus_init_irq(dev, &s->irq);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
s->nic = qemu_new_nic(&net_smc91c111_info, &s->conf,
reg_size = s->is_ledma ? DMA_ETH_SIZE : DMA_SIZE;
memory_region_init_io(&s->iomem, &dma_mem_ops, s, "dma", reg_size);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, dma_set_irq, 1);
qdev_init_gpio_out(&dev->qdev, s->gpio, 2);
s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id);
memory_region_init_io(&s->iomem, &sl_ops, s, "sl", 0x40);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
memory_region_init_io(&s->iomem, &gptm_ops, s,
"gptm", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
s->opaque[0] = s->opaque[1] = s;
s->timer[0] = qemu_new_timer_ns(vm_clock, gptm_tick, &s->opaque[0]);
memory_region_init_io(&s->iomem, &stellaris_i2c_ops, s,
"i2c", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
/* ??? For now we only implement the master interface. */
stellaris_i2c_reset(s);
vmstate_register(&dev->qdev, -1, &vmstate_stellaris_i2c, s);
memory_region_init_io(&s->iomem, &stellaris_adc_ops, s,
"adc", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
stellaris_adc_reset(s);
qdev_init_gpio_in(&dev->qdev, stellaris_adc_trigger, 1);
vmstate_register(&dev->qdev, -1, &vmstate_stellaris_adc, s);
memory_region_init_io(&s->mmio, &stellaris_enet_ops, s, "stellaris_enet",
0x1000);
- sysbus_init_mmio_region(dev, &s->mmio);
+ sysbus_init_mmio(dev, &s->mmio);
sysbus_init_irq(dev, &s->irq);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
qdev_init_gpio_in(&dev->qdev, strongarm_pic_set_irq, SA_PIC_SRCS);
memory_region_init_io(&s->iomem, &strongarm_pic_ops, s, "pic", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
sysbus_init_irq(dev, &s->fiq);
sysbus_init_irq(dev, &s->rtc_hz_irq);
memory_region_init_io(&s->iomem, &strongarm_rtc_ops, s, "rtc", 0x10000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
memory_region_init_io(&s->iomem, &strongarm_gpio_ops, s, "gpio", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
for (i = 0; i < 11; i++) {
sysbus_init_irq(dev, &s->irqs[i]);
}
memory_region_init_io(&s->iomem, &strongarm_ppc_ops, s, "ppc", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
StrongARMUARTState *s = FROM_SYSBUS(StrongARMUARTState, dev);
memory_region_init_io(&s->iomem, &strongarm_uart_ops, s, "uart", 0x10000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
s->rx_timeout_timer = qemu_new_timer_ns(vm_clock, strongarm_uart_rx_to, s);
sysbus_init_irq(dev, &s->irq);
memory_region_init_io(&s->iomem, &strongarm_ssp_ops, s, "ssp", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
s->bus = ssi_create_bus(&dev->qdev, "ssi");
return 0;
memory_region_init_io(&s->iomem, &sun4c_intctl_mem_ops, s,
"intctl", INTCTL_SIZE);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, sun4c_set_irq, 8);
for (i = 0; i < MAX_PILS; i++) {
memory_region_init_ram(&s->mem, NULL, "sun4m.idreg", sizeof(idreg_data));
memory_region_set_readonly(&s->mem, true);
- sysbus_init_mmio_region(dev, &s->mem);
+ sysbus_init_mmio(dev, &s->mem);
return 0;
}
AFXState *s = FROM_SYSBUS(AFXState, dev);
memory_region_init_ram(&s->mem, NULL, "sun4m.afx", 4);
- sysbus_init_mmio_region(dev, &s->mem);
+ sysbus_init_mmio(dev, &s->mem);
return 0;
}
memory_region_init_ram(&s->prom, NULL, "sun4m.prom", PROM_SIZE_MAX);
memory_region_set_readonly(&s->prom, true);
- sysbus_init_mmio_region(dev, &s->prom);
+ sysbus_init_mmio(dev, &s->prom);
return 0;
}
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
memory_region_init_ram(&d->ram, NULL, "sun4m.ram", d->size);
- sysbus_init_mmio_region(dev, &d->ram);
+ sysbus_init_mmio(dev, &d->ram);
return 0;
}
memory_region_init_io(&s->iomem, &iommu_mem_ops, s, "iommu",
IOMMU_NREGS * sizeof(uint32_t));
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
memory_region_init_ram(&s->prom, NULL, "sun4u.prom", PROM_SIZE_MAX);
memory_region_set_readonly(&s->prom, true);
- sysbus_init_mmio_region(dev, &s->prom);
+ sysbus_init_mmio(dev, &s->prom);
return 0;
}
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
memory_region_init_ram(&d->ram, NULL, "sun4u.ram", d->size);
- sysbus_init_mmio_region(dev, &d->ram);
+ sysbus_init_mmio(dev, &d->ram);
return 0;
}
sysbus_init_irq(dev, &s->irq);
memory_region_init_io(&s->iomem, &syborg_fb_ops, s,
"framebuffer", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
s->ds = graphic_console_init(syborg_fb_update_display,
syborg_fb_invalidate_display,
qdev_init_gpio_in(&dev->qdev, syborg_int_set_irq, s->num_irqs);
memory_region_init_io(&s->iomem, &syborg_int_ops, s,
"interrupt", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
s->flags = g_malloc0(s->num_irqs * sizeof(syborg_int_flags));
register_savevm(&dev->qdev, "syborg_int", -1, 1, syborg_int_save,
sysbus_init_irq(dev, &s->irq);
memory_region_init_io(&s->iomem, &syborg_keyboard_ops, s,
"keyboard", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
if (s->fifo_size <= 0) {
fprintf(stderr, "syborg_keyboard: fifo too small\n");
s->fifo_size = 16;
sysbus_init_irq(dev, &s->irq);
memory_region_init_io(&s->iomem, &syborg_pointer_ops, s,
"pointer", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
if (s->fifo_size <= 0) {
fprintf(stderr, "syborg_pointer: fifo too small\n");
struct tm tm;
memory_region_init_io(&s->iomem, &syborg_rtc_ops, s, "rtc", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
qemu_get_timedate(&tm, 0);
s->offset = (uint64_t)mktime(&tm) * 1000000000;
sysbus_init_irq(dev, &s->irq);
memory_region_init_io(&s->iomem, &syborg_serial_ops, s,
"serial", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
s->chr = qdev_init_chardev(&dev->qdev);
if (s->chr) {
qemu_chr_add_handlers(s->chr, syborg_serial_can_receive,
}
sysbus_init_irq(dev, &s->irq);
memory_region_init_io(&s->iomem, &syborg_timer_ops, s, "timer", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
bh = qemu_bh_new(syborg_timer_tick, s);
s->timer = ptimer_init(bh);
sysbus_init_irq(&proxy->busdev, &proxy->irq);
memory_region_init_io(&proxy->iomem, &syborg_virtio_ops, proxy,
"virtio", 0x1000);
- sysbus_init_mmio_region(&proxy->busdev, &proxy->iomem);
+ sysbus_init_mmio(&proxy->busdev, &proxy->iomem);
proxy->id = ((uint32_t)0x1af4 << 16) | vdev->device_id;
dev->mmio[n].unmap = unmap;
}
-void sysbus_init_mmio_region(SysBusDevice *dev, MemoryRegion *memory)
+void sysbus_init_mmio(SysBusDevice *dev, MemoryRegion *memory)
{
int n;
void *sysbus_new(void);
void sysbus_init_mmio_cb2(SysBusDevice *dev,
mmio_mapfunc cb, mmio_mapfunc unmap);
-void sysbus_init_mmio_region(SysBusDevice *dev, MemoryRegion *memory);
+void sysbus_init_mmio(SysBusDevice *dev, MemoryRegion *memory);
MemoryRegion *sysbus_mmio_get_region(SysBusDevice *dev, int n);
void sysbus_init_irq(SysBusDevice *dev, qemu_irq *p);
void sysbus_pass_irq(SysBusDevice *dev, SysBusDevice *target);
size = s->vram_size;
memory_region_init_alias(&s->vram_8bit, "tcx.vram.8bit",
&s->vram_mem, vram_offset, size);
- sysbus_init_mmio_region(dev, &s->vram_8bit);
+ sysbus_init_mmio(dev, &s->vram_8bit);
vram_offset += size;
vram_base += size;
/* DAC */
memory_region_init_io(&s->dac, &tcx_dac_ops, s, "tcx.dac", TCX_DAC_NREGS);
- sysbus_init_mmio_region(dev, &s->dac);
+ sysbus_init_mmio(dev, &s->dac);
/* TEC (dummy) */
memory_region_init_io(&s->tec, &dummy_ops, s, "tcx.tec", TCX_TEC_NREGS);
- sysbus_init_mmio_region(dev, &s->tec);
+ sysbus_init_mmio(dev, &s->tec);
/* THC: NetBSD writes here even with 8-bit display: dummy */
memory_region_init_io(&s->thc24, &dummy_ops, s, "tcx.thc24",
TCX_THC_NREGS_24);
- sysbus_init_mmio_region(dev, &s->thc24);
+ sysbus_init_mmio(dev, &s->thc24);
if (s->depth == 24) {
/* 24-bit plane */
s->vram24_offset = vram_offset;
memory_region_init_alias(&s->vram_24bit, "tcx.vram.24bit",
&s->vram_mem, vram_offset, size);
- sysbus_init_mmio_region(dev, &s->vram_24bit);
+ sysbus_init_mmio(dev, &s->vram_24bit);
vram_offset += size;
vram_base += size;
s->cplane_offset = vram_offset;
memory_region_init_alias(&s->vram_cplane, "tcx.vram.cplane",
&s->vram_mem, vram_offset, size);
- sysbus_init_mmio_region(dev, &s->vram_cplane);
+ sysbus_init_mmio(dev, &s->vram_cplane);
s->ds = graphic_console_init(tcx24_update_display,
tcx24_invalidate_display,
/* THC 8 bit (dummy) */
memory_region_init_io(&s->thc8, &dummy_ops, s, "tcx.thc8",
TCX_THC_NREGS_8);
- sysbus_init_mmio_region(dev, &s->thc8);
+ sysbus_init_mmio(dev, &s->thc8);
s->ds = graphic_console_init(tcx_update_display,
tcx_invalidate_display,
s->pwr_timer = qemu_new_timer_ns(vm_clock, tusb_power_tick, s);
memory_region_init_io(&s->iomem[1], &tusb_async_ops, s, "tusb-async",
UINT32_MAX);
- sysbus_init_mmio_region(dev, &s->iomem[0]);
- sysbus_init_mmio_region(dev, &s->iomem[1]);
+ sysbus_init_mmio(dev, &s->iomem[0]);
+ sysbus_init_mmio(dev, &s->iomem[1]);
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_in(&dev->qdev, tusb6010_irq, musb_irq_max + 1);
s->musb = musb_init(&dev->qdev, 1);
&s->host_state, "pci-conf-idx", 0x1000);
memory_region_init_io(&s->host_state.data_mem, &unin_data_ops, s,
"pci-conf-data", 0x1000);
- sysbus_init_mmio_region(dev, &s->host_state.conf_mem);
- sysbus_init_mmio_region(dev, &s->host_state.data_mem);
+ sysbus_init_mmio(dev, &s->host_state.conf_mem);
+ sysbus_init_mmio(dev, &s->host_state.data_mem);
qemu_register_reset(pci_unin_reset, &s->host_state);
return 0;
&s->host_state, "pci-conf-idx", 0x1000);
memory_region_init_io(&s->host_state.data_mem, &unin_data_ops, s,
"pci-conf-data", 0x1000);
- sysbus_init_mmio_region(dev, &s->host_state.conf_mem);
- sysbus_init_mmio_region(dev, &s->host_state.data_mem);
+ sysbus_init_mmio(dev, &s->host_state.conf_mem);
+ sysbus_init_mmio(dev, &s->host_state.data_mem);
qemu_register_reset(pci_unin_reset, &s->host_state);
&s->host_state, "pci-conf-idx", 0x1000);
memory_region_init_io(&s->host_state.data_mem, &pci_host_data_le_ops,
&s->host_state, "pci-conf-data", 0x1000);
- sysbus_init_mmio_region(dev, &s->host_state.conf_mem);
- sysbus_init_mmio_region(dev, &s->host_state.data_mem);
+ sysbus_init_mmio(dev, &s->host_state.conf_mem);
+ sysbus_init_mmio(dev, &s->host_state.data_mem);
return 0;
}
&s->host_state, "pci-conf-idx", 0x1000);
memory_region_init_io(&s->host_state.data_mem, &pci_host_data_le_ops,
&s->host_state, "pci-conf-data", 0x1000);
- sysbus_init_mmio_region(dev, &s->host_state.conf_mem);
- sysbus_init_mmio_region(dev, &s->host_state.data_mem);
+ sysbus_init_mmio(dev, &s->host_state.conf_mem);
+ sysbus_init_mmio(dev, &s->host_state.data_mem);
return 0;
}
/* Cannot fail as we pass NULL for masterbus */
usb_ohci_init(&s->ohci, &dev->qdev, s->num_ports, s->dma_offset, NULL, 0);
sysbus_init_irq(dev, &s->ohci.irq);
- sysbus_init_mmio_region(dev, &s->ohci.mem);
+ sysbus_init_mmio(dev, &s->ohci.mem);
return 0;
}
*/
memory_region_init_io(&s->mem_config, &pci_vpb_config_ops, bus,
"pci-vpb-selfconfig", 0x1000000);
- sysbus_init_mmio_region(dev, &s->mem_config);
+ sysbus_init_mmio(dev, &s->mem_config);
memory_region_init_io(&s->mem_config2, &pci_vpb_config_ops, bus,
"pci-vpb-config", 0x1000000);
- sysbus_init_mmio_region(dev, &s->mem_config2);
+ sysbus_init_mmio(dev, &s->mem_config2);
if (s->realview) {
isa_mmio_setup(&s->isa, 0x0100000);
- sysbus_init_mmio_region(dev, &s->isa);
+ sysbus_init_mmio(dev, &s->isa);
}
pci_create_simple(bus, -1, "versatile_pci_host");
}
s->irq = 31;
memory_region_init_io(&s->iomem, &vpb_sic_ops, s, "vpb-sic", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}
memory_region_init_io(&s->iomem, &axidma_ops, s,
"axidma", R_MAX * 4 * 2);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
for (i = 0; i < 2; i++) {
stream_reset(&s->streams[i]);
xlx_dma_connect_client(s->dmach, s, axienet_stream_push);
memory_region_init_io(&s->iomem, &enet_ops, s, "enet", 0x40000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
s->nic = qemu_new_nic(&net_xilinx_enet_info, &s->conf,
s->rxbuf = 0;
memory_region_init_io(&s->mmio, ð_ops, s, "xilinx-ethlite", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->mmio);
+ sysbus_init_mmio(dev, &s->mmio);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
s->nic = qemu_new_nic(&net_xilinx_ethlite_info, &s->conf,
sysbus_init_irq(dev, &p->parent_irq);
memory_region_init_io(&p->mmio, &pic_ops, p, "xilinx-pic", R_MAX * 4);
- sysbus_init_mmio_region(dev, &p->mmio);
+ sysbus_init_mmio(dev, &p->mmio);
return 0;
}
memory_region_init_io(&t->mmio, &timer_ops, t, "xilinx-timer",
R_MAX * 4 * t->nr_timers);
- sysbus_init_mmio_region(dev, &t->mmio);
+ sysbus_init_mmio(dev, &t->mmio);
return 0;
}
uart_update_status(s);
memory_region_init_io(&s->mmio, &uart_ops, s, "xilinx-uartlite", R_MAX * 4);
- sysbus_init_mmio_region(dev, &s->mmio);
+ sysbus_init_mmio(dev, &s->mmio);
s->chr = qdev_init_chardev(&dev->qdev);
if (s->chr)
qdev_init_gpio_in(&s->busdev.qdev, scoop_gpio_set, 16);
memory_region_init_io(&s->iomem, &scoop_ops, s, "scoop", 0x1000);
- sysbus_init_mmio_region(dev, &s->iomem);
+ sysbus_init_mmio(dev, &s->iomem);
return 0;
}