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[qemu.git] / memory.c
CommitLineData
093bc2cd
AK		 1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <[email protected]>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
6b620ca3
PB		 12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
093bc2cd
AK		 14 */
15
d38ea87a 16#include "qemu/osdep.h"
da34e65c 17#include "qapi/error.h"
33c11879
PB		 18#include "qemu-common.h"
19#include "cpu.h"
022c62cb
PB		 20#include "exec/memory.h"
21#include "exec/address-spaces.h"
22#include "exec/ioport.h"
409ddd01 23#include "qapi/visitor.h"
1de7afc9 24#include "qemu/bitops.h"
8c56c1a5 25#include "qemu/error-report.h"
2c9b15ca 26#include "qom/object.h"
0ab8ed18 27#include "trace-root.h"
093bc2cd 28
022c62cb 29#include "exec/memory-internal.h"
220c3ebd 30#include "exec/ram_addr.h"
8c56c1a5 31#include "sysemu/kvm.h"
e1c57ab8 32#include "sysemu/sysemu.h"
67d95c15 33
d197063f
PB		 34//#define DEBUG_UNASSIGNED
35
22bde714
JK		 36static unsigned memory_region_transaction_depth;
37static bool memory_region_update_pending;
4dc56152 38static bool ioeventfd_update_pending;
7664e80c
AK		 39static bool global_dirty_log = false;
40
72e22d2f
AK		 41static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 43
0d673e36
AK		 44static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
093bc2cd
AK		 47typedef struct AddrRange AddrRange;
48
8417cebf 49/*
c9cdaa3a 50 * Note that signed integers are needed for negative offsetting in aliases
8417cebf
AK		 51 * (large MemoryRegion::alias_offset).
52 */
093bc2cd 53struct AddrRange {
08dafab4
AK		 54 Int128 start;
55 Int128 size;
093bc2cd
AK		 56};
57
08dafab4 58static AddrRange addrrange_make(Int128 start, Int128 size)
093bc2cd
AK		 59{
60 return (AddrRange) { start, size };
61}
62
63static bool addrrange_equal(AddrRange r1, AddrRange r2)
64{
08dafab4 65 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
093bc2cd
AK		 66}
67
08dafab4 68static Int128 addrrange_end(AddrRange r)
093bc2cd 69{
08dafab4 70 return int128_add(r.start, r.size);
093bc2cd
AK		 71}
72
08dafab4 73static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 74{
08dafab4 75 int128_addto(&range.start, delta);
093bc2cd
AK		 76 return range;
77}
78
08dafab4
AK		 79static bool addrrange_contains(AddrRange range, Int128 addr)
80{
81 return int128_ge(addr, range.start)
82 && int128_lt(addr, addrrange_end(range));
83}
84
093bc2cd
AK		 85static bool addrrange_intersects(AddrRange r1, AddrRange r2)
86{
08dafab4
AK		 87 return addrrange_contains(r1, r2.start)
88 || addrrange_contains(r2, r1.start);
093bc2cd
AK		 89}
90
91static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
92{
08dafab4
AK		 93 Int128 start = int128_max(r1.start, r2.start);
94 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
95 return addrrange_make(start, int128_sub(end, start));
093bc2cd
AK		 96}
97
0e0d36b4
AK		 98enum ListenerDirection { Forward, Reverse };
99
7376e582 100#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
0e0d36b4
AK		 101 do { \
102 MemoryListener *_listener; \
103 \
104 switch (_direction) { \
105 case Forward: \
106 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
975aefe0
AK		 107 if (_listener->_callback) { \
108 _listener->_callback(_listener, ##_args); \
109 } \
0e0d36b4
AK		 110 } \
111 break; \
112 case Reverse: \
113 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
114 memory_listeners, link) { \
975aefe0
AK		 115 if (_listener->_callback) { \
116 _listener->_callback(_listener, ##_args); \
117 } \
0e0d36b4
AK		 118 } \
119 break; \
120 default: \
121 abort(); \
122 } \
123 } while (0)
124
9a54635d 125#define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
7376e582
AK		 126 do { \
127 MemoryListener *_listener; \
9a54635d 128 struct memory_listeners_as *list = &(_as)->listeners; \
7376e582
AK		 129 \
130 switch (_direction) { \
131 case Forward: \
9a54635d
PB		 132 QTAILQ_FOREACH(_listener, list, link_as) { \
133 if (_listener->_callback) { \
7376e582
AK		 134 _listener->_callback(_listener, _section, ##_args); \
135 } \
136 } \
137 break; \
138 case Reverse: \
9a54635d
PB		 139 QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
140 link_as) { \
141 if (_listener->_callback) { \
7376e582
AK		 142 _listener->_callback(_listener, _section, ##_args); \
143 } \
144 } \
145 break; \
146 default: \
147 abort(); \
148 } \
149 } while (0)
150
dfde4e6e 151/* No need to ref/unref .mr, the FlatRange keeps it alive. */
b2dfd71c 152#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
9c1f8f44
PB		 153 do { \
154 MemoryRegionSection mrs = section_from_flat_range(fr, as); \
9a54635d 155 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
9c1f8f44 156 } while(0)
0e0d36b4 157
093bc2cd
AK		 158struct CoalescedMemoryRange {
159 AddrRange addr;
160 QTAILQ_ENTRY(CoalescedMemoryRange) link;
161};
162
3e9d69e7
AK		 163struct MemoryRegionIoeventfd {
164 AddrRange addr;
165 bool match_data;
166 uint64_t data;
753d5e14 167 EventNotifier *e;
3e9d69e7
AK		 168};
169
170static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
171 MemoryRegionIoeventfd b)
172{
08dafab4 173 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 174 return true;
08dafab4 175 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 176 return false;
08dafab4 177 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 178 return true;
08dafab4 179 } else if (int128_gt(a.addr.size, b.addr.size)) {
3e9d69e7
AK		 180 return false;
181 } else if (a.match_data < b.match_data) {
182 return true;
183 } else if (a.match_data > b.match_data) {
184 return false;
185 } else if (a.match_data) {
186 if (a.data < b.data) {
187 return true;
188 } else if (a.data > b.data) {
189 return false;
190 }
191 }
753d5e14 192 if (a.e < b.e) {
3e9d69e7 193 return true;
753d5e14 194 } else if (a.e > b.e) {
3e9d69e7
AK		 195 return false;
196 }
197 return false;
198}
199
200static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
201 MemoryRegionIoeventfd b)
202{
203 return !memory_region_ioeventfd_before(a, b)
204 && !memory_region_ioeventfd_before(b, a);
205}
206
093bc2cd
AK		 207typedef struct FlatRange FlatRange;
208typedef struct FlatView FlatView;
209
210/* Range of memory in the global map. Addresses are absolute. */
211struct FlatRange {
212 MemoryRegion *mr;
a8170e5e 213 hwaddr offset_in_region;
093bc2cd 214 AddrRange addr;
5a583347 215 uint8_t dirty_log_mask;
b138e654 216 bool romd_mode;
fb1cd6f9 217 bool readonly;
093bc2cd
AK		 218};
219
220/* Flattened global view of current active memory hierarchy. Kept in sorted
221 * order.
222 */
223struct FlatView {
374f2981 224 struct rcu_head rcu;
856d7245 225 unsigned ref;
093bc2cd
AK		 226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229};
230
cc31e6e7
AK		 231typedef struct AddressSpaceOps AddressSpaceOps;
232
093bc2cd
AK		 233#define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
9c1f8f44
PB		 236static inline MemoryRegionSection
237section_from_flat_range(FlatRange *fr, AddressSpace *as)
238{
239 return (MemoryRegionSection) {
240 .mr = fr->mr,
241 .address_space = as,
242 .offset_within_region = fr->offset_in_region,
243 .size = fr->addr.size,
244 .offset_within_address_space = int128_get64(fr->addr.start),
245 .readonly = fr->readonly,
246 };
247}
248
093bc2cd
AK		 249static bool flatrange_equal(FlatRange *a, FlatRange *b)
250{
251 return a->mr == b->mr
252 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 253 && a->offset_in_region == b->offset_in_region
b138e654 254 && a->romd_mode == b->romd_mode
fb1cd6f9 255 && a->readonly == b->readonly;
093bc2cd
AK		 256}
257
258static void flatview_init(FlatView *view)
259{
856d7245 260 view->ref = 1;
093bc2cd
AK		 261 view->ranges = NULL;
262 view->nr = 0;
263 view->nr_allocated = 0;
264}
265
266/* Insert a range into a given position. Caller is responsible for maintaining
267 * sorting order.
268 */
269static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
270{
271 if (view->nr == view->nr_allocated) {
272 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 273 view->ranges = g_realloc(view->ranges,
093bc2cd
AK		 274 view->nr_allocated * sizeof(*view->ranges));
275 }
276 memmove(view->ranges + pos + 1, view->ranges + pos,
277 (view->nr - pos) * sizeof(FlatRange));
278 view->ranges[pos] = *range;
dfde4e6e 279 memory_region_ref(range->mr);
093bc2cd
AK		 280 ++view->nr;
281}
282
283static void flatview_destroy(FlatView *view)
284{
dfde4e6e
PB		 285 int i;
286
287 for (i = 0; i < view->nr; i++) {
288 memory_region_unref(view->ranges[i].mr);
289 }
7267c094 290 g_free(view->ranges);
a9a0c06d 291 g_free(view);
093bc2cd
AK		 292}
293
856d7245
PB		 294static void flatview_ref(FlatView *view)
295{
296 atomic_inc(&view->ref);
297}
298
299static void flatview_unref(FlatView *view)
300{
301 if (atomic_fetch_dec(&view->ref) == 1) {
302 flatview_destroy(view);
303 }
304}
305
3d8e6bf9
AK		 306static bool can_merge(FlatRange *r1, FlatRange *r2)
307{
08dafab4 308 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 309 && r1->mr == r2->mr
08dafab4
AK		 310 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
311 r1->addr.size),
312 int128_make64(r2->offset_in_region))
d0a9b5bc 313 && r1->dirty_log_mask == r2->dirty_log_mask
b138e654 314 && r1->romd_mode == r2->romd_mode
fb1cd6f9 315 && r1->readonly == r2->readonly;
3d8e6bf9
AK		 316}
317
8508e024 318/* Attempt to simplify a view by merging adjacent ranges */
3d8e6bf9
AK		 319static void flatview_simplify(FlatView *view)
320{
321 unsigned i, j;
322
323 i = 0;
324 while (i < view->nr) {
325 j = i + 1;
326 while (j < view->nr
327 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 328 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
3d8e6bf9
AK		 329 ++j;
330 }
331 ++i;
332 memmove(&view->ranges[i], &view->ranges[j],
333 (view->nr - j) * sizeof(view->ranges[j]));
334 view->nr -= j - i;
335 }
336}
337
e7342aa3
PB		 338static bool memory_region_big_endian(MemoryRegion *mr)
339{
340#ifdef TARGET_WORDS_BIGENDIAN
341 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
342#else
343 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
344#endif
345}
346
e11ef3d1
PB		 347static bool memory_region_wrong_endianness(MemoryRegion *mr)
348{
349#ifdef TARGET_WORDS_BIGENDIAN
350 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
351#else
352 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
353#endif
354}
355
356static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
357{
358 if (memory_region_wrong_endianness(mr)) {
359 switch (size) {
360 case 1:
361 break;
362 case 2:
363 *data = bswap16(*data);
364 break;
365 case 4:
366 *data = bswap32(*data);
367 break;
368 case 8:
369 *data = bswap64(*data);
370 break;
371 default:
372 abort();
373 }
374 }
375}
376
4779dc1d
HB		 377static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
378{
379 MemoryRegion *root;
380 hwaddr abs_addr = offset;
381
382 abs_addr += mr->addr;
383 for (root = mr; root->container; ) {
384 root = root->container;
385 abs_addr += root->addr;
386 }
387
388 return abs_addr;
389}
390
5a68be94
HB		 391static int get_cpu_index(void)
392{
393 if (current_cpu) {
394 return current_cpu->cpu_index;
395 }
396 return -1;
397}
398
cc05c43a
PM		 399static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
400 hwaddr addr,
401 uint64_t *value,
402 unsigned size,
403 unsigned shift,
404 uint64_t mask,
405 MemTxAttrs attrs)
406{
407 uint64_t tmp;
408
409 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
23d92d68 410 if (mr->subpage) {
5a68be94 411 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 412 } else if (mr == &io_mem_notdirty) {
413 /* Accesses to code which has previously been translated into a TB show
414 * up in the MMIO path, as accesses to the io_mem_notdirty
415 * MemoryRegion. */
416 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 417 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
418 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 419 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 420 }
cc05c43a
PM		 421 *value |= (tmp & mask) << shift;
422 return MEMTX_OK;
423}
424
425static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
ce5d2f33
PB		 426 hwaddr addr,
427 uint64_t *value,
428 unsigned size,
429 unsigned shift,
cc05c43a
PM		 430 uint64_t mask,
431 MemTxAttrs attrs)
ce5d2f33 432{
ce5d2f33
PB		 433 uint64_t tmp;
434
cc05c43a 435 tmp = mr->ops->read(mr->opaque, addr, size);
23d92d68 436 if (mr->subpage) {
5a68be94 437 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 438 } else if (mr == &io_mem_notdirty) {
439 /* Accesses to code which has previously been translated into a TB show
440 * up in the MMIO path, as accesses to the io_mem_notdirty
441 * MemoryRegion. */
442 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 443 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
444 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 445 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 446 }
ce5d2f33 447 *value |= (tmp & mask) << shift;
cc05c43a 448 return MEMTX_OK;
ce5d2f33
PB		 449}
450
cc05c43a
PM		 451static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
452 hwaddr addr,
453 uint64_t *value,
454 unsigned size,
455 unsigned shift,
456 uint64_t mask,
457 MemTxAttrs attrs)
164a4dcd 458{
cc05c43a
PM		 459 uint64_t tmp = 0;
460 MemTxResult r;
164a4dcd 461
cc05c43a 462 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
23d92d68 463 if (mr->subpage) {
5a68be94 464 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 465 } else if (mr == &io_mem_notdirty) {
466 /* Accesses to code which has previously been translated into a TB show
467 * up in the MMIO path, as accesses to the io_mem_notdirty
468 * MemoryRegion. */
469 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 470 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
471 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 472 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 473 }
164a4dcd 474 *value |= (tmp & mask) << shift;
cc05c43a 475 return r;
164a4dcd
AK		 476}
477
cc05c43a
PM		 478static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
479 hwaddr addr,
480 uint64_t *value,
481 unsigned size,
482 unsigned shift,
483 uint64_t mask,
484 MemTxAttrs attrs)
ce5d2f33 485{
ce5d2f33
PB		 486 uint64_t tmp;
487
488 tmp = (*value >> shift) & mask;
23d92d68 489 if (mr->subpage) {
5a68be94 490 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 491 } else if (mr == &io_mem_notdirty) {
492 /* Accesses to code which has previously been translated into a TB show
493 * up in the MMIO path, as accesses to the io_mem_notdirty
494 * MemoryRegion. */
495 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 496 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
497 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 498 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 499 }
ce5d2f33 500 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
cc05c43a 501 return MEMTX_OK;
ce5d2f33
PB		 502}
503
cc05c43a
PM		 504static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
505 hwaddr addr,
506 uint64_t *value,
507 unsigned size,
508 unsigned shift,
509 uint64_t mask,
510 MemTxAttrs attrs)
164a4dcd 511{
164a4dcd
AK		 512 uint64_t tmp;
513
514 tmp = (*value >> shift) & mask;
23d92d68 515 if (mr->subpage) {
5a68be94 516 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 517 } else if (mr == &io_mem_notdirty) {
518 /* Accesses to code which has previously been translated into a TB show
519 * up in the MMIO path, as accesses to the io_mem_notdirty
520 * MemoryRegion. */
521 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 522 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
523 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 524 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 525 }
164a4dcd 526 mr->ops->write(mr->opaque, addr, tmp, size);
cc05c43a 527 return MEMTX_OK;
164a4dcd
AK		 528}
529
cc05c43a
PM		 530static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
531 hwaddr addr,
532 uint64_t *value,
533 unsigned size,
534 unsigned shift,
535 uint64_t mask,
536 MemTxAttrs attrs)
537{
538 uint64_t tmp;
539
cc05c43a 540 tmp = (*value >> shift) & mask;
23d92d68 541 if (mr->subpage) {
5a68be94 542 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 543 } else if (mr == &io_mem_notdirty) {
544 /* Accesses to code which has previously been translated into a TB show
545 * up in the MMIO path, as accesses to the io_mem_notdirty
546 * MemoryRegion. */
547 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 548 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
549 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 550 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 551 }
cc05c43a
PM		 552 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
553}
554
555static MemTxResult access_with_adjusted_size(hwaddr addr,
164a4dcd
AK		 556 uint64_t *value,
557 unsigned size,
558 unsigned access_size_min,
559 unsigned access_size_max,
cc05c43a
PM		 560 MemTxResult (*access)(MemoryRegion *mr,
561 hwaddr addr,
562 uint64_t *value,
563 unsigned size,
564 unsigned shift,
565 uint64_t mask,
566 MemTxAttrs attrs),
567 MemoryRegion *mr,
568 MemTxAttrs attrs)
164a4dcd
AK		 569{
570 uint64_t access_mask;
571 unsigned access_size;
572 unsigned i;
cc05c43a 573 MemTxResult r = MEMTX_OK;
164a4dcd
AK		 574
575 if (!access_size_min) {
576 access_size_min = 1;
577 }
578 if (!access_size_max) {
579 access_size_max = 4;
580 }
ce5d2f33
PB		 581
582 /* FIXME: support unaligned access? */
164a4dcd
AK		 583 access_size = MAX(MIN(size, access_size_max), access_size_min);
584 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB		 585 if (memory_region_big_endian(mr)) {
586 for (i = 0; i < size; i += access_size) {
cc05c43a
PM		 587 r |= access(mr, addr + i, value, access_size,
588 (size - access_size - i) * 8, access_mask, attrs);
e7342aa3
PB		 589 }
590 } else {
591 for (i = 0; i < size; i += access_size) {
cc05c43a
PM		 592 r |= access(mr, addr + i, value, access_size, i * 8,
593 access_mask, attrs);
e7342aa3 594 }
164a4dcd 595 }
cc05c43a 596 return r;
164a4dcd
AK		 597}
598
e2177955
AK		 599static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
600{
0d673e36
AK		 601 AddressSpace *as;
602
feca4ac1
PB		 603 while (mr->container) {
604 mr = mr->container;
e2177955 605 }
0d673e36
AK		 606 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
607 if (mr == as->root) {
608 return as;
609 }
e2177955 610 }
eed2bacf 611 return NULL;
e2177955
AK		 612}
613
093bc2cd
AK		 614/* Render a memory region into the global view. Ranges in @view obscure
615 * ranges in @mr.
616 */
617static void render_memory_region(FlatView *view,
618 MemoryRegion *mr,
08dafab4 619 Int128 base,
fb1cd6f9
AK		 620 AddrRange clip,
621 bool readonly)
093bc2cd
AK		 622{
623 MemoryRegion *subregion;
624 unsigned i;
a8170e5e 625 hwaddr offset_in_region;
08dafab4
AK		 626 Int128 remain;
627 Int128 now;
093bc2cd
AK		 628 FlatRange fr;
629 AddrRange tmp;
630
6bba19ba
AK		 631 if (!mr->enabled) {
632 return;
633 }
634
08dafab4 635 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 636 readonly |= mr->readonly;
093bc2cd
AK		 637
638 tmp = addrrange_make(base, mr->size);
639
640 if (!addrrange_intersects(tmp, clip)) {
641 return;
642 }
643
644 clip = addrrange_intersection(tmp, clip);
645
646 if (mr->alias) {
08dafab4
AK		 647 int128_subfrom(&base, int128_make64(mr->alias->addr));
648 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 649 render_memory_region(view, mr->alias, base, clip, readonly);
093bc2cd
AK		 650 return;
651 }
652
653 /* Render subregions in priority order. */
654 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 655 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
AK		 656 }
657
14a3c10a 658 if (!mr->terminates) {
093bc2cd
AK		 659 return;
660 }
661
08dafab4 662 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK		 663 base = clip.start;
664 remain = clip.size;
665
2eb74e1a 666 fr.mr = mr;
6f6a5ef3 667 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
b138e654 668 fr.romd_mode = mr->romd_mode;
2eb74e1a
PC		 669 fr.readonly = readonly;
670
093bc2cd 671 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK		 672 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
673 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK		 674 continue;
675 }
08dafab4
AK		 676 if (int128_lt(base, view->ranges[i].addr.start)) {
677 now = int128_min(remain,
678 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
AK		 679 fr.offset_in_region = offset_in_region;
680 fr.addr = addrrange_make(base, now);
681 flatview_insert(view, i, &fr);
682 ++i;
08dafab4
AK		 683 int128_addto(&base, now);
684 offset_in_region += int128_get64(now);
685 int128_subfrom(&remain, now);
093bc2cd 686 }
d26a8cae
AK		 687 now = int128_sub(int128_min(int128_add(base, remain),
688 addrrange_end(view->ranges[i].addr)),
689 base);
690 int128_addto(&base, now);
691 offset_in_region += int128_get64(now);
692 int128_subfrom(&remain, now);
093bc2cd 693 }
08dafab4 694 if (int128_nz(remain)) {
093bc2cd
AK		 695 fr.offset_in_region = offset_in_region;
696 fr.addr = addrrange_make(base, remain);
697 flatview_insert(view, i, &fr);
698 }
699}
700
701/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 702static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 703{
a9a0c06d 704 FlatView *view;
093bc2cd 705
a9a0c06d
PB		 706 view = g_new(FlatView, 1);
707 flatview_init(view);
093bc2cd 708
83f3c251 709 if (mr) {
a9a0c06d 710 render_memory_region(view, mr, int128_zero(),
83f3c251
AK		 711 addrrange_make(int128_zero(), int128_2_64()), false);
712 }
a9a0c06d 713 flatview_simplify(view);
093bc2cd
AK		 714
715 return view;
716}
717
3e9d69e7
AK		 718static void address_space_add_del_ioeventfds(AddressSpace *as,
719 MemoryRegionIoeventfd *fds_new,
720 unsigned fds_new_nb,
721 MemoryRegionIoeventfd *fds_old,
722 unsigned fds_old_nb)
723{
724 unsigned iold, inew;
80a1ea37
AK		 725 MemoryRegionIoeventfd *fd;
726 MemoryRegionSection section;
3e9d69e7
AK		 727
728 /* Generate a symmetric difference of the old and new fd sets, adding
729 * and deleting as necessary.
730 */
731
732 iold = inew = 0;
733 while (iold < fds_old_nb || inew < fds_new_nb) {
734 if (iold < fds_old_nb
735 && (inew == fds_new_nb
736 || memory_region_ioeventfd_before(fds_old[iold],
737 fds_new[inew]))) {
80a1ea37
AK		 738 fd = &fds_old[iold];
739 section = (MemoryRegionSection) {
f6790af6 740 .address_space = as,
80a1ea37 741 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 742 .size = fd->addr.size,
80a1ea37 743 };
9a54635d 744 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
753d5e14 745 fd->match_data, fd->data, fd->e);
3e9d69e7
AK		 746 ++iold;
747 } else if (inew < fds_new_nb
748 && (iold == fds_old_nb
749 || memory_region_ioeventfd_before(fds_new[inew],
750 fds_old[iold]))) {
80a1ea37
AK		 751 fd = &fds_new[inew];
752 section = (MemoryRegionSection) {
f6790af6 753 .address_space = as,
80a1ea37 754 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 755 .size = fd->addr.size,
80a1ea37 756 };
9a54635d 757 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
753d5e14 758 fd->match_data, fd->data, fd->e);
3e9d69e7
AK		 759 ++inew;
760 } else {
761 ++iold;
762 ++inew;
763 }
764 }
765}
766
856d7245
PB		 767static FlatView *address_space_get_flatview(AddressSpace *as)
768{
769 FlatView *view;
770
374f2981
PB		 771 rcu_read_lock();
772 view = atomic_rcu_read(&as->current_map);
856d7245 773 flatview_ref(view);
374f2981 774 rcu_read_unlock();
856d7245
PB		 775 return view;
776}
777
3e9d69e7
AK		 778static void address_space_update_ioeventfds(AddressSpace *as)
779{
99e86347 780 FlatView *view;
3e9d69e7
AK		 781 FlatRange *fr;
782 unsigned ioeventfd_nb = 0;
783 MemoryRegionIoeventfd *ioeventfds = NULL;
784 AddrRange tmp;
785 unsigned i;
786
856d7245 787 view = address_space_get_flatview(as);
99e86347 788 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK		 789 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
790 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK		 791 int128_sub(fr->addr.start,
792 int128_make64(fr->offset_in_region)));
3e9d69e7
AK		 793 if (addrrange_intersects(fr->addr, tmp)) {
794 ++ioeventfd_nb;
7267c094 795 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK		 796 ioeventfd_nb * sizeof(*ioeventfds));
797 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
798 ioeventfds[ioeventfd_nb-1].addr = tmp;
799 }
800 }
801 }
802
803 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
804 as->ioeventfds, as->ioeventfd_nb);
805
7267c094 806 g_free(as->ioeventfds);
3e9d69e7
AK		 807 as->ioeventfds = ioeventfds;
808 as->ioeventfd_nb = ioeventfd_nb;
856d7245 809 flatview_unref(view);
3e9d69e7
AK		 810}
811
b8af1afb 812static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB		 813 const FlatView *old_view,
814 const FlatView *new_view,
b8af1afb 815 bool adding)
093bc2cd 816{
093bc2cd
AK		 817 unsigned iold, inew;
818 FlatRange *frold, *frnew;
093bc2cd
AK		 819
820 /* Generate a symmetric difference of the old and new memory maps.
821 * Kill ranges in the old map, and instantiate ranges in the new map.
822 */
823 iold = inew = 0;
a9a0c06d
PB		 824 while (iold < old_view->nr || inew < new_view->nr) {
825 if (iold < old_view->nr) {
826 frold = &old_view->ranges[iold];
093bc2cd
AK		 827 } else {
828 frold = NULL;
829 }
a9a0c06d
PB		 830 if (inew < new_view->nr) {
831 frnew = &new_view->ranges[inew];
093bc2cd
AK		 832 } else {
833 frnew = NULL;
834 }
835
836 if (frold
837 && (!frnew
08dafab4
AK		 838 || int128_lt(frold->addr.start, frnew->addr.start)
839 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 840 && !flatrange_equal(frold, frnew)))) {
41a6e477 841 /* In old but not in new, or in both but attributes changed. */
093bc2cd 842
b8af1afb 843 if (!adding) {
72e22d2f 844 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK		 845 }
846
093bc2cd
AK		 847 ++iold;
848 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 849 /* In both and unchanged (except logging may have changed) */
093bc2cd 850
b8af1afb 851 if (adding) {
50c1e149 852 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b2dfd71c
PB		 853 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
854 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
855 frold->dirty_log_mask,
856 frnew->dirty_log_mask);
857 }
858 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
859 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
860 frold->dirty_log_mask,
861 frnew->dirty_log_mask);
b8af1afb 862 }
5a583347
AK		 863 }
864
093bc2cd
AK		 865 ++iold;
866 ++inew;
093bc2cd
AK		 867 } else {
868 /* In new */
869
b8af1afb 870 if (adding) {
72e22d2f 871 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK		 872 }
873
093bc2cd
AK		 874 ++inew;
875 }
876 }
b8af1afb
AK		 877}
878
879
880static void address_space_update_topology(AddressSpace *as)
881{
856d7245 882 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 883 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK		 884
885 address_space_update_topology_pass(as, old_view, new_view, false);
886 address_space_update_topology_pass(as, old_view, new_view, true);
887
374f2981
PB		 888 /* Writes are protected by the BQL. */
889 atomic_rcu_set(&as->current_map, new_view);
890 call_rcu(old_view, flatview_unref, rcu);
856d7245
PB		 891
892 /* Note that all the old MemoryRegions are still alive up to this
893 * point. This relieves most MemoryListeners from the need to
894 * ref/unref the MemoryRegions they get---unless they use them
895 * outside the iothread mutex, in which case precise reference
896 * counting is necessary.
897 */
898 flatview_unref(old_view);
899
3e9d69e7 900 address_space_update_ioeventfds(as);
093bc2cd
AK		 901}
902
4ef4db86
AK		 903void memory_region_transaction_begin(void)
904{
bb880ded 905 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK		 906 ++memory_region_transaction_depth;
907}
908
909void memory_region_transaction_commit(void)
910{
0d673e36
AK		 911 AddressSpace *as;
912
4ef4db86 913 assert(memory_region_transaction_depth);
8d04fb55
JK		 914 assert(qemu_mutex_iothread_locked());
915
4ef4db86 916 --memory_region_transaction_depth;
4dc56152
GA		 917 if (!memory_region_transaction_depth) {
918 if (memory_region_update_pending) {
919 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 920
4dc56152
GA		 921 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
922 address_space_update_topology(as);
923 }
ade9c1aa 924 memory_region_update_pending = false;
4dc56152
GA		 925 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
926 } else if (ioeventfd_update_pending) {
927 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
928 address_space_update_ioeventfds(as);
929 }
ade9c1aa 930 ioeventfd_update_pending = false;
4dc56152 931 }
4dc56152 932 }
4ef4db86
AK		 933}
934
545e92e0
AK		 935static void memory_region_destructor_none(MemoryRegion *mr)
936{
937}
938
939static void memory_region_destructor_ram(MemoryRegion *mr)
940{
f1060c55 941 qemu_ram_free(mr->ram_block);
545e92e0
AK		 942}
943
b4fefef9
PC		 944static bool memory_region_need_escape(char c)
945{
946 return c == '/' || c == '[' || c == '\\' || c == ']';
947}
948
949static char *memory_region_escape_name(const char *name)
950{
951 const char *p;
952 char *escaped, *q;
953 uint8_t c;
954 size_t bytes = 0;
955
956 for (p = name; *p; p++) {
957 bytes += memory_region_need_escape(*p) ? 4 : 1;
958 }
959 if (bytes == p - name) {
960 return g_memdup(name, bytes + 1);
961 }
962
963 escaped = g_malloc(bytes + 1);
964 for (p = name, q = escaped; *p; p++) {
965 c = *p;
966 if (unlikely(memory_region_need_escape(c))) {
967 *q++ = '\\';
968 *q++ = 'x';
969 *q++ = "0123456789abcdef"[c >> 4];
970 c = "0123456789abcdef"[c & 15];
971 }
972 *q++ = c;
973 }
974 *q = 0;
975 return escaped;
976}
977
093bc2cd 978void memory_region_init(MemoryRegion *mr,
2c9b15ca 979 Object *owner,
093bc2cd
AK		 980 const char *name,
981 uint64_t size)
982{
22a893e4 983 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
08dafab4
AK		 984 mr->size = int128_make64(size);
985 if (size == UINT64_MAX) {
986 mr->size = int128_2_64();
987 }
302fa283 988 mr->name = g_strdup(name);
612263cf 989 mr->owner = owner;
58eaa217 990 mr->ram_block = NULL;
b4fefef9
PC		 991
992 if (name) {
843ef73a
PC		 993 char *escaped_name = memory_region_escape_name(name);
994 char *name_array = g_strdup_printf("%s[*]", escaped_name);
612263cf
PB		 995
996 if (!owner) {
997 owner = container_get(qdev_get_machine(), "/unattached");
998 }
999
843ef73a 1000 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
b4fefef9 1001 object_unref(OBJECT(mr));
843ef73a
PC		 1002 g_free(name_array);
1003 g_free(escaped_name);
b4fefef9
PC		 1004 }
1005}
1006
d7bce999
EB		 1007static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1008 void *opaque, Error **errp)
409ddd01
PC		 1009{
1010 MemoryRegion *mr = MEMORY_REGION(obj);
1011 uint64_t value = mr->addr;
1012
51e72bc1 1013 visit_type_uint64(v, name, &value, errp);
409ddd01
PC		 1014}
1015
d7bce999
EB		 1016static void memory_region_get_container(Object *obj, Visitor *v,
1017 const char *name, void *opaque,
1018 Error **errp)
409ddd01
PC		 1019{
1020 MemoryRegion *mr = MEMORY_REGION(obj);
1021 gchar *path = (gchar *)"";
1022
1023 if (mr->container) {
1024 path = object_get_canonical_path(OBJECT(mr->container));
1025 }
51e72bc1 1026 visit_type_str(v, name, &path, errp);
409ddd01
PC		 1027 if (mr->container) {
1028 g_free(path);
1029 }
1030}
1031
1032static Object *memory_region_resolve_container(Object *obj, void *opaque,
1033 const char *part)
1034{
1035 MemoryRegion *mr = MEMORY_REGION(obj);
1036
1037 return OBJECT(mr->container);
1038}
1039
d7bce999
EB		 1040static void memory_region_get_priority(Object *obj, Visitor *v,
1041 const char *name, void *opaque,
1042 Error **errp)
d33382da
PC		 1043{
1044 MemoryRegion *mr = MEMORY_REGION(obj);
1045 int32_t value = mr->priority;
1046
51e72bc1 1047 visit_type_int32(v, name, &value, errp);
d33382da
PC		 1048}
1049
d7bce999
EB		 1050static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1051 void *opaque, Error **errp)
52aef7bb
PC		 1052{
1053 MemoryRegion *mr = MEMORY_REGION(obj);
1054 uint64_t value = memory_region_size(mr);
1055
51e72bc1 1056 visit_type_uint64(v, name, &value, errp);
52aef7bb
PC		 1057}
1058
b4fefef9
PC		 1059static void memory_region_initfn(Object *obj)
1060{
1061 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 1062 ObjectProperty *op;
b4fefef9
PC		 1063
1064 mr->ops = &unassigned_mem_ops;
6bba19ba 1065 mr->enabled = true;
5f9a5ea1 1066 mr->romd_mode = true;
196ea131 1067 mr->global_locking = true;
545e92e0 1068 mr->destructor = memory_region_destructor_none;
093bc2cd 1069 QTAILQ_INIT(&mr->subregions);
093bc2cd 1070 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC		 1071
1072 op = object_property_add(OBJECT(mr), "container",
1073 "link<" TYPE_MEMORY_REGION ">",
1074 memory_region_get_container,
1075 NULL, /* memory_region_set_container */
1076 NULL, NULL, &error_abort);
1077 op->resolve = memory_region_resolve_container;
1078
1079 object_property_add(OBJECT(mr), "addr", "uint64",
1080 memory_region_get_addr,
1081 NULL, /* memory_region_set_addr */
1082 NULL, NULL, &error_abort);
d33382da
PC		 1083 object_property_add(OBJECT(mr), "priority", "uint32",
1084 memory_region_get_priority,
1085 NULL, /* memory_region_set_priority */
1086 NULL, NULL, &error_abort);
52aef7bb
PC		 1087 object_property_add(OBJECT(mr), "size", "uint64",
1088 memory_region_get_size,
1089 NULL, /* memory_region_set_size, */
1090 NULL, NULL, &error_abort);
093bc2cd
AK		 1091}
1092
b018ddf6
PB		 1093static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1094 unsigned size)
1095{
1096#ifdef DEBUG_UNASSIGNED
1097 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1098#endif
4917cf44
AF		 1099 if (current_cpu != NULL) {
1100 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 1101 }
68a7439a 1102 return 0;
b018ddf6
PB		 1103}
1104
1105static void unassigned_mem_write(void *opaque, hwaddr addr,
1106 uint64_t val, unsigned size)
1107{
1108#ifdef DEBUG_UNASSIGNED
1109 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1110#endif
4917cf44
AF		 1111 if (current_cpu != NULL) {
1112 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 1113 }
b018ddf6
PB		 1114}
1115
d197063f
PB		 1116static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1117 unsigned size, bool is_write)
1118{
1119 return false;
1120}
1121
1122const MemoryRegionOps unassigned_mem_ops = {
1123 .valid.accepts = unassigned_mem_accepts,
1124 .endianness = DEVICE_NATIVE_ENDIAN,
1125};
1126
4a2e242b
AW		 1127static uint64_t memory_region_ram_device_read(void *opaque,
1128 hwaddr addr, unsigned size)
1129{
1130 MemoryRegion *mr = opaque;
1131 uint64_t data = (uint64_t)~0;
1132
1133 switch (size) {
1134 case 1:
1135 data = *(uint8_t *)(mr->ram_block->host + addr);
1136 break;
1137 case 2:
1138 data = *(uint16_t *)(mr->ram_block->host + addr);
1139 break;
1140 case 4:
1141 data = *(uint32_t *)(mr->ram_block->host + addr);
1142 break;
1143 case 8:
1144 data = *(uint64_t *)(mr->ram_block->host + addr);
1145 break;
1146 }
1147
1148 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1149
1150 return data;
1151}
1152
1153static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1154 uint64_t data, unsigned size)
1155{
1156 MemoryRegion *mr = opaque;
1157
1158 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1159
1160 switch (size) {
1161 case 1:
1162 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1163 break;
1164 case 2:
1165 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1166 break;
1167 case 4:
1168 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1169 break;
1170 case 8:
1171 *(uint64_t *)(mr->ram_block->host + addr) = data;
1172 break;
1173 }
1174}
1175
1176static const MemoryRegionOps ram_device_mem_ops = {
1177 .read = memory_region_ram_device_read,
1178 .write = memory_region_ram_device_write,
c99a29e7 1179 .endianness = DEVICE_HOST_ENDIAN,
4a2e242b
AW		 1180 .valid = {
1181 .min_access_size = 1,
1182 .max_access_size = 8,
1183 .unaligned = true,
1184 },
1185 .impl = {
1186 .min_access_size = 1,
1187 .max_access_size = 8,
1188 .unaligned = true,
1189 },
1190};
1191
d2702032
PB		 1192bool memory_region_access_valid(MemoryRegion *mr,
1193 hwaddr addr,
1194 unsigned size,
1195 bool is_write)
093bc2cd 1196{
a014ed07
PB		 1197 int access_size_min, access_size_max;
1198 int access_size, i;
897fa7cf 1199
093bc2cd
AK		 1200 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1201 return false;
1202 }
1203
a014ed07 1204 if (!mr->ops->valid.accepts) {
093bc2cd
AK		 1205 return true;
1206 }
1207
a014ed07
PB		 1208 access_size_min = mr->ops->valid.min_access_size;
1209 if (!mr->ops->valid.min_access_size) {
1210 access_size_min = 1;
1211 }
1212
1213 access_size_max = mr->ops->valid.max_access_size;
1214 if (!mr->ops->valid.max_access_size) {
1215 access_size_max = 4;
1216 }
1217
1218 access_size = MAX(MIN(size, access_size_max), access_size_min);
1219 for (i = 0; i < size; i += access_size) {
1220 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1221 is_write)) {
1222 return false;
1223 }
093bc2cd 1224 }
a014ed07 1225
093bc2cd
AK		 1226 return true;
1227}
1228
cc05c43a
PM		 1229static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1230 hwaddr addr,
1231 uint64_t *pval,
1232 unsigned size,
1233 MemTxAttrs attrs)
093bc2cd 1234{
cc05c43a 1235 *pval = 0;
093bc2cd 1236
ce5d2f33 1237 if (mr->ops->read) {
cc05c43a
PM		 1238 return access_with_adjusted_size(addr, pval, size,
1239 mr->ops->impl.min_access_size,
1240 mr->ops->impl.max_access_size,
1241 memory_region_read_accessor,
1242 mr, attrs);
1243 } else if (mr->ops->read_with_attrs) {
1244 return access_with_adjusted_size(addr, pval, size,
1245 mr->ops->impl.min_access_size,
1246 mr->ops->impl.max_access_size,
1247 memory_region_read_with_attrs_accessor,
1248 mr, attrs);
ce5d2f33 1249 } else {
cc05c43a
PM		 1250 return access_with_adjusted_size(addr, pval, size, 1, 4,
1251 memory_region_oldmmio_read_accessor,
1252 mr, attrs);
74901c3b 1253 }
093bc2cd
AK		 1254}
1255
3b643495
PM		 1256MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1257 hwaddr addr,
1258 uint64_t *pval,
1259 unsigned size,
1260 MemTxAttrs attrs)
a621f38d 1261{
cc05c43a
PM		 1262 MemTxResult r;
1263
791af8c8
PB		 1264 if (!memory_region_access_valid(mr, addr, size, false)) {
1265 *pval = unassigned_mem_read(mr, addr, size);
cc05c43a 1266 return MEMTX_DECODE_ERROR;
791af8c8 1267 }
a621f38d 1268
cc05c43a 1269 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
791af8c8 1270 adjust_endianness(mr, pval, size);
cc05c43a 1271 return r;
a621f38d 1272}
093bc2cd 1273
8c56c1a5
PF		 1274/* Return true if an eventfd was signalled */
1275static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1276 hwaddr addr,
1277 uint64_t data,
1278 unsigned size,
1279 MemTxAttrs attrs)
1280{
1281 MemoryRegionIoeventfd ioeventfd = {
1282 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1283 .data = data,
1284 };
1285 unsigned i;
1286
1287 for (i = 0; i < mr->ioeventfd_nb; i++) {
1288 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1289 ioeventfd.e = mr->ioeventfds[i].e;
1290
1291 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1292 event_notifier_set(ioeventfd.e);
1293 return true;
1294 }
1295 }
1296
1297 return false;
1298}
1299
3b643495
PM		 1300MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1301 hwaddr addr,
1302 uint64_t data,
1303 unsigned size,
1304 MemTxAttrs attrs)
a621f38d 1305{
897fa7cf 1306 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 1307 unassigned_mem_write(mr, addr, data, size);
cc05c43a 1308 return MEMTX_DECODE_ERROR;
093bc2cd
AK		 1309 }
1310
a621f38d
AK		 1311 adjust_endianness(mr, &data, size);
1312
8c56c1a5
PF		 1313 if ((!kvm_eventfds_enabled()) &&
1314 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1315 return MEMTX_OK;
1316 }
1317
ce5d2f33 1318 if (mr->ops->write) {
cc05c43a
PM		 1319 return access_with_adjusted_size(addr, &data, size,
1320 mr->ops->impl.min_access_size,
1321 mr->ops->impl.max_access_size,
1322 memory_region_write_accessor, mr,
1323 attrs);
1324 } else if (mr->ops->write_with_attrs) {
1325 return
1326 access_with_adjusted_size(addr, &data, size,
1327 mr->ops->impl.min_access_size,
1328 mr->ops->impl.max_access_size,
1329 memory_region_write_with_attrs_accessor,
1330 mr, attrs);
ce5d2f33 1331 } else {
cc05c43a
PM		 1332 return access_with_adjusted_size(addr, &data, size, 1, 4,
1333 memory_region_oldmmio_write_accessor,
1334 mr, attrs);
74901c3b 1335 }
093bc2cd
AK		 1336}
1337
093bc2cd 1338void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1339 Object *owner,
093bc2cd
AK		 1340 const MemoryRegionOps *ops,
1341 void *opaque,
1342 const char *name,
1343 uint64_t size)
1344{
2c9b15ca 1345 memory_region_init(mr, owner, name, size);
6d6d2abf 1346 mr->ops = ops ? ops : &unassigned_mem_ops;
093bc2cd 1347 mr->opaque = opaque;
14a3c10a 1348 mr->terminates = true;
093bc2cd
AK		 1349}
1350
1351void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1352 Object *owner,
093bc2cd 1353 const char *name,
49946538
HT		 1354 uint64_t size,
1355 Error **errp)
093bc2cd 1356{
2c9b15ca 1357 memory_region_init(mr, owner, name, size);
8ea9252a 1358 mr->ram = true;
14a3c10a 1359 mr->terminates = true;
545e92e0 1360 mr->destructor = memory_region_destructor_ram;
8e41fb63 1361 mr->ram_block = qemu_ram_alloc(size, mr, errp);
677e7805 1362 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
0b183fc8
PB		 1363}
1364
60786ef3
MT		 1365void memory_region_init_resizeable_ram(MemoryRegion *mr,
1366 Object *owner,
1367 const char *name,
1368 uint64_t size,
1369 uint64_t max_size,
1370 void (*resized)(const char*,
1371 uint64_t length,
1372 void *host),
1373 Error **errp)
1374{
1375 memory_region_init(mr, owner, name, size);
1376 mr->ram = true;
1377 mr->terminates = true;
1378 mr->destructor = memory_region_destructor_ram;
8e41fb63
FZ		 1379 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1380 mr, errp);
677e7805 1381 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
60786ef3
MT		 1382}
1383
0b183fc8
PB		 1384#ifdef __linux__
1385void memory_region_init_ram_from_file(MemoryRegion *mr,
1386 struct Object *owner,
1387 const char *name,
1388 uint64_t size,
dbcb8981 1389 bool share,
7f56e740
PB		 1390 const char *path,
1391 Error **errp)
0b183fc8
PB		 1392{
1393 memory_region_init(mr, owner, name, size);
1394 mr->ram = true;
1395 mr->terminates = true;
1396 mr->destructor = memory_region_destructor_ram;
8e41fb63 1397 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
677e7805 1398 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
093bc2cd 1399}
0b183fc8 1400#endif
093bc2cd
AK		 1401
1402void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1403 Object *owner,
093bc2cd
AK		 1404 const char *name,
1405 uint64_t size,
1406 void *ptr)
1407{
2c9b15ca 1408 memory_region_init(mr, owner, name, size);
8ea9252a 1409 mr->ram = true;
14a3c10a 1410 mr->terminates = true;
fc3e7665 1411 mr->destructor = memory_region_destructor_ram;
677e7805 1412 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
ef701d7b
HT		 1413
1414 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1415 assert(ptr != NULL);
8e41fb63 1416 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
093bc2cd
AK		 1417}
1418
21e00fa5
AW		 1419void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1420 Object *owner,
1421 const char *name,
1422 uint64_t size,
1423 void *ptr)
e4dc3f59 1424{
21e00fa5
AW		 1425 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1426 mr->ram_device = true;
4a2e242b
AW		 1427 mr->ops = &ram_device_mem_ops;
1428 mr->opaque = mr;
e4dc3f59
ND		 1429}
1430
093bc2cd 1431void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1432 Object *owner,
093bc2cd
AK		 1433 const char *name,
1434 MemoryRegion *orig,
a8170e5e 1435 hwaddr offset,
093bc2cd
AK		 1436 uint64_t size)
1437{
2c9b15ca 1438 memory_region_init(mr, owner, name, size);
093bc2cd
AK		 1439 mr->alias = orig;
1440 mr->alias_offset = offset;
1441}
1442
a1777f7f
PM		 1443void memory_region_init_rom(MemoryRegion *mr,
1444 struct Object *owner,
1445 const char *name,
1446 uint64_t size,
1447 Error **errp)
1448{
1449 memory_region_init(mr, owner, name, size);
1450 mr->ram = true;
1451 mr->readonly = true;
1452 mr->terminates = true;
1453 mr->destructor = memory_region_destructor_ram;
1454 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1455 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1456}
1457
d0a9b5bc 1458void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1459 Object *owner,
d0a9b5bc 1460 const MemoryRegionOps *ops,
75f5941c 1461 void *opaque,
d0a9b5bc 1462 const char *name,
33e0eb52
HT		 1463 uint64_t size,
1464 Error **errp)
d0a9b5bc 1465{
39e0b03d 1466 assert(ops);
2c9b15ca 1467 memory_region_init(mr, owner, name, size);
7bc2b9cd 1468 mr->ops = ops;
75f5941c 1469 mr->opaque = opaque;
d0a9b5bc 1470 mr->terminates = true;
75c578dc 1471 mr->rom_device = true;
58268c8d 1472 mr->destructor = memory_region_destructor_ram;
8e41fb63 1473 mr->ram_block = qemu_ram_alloc(size, mr, errp);
d0a9b5bc
AK		 1474}
1475
30951157 1476void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1477 Object *owner,
30951157
AK		 1478 const MemoryRegionIOMMUOps *ops,
1479 const char *name,
1480 uint64_t size)
1481{
2c9b15ca 1482 memory_region_init(mr, owner, name, size);
30951157
AK		 1483 mr->iommu_ops = ops,
1484 mr->terminates = true; /* then re-forwards */
cdb30812 1485 QLIST_INIT(&mr->iommu_notify);
5bf3d319 1486 mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
30951157
AK		 1487}
1488
b4fefef9 1489static void memory_region_finalize(Object *obj)
093bc2cd 1490{
b4fefef9
PC		 1491 MemoryRegion *mr = MEMORY_REGION(obj);
1492
2e2b8eb7
PB		 1493 assert(!mr->container);
1494
1495 /* We know the region is not visible in any address space (it
1496 * does not have a container and cannot be a root either because
1497 * it has no references, so we can blindly clear mr->enabled.
1498 * memory_region_set_enabled instead could trigger a transaction
1499 * and cause an infinite loop.
1500 */
1501 mr->enabled = false;
1502 memory_region_transaction_begin();
1503 while (!QTAILQ_EMPTY(&mr->subregions)) {
1504 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1505 memory_region_del_subregion(mr, subregion);
1506 }
1507 memory_region_transaction_commit();
1508
545e92e0 1509 mr->destructor(mr);
093bc2cd 1510 memory_region_clear_coalescing(mr);
302fa283 1511 g_free((char *)mr->name);
7267c094 1512 g_free(mr->ioeventfds);
093bc2cd
AK		 1513}
1514
803c0816
PB		 1515Object *memory_region_owner(MemoryRegion *mr)
1516{
22a893e4
PB		 1517 Object *obj = OBJECT(mr);
1518 return obj->parent;
803c0816
PB		 1519}
1520
46637be2
PB		 1521void memory_region_ref(MemoryRegion *mr)
1522{
22a893e4
PB		 1523 /* MMIO callbacks most likely will access data that belongs
1524 * to the owner, hence the need to ref/unref the owner whenever
1525 * the memory region is in use.
1526 *
1527 * The memory region is a child of its owner. As long as the
1528 * owner doesn't call unparent itself on the memory region,
1529 * ref-ing the owner will also keep the memory region alive.
612263cf
PB		 1530 * Memory regions without an owner are supposed to never go away;
1531 * we do not ref/unref them because it slows down DMA sensibly.
22a893e4 1532 */
612263cf
PB		 1533 if (mr && mr->owner) {
1534 object_ref(mr->owner);
46637be2
PB		 1535 }
1536}
1537
1538void memory_region_unref(MemoryRegion *mr)
1539{
612263cf
PB		 1540 if (mr && mr->owner) {
1541 object_unref(mr->owner);
46637be2
PB		 1542 }
1543}
1544
093bc2cd
AK		 1545uint64_t memory_region_size(MemoryRegion *mr)
1546{
08dafab4
AK		 1547 if (int128_eq(mr->size, int128_2_64())) {
1548 return UINT64_MAX;
1549 }
1550 return int128_get64(mr->size);
093bc2cd
AK		 1551}
1552
5d546d4b 1553const char *memory_region_name(const MemoryRegion *mr)
8991c79b 1554{
d1dd32af
PC		 1555 if (!mr->name) {
1556 ((MemoryRegion *)mr)->name =
1557 object_get_canonical_path_component(OBJECT(mr));
1558 }
302fa283 1559 return mr->name;
8991c79b
AK		 1560}
1561
21e00fa5 1562bool memory_region_is_ram_device(MemoryRegion *mr)
e4dc3f59 1563{
21e00fa5 1564 return mr->ram_device;
e4dc3f59
ND		 1565}
1566
2d1a35be 1567uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
55043ba3 1568{
6f6a5ef3 1569 uint8_t mask = mr->dirty_log_mask;
adaad61c 1570 if (global_dirty_log && mr->ram_block) {
6f6a5ef3
PB		 1571 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1572 }
1573 return mask;
55043ba3
AK		 1574}
1575
2d1a35be
PB		 1576bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1577{
1578 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1579}
1580
5bf3d319
PX		 1581static void memory_region_update_iommu_notify_flags(MemoryRegion *mr)
1582{
1583 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1584 IOMMUNotifier *iommu_notifier;
1585
512fa408 1586 IOMMU_NOTIFIER_FOREACH(iommu_notifier, mr) {
5bf3d319
PX		 1587 flags |= iommu_notifier->notifier_flags;
1588 }
1589
1590 if (flags != mr->iommu_notify_flags &&
1591 mr->iommu_ops->notify_flag_changed) {
1592 mr->iommu_ops->notify_flag_changed(mr, mr->iommu_notify_flags,
1593 flags);
1594 }
1595
1596 mr->iommu_notify_flags = flags;
1597}
1598
cdb30812
PX		 1599void memory_region_register_iommu_notifier(MemoryRegion *mr,
1600 IOMMUNotifier *n)
06866575 1601{
efcd38c5
JW		 1602 if (mr->alias) {
1603 memory_region_register_iommu_notifier(mr->alias, n);
1604 return;
1605 }
1606
cdb30812
PX		 1607 /* We need to register for at least one bitfield */
1608 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
698feb5e 1609 assert(n->start <= n->end);
cdb30812 1610 QLIST_INSERT_HEAD(&mr->iommu_notify, n, node);
5bf3d319 1611 memory_region_update_iommu_notify_flags(mr);
06866575
DG		 1612}
1613
f682e9c2 1614uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
a788f227 1615{
f682e9c2
AK		 1616 assert(memory_region_is_iommu(mr));
1617 if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1618 return mr->iommu_ops->get_min_page_size(mr);
1619 }
1620 return TARGET_PAGE_SIZE;
1621}
1622
cdb30812
PX		 1623void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n,
1624 bool is_write)
f682e9c2
AK		 1625{
1626 hwaddr addr, granularity;
a788f227
DG		 1627 IOMMUTLBEntry iotlb;
1628
faa362e3
PX		 1629 /* If the IOMMU has its own replay callback, override */
1630 if (mr->iommu_ops->replay) {
1631 mr->iommu_ops->replay(mr, n);
1632 return;
1633 }
1634
f682e9c2
AK		 1635 granularity = memory_region_iommu_get_min_page_size(mr);
1636
a788f227
DG		 1637 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1638 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1639 if (iotlb.perm != IOMMU_NONE) {
1640 n->notify(n, &iotlb);
1641 }
1642
1643 /* if (2^64 - MR size) < granularity, it's possible to get an
1644 * infinite loop here. This should catch such a wraparound */
1645 if ((addr + granularity) < addr) {
1646 break;
1647 }
1648 }
1649}
1650
de472e4a
PX		 1651void memory_region_iommu_replay_all(MemoryRegion *mr)
1652{
1653 IOMMUNotifier *notifier;
1654
1655 IOMMU_NOTIFIER_FOREACH(notifier, mr) {
1656 memory_region_iommu_replay(mr, notifier, false);
1657 }
1658}
1659
cdb30812
PX		 1660void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1661 IOMMUNotifier *n)
06866575 1662{
efcd38c5
JW		 1663 if (mr->alias) {
1664 memory_region_unregister_iommu_notifier(mr->alias, n);
1665 return;
1666 }
cdb30812 1667 QLIST_REMOVE(n, node);
5bf3d319 1668 memory_region_update_iommu_notify_flags(mr);
06866575
DG		 1669}
1670
bd2bfa4c
PX		 1671void memory_region_notify_one(IOMMUNotifier *notifier,
1672 IOMMUTLBEntry *entry)
06866575 1673{
cdb30812
PX		 1674 IOMMUNotifierFlag request_flags;
1675
bd2bfa4c
PX		 1676 /*
1677 * Skip the notification if the notification does not overlap
1678 * with registered range.
1679 */
1680 if (notifier->start > entry->iova + entry->addr_mask + 1 ||
1681 notifier->end < entry->iova) {
1682 return;
1683 }
cdb30812 1684
bd2bfa4c 1685 if (entry->perm & IOMMU_RW) {
cdb30812
PX		 1686 request_flags = IOMMU_NOTIFIER_MAP;
1687 } else {
1688 request_flags = IOMMU_NOTIFIER_UNMAP;
1689 }
1690
bd2bfa4c
PX		 1691 if (notifier->notifier_flags & request_flags) {
1692 notifier->notify(notifier, entry);
1693 }
1694}
1695
1696void memory_region_notify_iommu(MemoryRegion *mr,
1697 IOMMUTLBEntry entry)
1698{
1699 IOMMUNotifier *iommu_notifier;
1700
1701 assert(memory_region_is_iommu(mr));
1702
512fa408 1703 IOMMU_NOTIFIER_FOREACH(iommu_notifier, mr) {
bd2bfa4c 1704 memory_region_notify_one(iommu_notifier, &entry);
cdb30812 1705 }
06866575
DG		 1706}
1707
093bc2cd
AK		 1708void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1709{
5a583347 1710 uint8_t mask = 1 << client;
deb809ed 1711 uint8_t old_logging;
5a583347 1712
dbddac6d 1713 assert(client == DIRTY_MEMORY_VGA);
deb809ed
PB		 1714 old_logging = mr->vga_logging_count;
1715 mr->vga_logging_count += log ? 1 : -1;
1716 if (!!old_logging == !!mr->vga_logging_count) {
1717 return;
1718 }
1719
59023ef4 1720 memory_region_transaction_begin();
5a583347 1721 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1722 memory_region_update_pending |= mr->enabled;
59023ef4 1723 memory_region_transaction_commit();
093bc2cd
AK		 1724}
1725
a8170e5e
AK		 1726bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1727 hwaddr size, unsigned client)
093bc2cd 1728{
8e41fb63
FZ		 1729 assert(mr->ram_block);
1730 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1731 size, client);
093bc2cd
AK		 1732}
1733
a8170e5e
AK		 1734void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1735 hwaddr size)
093bc2cd 1736{
8e41fb63
FZ		 1737 assert(mr->ram_block);
1738 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1739 size,
58d2707e 1740 memory_region_get_dirty_log_mask(mr));
093bc2cd
AK		 1741}
1742
6c279db8
JQ		 1743bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1744 hwaddr size, unsigned client)
1745{
8e41fb63
FZ		 1746 assert(mr->ram_block);
1747 return cpu_physical_memory_test_and_clear_dirty(
1748 memory_region_get_ram_addr(mr) + addr, size, client);
6c279db8
JQ		 1749}
1750
8deaf12c
GH		 1751DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
1752 hwaddr addr,
1753 hwaddr size,
1754 unsigned client)
1755{
1756 assert(mr->ram_block);
1757 return cpu_physical_memory_snapshot_and_clear_dirty(
1758 memory_region_get_ram_addr(mr) + addr, size, client);
1759}
1760
1761bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
1762 hwaddr addr, hwaddr size)
1763{
1764 assert(mr->ram_block);
1765 return cpu_physical_memory_snapshot_get_dirty(snap,
1766 memory_region_get_ram_addr(mr) + addr, size);
1767}
6c279db8 1768
093bc2cd
AK		 1769void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1770{
0a752eee 1771 MemoryListener *listener;
0d673e36 1772 AddressSpace *as;
0a752eee 1773 FlatView *view;
5a583347
AK		 1774 FlatRange *fr;
1775
0a752eee
PB		 1776 /* If the same address space has multiple log_sync listeners, we
1777 * visit that address space's FlatView multiple times. But because
1778 * log_sync listeners are rare, it's still cheaper than walking each
1779 * address space once.
1780 */
1781 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1782 if (!listener->log_sync) {
1783 continue;
1784 }
1785 as = listener->address_space;
1786 view = address_space_get_flatview(as);
99e86347 1787 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36 1788 if (fr->mr == mr) {
0a752eee
PB		 1789 MemoryRegionSection mrs = section_from_flat_range(fr, as);
1790 listener->log_sync(listener, &mrs);
0d673e36 1791 }
5a583347 1792 }
856d7245 1793 flatview_unref(view);
5a583347 1794 }
093bc2cd
AK		 1795}
1796
1797void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1798{
fb1cd6f9 1799 if (mr->readonly != readonly) {
59023ef4 1800 memory_region_transaction_begin();
fb1cd6f9 1801 mr->readonly = readonly;
22bde714 1802 memory_region_update_pending |= mr->enabled;
59023ef4 1803 memory_region_transaction_commit();
fb1cd6f9 1804 }
093bc2cd
AK		 1805}
1806
5f9a5ea1 1807void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1808{
5f9a5ea1 1809 if (mr->romd_mode != romd_mode) {
59023ef4 1810 memory_region_transaction_begin();
5f9a5ea1 1811 mr->romd_mode = romd_mode;
22bde714 1812 memory_region_update_pending |= mr->enabled;
59023ef4 1813 memory_region_transaction_commit();
d0a9b5bc
AK		 1814 }
1815}
1816
a8170e5e
AK		 1817void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1818 hwaddr size, unsigned client)
093bc2cd 1819{
8e41fb63
FZ		 1820 assert(mr->ram_block);
1821 cpu_physical_memory_test_and_clear_dirty(
1822 memory_region_get_ram_addr(mr) + addr, size, client);
093bc2cd
AK		 1823}
1824
a35ba7be
PB		 1825int memory_region_get_fd(MemoryRegion *mr)
1826{
4ff87573
PB		 1827 int fd;
1828
1829 rcu_read_lock();
1830 while (mr->alias) {
1831 mr = mr->alias;
a35ba7be 1832 }
4ff87573
PB		 1833 fd = mr->ram_block->fd;
1834 rcu_read_unlock();
a35ba7be 1835
4ff87573
PB		 1836 return fd;
1837}
a35ba7be 1838
4ff87573
PB		 1839void memory_region_set_fd(MemoryRegion *mr, int fd)
1840{
1841 rcu_read_lock();
1842 while (mr->alias) {
1843 mr = mr->alias;
1844 }
1845 mr->ram_block->fd = fd;
1846 rcu_read_unlock();
a35ba7be
PB		 1847}
1848
093bc2cd
AK		 1849void *memory_region_get_ram_ptr(MemoryRegion *mr)
1850{
49b24afc
PB		 1851 void *ptr;
1852 uint64_t offset = 0;
093bc2cd 1853
49b24afc
PB		 1854 rcu_read_lock();
1855 while (mr->alias) {
1856 offset += mr->alias_offset;
1857 mr = mr->alias;
1858 }
8e41fb63 1859 assert(mr->ram_block);
0878d0e1 1860 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
49b24afc 1861 rcu_read_unlock();
093bc2cd 1862
0878d0e1 1863 return ptr;
093bc2cd
AK		 1864}
1865
07bdaa41
PB		 1866MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1867{
1868 RAMBlock *block;
1869
1870 block = qemu_ram_block_from_host(ptr, false, offset);
1871 if (!block) {
1872 return NULL;
1873 }
1874
1875 return block->mr;
1876}
1877
7ebb2745
FZ		 1878ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1879{
1880 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1881}
1882
37d7c084
PB		 1883void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1884{
8e41fb63 1885 assert(mr->ram_block);
37d7c084 1886
fa53a0e5 1887 qemu_ram_resize(mr->ram_block, newsize, errp);
37d7c084
PB		 1888}
1889
0d673e36 1890static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1891{
99e86347 1892 FlatView *view;
093bc2cd
AK		 1893 FlatRange *fr;
1894 CoalescedMemoryRange *cmr;
1895 AddrRange tmp;
95d2994a 1896 MemoryRegionSection section;
093bc2cd 1897
856d7245 1898 view = address_space_get_flatview(as);
99e86347 1899 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1900 if (fr->mr == mr) {
95d2994a 1901 section = (MemoryRegionSection) {
f6790af6 1902 .address_space = as,
95d2994a 1903 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1904 .size = fr->addr.size,
95d2994a
AK		 1905 };
1906
9a54635d 1907 MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
95d2994a
AK		 1908 int128_get64(fr->addr.start),
1909 int128_get64(fr->addr.size));
093bc2cd
AK		 1910 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1911 tmp = addrrange_shift(cmr->addr,
08dafab4
AK		 1912 int128_sub(fr->addr.start,
1913 int128_make64(fr->offset_in_region)));
093bc2cd
AK		 1914 if (!addrrange_intersects(tmp, fr->addr)) {
1915 continue;
1916 }
1917 tmp = addrrange_intersection(tmp, fr->addr);
9a54635d 1918 MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
95d2994a
AK		 1919 int128_get64(tmp.start),
1920 int128_get64(tmp.size));
093bc2cd
AK		 1921 }
1922 }
1923 }
856d7245 1924 flatview_unref(view);
093bc2cd
AK		 1925}
1926
0d673e36
AK		 1927static void memory_region_update_coalesced_range(MemoryRegion *mr)
1928{
1929 AddressSpace *as;
1930
1931 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1932 memory_region_update_coalesced_range_as(mr, as);
1933 }
1934}
1935
093bc2cd
AK		 1936void memory_region_set_coalescing(MemoryRegion *mr)
1937{
1938 memory_region_clear_coalescing(mr);
08dafab4 1939 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK		 1940}
1941
1942void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1943 hwaddr offset,
093bc2cd
AK		 1944 uint64_t size)
1945{
7267c094 1946 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1947
08dafab4 1948 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK		 1949 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1950 memory_region_update_coalesced_range(mr);
d410515e 1951 memory_region_set_flush_coalesced(mr);
093bc2cd
AK		 1952}
1953
1954void memory_region_clear_coalescing(MemoryRegion *mr)
1955{
1956 CoalescedMemoryRange *cmr;
ab5b3db5 1957 bool updated = false;
093bc2cd 1958
d410515e
JK		 1959 qemu_flush_coalesced_mmio_buffer();
1960 mr->flush_coalesced_mmio = false;
1961
093bc2cd
AK		 1962 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1963 cmr = QTAILQ_FIRST(&mr->coalesced);
1964 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1965 g_free(cmr);
ab5b3db5
FZ		 1966 updated = true;
1967 }
1968
1969 if (updated) {
1970 memory_region_update_coalesced_range(mr);
093bc2cd 1971 }
093bc2cd
AK		 1972}
1973
d410515e
JK		 1974void memory_region_set_flush_coalesced(MemoryRegion *mr)
1975{
1976 mr->flush_coalesced_mmio = true;
1977}
1978
1979void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1980{
1981 qemu_flush_coalesced_mmio_buffer();
1982 if (QTAILQ_EMPTY(&mr->coalesced)) {
1983 mr->flush_coalesced_mmio = false;
1984 }
1985}
1986
196ea131
JK		 1987void memory_region_set_global_locking(MemoryRegion *mr)
1988{
1989 mr->global_locking = true;
1990}
1991
1992void memory_region_clear_global_locking(MemoryRegion *mr)
1993{
1994 mr->global_locking = false;
1995}
1996
8c56c1a5
PF		 1997static bool userspace_eventfd_warning;
1998
3e9d69e7 1999void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 2000 hwaddr addr,
3e9d69e7
AK		 2001 unsigned size,
2002 bool match_data,
2003 uint64_t data,
753d5e14 2004 EventNotifier *e)
3e9d69e7
AK		 2005{
2006 MemoryRegionIoeventfd mrfd = {
08dafab4
AK		 2007 .addr.start = int128_make64(addr),
2008 .addr.size = int128_make64(size),
3e9d69e7
AK		 2009 .match_data = match_data,
2010 .data = data,
753d5e14 2011 .e = e,
3e9d69e7
AK		 2012 };
2013 unsigned i;
2014
8c56c1a5
PF		 2015 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2016 userspace_eventfd_warning))) {
2017 userspace_eventfd_warning = true;
2018 error_report("Using eventfd without MMIO binding in KVM. "
2019 "Suboptimal performance expected");
2020 }
2021
b8aecea2
JW		 2022 if (size) {
2023 adjust_endianness(mr, &mrfd.data, size);
2024 }
59023ef4 2025 memory_region_transaction_begin();
3e9d69e7
AK		 2026 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2027 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
2028 break;
2029 }
2030 }
2031 ++mr->ioeventfd_nb;
7267c094 2032 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK		 2033 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2034 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2035 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2036 mr->ioeventfds[i] = mrfd;
4dc56152 2037 ioeventfd_update_pending |= mr->enabled;
59023ef4 2038 memory_region_transaction_commit();
3e9d69e7
AK		 2039}
2040
2041void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 2042 hwaddr addr,
3e9d69e7
AK		 2043 unsigned size,
2044 bool match_data,
2045 uint64_t data,
753d5e14 2046 EventNotifier *e)
3e9d69e7
AK		 2047{
2048 MemoryRegionIoeventfd mrfd = {
08dafab4
AK		 2049 .addr.start = int128_make64(addr),
2050 .addr.size = int128_make64(size),
3e9d69e7
AK		 2051 .match_data = match_data,
2052 .data = data,
753d5e14 2053 .e = e,
3e9d69e7
AK		 2054 };
2055 unsigned i;
2056
b8aecea2
JW		 2057 if (size) {
2058 adjust_endianness(mr, &mrfd.data, size);
2059 }
59023ef4 2060 memory_region_transaction_begin();
3e9d69e7
AK		 2061 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2062 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2063 break;
2064 }
2065 }
2066 assert(i != mr->ioeventfd_nb);
2067 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2068 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2069 --mr->ioeventfd_nb;
7267c094 2070 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 2071 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 2072 ioeventfd_update_pending |= mr->enabled;
59023ef4 2073 memory_region_transaction_commit();
3e9d69e7
AK		 2074}
2075
feca4ac1 2076static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 2077{
feca4ac1 2078 MemoryRegion *mr = subregion->container;
093bc2cd
AK		 2079 MemoryRegion *other;
2080
59023ef4
JK		 2081 memory_region_transaction_begin();
2082
dfde4e6e 2083 memory_region_ref(subregion);
093bc2cd
AK		 2084 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2085 if (subregion->priority >= other->priority) {
2086 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2087 goto done;
2088 }
2089 }
2090 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2091done:
22bde714 2092 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 2093 memory_region_transaction_commit();
093bc2cd
AK		 2094}
2095
0598701a
PC		 2096static void memory_region_add_subregion_common(MemoryRegion *mr,
2097 hwaddr offset,
2098 MemoryRegion *subregion)
2099{
feca4ac1
PB		 2100 assert(!subregion->container);
2101 subregion->container = mr;
0598701a 2102 subregion->addr = offset;
feca4ac1 2103 memory_region_update_container_subregions(subregion);
0598701a 2104}
093bc2cd
AK		 2105
2106void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 2107 hwaddr offset,
093bc2cd
AK		 2108 MemoryRegion *subregion)
2109{
093bc2cd
AK		 2110 subregion->priority = 0;
2111 memory_region_add_subregion_common(mr, offset, subregion);
2112}
2113
2114void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 2115 hwaddr offset,
093bc2cd 2116 MemoryRegion *subregion,
a1ff8ae0 2117 int priority)
093bc2cd 2118{
093bc2cd
AK		 2119 subregion->priority = priority;
2120 memory_region_add_subregion_common(mr, offset, subregion);
2121}
2122
2123void memory_region_del_subregion(MemoryRegion *mr,
2124 MemoryRegion *subregion)
2125{
59023ef4 2126 memory_region_transaction_begin();
feca4ac1
PB		 2127 assert(subregion->container == mr);
2128 subregion->container = NULL;
093bc2cd 2129 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 2130 memory_region_unref(subregion);
22bde714 2131 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 2132 memory_region_transaction_commit();
6bba19ba
AK		 2133}
2134
2135void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2136{
2137 if (enabled == mr->enabled) {
2138 return;
2139 }
59023ef4 2140 memory_region_transaction_begin();
6bba19ba 2141 mr->enabled = enabled;
22bde714 2142 memory_region_update_pending = true;
59023ef4 2143 memory_region_transaction_commit();
093bc2cd 2144}
1c0ffa58 2145
e7af4c67
MT		 2146void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2147{
2148 Int128 s = int128_make64(size);
2149
2150 if (size == UINT64_MAX) {
2151 s = int128_2_64();
2152 }
2153 if (int128_eq(s, mr->size)) {
2154 return;
2155 }
2156 memory_region_transaction_begin();
2157 mr->size = s;
2158 memory_region_update_pending = true;
2159 memory_region_transaction_commit();
2160}
2161
67891b8a 2162static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 2163{
feca4ac1 2164 MemoryRegion *container = mr->container;
2282e1af 2165
feca4ac1 2166 if (container) {
67891b8a
PC		 2167 memory_region_transaction_begin();
2168 memory_region_ref(mr);
feca4ac1
PB		 2169 memory_region_del_subregion(container, mr);
2170 mr->container = container;
2171 memory_region_update_container_subregions(mr);
67891b8a
PC		 2172 memory_region_unref(mr);
2173 memory_region_transaction_commit();
2282e1af 2174 }
67891b8a 2175}
2282e1af 2176
67891b8a
PC		 2177void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2178{
2179 if (addr != mr->addr) {
2180 mr->addr = addr;
2181 memory_region_readd_subregion(mr);
2182 }
2282e1af
AK		 2183}
2184
a8170e5e 2185void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 2186{
4703359e 2187 assert(mr->alias);
4703359e 2188
59023ef4 2189 if (offset == mr->alias_offset) {
4703359e
AK		 2190 return;
2191 }
2192
59023ef4
JK		 2193 memory_region_transaction_begin();
2194 mr->alias_offset = offset;
22bde714 2195 memory_region_update_pending |= mr->enabled;
59023ef4 2196 memory_region_transaction_commit();
4703359e
AK		 2197}
2198
a2b257d6
IM		 2199uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2200{
2201 return mr->align;
2202}
2203
e2177955
AK		 2204static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2205{
2206 const AddrRange *addr = addr_;
2207 const FlatRange *fr = fr_;
2208
2209 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2210 return -1;
2211 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2212 return 1;
2213 }
2214 return 0;
2215}
2216
99e86347 2217static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 2218{
99e86347 2219 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK		 2220 sizeof(FlatRange), cmp_flatrange_addr);
2221}
2222
eed2bacf
IM		 2223bool memory_region_is_mapped(MemoryRegion *mr)
2224{
2225 return mr->container ? true : false;
2226}
2227
c6742b14
PB		 2228/* Same as memory_region_find, but it does not add a reference to the
2229 * returned region. It must be called from an RCU critical section.
2230 */
2231static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2232 hwaddr addr, uint64_t size)
e2177955 2233{
052e87b0 2234 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB		 2235 MemoryRegion *root;
2236 AddressSpace *as;
2237 AddrRange range;
99e86347 2238 FlatView *view;
73034e9e
PB		 2239 FlatRange *fr;
2240
2241 addr += mr->addr;
feca4ac1
PB		 2242 for (root = mr; root->container; ) {
2243 root = root->container;
73034e9e
PB		 2244 addr += root->addr;
2245 }
e2177955 2246
73034e9e 2247 as = memory_region_to_address_space(root);
eed2bacf
IM		 2248 if (!as) {
2249 return ret;
2250 }
73034e9e 2251 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 2252
2b647668 2253 view = atomic_rcu_read(&as->current_map);
99e86347 2254 fr = flatview_lookup(view, range);
e2177955 2255 if (!fr) {
c6742b14 2256 return ret;
e2177955
AK		 2257 }
2258
99e86347 2259 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK		 2260 --fr;
2261 }
2262
2263 ret.mr = fr->mr;
73034e9e 2264 ret.address_space = as;
e2177955
AK		 2265 range = addrrange_intersection(range, fr->addr);
2266 ret.offset_within_region = fr->offset_in_region;
2267 ret.offset_within_region += int128_get64(int128_sub(range.start,
2268 fr->addr.start));
052e87b0 2269 ret.size = range.size;
e2177955 2270 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 2271 ret.readonly = fr->readonly;
c6742b14
PB		 2272 return ret;
2273}
2274
2275MemoryRegionSection memory_region_find(MemoryRegion *mr,
2276 hwaddr addr, uint64_t size)
2277{
2278 MemoryRegionSection ret;
2279 rcu_read_lock();
2280 ret = memory_region_find_rcu(mr, addr, size);
2281 if (ret.mr) {
2282 memory_region_ref(ret.mr);
2283 }
2b647668 2284 rcu_read_unlock();
e2177955
AK		 2285 return ret;
2286}
2287
c6742b14
PB		 2288bool memory_region_present(MemoryRegion *container, hwaddr addr)
2289{
2290 MemoryRegion *mr;
2291
2292 rcu_read_lock();
2293 mr = memory_region_find_rcu(container, addr, 1).mr;
2294 rcu_read_unlock();
2295 return mr && mr != container;
2296}
2297
9c1f8f44 2298void memory_global_dirty_log_sync(void)
86e775c6 2299{
9c1f8f44
PB		 2300 MemoryListener *listener;
2301 AddressSpace *as;
99e86347 2302 FlatView *view;
7664e80c
AK		 2303 FlatRange *fr;
2304
9c1f8f44
PB		 2305 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2306 if (!listener->log_sync) {
2307 continue;
2308 }
d45fa784 2309 as = listener->address_space;
9c1f8f44
PB		 2310 view = address_space_get_flatview(as);
2311 FOR_EACH_FLAT_RANGE(fr, view) {
adaad61c
PB		 2312 if (fr->dirty_log_mask) {
2313 MemoryRegionSection mrs = section_from_flat_range(fr, as);
2314 listener->log_sync(listener, &mrs);
2315 }
9c1f8f44
PB		 2316 }
2317 flatview_unref(view);
7664e80c
AK		 2318 }
2319}
2320
2321void memory_global_dirty_log_start(void)
2322{
7664e80c 2323 global_dirty_log = true;
6f6a5ef3 2324
7376e582 2325 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
6f6a5ef3
PB		 2326
2327 /* Refresh DIRTY_LOG_MIGRATION bit. */
2328 memory_region_transaction_begin();
2329 memory_region_update_pending = true;
2330 memory_region_transaction_commit();
7664e80c
AK		 2331}
2332
2333void memory_global_dirty_log_stop(void)
2334{
7664e80c 2335 global_dirty_log = false;
6f6a5ef3
PB		 2336
2337 /* Refresh DIRTY_LOG_MIGRATION bit. */
2338 memory_region_transaction_begin();
2339 memory_region_update_pending = true;
2340 memory_region_transaction_commit();
2341
7376e582 2342 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK		 2343}
2344
2345static void listener_add_address_space(MemoryListener *listener,
2346 AddressSpace *as)
2347{
99e86347 2348 FlatView *view;
7664e80c
AK		 2349 FlatRange *fr;
2350
680a4783
PB		 2351 if (listener->begin) {
2352 listener->begin(listener);
2353 }
7664e80c 2354 if (global_dirty_log) {
975aefe0
AK		 2355 if (listener->log_global_start) {
2356 listener->log_global_start(listener);
2357 }
7664e80c 2358 }
975aefe0 2359
856d7245 2360 view = address_space_get_flatview(as);
99e86347 2361 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK		 2362 MemoryRegionSection section = {
2363 .mr = fr->mr,
f6790af6 2364 .address_space = as,
7664e80c 2365 .offset_within_region = fr->offset_in_region,
052e87b0 2366 .size = fr->addr.size,
7664e80c 2367 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 2368 .readonly = fr->readonly,
7664e80c 2369 };
680a4783
PB		 2370 if (fr->dirty_log_mask && listener->log_start) {
2371 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2372 }
975aefe0
AK		 2373 if (listener->region_add) {
2374 listener->region_add(listener, &section);
2375 }
7664e80c 2376 }
680a4783
PB		 2377 if (listener->commit) {
2378 listener->commit(listener);
2379 }
856d7245 2380 flatview_unref(view);
7664e80c
AK		 2381}
2382
d45fa784 2383void memory_listener_register(MemoryListener *listener, AddressSpace *as)
7664e80c 2384{
72e22d2f
AK		 2385 MemoryListener *other = NULL;
2386
d45fa784 2387 listener->address_space = as;
72e22d2f
AK		 2388 if (QTAILQ_EMPTY(&memory_listeners)
2389 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2390 memory_listeners)->priority) {
2391 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2392 } else {
2393 QTAILQ_FOREACH(other, &memory_listeners, link) {
2394 if (listener->priority < other->priority) {
2395 break;
2396 }
2397 }
2398 QTAILQ_INSERT_BEFORE(other, listener, link);
2399 }
0d673e36 2400
9a54635d
PB		 2401 if (QTAILQ_EMPTY(&as->listeners)
2402 || listener->priority >= QTAILQ_LAST(&as->listeners,
2403 memory_listeners)->priority) {
2404 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2405 } else {
2406 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2407 if (listener->priority < other->priority) {
2408 break;
2409 }
2410 }
2411 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2412 }
2413
d45fa784 2414 listener_add_address_space(listener, as);
7664e80c
AK		 2415}
2416
2417void memory_listener_unregister(MemoryListener *listener)
2418{
1d8280c1
PB		 2419 if (!listener->address_space) {
2420 return;
2421 }
2422
72e22d2f 2423 QTAILQ_REMOVE(&memory_listeners, listener, link);
9a54635d 2424 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
1d8280c1 2425 listener->address_space = NULL;
86e775c6 2426}
e2177955 2427
7dca8043 2428void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 2429{
ac95190e 2430 memory_region_ref(root);
59023ef4 2431 memory_region_transaction_begin();
f0c02d15 2432 as->ref_count = 1;
8786db7c 2433 as->root = root;
f0c02d15 2434 as->malloced = false;
8786db7c
AK		 2435 as->current_map = g_new(FlatView, 1);
2436 flatview_init(as->current_map);
4c19eb72
AK		 2437 as->ioeventfd_nb = 0;
2438 as->ioeventfds = NULL;
9a54635d 2439 QTAILQ_INIT(&as->listeners);
0d673e36 2440 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 2441 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 2442 address_space_init_dispatch(as);
f43793c7
PB		 2443 memory_region_update_pending |= root->enabled;
2444 memory_region_transaction_commit();
1c0ffa58 2445}
658b2224 2446
374f2981 2447static void do_address_space_destroy(AddressSpace *as)
83f3c251 2448{
f0c02d15 2449 bool do_free = as->malloced;
078c44f4 2450
83f3c251 2451 address_space_destroy_dispatch(as);
9a54635d 2452 assert(QTAILQ_EMPTY(&as->listeners));
078c44f4 2453
856d7245 2454 flatview_unref(as->current_map);
7dca8043 2455 g_free(as->name);
4c19eb72 2456 g_free(as->ioeventfds);
ac95190e 2457 memory_region_unref(as->root);
f0c02d15
PC		 2458 if (do_free) {
2459 g_free(as);
2460 }
2461}
2462
2463AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2464{
2465 AddressSpace *as;
2466
2467 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2468 if (root == as->root && as->malloced) {
2469 as->ref_count++;
2470 return as;
2471 }
2472 }
2473
2474 as = g_malloc0(sizeof *as);
2475 address_space_init(as, root, name);
2476 as->malloced = true;
2477 return as;
83f3c251
AK		 2478}
2479
374f2981
PB		 2480void address_space_destroy(AddressSpace *as)
2481{
ac95190e
PB		 2482 MemoryRegion *root = as->root;
2483
f0c02d15
PC		 2484 as->ref_count--;
2485 if (as->ref_count) {
2486 return;
2487 }
374f2981
PB		 2488 /* Flush out anything from MemoryListeners listening in on this */
2489 memory_region_transaction_begin();
2490 as->root = NULL;
2491 memory_region_transaction_commit();
2492 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
6e48e8f9 2493 address_space_unregister(as);
374f2981
PB		 2494
2495 /* At this point, as->dispatch and as->current_map are dummy
2496 * entries that the guest should never use. Wait for the old
2497 * values to expire before freeing the data.
2498 */
ac95190e 2499 as->root = root;
374f2981
PB		 2500 call_rcu(as, do_address_space_destroy, rcu);
2501}
2502
4e831901
PX		 2503static const char *memory_region_type(MemoryRegion *mr)
2504{
2505 if (memory_region_is_ram_device(mr)) {
2506 return "ramd";
2507 } else if (memory_region_is_romd(mr)) {
2508 return "romd";
2509 } else if (memory_region_is_rom(mr)) {
2510 return "rom";
2511 } else if (memory_region_is_ram(mr)) {
2512 return "ram";
2513 } else {
2514 return "i/o";
2515 }
2516}
2517
314e2987
BS		 2518typedef struct MemoryRegionList MemoryRegionList;
2519
2520struct MemoryRegionList {
2521 const MemoryRegion *mr;
314e2987
BS		 2522 QTAILQ_ENTRY(MemoryRegionList) queue;
2523};
2524
2525typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2526
4e831901
PX		 2527#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2528 int128_sub((size), int128_one())) : 0)
2529#define MTREE_INDENT " "
2530
314e2987
BS		 2531static void mtree_print_mr(fprintf_function mon_printf, void *f,
2532 const MemoryRegion *mr, unsigned int level,
a8170e5e 2533 hwaddr base,
9479c57a 2534 MemoryRegionListHead *alias_print_queue)
314e2987 2535{
9479c57a
JK		 2536 MemoryRegionList *new_ml, *ml, *next_ml;
2537 MemoryRegionListHead submr_print_queue;
314e2987
BS		 2538 const MemoryRegion *submr;
2539 unsigned int i;
b31f8412 2540 hwaddr cur_start, cur_end;
314e2987 2541
f8a9f720 2542 if (!mr) {
314e2987
BS		 2543 return;
2544 }
2545
2546 for (i = 0; i < level; i++) {
4e831901 2547 mon_printf(f, MTREE_INDENT);
314e2987
BS		 2548 }
2549
b31f8412
PX		 2550 cur_start = base + mr->addr;
2551 cur_end = cur_start + MR_SIZE(mr->size);
2552
2553 /*
2554 * Try to detect overflow of memory region. This should never
2555 * happen normally. When it happens, we dump something to warn the
2556 * user who is observing this.
2557 */
2558 if (cur_start < base || cur_end < cur_start) {
2559 mon_printf(f, "[DETECTED OVERFLOW!] ");
2560 }
2561
314e2987
BS		 2562 if (mr->alias) {
2563 MemoryRegionList *ml;
2564 bool found = false;
2565
2566 /* check if the alias is already in the queue */
9479c57a 2567 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
f54bb15f 2568 if (ml->mr == mr->alias) {
314e2987
BS		 2569 found = true;
2570 }
2571 }
2572
2573 if (!found) {
2574 ml = g_new(MemoryRegionList, 1);
2575 ml->mr = mr->alias;
9479c57a 2576 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 2577 }
4896d74b 2578 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
4e831901 2579 " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
f8a9f720 2580 "-" TARGET_FMT_plx "%s\n",
b31f8412 2581 cur_start, cur_end,
4b474ba7 2582 mr->priority,
4e831901 2583 memory_region_type((MemoryRegion *)mr),
3fb18b4d
PC		 2584 memory_region_name(mr),
2585 memory_region_name(mr->alias),
314e2987 2586 mr->alias_offset,
4e831901 2587 mr->alias_offset + MR_SIZE(mr->size),
f8a9f720 2588 mr->enabled ? "" : " [disabled]");
314e2987 2589 } else {
4896d74b 2590 mon_printf(f,
4e831901 2591 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
b31f8412 2592 cur_start, cur_end,
4b474ba7 2593 mr->priority,
4e831901 2594 memory_region_type((MemoryRegion *)mr),
f8a9f720
GH		 2595 memory_region_name(mr),
2596 mr->enabled ? "" : " [disabled]");
314e2987 2597 }
9479c57a
JK		 2598
2599 QTAILQ_INIT(&submr_print_queue);
2600
314e2987 2601 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK		 2602 new_ml = g_new(MemoryRegionList, 1);
2603 new_ml->mr = submr;
2604 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2605 if (new_ml->mr->addr < ml->mr->addr ||
2606 (new_ml->mr->addr == ml->mr->addr &&
2607 new_ml->mr->priority > ml->mr->priority)) {
2608 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2609 new_ml = NULL;
2610 break;
2611 }
2612 }
2613 if (new_ml) {
2614 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2615 }
2616 }
2617
2618 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
b31f8412 2619 mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
9479c57a
JK		 2620 alias_print_queue);
2621 }
2622
88365e47 2623 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 2624 g_free(ml);
314e2987
BS		 2625 }
2626}
2627
57bb40c9
PX		 2628static void mtree_print_flatview(fprintf_function p, void *f,
2629 AddressSpace *as)
2630{
2631 FlatView *view = address_space_get_flatview(as);
2632 FlatRange *range = &view->ranges[0];
2633 MemoryRegion *mr;
2634 int n = view->nr;
2635
2636 if (n <= 0) {
2637 p(f, MTREE_INDENT "No rendered FlatView for "
2638 "address space '%s'\n", as->name);
2639 flatview_unref(view);
2640 return;
2641 }
2642
2643 while (n--) {
2644 mr = range->mr;
377a07aa
PB		 2645 if (range->offset_in_region) {
2646 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2647 TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
2648 int128_get64(range->addr.start),
2649 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2650 mr->priority,
2651 range->readonly ? "rom" : memory_region_type(mr),
2652 memory_region_name(mr),
2653 range->offset_in_region);
2654 } else {
2655 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2656 TARGET_FMT_plx " (prio %d, %s): %s\n",
2657 int128_get64(range->addr.start),
2658 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2659 mr->priority,
2660 range->readonly ? "rom" : memory_region_type(mr),
2661 memory_region_name(mr));
2662 }
57bb40c9
PX		 2663 range++;
2664 }
2665
2666 flatview_unref(view);
2667}
2668
2669void mtree_info(fprintf_function mon_printf, void *f, bool flatview)
314e2987
BS		 2670{
2671 MemoryRegionListHead ml_head;
2672 MemoryRegionList *ml, *ml2;
0d673e36 2673 AddressSpace *as;
314e2987 2674
57bb40c9
PX		 2675 if (flatview) {
2676 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2677 mon_printf(f, "address-space (flat view): %s\n", as->name);
2678 mtree_print_flatview(mon_printf, f, as);
2679 mon_printf(f, "\n");
2680 }
2681 return;
2682 }
2683
314e2987
BS		 2684 QTAILQ_INIT(&ml_head);
2685
0d673e36 2686 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
e48816aa
GH		 2687 mon_printf(f, "address-space: %s\n", as->name);
2688 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2689 mon_printf(f, "\n");
b9f9be88
BS		 2690 }
2691
314e2987
BS		 2692 /* print aliased regions */
2693 QTAILQ_FOREACH(ml, &ml_head, queue) {
e48816aa
GH		 2694 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2695 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2696 mon_printf(f, "\n");
314e2987
BS		 2697 }
2698
2699 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 2700 g_free(ml);
314e2987 2701 }
314e2987 2702}
b4fefef9
PC		 2703
2704static const TypeInfo memory_region_info = {
2705 .parent = TYPE_OBJECT,
2706 .name = TYPE_MEMORY_REGION,
2707 .instance_size = sizeof(MemoryRegion),
2708 .instance_init = memory_region_initfn,
2709 .instance_finalize = memory_region_finalize,
2710};
2711
2712static void memory_register_types(void)
2713{
2714 type_register_static(&memory_region_info);
2715}
2716
2717type_init(memory_register_types)
Empty description
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