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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <[email protected]> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
d38ea87a | 16 | #include "qemu/osdep.h" |
da34e65c | 17 | #include "qapi/error.h" |
33c11879 PB |
18 | #include "qemu-common.h" |
19 | #include "cpu.h" | |
022c62cb PB |
20 | #include "exec/memory.h" |
21 | #include "exec/address-spaces.h" | |
22 | #include "exec/ioport.h" | |
409ddd01 | 23 | #include "qapi/visitor.h" |
1de7afc9 | 24 | #include "qemu/bitops.h" |
8c56c1a5 | 25 | #include "qemu/error-report.h" |
2c9b15ca | 26 | #include "qom/object.h" |
55d5d048 | 27 | #include "trace.h" |
093bc2cd | 28 | |
022c62cb | 29 | #include "exec/memory-internal.h" |
220c3ebd | 30 | #include "exec/ram_addr.h" |
8c56c1a5 | 31 | #include "sysemu/kvm.h" |
e1c57ab8 | 32 | #include "sysemu/sysemu.h" |
67d95c15 | 33 | |
d197063f PB |
34 | //#define DEBUG_UNASSIGNED |
35 | ||
ec05ec26 PB |
36 | #define RAM_ADDR_INVALID (~(ram_addr_t)0) |
37 | ||
22bde714 JK |
38 | static unsigned memory_region_transaction_depth; |
39 | static bool memory_region_update_pending; | |
4dc56152 | 40 | static bool ioeventfd_update_pending; |
7664e80c AK |
41 | static bool global_dirty_log = false; |
42 | ||
72e22d2f AK |
43 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
44 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 45 | |
0d673e36 AK |
46 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
47 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
48 | ||
093bc2cd AK |
49 | typedef struct AddrRange AddrRange; |
50 | ||
8417cebf | 51 | /* |
c9cdaa3a | 52 | * Note that signed integers are needed for negative offsetting in aliases |
8417cebf AK |
53 | * (large MemoryRegion::alias_offset). |
54 | */ | |
093bc2cd | 55 | struct AddrRange { |
08dafab4 AK |
56 | Int128 start; |
57 | Int128 size; | |
093bc2cd AK |
58 | }; |
59 | ||
08dafab4 | 60 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
61 | { |
62 | return (AddrRange) { start, size }; | |
63 | } | |
64 | ||
65 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
66 | { | |
08dafab4 | 67 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
68 | } |
69 | ||
08dafab4 | 70 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 71 | { |
08dafab4 | 72 | return int128_add(r.start, r.size); |
093bc2cd AK |
73 | } |
74 | ||
08dafab4 | 75 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 76 | { |
08dafab4 | 77 | int128_addto(&range.start, delta); |
093bc2cd AK |
78 | return range; |
79 | } | |
80 | ||
08dafab4 AK |
81 | static bool addrrange_contains(AddrRange range, Int128 addr) |
82 | { | |
83 | return int128_ge(addr, range.start) | |
84 | && int128_lt(addr, addrrange_end(range)); | |
85 | } | |
86 | ||
093bc2cd AK |
87 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
88 | { | |
08dafab4 AK |
89 | return addrrange_contains(r1, r2.start) |
90 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
91 | } |
92 | ||
93 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
94 | { | |
08dafab4 AK |
95 | Int128 start = int128_max(r1.start, r2.start); |
96 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
97 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
98 | } |
99 | ||
0e0d36b4 AK |
100 | enum ListenerDirection { Forward, Reverse }; |
101 | ||
7376e582 AK |
102 | static bool memory_listener_match(MemoryListener *listener, |
103 | MemoryRegionSection *section) | |
104 | { | |
105 | return !listener->address_space_filter | |
106 | || listener->address_space_filter == section->address_space; | |
107 | } | |
108 | ||
109 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
0e0d36b4 AK |
110 | do { \ |
111 | MemoryListener *_listener; \ | |
112 | \ | |
113 | switch (_direction) { \ | |
114 | case Forward: \ | |
115 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
116 | if (_listener->_callback) { \ |
117 | _listener->_callback(_listener, ##_args); \ | |
118 | } \ | |
0e0d36b4 AK |
119 | } \ |
120 | break; \ | |
121 | case Reverse: \ | |
122 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
123 | memory_listeners, link) { \ | |
975aefe0 AK |
124 | if (_listener->_callback) { \ |
125 | _listener->_callback(_listener, ##_args); \ | |
126 | } \ | |
0e0d36b4 AK |
127 | } \ |
128 | break; \ | |
129 | default: \ | |
130 | abort(); \ | |
131 | } \ | |
132 | } while (0) | |
133 | ||
7376e582 AK |
134 | #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \ |
135 | do { \ | |
136 | MemoryListener *_listener; \ | |
137 | \ | |
138 | switch (_direction) { \ | |
139 | case Forward: \ | |
140 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
141 | if (_listener->_callback \ |
142 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
143 | _listener->_callback(_listener, _section, ##_args); \ |
144 | } \ | |
145 | } \ | |
146 | break; \ | |
147 | case Reverse: \ | |
148 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
149 | memory_listeners, link) { \ | |
975aefe0 AK |
150 | if (_listener->_callback \ |
151 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
152 | _listener->_callback(_listener, _section, ##_args); \ |
153 | } \ | |
154 | } \ | |
155 | break; \ | |
156 | default: \ | |
157 | abort(); \ | |
158 | } \ | |
159 | } while (0) | |
160 | ||
dfde4e6e | 161 | /* No need to ref/unref .mr, the FlatRange keeps it alive. */ |
b2dfd71c | 162 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \ |
7376e582 | 163 | MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
0e0d36b4 | 164 | .mr = (fr)->mr, \ |
f6790af6 | 165 | .address_space = (as), \ |
0e0d36b4 | 166 | .offset_within_region = (fr)->offset_in_region, \ |
052e87b0 | 167 | .size = (fr)->addr.size, \ |
0e0d36b4 | 168 | .offset_within_address_space = int128_get64((fr)->addr.start), \ |
7a8499e8 | 169 | .readonly = (fr)->readonly, \ |
b2dfd71c | 170 | }), ##_args) |
0e0d36b4 | 171 | |
093bc2cd AK |
172 | struct CoalescedMemoryRange { |
173 | AddrRange addr; | |
174 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
175 | }; | |
176 | ||
3e9d69e7 AK |
177 | struct MemoryRegionIoeventfd { |
178 | AddrRange addr; | |
179 | bool match_data; | |
180 | uint64_t data; | |
753d5e14 | 181 | EventNotifier *e; |
3e9d69e7 AK |
182 | }; |
183 | ||
184 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
185 | MemoryRegionIoeventfd b) | |
186 | { | |
08dafab4 | 187 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 188 | return true; |
08dafab4 | 189 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 190 | return false; |
08dafab4 | 191 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 192 | return true; |
08dafab4 | 193 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
194 | return false; |
195 | } else if (a.match_data < b.match_data) { | |
196 | return true; | |
197 | } else if (a.match_data > b.match_data) { | |
198 | return false; | |
199 | } else if (a.match_data) { | |
200 | if (a.data < b.data) { | |
201 | return true; | |
202 | } else if (a.data > b.data) { | |
203 | return false; | |
204 | } | |
205 | } | |
753d5e14 | 206 | if (a.e < b.e) { |
3e9d69e7 | 207 | return true; |
753d5e14 | 208 | } else if (a.e > b.e) { |
3e9d69e7 AK |
209 | return false; |
210 | } | |
211 | return false; | |
212 | } | |
213 | ||
214 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
215 | MemoryRegionIoeventfd b) | |
216 | { | |
217 | return !memory_region_ioeventfd_before(a, b) | |
218 | && !memory_region_ioeventfd_before(b, a); | |
219 | } | |
220 | ||
093bc2cd AK |
221 | typedef struct FlatRange FlatRange; |
222 | typedef struct FlatView FlatView; | |
223 | ||
224 | /* Range of memory in the global map. Addresses are absolute. */ | |
225 | struct FlatRange { | |
226 | MemoryRegion *mr; | |
a8170e5e | 227 | hwaddr offset_in_region; |
093bc2cd | 228 | AddrRange addr; |
5a583347 | 229 | uint8_t dirty_log_mask; |
5f9a5ea1 | 230 | bool romd_mode; |
fb1cd6f9 | 231 | bool readonly; |
093bc2cd AK |
232 | }; |
233 | ||
234 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
235 | * order. | |
236 | */ | |
237 | struct FlatView { | |
374f2981 | 238 | struct rcu_head rcu; |
856d7245 | 239 | unsigned ref; |
093bc2cd AK |
240 | FlatRange *ranges; |
241 | unsigned nr; | |
242 | unsigned nr_allocated; | |
243 | }; | |
244 | ||
cc31e6e7 AK |
245 | typedef struct AddressSpaceOps AddressSpaceOps; |
246 | ||
093bc2cd AK |
247 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
248 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
249 | ||
093bc2cd AK |
250 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
251 | { | |
252 | return a->mr == b->mr | |
253 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 254 | && a->offset_in_region == b->offset_in_region |
5f9a5ea1 | 255 | && a->romd_mode == b->romd_mode |
fb1cd6f9 | 256 | && a->readonly == b->readonly; |
093bc2cd AK |
257 | } |
258 | ||
259 | static void flatview_init(FlatView *view) | |
260 | { | |
856d7245 | 261 | view->ref = 1; |
093bc2cd AK |
262 | view->ranges = NULL; |
263 | view->nr = 0; | |
264 | view->nr_allocated = 0; | |
265 | } | |
266 | ||
267 | /* Insert a range into a given position. Caller is responsible for maintaining | |
268 | * sorting order. | |
269 | */ | |
270 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
271 | { | |
272 | if (view->nr == view->nr_allocated) { | |
273 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 274 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
275 | view->nr_allocated * sizeof(*view->ranges)); |
276 | } | |
277 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
278 | (view->nr - pos) * sizeof(FlatRange)); | |
279 | view->ranges[pos] = *range; | |
dfde4e6e | 280 | memory_region_ref(range->mr); |
093bc2cd AK |
281 | ++view->nr; |
282 | } | |
283 | ||
284 | static void flatview_destroy(FlatView *view) | |
285 | { | |
dfde4e6e PB |
286 | int i; |
287 | ||
288 | for (i = 0; i < view->nr; i++) { | |
289 | memory_region_unref(view->ranges[i].mr); | |
290 | } | |
7267c094 | 291 | g_free(view->ranges); |
a9a0c06d | 292 | g_free(view); |
093bc2cd AK |
293 | } |
294 | ||
856d7245 PB |
295 | static void flatview_ref(FlatView *view) |
296 | { | |
297 | atomic_inc(&view->ref); | |
298 | } | |
299 | ||
300 | static void flatview_unref(FlatView *view) | |
301 | { | |
302 | if (atomic_fetch_dec(&view->ref) == 1) { | |
303 | flatview_destroy(view); | |
304 | } | |
305 | } | |
306 | ||
3d8e6bf9 AK |
307 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
308 | { | |
08dafab4 | 309 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 310 | && r1->mr == r2->mr |
08dafab4 AK |
311 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
312 | r1->addr.size), | |
313 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 314 | && r1->dirty_log_mask == r2->dirty_log_mask |
5f9a5ea1 | 315 | && r1->romd_mode == r2->romd_mode |
fb1cd6f9 | 316 | && r1->readonly == r2->readonly; |
3d8e6bf9 AK |
317 | } |
318 | ||
8508e024 | 319 | /* Attempt to simplify a view by merging adjacent ranges */ |
3d8e6bf9 AK |
320 | static void flatview_simplify(FlatView *view) |
321 | { | |
322 | unsigned i, j; | |
323 | ||
324 | i = 0; | |
325 | while (i < view->nr) { | |
326 | j = i + 1; | |
327 | while (j < view->nr | |
328 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 329 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
330 | ++j; |
331 | } | |
332 | ++i; | |
333 | memmove(&view->ranges[i], &view->ranges[j], | |
334 | (view->nr - j) * sizeof(view->ranges[j])); | |
335 | view->nr -= j - i; | |
336 | } | |
337 | } | |
338 | ||
e7342aa3 PB |
339 | static bool memory_region_big_endian(MemoryRegion *mr) |
340 | { | |
341 | #ifdef TARGET_WORDS_BIGENDIAN | |
342 | return mr->ops->endianness != DEVICE_LITTLE_ENDIAN; | |
343 | #else | |
344 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
345 | #endif | |
346 | } | |
347 | ||
e11ef3d1 PB |
348 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
349 | { | |
350 | #ifdef TARGET_WORDS_BIGENDIAN | |
351 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; | |
352 | #else | |
353 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
354 | #endif | |
355 | } | |
356 | ||
357 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) | |
358 | { | |
359 | if (memory_region_wrong_endianness(mr)) { | |
360 | switch (size) { | |
361 | case 1: | |
362 | break; | |
363 | case 2: | |
364 | *data = bswap16(*data); | |
365 | break; | |
366 | case 4: | |
367 | *data = bswap32(*data); | |
368 | break; | |
369 | case 8: | |
370 | *data = bswap64(*data); | |
371 | break; | |
372 | default: | |
373 | abort(); | |
374 | } | |
375 | } | |
376 | } | |
377 | ||
4779dc1d HB |
378 | static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset) |
379 | { | |
380 | MemoryRegion *root; | |
381 | hwaddr abs_addr = offset; | |
382 | ||
383 | abs_addr += mr->addr; | |
384 | for (root = mr; root->container; ) { | |
385 | root = root->container; | |
386 | abs_addr += root->addr; | |
387 | } | |
388 | ||
389 | return abs_addr; | |
390 | } | |
391 | ||
5a68be94 HB |
392 | static int get_cpu_index(void) |
393 | { | |
394 | if (current_cpu) { | |
395 | return current_cpu->cpu_index; | |
396 | } | |
397 | return -1; | |
398 | } | |
399 | ||
cc05c43a PM |
400 | static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr, |
401 | hwaddr addr, | |
402 | uint64_t *value, | |
403 | unsigned size, | |
404 | unsigned shift, | |
405 | uint64_t mask, | |
406 | MemTxAttrs attrs) | |
407 | { | |
408 | uint64_t tmp; | |
409 | ||
410 | tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); | |
23d92d68 | 411 | if (mr->subpage) { |
5a68be94 | 412 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
413 | } else if (mr == &io_mem_notdirty) { |
414 | /* Accesses to code which has previously been translated into a TB show | |
415 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
416 | * MemoryRegion. */ | |
417 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
418 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
419 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 420 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 421 | } |
cc05c43a PM |
422 | *value |= (tmp & mask) << shift; |
423 | return MEMTX_OK; | |
424 | } | |
425 | ||
426 | static MemTxResult memory_region_read_accessor(MemoryRegion *mr, | |
ce5d2f33 PB |
427 | hwaddr addr, |
428 | uint64_t *value, | |
429 | unsigned size, | |
430 | unsigned shift, | |
cc05c43a PM |
431 | uint64_t mask, |
432 | MemTxAttrs attrs) | |
ce5d2f33 | 433 | { |
ce5d2f33 PB |
434 | uint64_t tmp; |
435 | ||
cc05c43a | 436 | tmp = mr->ops->read(mr->opaque, addr, size); |
23d92d68 | 437 | if (mr->subpage) { |
5a68be94 | 438 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
439 | } else if (mr == &io_mem_notdirty) { |
440 | /* Accesses to code which has previously been translated into a TB show | |
441 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
442 | * MemoryRegion. */ | |
443 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
444 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
445 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 446 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 447 | } |
ce5d2f33 | 448 | *value |= (tmp & mask) << shift; |
cc05c43a | 449 | return MEMTX_OK; |
ce5d2f33 PB |
450 | } |
451 | ||
cc05c43a PM |
452 | static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr, |
453 | hwaddr addr, | |
454 | uint64_t *value, | |
455 | unsigned size, | |
456 | unsigned shift, | |
457 | uint64_t mask, | |
458 | MemTxAttrs attrs) | |
164a4dcd | 459 | { |
cc05c43a PM |
460 | uint64_t tmp = 0; |
461 | MemTxResult r; | |
164a4dcd | 462 | |
cc05c43a | 463 | r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs); |
23d92d68 | 464 | if (mr->subpage) { |
5a68be94 | 465 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
466 | } else if (mr == &io_mem_notdirty) { |
467 | /* Accesses to code which has previously been translated into a TB show | |
468 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
469 | * MemoryRegion. */ | |
470 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
471 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
472 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 473 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 474 | } |
164a4dcd | 475 | *value |= (tmp & mask) << shift; |
cc05c43a | 476 | return r; |
164a4dcd AK |
477 | } |
478 | ||
cc05c43a PM |
479 | static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr, |
480 | hwaddr addr, | |
481 | uint64_t *value, | |
482 | unsigned size, | |
483 | unsigned shift, | |
484 | uint64_t mask, | |
485 | MemTxAttrs attrs) | |
ce5d2f33 | 486 | { |
ce5d2f33 PB |
487 | uint64_t tmp; |
488 | ||
489 | tmp = (*value >> shift) & mask; | |
23d92d68 | 490 | if (mr->subpage) { |
5a68be94 | 491 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
492 | } else if (mr == &io_mem_notdirty) { |
493 | /* Accesses to code which has previously been translated into a TB show | |
494 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
495 | * MemoryRegion. */ | |
496 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
497 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
498 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 499 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 500 | } |
ce5d2f33 | 501 | mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); |
cc05c43a | 502 | return MEMTX_OK; |
ce5d2f33 PB |
503 | } |
504 | ||
cc05c43a PM |
505 | static MemTxResult memory_region_write_accessor(MemoryRegion *mr, |
506 | hwaddr addr, | |
507 | uint64_t *value, | |
508 | unsigned size, | |
509 | unsigned shift, | |
510 | uint64_t mask, | |
511 | MemTxAttrs attrs) | |
164a4dcd | 512 | { |
164a4dcd AK |
513 | uint64_t tmp; |
514 | ||
515 | tmp = (*value >> shift) & mask; | |
23d92d68 | 516 | if (mr->subpage) { |
5a68be94 | 517 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
518 | } else if (mr == &io_mem_notdirty) { |
519 | /* Accesses to code which has previously been translated into a TB show | |
520 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
521 | * MemoryRegion. */ | |
522 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
523 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
524 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 525 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 526 | } |
164a4dcd | 527 | mr->ops->write(mr->opaque, addr, tmp, size); |
cc05c43a | 528 | return MEMTX_OK; |
164a4dcd AK |
529 | } |
530 | ||
cc05c43a PM |
531 | static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr, |
532 | hwaddr addr, | |
533 | uint64_t *value, | |
534 | unsigned size, | |
535 | unsigned shift, | |
536 | uint64_t mask, | |
537 | MemTxAttrs attrs) | |
538 | { | |
539 | uint64_t tmp; | |
540 | ||
cc05c43a | 541 | tmp = (*value >> shift) & mask; |
23d92d68 | 542 | if (mr->subpage) { |
5a68be94 | 543 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
544 | } else if (mr == &io_mem_notdirty) { |
545 | /* Accesses to code which has previously been translated into a TB show | |
546 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
547 | * MemoryRegion. */ | |
548 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
549 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
550 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 551 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 552 | } |
cc05c43a PM |
553 | return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs); |
554 | } | |
555 | ||
556 | static MemTxResult access_with_adjusted_size(hwaddr addr, | |
164a4dcd AK |
557 | uint64_t *value, |
558 | unsigned size, | |
559 | unsigned access_size_min, | |
560 | unsigned access_size_max, | |
cc05c43a PM |
561 | MemTxResult (*access)(MemoryRegion *mr, |
562 | hwaddr addr, | |
563 | uint64_t *value, | |
564 | unsigned size, | |
565 | unsigned shift, | |
566 | uint64_t mask, | |
567 | MemTxAttrs attrs), | |
568 | MemoryRegion *mr, | |
569 | MemTxAttrs attrs) | |
164a4dcd AK |
570 | { |
571 | uint64_t access_mask; | |
572 | unsigned access_size; | |
573 | unsigned i; | |
cc05c43a | 574 | MemTxResult r = MEMTX_OK; |
164a4dcd AK |
575 | |
576 | if (!access_size_min) { | |
577 | access_size_min = 1; | |
578 | } | |
579 | if (!access_size_max) { | |
580 | access_size_max = 4; | |
581 | } | |
ce5d2f33 PB |
582 | |
583 | /* FIXME: support unaligned access? */ | |
164a4dcd AK |
584 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
585 | access_mask = -1ULL >> (64 - access_size * 8); | |
e7342aa3 PB |
586 | if (memory_region_big_endian(mr)) { |
587 | for (i = 0; i < size; i += access_size) { | |
cc05c43a PM |
588 | r |= access(mr, addr + i, value, access_size, |
589 | (size - access_size - i) * 8, access_mask, attrs); | |
e7342aa3 PB |
590 | } |
591 | } else { | |
592 | for (i = 0; i < size; i += access_size) { | |
cc05c43a PM |
593 | r |= access(mr, addr + i, value, access_size, i * 8, |
594 | access_mask, attrs); | |
e7342aa3 | 595 | } |
164a4dcd | 596 | } |
cc05c43a | 597 | return r; |
164a4dcd AK |
598 | } |
599 | ||
e2177955 AK |
600 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
601 | { | |
0d673e36 AK |
602 | AddressSpace *as; |
603 | ||
feca4ac1 PB |
604 | while (mr->container) { |
605 | mr = mr->container; | |
e2177955 | 606 | } |
0d673e36 AK |
607 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
608 | if (mr == as->root) { | |
609 | return as; | |
610 | } | |
e2177955 | 611 | } |
eed2bacf | 612 | return NULL; |
e2177955 AK |
613 | } |
614 | ||
093bc2cd AK |
615 | /* Render a memory region into the global view. Ranges in @view obscure |
616 | * ranges in @mr. | |
617 | */ | |
618 | static void render_memory_region(FlatView *view, | |
619 | MemoryRegion *mr, | |
08dafab4 | 620 | Int128 base, |
fb1cd6f9 AK |
621 | AddrRange clip, |
622 | bool readonly) | |
093bc2cd AK |
623 | { |
624 | MemoryRegion *subregion; | |
625 | unsigned i; | |
a8170e5e | 626 | hwaddr offset_in_region; |
08dafab4 AK |
627 | Int128 remain; |
628 | Int128 now; | |
093bc2cd AK |
629 | FlatRange fr; |
630 | AddrRange tmp; | |
631 | ||
6bba19ba AK |
632 | if (!mr->enabled) { |
633 | return; | |
634 | } | |
635 | ||
08dafab4 | 636 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 637 | readonly |= mr->readonly; |
093bc2cd AK |
638 | |
639 | tmp = addrrange_make(base, mr->size); | |
640 | ||
641 | if (!addrrange_intersects(tmp, clip)) { | |
642 | return; | |
643 | } | |
644 | ||
645 | clip = addrrange_intersection(tmp, clip); | |
646 | ||
647 | if (mr->alias) { | |
08dafab4 AK |
648 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
649 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 650 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
651 | return; |
652 | } | |
653 | ||
654 | /* Render subregions in priority order. */ | |
655 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 656 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
657 | } |
658 | ||
14a3c10a | 659 | if (!mr->terminates) { |
093bc2cd AK |
660 | return; |
661 | } | |
662 | ||
08dafab4 | 663 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
664 | base = clip.start; |
665 | remain = clip.size; | |
666 | ||
2eb74e1a | 667 | fr.mr = mr; |
6f6a5ef3 | 668 | fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr); |
2eb74e1a PC |
669 | fr.romd_mode = mr->romd_mode; |
670 | fr.readonly = readonly; | |
671 | ||
093bc2cd | 672 | /* Render the region itself into any gaps left by the current view. */ |
08dafab4 AK |
673 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
674 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
675 | continue; |
676 | } | |
08dafab4 AK |
677 | if (int128_lt(base, view->ranges[i].addr.start)) { |
678 | now = int128_min(remain, | |
679 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
680 | fr.offset_in_region = offset_in_region; |
681 | fr.addr = addrrange_make(base, now); | |
682 | flatview_insert(view, i, &fr); | |
683 | ++i; | |
08dafab4 AK |
684 | int128_addto(&base, now); |
685 | offset_in_region += int128_get64(now); | |
686 | int128_subfrom(&remain, now); | |
093bc2cd | 687 | } |
d26a8cae AK |
688 | now = int128_sub(int128_min(int128_add(base, remain), |
689 | addrrange_end(view->ranges[i].addr)), | |
690 | base); | |
691 | int128_addto(&base, now); | |
692 | offset_in_region += int128_get64(now); | |
693 | int128_subfrom(&remain, now); | |
093bc2cd | 694 | } |
08dafab4 | 695 | if (int128_nz(remain)) { |
093bc2cd AK |
696 | fr.offset_in_region = offset_in_region; |
697 | fr.addr = addrrange_make(base, remain); | |
698 | flatview_insert(view, i, &fr); | |
699 | } | |
700 | } | |
701 | ||
702 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
a9a0c06d | 703 | static FlatView *generate_memory_topology(MemoryRegion *mr) |
093bc2cd | 704 | { |
a9a0c06d | 705 | FlatView *view; |
093bc2cd | 706 | |
a9a0c06d PB |
707 | view = g_new(FlatView, 1); |
708 | flatview_init(view); | |
093bc2cd | 709 | |
83f3c251 | 710 | if (mr) { |
a9a0c06d | 711 | render_memory_region(view, mr, int128_zero(), |
83f3c251 AK |
712 | addrrange_make(int128_zero(), int128_2_64()), false); |
713 | } | |
a9a0c06d | 714 | flatview_simplify(view); |
093bc2cd AK |
715 | |
716 | return view; | |
717 | } | |
718 | ||
3e9d69e7 AK |
719 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
720 | MemoryRegionIoeventfd *fds_new, | |
721 | unsigned fds_new_nb, | |
722 | MemoryRegionIoeventfd *fds_old, | |
723 | unsigned fds_old_nb) | |
724 | { | |
725 | unsigned iold, inew; | |
80a1ea37 AK |
726 | MemoryRegionIoeventfd *fd; |
727 | MemoryRegionSection section; | |
3e9d69e7 AK |
728 | |
729 | /* Generate a symmetric difference of the old and new fd sets, adding | |
730 | * and deleting as necessary. | |
731 | */ | |
732 | ||
733 | iold = inew = 0; | |
734 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
735 | if (iold < fds_old_nb | |
736 | && (inew == fds_new_nb | |
737 | || memory_region_ioeventfd_before(fds_old[iold], | |
738 | fds_new[inew]))) { | |
80a1ea37 AK |
739 | fd = &fds_old[iold]; |
740 | section = (MemoryRegionSection) { | |
f6790af6 | 741 | .address_space = as, |
80a1ea37 | 742 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 743 | .size = fd->addr.size, |
80a1ea37 AK |
744 | }; |
745 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
753d5e14 | 746 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
747 | ++iold; |
748 | } else if (inew < fds_new_nb | |
749 | && (iold == fds_old_nb | |
750 | || memory_region_ioeventfd_before(fds_new[inew], | |
751 | fds_old[iold]))) { | |
80a1ea37 AK |
752 | fd = &fds_new[inew]; |
753 | section = (MemoryRegionSection) { | |
f6790af6 | 754 | .address_space = as, |
80a1ea37 | 755 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 756 | .size = fd->addr.size, |
80a1ea37 AK |
757 | }; |
758 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
753d5e14 | 759 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
760 | ++inew; |
761 | } else { | |
762 | ++iold; | |
763 | ++inew; | |
764 | } | |
765 | } | |
766 | } | |
767 | ||
856d7245 PB |
768 | static FlatView *address_space_get_flatview(AddressSpace *as) |
769 | { | |
770 | FlatView *view; | |
771 | ||
374f2981 PB |
772 | rcu_read_lock(); |
773 | view = atomic_rcu_read(&as->current_map); | |
856d7245 | 774 | flatview_ref(view); |
374f2981 | 775 | rcu_read_unlock(); |
856d7245 PB |
776 | return view; |
777 | } | |
778 | ||
3e9d69e7 AK |
779 | static void address_space_update_ioeventfds(AddressSpace *as) |
780 | { | |
99e86347 | 781 | FlatView *view; |
3e9d69e7 AK |
782 | FlatRange *fr; |
783 | unsigned ioeventfd_nb = 0; | |
784 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
785 | AddrRange tmp; | |
786 | unsigned i; | |
787 | ||
856d7245 | 788 | view = address_space_get_flatview(as); |
99e86347 | 789 | FOR_EACH_FLAT_RANGE(fr, view) { |
3e9d69e7 AK |
790 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
791 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
792 | int128_sub(fr->addr.start, |
793 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
794 | if (addrrange_intersects(fr->addr, tmp)) { |
795 | ++ioeventfd_nb; | |
7267c094 | 796 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
797 | ioeventfd_nb * sizeof(*ioeventfds)); |
798 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
799 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
800 | } | |
801 | } | |
802 | } | |
803 | ||
804 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
805 | as->ioeventfds, as->ioeventfd_nb); | |
806 | ||
7267c094 | 807 | g_free(as->ioeventfds); |
3e9d69e7 AK |
808 | as->ioeventfds = ioeventfds; |
809 | as->ioeventfd_nb = ioeventfd_nb; | |
856d7245 | 810 | flatview_unref(view); |
3e9d69e7 AK |
811 | } |
812 | ||
b8af1afb | 813 | static void address_space_update_topology_pass(AddressSpace *as, |
a9a0c06d PB |
814 | const FlatView *old_view, |
815 | const FlatView *new_view, | |
b8af1afb | 816 | bool adding) |
093bc2cd | 817 | { |
093bc2cd AK |
818 | unsigned iold, inew; |
819 | FlatRange *frold, *frnew; | |
093bc2cd AK |
820 | |
821 | /* Generate a symmetric difference of the old and new memory maps. | |
822 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
823 | */ | |
824 | iold = inew = 0; | |
a9a0c06d PB |
825 | while (iold < old_view->nr || inew < new_view->nr) { |
826 | if (iold < old_view->nr) { | |
827 | frold = &old_view->ranges[iold]; | |
093bc2cd AK |
828 | } else { |
829 | frold = NULL; | |
830 | } | |
a9a0c06d PB |
831 | if (inew < new_view->nr) { |
832 | frnew = &new_view->ranges[inew]; | |
093bc2cd AK |
833 | } else { |
834 | frnew = NULL; | |
835 | } | |
836 | ||
837 | if (frold | |
838 | && (!frnew | |
08dafab4 AK |
839 | || int128_lt(frold->addr.start, frnew->addr.start) |
840 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd | 841 | && !flatrange_equal(frold, frnew)))) { |
41a6e477 | 842 | /* In old but not in new, or in both but attributes changed. */ |
093bc2cd | 843 | |
b8af1afb | 844 | if (!adding) { |
72e22d2f | 845 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
846 | } |
847 | ||
093bc2cd AK |
848 | ++iold; |
849 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
41a6e477 | 850 | /* In both and unchanged (except logging may have changed) */ |
093bc2cd | 851 | |
b8af1afb | 852 | if (adding) { |
50c1e149 | 853 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b2dfd71c PB |
854 | if (frnew->dirty_log_mask & ~frold->dirty_log_mask) { |
855 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start, | |
856 | frold->dirty_log_mask, | |
857 | frnew->dirty_log_mask); | |
858 | } | |
859 | if (frold->dirty_log_mask & ~frnew->dirty_log_mask) { | |
860 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop, | |
861 | frold->dirty_log_mask, | |
862 | frnew->dirty_log_mask); | |
b8af1afb | 863 | } |
5a583347 AK |
864 | } |
865 | ||
093bc2cd AK |
866 | ++iold; |
867 | ++inew; | |
093bc2cd AK |
868 | } else { |
869 | /* In new */ | |
870 | ||
b8af1afb | 871 | if (adding) { |
72e22d2f | 872 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
873 | } |
874 | ||
093bc2cd AK |
875 | ++inew; |
876 | } | |
877 | } | |
b8af1afb AK |
878 | } |
879 | ||
880 | ||
881 | static void address_space_update_topology(AddressSpace *as) | |
882 | { | |
856d7245 | 883 | FlatView *old_view = address_space_get_flatview(as); |
a9a0c06d | 884 | FlatView *new_view = generate_memory_topology(as->root); |
b8af1afb AK |
885 | |
886 | address_space_update_topology_pass(as, old_view, new_view, false); | |
887 | address_space_update_topology_pass(as, old_view, new_view, true); | |
888 | ||
374f2981 PB |
889 | /* Writes are protected by the BQL. */ |
890 | atomic_rcu_set(&as->current_map, new_view); | |
891 | call_rcu(old_view, flatview_unref, rcu); | |
856d7245 PB |
892 | |
893 | /* Note that all the old MemoryRegions are still alive up to this | |
894 | * point. This relieves most MemoryListeners from the need to | |
895 | * ref/unref the MemoryRegions they get---unless they use them | |
896 | * outside the iothread mutex, in which case precise reference | |
897 | * counting is necessary. | |
898 | */ | |
899 | flatview_unref(old_view); | |
900 | ||
3e9d69e7 | 901 | address_space_update_ioeventfds(as); |
093bc2cd AK |
902 | } |
903 | ||
4ef4db86 AK |
904 | void memory_region_transaction_begin(void) |
905 | { | |
bb880ded | 906 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
907 | ++memory_region_transaction_depth; |
908 | } | |
909 | ||
4dc56152 GA |
910 | static void memory_region_clear_pending(void) |
911 | { | |
912 | memory_region_update_pending = false; | |
913 | ioeventfd_update_pending = false; | |
914 | } | |
915 | ||
4ef4db86 AK |
916 | void memory_region_transaction_commit(void) |
917 | { | |
0d673e36 AK |
918 | AddressSpace *as; |
919 | ||
4ef4db86 AK |
920 | assert(memory_region_transaction_depth); |
921 | --memory_region_transaction_depth; | |
4dc56152 GA |
922 | if (!memory_region_transaction_depth) { |
923 | if (memory_region_update_pending) { | |
924 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); | |
02e2b95f | 925 | |
4dc56152 GA |
926 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
927 | address_space_update_topology(as); | |
928 | } | |
02e2b95f | 929 | |
4dc56152 GA |
930 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); |
931 | } else if (ioeventfd_update_pending) { | |
932 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
933 | address_space_update_ioeventfds(as); | |
934 | } | |
935 | } | |
936 | memory_region_clear_pending(); | |
937 | } | |
4ef4db86 AK |
938 | } |
939 | ||
545e92e0 AK |
940 | static void memory_region_destructor_none(MemoryRegion *mr) |
941 | { | |
942 | } | |
943 | ||
944 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
945 | { | |
f1060c55 | 946 | qemu_ram_free(mr->ram_block); |
545e92e0 AK |
947 | } |
948 | ||
d0a9b5bc AK |
949 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
950 | { | |
f1060c55 | 951 | qemu_ram_free(mr->ram_block); |
d0a9b5bc AK |
952 | } |
953 | ||
b4fefef9 PC |
954 | static bool memory_region_need_escape(char c) |
955 | { | |
956 | return c == '/' || c == '[' || c == '\\' || c == ']'; | |
957 | } | |
958 | ||
959 | static char *memory_region_escape_name(const char *name) | |
960 | { | |
961 | const char *p; | |
962 | char *escaped, *q; | |
963 | uint8_t c; | |
964 | size_t bytes = 0; | |
965 | ||
966 | for (p = name; *p; p++) { | |
967 | bytes += memory_region_need_escape(*p) ? 4 : 1; | |
968 | } | |
969 | if (bytes == p - name) { | |
970 | return g_memdup(name, bytes + 1); | |
971 | } | |
972 | ||
973 | escaped = g_malloc(bytes + 1); | |
974 | for (p = name, q = escaped; *p; p++) { | |
975 | c = *p; | |
976 | if (unlikely(memory_region_need_escape(c))) { | |
977 | *q++ = '\\'; | |
978 | *q++ = 'x'; | |
979 | *q++ = "0123456789abcdef"[c >> 4]; | |
980 | c = "0123456789abcdef"[c & 15]; | |
981 | } | |
982 | *q++ = c; | |
983 | } | |
984 | *q = 0; | |
985 | return escaped; | |
986 | } | |
987 | ||
093bc2cd | 988 | void memory_region_init(MemoryRegion *mr, |
2c9b15ca | 989 | Object *owner, |
093bc2cd AK |
990 | const char *name, |
991 | uint64_t size) | |
992 | { | |
22a893e4 | 993 | object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION); |
08dafab4 AK |
994 | mr->size = int128_make64(size); |
995 | if (size == UINT64_MAX) { | |
996 | mr->size = int128_2_64(); | |
997 | } | |
302fa283 | 998 | mr->name = g_strdup(name); |
612263cf | 999 | mr->owner = owner; |
58eaa217 | 1000 | mr->ram_block = NULL; |
b4fefef9 PC |
1001 | |
1002 | if (name) { | |
843ef73a PC |
1003 | char *escaped_name = memory_region_escape_name(name); |
1004 | char *name_array = g_strdup_printf("%s[*]", escaped_name); | |
612263cf PB |
1005 | |
1006 | if (!owner) { | |
1007 | owner = container_get(qdev_get_machine(), "/unattached"); | |
1008 | } | |
1009 | ||
843ef73a | 1010 | object_property_add_child(owner, name_array, OBJECT(mr), &error_abort); |
b4fefef9 | 1011 | object_unref(OBJECT(mr)); |
843ef73a PC |
1012 | g_free(name_array); |
1013 | g_free(escaped_name); | |
b4fefef9 PC |
1014 | } |
1015 | } | |
1016 | ||
d7bce999 EB |
1017 | static void memory_region_get_addr(Object *obj, Visitor *v, const char *name, |
1018 | void *opaque, Error **errp) | |
409ddd01 PC |
1019 | { |
1020 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1021 | uint64_t value = mr->addr; | |
1022 | ||
51e72bc1 | 1023 | visit_type_uint64(v, name, &value, errp); |
409ddd01 PC |
1024 | } |
1025 | ||
d7bce999 EB |
1026 | static void memory_region_get_container(Object *obj, Visitor *v, |
1027 | const char *name, void *opaque, | |
1028 | Error **errp) | |
409ddd01 PC |
1029 | { |
1030 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1031 | gchar *path = (gchar *)""; | |
1032 | ||
1033 | if (mr->container) { | |
1034 | path = object_get_canonical_path(OBJECT(mr->container)); | |
1035 | } | |
51e72bc1 | 1036 | visit_type_str(v, name, &path, errp); |
409ddd01 PC |
1037 | if (mr->container) { |
1038 | g_free(path); | |
1039 | } | |
1040 | } | |
1041 | ||
1042 | static Object *memory_region_resolve_container(Object *obj, void *opaque, | |
1043 | const char *part) | |
1044 | { | |
1045 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1046 | ||
1047 | return OBJECT(mr->container); | |
1048 | } | |
1049 | ||
d7bce999 EB |
1050 | static void memory_region_get_priority(Object *obj, Visitor *v, |
1051 | const char *name, void *opaque, | |
1052 | Error **errp) | |
d33382da PC |
1053 | { |
1054 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1055 | int32_t value = mr->priority; | |
1056 | ||
51e72bc1 | 1057 | visit_type_int32(v, name, &value, errp); |
d33382da PC |
1058 | } |
1059 | ||
1060 | static bool memory_region_get_may_overlap(Object *obj, Error **errp) | |
1061 | { | |
1062 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1063 | ||
1064 | return mr->may_overlap; | |
1065 | } | |
1066 | ||
d7bce999 EB |
1067 | static void memory_region_get_size(Object *obj, Visitor *v, const char *name, |
1068 | void *opaque, Error **errp) | |
52aef7bb PC |
1069 | { |
1070 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1071 | uint64_t value = memory_region_size(mr); | |
1072 | ||
51e72bc1 | 1073 | visit_type_uint64(v, name, &value, errp); |
52aef7bb PC |
1074 | } |
1075 | ||
b4fefef9 PC |
1076 | static void memory_region_initfn(Object *obj) |
1077 | { | |
1078 | MemoryRegion *mr = MEMORY_REGION(obj); | |
409ddd01 | 1079 | ObjectProperty *op; |
b4fefef9 PC |
1080 | |
1081 | mr->ops = &unassigned_mem_ops; | |
6bba19ba | 1082 | mr->enabled = true; |
5f9a5ea1 | 1083 | mr->romd_mode = true; |
196ea131 | 1084 | mr->global_locking = true; |
545e92e0 | 1085 | mr->destructor = memory_region_destructor_none; |
093bc2cd | 1086 | QTAILQ_INIT(&mr->subregions); |
093bc2cd | 1087 | QTAILQ_INIT(&mr->coalesced); |
409ddd01 PC |
1088 | |
1089 | op = object_property_add(OBJECT(mr), "container", | |
1090 | "link<" TYPE_MEMORY_REGION ">", | |
1091 | memory_region_get_container, | |
1092 | NULL, /* memory_region_set_container */ | |
1093 | NULL, NULL, &error_abort); | |
1094 | op->resolve = memory_region_resolve_container; | |
1095 | ||
1096 | object_property_add(OBJECT(mr), "addr", "uint64", | |
1097 | memory_region_get_addr, | |
1098 | NULL, /* memory_region_set_addr */ | |
1099 | NULL, NULL, &error_abort); | |
d33382da PC |
1100 | object_property_add(OBJECT(mr), "priority", "uint32", |
1101 | memory_region_get_priority, | |
1102 | NULL, /* memory_region_set_priority */ | |
1103 | NULL, NULL, &error_abort); | |
1104 | object_property_add_bool(OBJECT(mr), "may-overlap", | |
1105 | memory_region_get_may_overlap, | |
1106 | NULL, /* memory_region_set_may_overlap */ | |
1107 | &error_abort); | |
52aef7bb PC |
1108 | object_property_add(OBJECT(mr), "size", "uint64", |
1109 | memory_region_get_size, | |
1110 | NULL, /* memory_region_set_size, */ | |
1111 | NULL, NULL, &error_abort); | |
093bc2cd AK |
1112 | } |
1113 | ||
b018ddf6 PB |
1114 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
1115 | unsigned size) | |
1116 | { | |
1117 | #ifdef DEBUG_UNASSIGNED | |
1118 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
1119 | #endif | |
4917cf44 AF |
1120 | if (current_cpu != NULL) { |
1121 | cpu_unassigned_access(current_cpu, addr, false, false, 0, size); | |
c658b94f | 1122 | } |
68a7439a | 1123 | return 0; |
b018ddf6 PB |
1124 | } |
1125 | ||
1126 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
1127 | uint64_t val, unsigned size) | |
1128 | { | |
1129 | #ifdef DEBUG_UNASSIGNED | |
1130 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
1131 | #endif | |
4917cf44 AF |
1132 | if (current_cpu != NULL) { |
1133 | cpu_unassigned_access(current_cpu, addr, true, false, 0, size); | |
c658b94f | 1134 | } |
b018ddf6 PB |
1135 | } |
1136 | ||
d197063f PB |
1137 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
1138 | unsigned size, bool is_write) | |
1139 | { | |
1140 | return false; | |
1141 | } | |
1142 | ||
1143 | const MemoryRegionOps unassigned_mem_ops = { | |
1144 | .valid.accepts = unassigned_mem_accepts, | |
1145 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1146 | }; | |
1147 | ||
d2702032 PB |
1148 | bool memory_region_access_valid(MemoryRegion *mr, |
1149 | hwaddr addr, | |
1150 | unsigned size, | |
1151 | bool is_write) | |
093bc2cd | 1152 | { |
a014ed07 PB |
1153 | int access_size_min, access_size_max; |
1154 | int access_size, i; | |
897fa7cf | 1155 | |
093bc2cd AK |
1156 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
1157 | return false; | |
1158 | } | |
1159 | ||
a014ed07 | 1160 | if (!mr->ops->valid.accepts) { |
093bc2cd AK |
1161 | return true; |
1162 | } | |
1163 | ||
a014ed07 PB |
1164 | access_size_min = mr->ops->valid.min_access_size; |
1165 | if (!mr->ops->valid.min_access_size) { | |
1166 | access_size_min = 1; | |
1167 | } | |
1168 | ||
1169 | access_size_max = mr->ops->valid.max_access_size; | |
1170 | if (!mr->ops->valid.max_access_size) { | |
1171 | access_size_max = 4; | |
1172 | } | |
1173 | ||
1174 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
1175 | for (i = 0; i < size; i += access_size) { | |
1176 | if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, | |
1177 | is_write)) { | |
1178 | return false; | |
1179 | } | |
093bc2cd | 1180 | } |
a014ed07 | 1181 | |
093bc2cd AK |
1182 | return true; |
1183 | } | |
1184 | ||
cc05c43a PM |
1185 | static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr, |
1186 | hwaddr addr, | |
1187 | uint64_t *pval, | |
1188 | unsigned size, | |
1189 | MemTxAttrs attrs) | |
093bc2cd | 1190 | { |
cc05c43a | 1191 | *pval = 0; |
093bc2cd | 1192 | |
ce5d2f33 | 1193 | if (mr->ops->read) { |
cc05c43a PM |
1194 | return access_with_adjusted_size(addr, pval, size, |
1195 | mr->ops->impl.min_access_size, | |
1196 | mr->ops->impl.max_access_size, | |
1197 | memory_region_read_accessor, | |
1198 | mr, attrs); | |
1199 | } else if (mr->ops->read_with_attrs) { | |
1200 | return access_with_adjusted_size(addr, pval, size, | |
1201 | mr->ops->impl.min_access_size, | |
1202 | mr->ops->impl.max_access_size, | |
1203 | memory_region_read_with_attrs_accessor, | |
1204 | mr, attrs); | |
ce5d2f33 | 1205 | } else { |
cc05c43a PM |
1206 | return access_with_adjusted_size(addr, pval, size, 1, 4, |
1207 | memory_region_oldmmio_read_accessor, | |
1208 | mr, attrs); | |
74901c3b | 1209 | } |
093bc2cd AK |
1210 | } |
1211 | ||
3b643495 PM |
1212 | MemTxResult memory_region_dispatch_read(MemoryRegion *mr, |
1213 | hwaddr addr, | |
1214 | uint64_t *pval, | |
1215 | unsigned size, | |
1216 | MemTxAttrs attrs) | |
a621f38d | 1217 | { |
cc05c43a PM |
1218 | MemTxResult r; |
1219 | ||
791af8c8 PB |
1220 | if (!memory_region_access_valid(mr, addr, size, false)) { |
1221 | *pval = unassigned_mem_read(mr, addr, size); | |
cc05c43a | 1222 | return MEMTX_DECODE_ERROR; |
791af8c8 | 1223 | } |
a621f38d | 1224 | |
cc05c43a | 1225 | r = memory_region_dispatch_read1(mr, addr, pval, size, attrs); |
791af8c8 | 1226 | adjust_endianness(mr, pval, size); |
cc05c43a | 1227 | return r; |
a621f38d | 1228 | } |
093bc2cd | 1229 | |
8c56c1a5 PF |
1230 | /* Return true if an eventfd was signalled */ |
1231 | static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr, | |
1232 | hwaddr addr, | |
1233 | uint64_t data, | |
1234 | unsigned size, | |
1235 | MemTxAttrs attrs) | |
1236 | { | |
1237 | MemoryRegionIoeventfd ioeventfd = { | |
1238 | .addr = addrrange_make(int128_make64(addr), int128_make64(size)), | |
1239 | .data = data, | |
1240 | }; | |
1241 | unsigned i; | |
1242 | ||
1243 | for (i = 0; i < mr->ioeventfd_nb; i++) { | |
1244 | ioeventfd.match_data = mr->ioeventfds[i].match_data; | |
1245 | ioeventfd.e = mr->ioeventfds[i].e; | |
1246 | ||
1247 | if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) { | |
1248 | event_notifier_set(ioeventfd.e); | |
1249 | return true; | |
1250 | } | |
1251 | } | |
1252 | ||
1253 | return false; | |
1254 | } | |
1255 | ||
3b643495 PM |
1256 | MemTxResult memory_region_dispatch_write(MemoryRegion *mr, |
1257 | hwaddr addr, | |
1258 | uint64_t data, | |
1259 | unsigned size, | |
1260 | MemTxAttrs attrs) | |
a621f38d | 1261 | { |
897fa7cf | 1262 | if (!memory_region_access_valid(mr, addr, size, true)) { |
b018ddf6 | 1263 | unassigned_mem_write(mr, addr, data, size); |
cc05c43a | 1264 | return MEMTX_DECODE_ERROR; |
093bc2cd AK |
1265 | } |
1266 | ||
a621f38d AK |
1267 | adjust_endianness(mr, &data, size); |
1268 | ||
8c56c1a5 PF |
1269 | if ((!kvm_eventfds_enabled()) && |
1270 | memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) { | |
1271 | return MEMTX_OK; | |
1272 | } | |
1273 | ||
ce5d2f33 | 1274 | if (mr->ops->write) { |
cc05c43a PM |
1275 | return access_with_adjusted_size(addr, &data, size, |
1276 | mr->ops->impl.min_access_size, | |
1277 | mr->ops->impl.max_access_size, | |
1278 | memory_region_write_accessor, mr, | |
1279 | attrs); | |
1280 | } else if (mr->ops->write_with_attrs) { | |
1281 | return | |
1282 | access_with_adjusted_size(addr, &data, size, | |
1283 | mr->ops->impl.min_access_size, | |
1284 | mr->ops->impl.max_access_size, | |
1285 | memory_region_write_with_attrs_accessor, | |
1286 | mr, attrs); | |
ce5d2f33 | 1287 | } else { |
cc05c43a PM |
1288 | return access_with_adjusted_size(addr, &data, size, 1, 4, |
1289 | memory_region_oldmmio_write_accessor, | |
1290 | mr, attrs); | |
74901c3b | 1291 | } |
093bc2cd AK |
1292 | } |
1293 | ||
093bc2cd | 1294 | void memory_region_init_io(MemoryRegion *mr, |
2c9b15ca | 1295 | Object *owner, |
093bc2cd AK |
1296 | const MemoryRegionOps *ops, |
1297 | void *opaque, | |
1298 | const char *name, | |
1299 | uint64_t size) | |
1300 | { | |
2c9b15ca | 1301 | memory_region_init(mr, owner, name, size); |
6d6d2abf | 1302 | mr->ops = ops ? ops : &unassigned_mem_ops; |
093bc2cd | 1303 | mr->opaque = opaque; |
14a3c10a | 1304 | mr->terminates = true; |
093bc2cd AK |
1305 | } |
1306 | ||
1307 | void memory_region_init_ram(MemoryRegion *mr, | |
2c9b15ca | 1308 | Object *owner, |
093bc2cd | 1309 | const char *name, |
49946538 HT |
1310 | uint64_t size, |
1311 | Error **errp) | |
093bc2cd | 1312 | { |
2c9b15ca | 1313 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1314 | mr->ram = true; |
14a3c10a | 1315 | mr->terminates = true; |
545e92e0 | 1316 | mr->destructor = memory_region_destructor_ram; |
8e41fb63 | 1317 | mr->ram_block = qemu_ram_alloc(size, mr, errp); |
677e7805 | 1318 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
0b183fc8 PB |
1319 | } |
1320 | ||
60786ef3 MT |
1321 | void memory_region_init_resizeable_ram(MemoryRegion *mr, |
1322 | Object *owner, | |
1323 | const char *name, | |
1324 | uint64_t size, | |
1325 | uint64_t max_size, | |
1326 | void (*resized)(const char*, | |
1327 | uint64_t length, | |
1328 | void *host), | |
1329 | Error **errp) | |
1330 | { | |
1331 | memory_region_init(mr, owner, name, size); | |
1332 | mr->ram = true; | |
1333 | mr->terminates = true; | |
1334 | mr->destructor = memory_region_destructor_ram; | |
8e41fb63 FZ |
1335 | mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized, |
1336 | mr, errp); | |
677e7805 | 1337 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
60786ef3 MT |
1338 | } |
1339 | ||
0b183fc8 PB |
1340 | #ifdef __linux__ |
1341 | void memory_region_init_ram_from_file(MemoryRegion *mr, | |
1342 | struct Object *owner, | |
1343 | const char *name, | |
1344 | uint64_t size, | |
dbcb8981 | 1345 | bool share, |
7f56e740 PB |
1346 | const char *path, |
1347 | Error **errp) | |
0b183fc8 PB |
1348 | { |
1349 | memory_region_init(mr, owner, name, size); | |
1350 | mr->ram = true; | |
1351 | mr->terminates = true; | |
1352 | mr->destructor = memory_region_destructor_ram; | |
8e41fb63 | 1353 | mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp); |
677e7805 | 1354 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
093bc2cd | 1355 | } |
0b183fc8 | 1356 | #endif |
093bc2cd AK |
1357 | |
1358 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
2c9b15ca | 1359 | Object *owner, |
093bc2cd AK |
1360 | const char *name, |
1361 | uint64_t size, | |
1362 | void *ptr) | |
1363 | { | |
2c9b15ca | 1364 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1365 | mr->ram = true; |
14a3c10a | 1366 | mr->terminates = true; |
fc3e7665 | 1367 | mr->destructor = memory_region_destructor_ram; |
677e7805 | 1368 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
ef701d7b HT |
1369 | |
1370 | /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */ | |
1371 | assert(ptr != NULL); | |
8e41fb63 | 1372 | mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal); |
093bc2cd AK |
1373 | } |
1374 | ||
e4dc3f59 ND |
1375 | void memory_region_set_skip_dump(MemoryRegion *mr) |
1376 | { | |
1377 | mr->skip_dump = true; | |
1378 | } | |
1379 | ||
093bc2cd | 1380 | void memory_region_init_alias(MemoryRegion *mr, |
2c9b15ca | 1381 | Object *owner, |
093bc2cd AK |
1382 | const char *name, |
1383 | MemoryRegion *orig, | |
a8170e5e | 1384 | hwaddr offset, |
093bc2cd AK |
1385 | uint64_t size) |
1386 | { | |
2c9b15ca | 1387 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
1388 | mr->alias = orig; |
1389 | mr->alias_offset = offset; | |
1390 | } | |
1391 | ||
d0a9b5bc | 1392 | void memory_region_init_rom_device(MemoryRegion *mr, |
2c9b15ca | 1393 | Object *owner, |
d0a9b5bc | 1394 | const MemoryRegionOps *ops, |
75f5941c | 1395 | void *opaque, |
d0a9b5bc | 1396 | const char *name, |
33e0eb52 HT |
1397 | uint64_t size, |
1398 | Error **errp) | |
d0a9b5bc | 1399 | { |
2c9b15ca | 1400 | memory_region_init(mr, owner, name, size); |
7bc2b9cd | 1401 | mr->ops = ops; |
75f5941c | 1402 | mr->opaque = opaque; |
d0a9b5bc | 1403 | mr->terminates = true; |
75c578dc | 1404 | mr->rom_device = true; |
d0a9b5bc | 1405 | mr->destructor = memory_region_destructor_rom_device; |
8e41fb63 | 1406 | mr->ram_block = qemu_ram_alloc(size, mr, errp); |
d0a9b5bc AK |
1407 | } |
1408 | ||
30951157 | 1409 | void memory_region_init_iommu(MemoryRegion *mr, |
2c9b15ca | 1410 | Object *owner, |
30951157 AK |
1411 | const MemoryRegionIOMMUOps *ops, |
1412 | const char *name, | |
1413 | uint64_t size) | |
1414 | { | |
2c9b15ca | 1415 | memory_region_init(mr, owner, name, size); |
30951157 AK |
1416 | mr->iommu_ops = ops, |
1417 | mr->terminates = true; /* then re-forwards */ | |
06866575 | 1418 | notifier_list_init(&mr->iommu_notify); |
30951157 AK |
1419 | } |
1420 | ||
b4fefef9 | 1421 | static void memory_region_finalize(Object *obj) |
093bc2cd | 1422 | { |
b4fefef9 PC |
1423 | MemoryRegion *mr = MEMORY_REGION(obj); |
1424 | ||
2e2b8eb7 PB |
1425 | assert(!mr->container); |
1426 | ||
1427 | /* We know the region is not visible in any address space (it | |
1428 | * does not have a container and cannot be a root either because | |
1429 | * it has no references, so we can blindly clear mr->enabled. | |
1430 | * memory_region_set_enabled instead could trigger a transaction | |
1431 | * and cause an infinite loop. | |
1432 | */ | |
1433 | mr->enabled = false; | |
1434 | memory_region_transaction_begin(); | |
1435 | while (!QTAILQ_EMPTY(&mr->subregions)) { | |
1436 | MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions); | |
1437 | memory_region_del_subregion(mr, subregion); | |
1438 | } | |
1439 | memory_region_transaction_commit(); | |
1440 | ||
545e92e0 | 1441 | mr->destructor(mr); |
093bc2cd | 1442 | memory_region_clear_coalescing(mr); |
302fa283 | 1443 | g_free((char *)mr->name); |
7267c094 | 1444 | g_free(mr->ioeventfds); |
093bc2cd AK |
1445 | } |
1446 | ||
803c0816 PB |
1447 | Object *memory_region_owner(MemoryRegion *mr) |
1448 | { | |
22a893e4 PB |
1449 | Object *obj = OBJECT(mr); |
1450 | return obj->parent; | |
803c0816 PB |
1451 | } |
1452 | ||
46637be2 PB |
1453 | void memory_region_ref(MemoryRegion *mr) |
1454 | { | |
22a893e4 PB |
1455 | /* MMIO callbacks most likely will access data that belongs |
1456 | * to the owner, hence the need to ref/unref the owner whenever | |
1457 | * the memory region is in use. | |
1458 | * | |
1459 | * The memory region is a child of its owner. As long as the | |
1460 | * owner doesn't call unparent itself on the memory region, | |
1461 | * ref-ing the owner will also keep the memory region alive. | |
612263cf PB |
1462 | * Memory regions without an owner are supposed to never go away; |
1463 | * we do not ref/unref them because it slows down DMA sensibly. | |
22a893e4 | 1464 | */ |
612263cf PB |
1465 | if (mr && mr->owner) { |
1466 | object_ref(mr->owner); | |
46637be2 PB |
1467 | } |
1468 | } | |
1469 | ||
1470 | void memory_region_unref(MemoryRegion *mr) | |
1471 | { | |
612263cf PB |
1472 | if (mr && mr->owner) { |
1473 | object_unref(mr->owner); | |
46637be2 PB |
1474 | } |
1475 | } | |
1476 | ||
093bc2cd AK |
1477 | uint64_t memory_region_size(MemoryRegion *mr) |
1478 | { | |
08dafab4 AK |
1479 | if (int128_eq(mr->size, int128_2_64())) { |
1480 | return UINT64_MAX; | |
1481 | } | |
1482 | return int128_get64(mr->size); | |
093bc2cd AK |
1483 | } |
1484 | ||
5d546d4b | 1485 | const char *memory_region_name(const MemoryRegion *mr) |
8991c79b | 1486 | { |
d1dd32af PC |
1487 | if (!mr->name) { |
1488 | ((MemoryRegion *)mr)->name = | |
1489 | object_get_canonical_path_component(OBJECT(mr)); | |
1490 | } | |
302fa283 | 1491 | return mr->name; |
8991c79b AK |
1492 | } |
1493 | ||
e4dc3f59 ND |
1494 | bool memory_region_is_skip_dump(MemoryRegion *mr) |
1495 | { | |
1496 | return mr->skip_dump; | |
1497 | } | |
1498 | ||
2d1a35be | 1499 | uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr) |
55043ba3 | 1500 | { |
6f6a5ef3 PB |
1501 | uint8_t mask = mr->dirty_log_mask; |
1502 | if (global_dirty_log) { | |
1503 | mask |= (1 << DIRTY_MEMORY_MIGRATION); | |
1504 | } | |
1505 | return mask; | |
55043ba3 AK |
1506 | } |
1507 | ||
2d1a35be PB |
1508 | bool memory_region_is_logging(MemoryRegion *mr, uint8_t client) |
1509 | { | |
1510 | return memory_region_get_dirty_log_mask(mr) & (1 << client); | |
1511 | } | |
1512 | ||
06866575 DG |
1513 | void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n) |
1514 | { | |
1515 | notifier_list_add(&mr->iommu_notify, n); | |
1516 | } | |
1517 | ||
a788f227 DG |
1518 | void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n, |
1519 | hwaddr granularity, bool is_write) | |
1520 | { | |
1521 | hwaddr addr; | |
1522 | IOMMUTLBEntry iotlb; | |
1523 | ||
1524 | for (addr = 0; addr < memory_region_size(mr); addr += granularity) { | |
1525 | iotlb = mr->iommu_ops->translate(mr, addr, is_write); | |
1526 | if (iotlb.perm != IOMMU_NONE) { | |
1527 | n->notify(n, &iotlb); | |
1528 | } | |
1529 | ||
1530 | /* if (2^64 - MR size) < granularity, it's possible to get an | |
1531 | * infinite loop here. This should catch such a wraparound */ | |
1532 | if ((addr + granularity) < addr) { | |
1533 | break; | |
1534 | } | |
1535 | } | |
1536 | } | |
1537 | ||
06866575 DG |
1538 | void memory_region_unregister_iommu_notifier(Notifier *n) |
1539 | { | |
1540 | notifier_remove(n); | |
1541 | } | |
1542 | ||
1543 | void memory_region_notify_iommu(MemoryRegion *mr, | |
1544 | IOMMUTLBEntry entry) | |
1545 | { | |
1546 | assert(memory_region_is_iommu(mr)); | |
1547 | notifier_list_notify(&mr->iommu_notify, &entry); | |
1548 | } | |
1549 | ||
093bc2cd AK |
1550 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1551 | { | |
5a583347 | 1552 | uint8_t mask = 1 << client; |
deb809ed | 1553 | uint8_t old_logging; |
5a583347 | 1554 | |
dbddac6d | 1555 | assert(client == DIRTY_MEMORY_VGA); |
deb809ed PB |
1556 | old_logging = mr->vga_logging_count; |
1557 | mr->vga_logging_count += log ? 1 : -1; | |
1558 | if (!!old_logging == !!mr->vga_logging_count) { | |
1559 | return; | |
1560 | } | |
1561 | ||
59023ef4 | 1562 | memory_region_transaction_begin(); |
5a583347 | 1563 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 1564 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1565 | memory_region_transaction_commit(); |
093bc2cd AK |
1566 | } |
1567 | ||
a8170e5e AK |
1568 | bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr, |
1569 | hwaddr size, unsigned client) | |
093bc2cd | 1570 | { |
8e41fb63 FZ |
1571 | assert(mr->ram_block); |
1572 | return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr, | |
1573 | size, client); | |
093bc2cd AK |
1574 | } |
1575 | ||
a8170e5e AK |
1576 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
1577 | hwaddr size) | |
093bc2cd | 1578 | { |
8e41fb63 FZ |
1579 | assert(mr->ram_block); |
1580 | cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr, | |
1581 | size, | |
58d2707e | 1582 | memory_region_get_dirty_log_mask(mr)); |
093bc2cd AK |
1583 | } |
1584 | ||
6c279db8 JQ |
1585 | bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr, |
1586 | hwaddr size, unsigned client) | |
1587 | { | |
8e41fb63 FZ |
1588 | assert(mr->ram_block); |
1589 | return cpu_physical_memory_test_and_clear_dirty( | |
1590 | memory_region_get_ram_addr(mr) + addr, size, client); | |
6c279db8 JQ |
1591 | } |
1592 | ||
1593 | ||
093bc2cd AK |
1594 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
1595 | { | |
0d673e36 | 1596 | AddressSpace *as; |
5a583347 AK |
1597 | FlatRange *fr; |
1598 | ||
0d673e36 | 1599 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
856d7245 | 1600 | FlatView *view = address_space_get_flatview(as); |
99e86347 | 1601 | FOR_EACH_FLAT_RANGE(fr, view) { |
0d673e36 AK |
1602 | if (fr->mr == mr) { |
1603 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); | |
1604 | } | |
5a583347 | 1605 | } |
856d7245 | 1606 | flatview_unref(view); |
5a583347 | 1607 | } |
093bc2cd AK |
1608 | } |
1609 | ||
1610 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1611 | { | |
fb1cd6f9 | 1612 | if (mr->readonly != readonly) { |
59023ef4 | 1613 | memory_region_transaction_begin(); |
fb1cd6f9 | 1614 | mr->readonly = readonly; |
22bde714 | 1615 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1616 | memory_region_transaction_commit(); |
fb1cd6f9 | 1617 | } |
093bc2cd AK |
1618 | } |
1619 | ||
5f9a5ea1 | 1620 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 1621 | { |
5f9a5ea1 | 1622 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 1623 | memory_region_transaction_begin(); |
5f9a5ea1 | 1624 | mr->romd_mode = romd_mode; |
22bde714 | 1625 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1626 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1627 | } |
1628 | } | |
1629 | ||
a8170e5e AK |
1630 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
1631 | hwaddr size, unsigned client) | |
093bc2cd | 1632 | { |
8e41fb63 FZ |
1633 | assert(mr->ram_block); |
1634 | cpu_physical_memory_test_and_clear_dirty( | |
1635 | memory_region_get_ram_addr(mr) + addr, size, client); | |
093bc2cd AK |
1636 | } |
1637 | ||
a35ba7be PB |
1638 | int memory_region_get_fd(MemoryRegion *mr) |
1639 | { | |
1640 | if (mr->alias) { | |
1641 | return memory_region_get_fd(mr->alias); | |
1642 | } | |
1643 | ||
8e41fb63 | 1644 | assert(mr->ram_block); |
a35ba7be | 1645 | |
8e41fb63 | 1646 | return qemu_get_ram_fd(memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK); |
a35ba7be PB |
1647 | } |
1648 | ||
093bc2cd AK |
1649 | void *memory_region_get_ram_ptr(MemoryRegion *mr) |
1650 | { | |
49b24afc PB |
1651 | void *ptr; |
1652 | uint64_t offset = 0; | |
093bc2cd | 1653 | |
49b24afc PB |
1654 | rcu_read_lock(); |
1655 | while (mr->alias) { | |
1656 | offset += mr->alias_offset; | |
1657 | mr = mr->alias; | |
1658 | } | |
8e41fb63 FZ |
1659 | assert(mr->ram_block); |
1660 | ptr = qemu_get_ram_ptr(mr->ram_block, | |
1661 | memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK); | |
49b24afc | 1662 | rcu_read_unlock(); |
093bc2cd | 1663 | |
49b24afc | 1664 | return ptr + offset; |
093bc2cd AK |
1665 | } |
1666 | ||
7ebb2745 FZ |
1667 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1668 | { | |
1669 | return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID; | |
1670 | } | |
1671 | ||
37d7c084 PB |
1672 | void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp) |
1673 | { | |
8e41fb63 | 1674 | assert(mr->ram_block); |
37d7c084 | 1675 | |
8e41fb63 | 1676 | qemu_ram_resize(memory_region_get_ram_addr(mr), newsize, errp); |
37d7c084 PB |
1677 | } |
1678 | ||
0d673e36 | 1679 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
093bc2cd | 1680 | { |
99e86347 | 1681 | FlatView *view; |
093bc2cd AK |
1682 | FlatRange *fr; |
1683 | CoalescedMemoryRange *cmr; | |
1684 | AddrRange tmp; | |
95d2994a | 1685 | MemoryRegionSection section; |
093bc2cd | 1686 | |
856d7245 | 1687 | view = address_space_get_flatview(as); |
99e86347 | 1688 | FOR_EACH_FLAT_RANGE(fr, view) { |
093bc2cd | 1689 | if (fr->mr == mr) { |
95d2994a | 1690 | section = (MemoryRegionSection) { |
f6790af6 | 1691 | .address_space = as, |
95d2994a | 1692 | .offset_within_address_space = int128_get64(fr->addr.start), |
052e87b0 | 1693 | .size = fr->addr.size, |
95d2994a AK |
1694 | }; |
1695 | ||
1696 | MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, §ion, | |
1697 | int128_get64(fr->addr.start), | |
1698 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1699 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1700 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1701 | int128_sub(fr->addr.start, |
1702 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1703 | if (!addrrange_intersects(tmp, fr->addr)) { |
1704 | continue; | |
1705 | } | |
1706 | tmp = addrrange_intersection(tmp, fr->addr); | |
95d2994a AK |
1707 | MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, §ion, |
1708 | int128_get64(tmp.start), | |
1709 | int128_get64(tmp.size)); | |
093bc2cd AK |
1710 | } |
1711 | } | |
1712 | } | |
856d7245 | 1713 | flatview_unref(view); |
093bc2cd AK |
1714 | } |
1715 | ||
0d673e36 AK |
1716 | static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1717 | { | |
1718 | AddressSpace *as; | |
1719 | ||
1720 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1721 | memory_region_update_coalesced_range_as(mr, as); | |
1722 | } | |
1723 | } | |
1724 | ||
093bc2cd AK |
1725 | void memory_region_set_coalescing(MemoryRegion *mr) |
1726 | { | |
1727 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1728 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1729 | } |
1730 | ||
1731 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 1732 | hwaddr offset, |
093bc2cd AK |
1733 | uint64_t size) |
1734 | { | |
7267c094 | 1735 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1736 | |
08dafab4 | 1737 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1738 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1739 | memory_region_update_coalesced_range(mr); | |
d410515e | 1740 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1741 | } |
1742 | ||
1743 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1744 | { | |
1745 | CoalescedMemoryRange *cmr; | |
ab5b3db5 | 1746 | bool updated = false; |
093bc2cd | 1747 | |
d410515e JK |
1748 | qemu_flush_coalesced_mmio_buffer(); |
1749 | mr->flush_coalesced_mmio = false; | |
1750 | ||
093bc2cd AK |
1751 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1752 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1753 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1754 | g_free(cmr); |
ab5b3db5 FZ |
1755 | updated = true; |
1756 | } | |
1757 | ||
1758 | if (updated) { | |
1759 | memory_region_update_coalesced_range(mr); | |
093bc2cd | 1760 | } |
093bc2cd AK |
1761 | } |
1762 | ||
d410515e JK |
1763 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1764 | { | |
1765 | mr->flush_coalesced_mmio = true; | |
1766 | } | |
1767 | ||
1768 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1769 | { | |
1770 | qemu_flush_coalesced_mmio_buffer(); | |
1771 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1772 | mr->flush_coalesced_mmio = false; | |
1773 | } | |
1774 | } | |
1775 | ||
196ea131 JK |
1776 | void memory_region_set_global_locking(MemoryRegion *mr) |
1777 | { | |
1778 | mr->global_locking = true; | |
1779 | } | |
1780 | ||
1781 | void memory_region_clear_global_locking(MemoryRegion *mr) | |
1782 | { | |
1783 | mr->global_locking = false; | |
1784 | } | |
1785 | ||
8c56c1a5 PF |
1786 | static bool userspace_eventfd_warning; |
1787 | ||
3e9d69e7 | 1788 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 1789 | hwaddr addr, |
3e9d69e7 AK |
1790 | unsigned size, |
1791 | bool match_data, | |
1792 | uint64_t data, | |
753d5e14 | 1793 | EventNotifier *e) |
3e9d69e7 AK |
1794 | { |
1795 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1796 | .addr.start = int128_make64(addr), |
1797 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1798 | .match_data = match_data, |
1799 | .data = data, | |
753d5e14 | 1800 | .e = e, |
3e9d69e7 AK |
1801 | }; |
1802 | unsigned i; | |
1803 | ||
8c56c1a5 PF |
1804 | if (kvm_enabled() && (!(kvm_eventfds_enabled() || |
1805 | userspace_eventfd_warning))) { | |
1806 | userspace_eventfd_warning = true; | |
1807 | error_report("Using eventfd without MMIO binding in KVM. " | |
1808 | "Suboptimal performance expected"); | |
1809 | } | |
1810 | ||
b8aecea2 JW |
1811 | if (size) { |
1812 | adjust_endianness(mr, &mrfd.data, size); | |
1813 | } | |
59023ef4 | 1814 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1815 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1816 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1817 | break; | |
1818 | } | |
1819 | } | |
1820 | ++mr->ioeventfd_nb; | |
7267c094 | 1821 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1822 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1823 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1824 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1825 | mr->ioeventfds[i] = mrfd; | |
4dc56152 | 1826 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 1827 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1828 | } |
1829 | ||
1830 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 1831 | hwaddr addr, |
3e9d69e7 AK |
1832 | unsigned size, |
1833 | bool match_data, | |
1834 | uint64_t data, | |
753d5e14 | 1835 | EventNotifier *e) |
3e9d69e7 AK |
1836 | { |
1837 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1838 | .addr.start = int128_make64(addr), |
1839 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1840 | .match_data = match_data, |
1841 | .data = data, | |
753d5e14 | 1842 | .e = e, |
3e9d69e7 AK |
1843 | }; |
1844 | unsigned i; | |
1845 | ||
b8aecea2 JW |
1846 | if (size) { |
1847 | adjust_endianness(mr, &mrfd.data, size); | |
1848 | } | |
59023ef4 | 1849 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1850 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1851 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1852 | break; | |
1853 | } | |
1854 | } | |
1855 | assert(i != mr->ioeventfd_nb); | |
1856 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1857 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1858 | --mr->ioeventfd_nb; | |
7267c094 | 1859 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1860 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
4dc56152 | 1861 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 1862 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1863 | } |
1864 | ||
feca4ac1 | 1865 | static void memory_region_update_container_subregions(MemoryRegion *subregion) |
093bc2cd | 1866 | { |
0598701a | 1867 | hwaddr offset = subregion->addr; |
feca4ac1 | 1868 | MemoryRegion *mr = subregion->container; |
093bc2cd AK |
1869 | MemoryRegion *other; |
1870 | ||
59023ef4 JK |
1871 | memory_region_transaction_begin(); |
1872 | ||
dfde4e6e | 1873 | memory_region_ref(subregion); |
093bc2cd AK |
1874 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
1875 | if (subregion->may_overlap || other->may_overlap) { | |
1876 | continue; | |
1877 | } | |
2c7cfd65 | 1878 | if (int128_ge(int128_make64(offset), |
08dafab4 AK |
1879 | int128_add(int128_make64(other->addr), other->size)) |
1880 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1881 | int128_make64(other->addr))) { | |
093bc2cd AK |
1882 | continue; |
1883 | } | |
a5e1cbc8 | 1884 | #if 0 |
860329b2 MW |
1885 | printf("warning: subregion collision %llx/%llx (%s) " |
1886 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1887 | (unsigned long long)offset, |
08dafab4 | 1888 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1889 | subregion->name, |
1890 | (unsigned long long)other->addr, | |
08dafab4 | 1891 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1892 | other->name); |
a5e1cbc8 | 1893 | #endif |
093bc2cd AK |
1894 | } |
1895 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1896 | if (subregion->priority >= other->priority) { | |
1897 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1898 | goto done; | |
1899 | } | |
1900 | } | |
1901 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1902 | done: | |
22bde714 | 1903 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1904 | memory_region_transaction_commit(); |
093bc2cd AK |
1905 | } |
1906 | ||
0598701a PC |
1907 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
1908 | hwaddr offset, | |
1909 | MemoryRegion *subregion) | |
1910 | { | |
feca4ac1 PB |
1911 | assert(!subregion->container); |
1912 | subregion->container = mr; | |
0598701a | 1913 | subregion->addr = offset; |
feca4ac1 | 1914 | memory_region_update_container_subregions(subregion); |
0598701a | 1915 | } |
093bc2cd AK |
1916 | |
1917 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 1918 | hwaddr offset, |
093bc2cd AK |
1919 | MemoryRegion *subregion) |
1920 | { | |
1921 | subregion->may_overlap = false; | |
1922 | subregion->priority = 0; | |
1923 | memory_region_add_subregion_common(mr, offset, subregion); | |
1924 | } | |
1925 | ||
1926 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 1927 | hwaddr offset, |
093bc2cd | 1928 | MemoryRegion *subregion, |
a1ff8ae0 | 1929 | int priority) |
093bc2cd AK |
1930 | { |
1931 | subregion->may_overlap = true; | |
1932 | subregion->priority = priority; | |
1933 | memory_region_add_subregion_common(mr, offset, subregion); | |
1934 | } | |
1935 | ||
1936 | void memory_region_del_subregion(MemoryRegion *mr, | |
1937 | MemoryRegion *subregion) | |
1938 | { | |
59023ef4 | 1939 | memory_region_transaction_begin(); |
feca4ac1 PB |
1940 | assert(subregion->container == mr); |
1941 | subregion->container = NULL; | |
093bc2cd | 1942 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); |
dfde4e6e | 1943 | memory_region_unref(subregion); |
22bde714 | 1944 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1945 | memory_region_transaction_commit(); |
6bba19ba AK |
1946 | } |
1947 | ||
1948 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1949 | { | |
1950 | if (enabled == mr->enabled) { | |
1951 | return; | |
1952 | } | |
59023ef4 | 1953 | memory_region_transaction_begin(); |
6bba19ba | 1954 | mr->enabled = enabled; |
22bde714 | 1955 | memory_region_update_pending = true; |
59023ef4 | 1956 | memory_region_transaction_commit(); |
093bc2cd | 1957 | } |
1c0ffa58 | 1958 | |
e7af4c67 MT |
1959 | void memory_region_set_size(MemoryRegion *mr, uint64_t size) |
1960 | { | |
1961 | Int128 s = int128_make64(size); | |
1962 | ||
1963 | if (size == UINT64_MAX) { | |
1964 | s = int128_2_64(); | |
1965 | } | |
1966 | if (int128_eq(s, mr->size)) { | |
1967 | return; | |
1968 | } | |
1969 | memory_region_transaction_begin(); | |
1970 | mr->size = s; | |
1971 | memory_region_update_pending = true; | |
1972 | memory_region_transaction_commit(); | |
1973 | } | |
1974 | ||
67891b8a | 1975 | static void memory_region_readd_subregion(MemoryRegion *mr) |
2282e1af | 1976 | { |
feca4ac1 | 1977 | MemoryRegion *container = mr->container; |
2282e1af | 1978 | |
feca4ac1 | 1979 | if (container) { |
67891b8a PC |
1980 | memory_region_transaction_begin(); |
1981 | memory_region_ref(mr); | |
feca4ac1 PB |
1982 | memory_region_del_subregion(container, mr); |
1983 | mr->container = container; | |
1984 | memory_region_update_container_subregions(mr); | |
67891b8a PC |
1985 | memory_region_unref(mr); |
1986 | memory_region_transaction_commit(); | |
2282e1af | 1987 | } |
67891b8a | 1988 | } |
2282e1af | 1989 | |
67891b8a PC |
1990 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
1991 | { | |
1992 | if (addr != mr->addr) { | |
1993 | mr->addr = addr; | |
1994 | memory_region_readd_subregion(mr); | |
1995 | } | |
2282e1af AK |
1996 | } |
1997 | ||
a8170e5e | 1998 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 1999 | { |
4703359e | 2000 | assert(mr->alias); |
4703359e | 2001 | |
59023ef4 | 2002 | if (offset == mr->alias_offset) { |
4703359e AK |
2003 | return; |
2004 | } | |
2005 | ||
59023ef4 JK |
2006 | memory_region_transaction_begin(); |
2007 | mr->alias_offset = offset; | |
22bde714 | 2008 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 2009 | memory_region_transaction_commit(); |
4703359e AK |
2010 | } |
2011 | ||
a2b257d6 IM |
2012 | uint64_t memory_region_get_alignment(const MemoryRegion *mr) |
2013 | { | |
2014 | return mr->align; | |
2015 | } | |
2016 | ||
e2177955 AK |
2017 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
2018 | { | |
2019 | const AddrRange *addr = addr_; | |
2020 | const FlatRange *fr = fr_; | |
2021 | ||
2022 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
2023 | return -1; | |
2024 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
2025 | return 1; | |
2026 | } | |
2027 | return 0; | |
2028 | } | |
2029 | ||
99e86347 | 2030 | static FlatRange *flatview_lookup(FlatView *view, AddrRange addr) |
e2177955 | 2031 | { |
99e86347 | 2032 | return bsearch(&addr, view->ranges, view->nr, |
e2177955 AK |
2033 | sizeof(FlatRange), cmp_flatrange_addr); |
2034 | } | |
2035 | ||
eed2bacf IM |
2036 | bool memory_region_is_mapped(MemoryRegion *mr) |
2037 | { | |
2038 | return mr->container ? true : false; | |
2039 | } | |
2040 | ||
c6742b14 PB |
2041 | /* Same as memory_region_find, but it does not add a reference to the |
2042 | * returned region. It must be called from an RCU critical section. | |
2043 | */ | |
2044 | static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr, | |
2045 | hwaddr addr, uint64_t size) | |
e2177955 | 2046 | { |
052e87b0 | 2047 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
2048 | MemoryRegion *root; |
2049 | AddressSpace *as; | |
2050 | AddrRange range; | |
99e86347 | 2051 | FlatView *view; |
73034e9e PB |
2052 | FlatRange *fr; |
2053 | ||
2054 | addr += mr->addr; | |
feca4ac1 PB |
2055 | for (root = mr; root->container; ) { |
2056 | root = root->container; | |
73034e9e PB |
2057 | addr += root->addr; |
2058 | } | |
e2177955 | 2059 | |
73034e9e | 2060 | as = memory_region_to_address_space(root); |
eed2bacf IM |
2061 | if (!as) { |
2062 | return ret; | |
2063 | } | |
73034e9e | 2064 | range = addrrange_make(int128_make64(addr), int128_make64(size)); |
99e86347 | 2065 | |
2b647668 | 2066 | view = atomic_rcu_read(&as->current_map); |
99e86347 | 2067 | fr = flatview_lookup(view, range); |
e2177955 | 2068 | if (!fr) { |
c6742b14 | 2069 | return ret; |
e2177955 AK |
2070 | } |
2071 | ||
99e86347 | 2072 | while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { |
e2177955 AK |
2073 | --fr; |
2074 | } | |
2075 | ||
2076 | ret.mr = fr->mr; | |
73034e9e | 2077 | ret.address_space = as; |
e2177955 AK |
2078 | range = addrrange_intersection(range, fr->addr); |
2079 | ret.offset_within_region = fr->offset_in_region; | |
2080 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
2081 | fr->addr.start)); | |
052e87b0 | 2082 | ret.size = range.size; |
e2177955 | 2083 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 2084 | ret.readonly = fr->readonly; |
c6742b14 PB |
2085 | return ret; |
2086 | } | |
2087 | ||
2088 | MemoryRegionSection memory_region_find(MemoryRegion *mr, | |
2089 | hwaddr addr, uint64_t size) | |
2090 | { | |
2091 | MemoryRegionSection ret; | |
2092 | rcu_read_lock(); | |
2093 | ret = memory_region_find_rcu(mr, addr, size); | |
2094 | if (ret.mr) { | |
2095 | memory_region_ref(ret.mr); | |
2096 | } | |
2b647668 | 2097 | rcu_read_unlock(); |
e2177955 AK |
2098 | return ret; |
2099 | } | |
2100 | ||
c6742b14 PB |
2101 | bool memory_region_present(MemoryRegion *container, hwaddr addr) |
2102 | { | |
2103 | MemoryRegion *mr; | |
2104 | ||
2105 | rcu_read_lock(); | |
2106 | mr = memory_region_find_rcu(container, addr, 1).mr; | |
2107 | rcu_read_unlock(); | |
2108 | return mr && mr != container; | |
2109 | } | |
2110 | ||
1d671369 | 2111 | void address_space_sync_dirty_bitmap(AddressSpace *as) |
86e775c6 | 2112 | { |
99e86347 | 2113 | FlatView *view; |
7664e80c AK |
2114 | FlatRange *fr; |
2115 | ||
856d7245 | 2116 | view = address_space_get_flatview(as); |
99e86347 | 2117 | FOR_EACH_FLAT_RANGE(fr, view) { |
72e22d2f | 2118 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c | 2119 | } |
856d7245 | 2120 | flatview_unref(view); |
7664e80c AK |
2121 | } |
2122 | ||
2123 | void memory_global_dirty_log_start(void) | |
2124 | { | |
7664e80c | 2125 | global_dirty_log = true; |
6f6a5ef3 | 2126 | |
7376e582 | 2127 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
6f6a5ef3 PB |
2128 | |
2129 | /* Refresh DIRTY_LOG_MIGRATION bit. */ | |
2130 | memory_region_transaction_begin(); | |
2131 | memory_region_update_pending = true; | |
2132 | memory_region_transaction_commit(); | |
7664e80c AK |
2133 | } |
2134 | ||
2135 | void memory_global_dirty_log_stop(void) | |
2136 | { | |
7664e80c | 2137 | global_dirty_log = false; |
6f6a5ef3 PB |
2138 | |
2139 | /* Refresh DIRTY_LOG_MIGRATION bit. */ | |
2140 | memory_region_transaction_begin(); | |
2141 | memory_region_update_pending = true; | |
2142 | memory_region_transaction_commit(); | |
2143 | ||
7376e582 | 2144 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
2145 | } |
2146 | ||
2147 | static void listener_add_address_space(MemoryListener *listener, | |
2148 | AddressSpace *as) | |
2149 | { | |
99e86347 | 2150 | FlatView *view; |
7664e80c AK |
2151 | FlatRange *fr; |
2152 | ||
221b3a3f | 2153 | if (listener->address_space_filter |
f6790af6 | 2154 | && listener->address_space_filter != as) { |
221b3a3f JG |
2155 | return; |
2156 | } | |
2157 | ||
680a4783 PB |
2158 | if (listener->begin) { |
2159 | listener->begin(listener); | |
2160 | } | |
7664e80c | 2161 | if (global_dirty_log) { |
975aefe0 AK |
2162 | if (listener->log_global_start) { |
2163 | listener->log_global_start(listener); | |
2164 | } | |
7664e80c | 2165 | } |
975aefe0 | 2166 | |
856d7245 | 2167 | view = address_space_get_flatview(as); |
99e86347 | 2168 | FOR_EACH_FLAT_RANGE(fr, view) { |
7664e80c AK |
2169 | MemoryRegionSection section = { |
2170 | .mr = fr->mr, | |
f6790af6 | 2171 | .address_space = as, |
7664e80c | 2172 | .offset_within_region = fr->offset_in_region, |
052e87b0 | 2173 | .size = fr->addr.size, |
7664e80c | 2174 | .offset_within_address_space = int128_get64(fr->addr.start), |
7a8499e8 | 2175 | .readonly = fr->readonly, |
7664e80c | 2176 | }; |
680a4783 PB |
2177 | if (fr->dirty_log_mask && listener->log_start) { |
2178 | listener->log_start(listener, §ion, 0, fr->dirty_log_mask); | |
2179 | } | |
975aefe0 AK |
2180 | if (listener->region_add) { |
2181 | listener->region_add(listener, §ion); | |
2182 | } | |
7664e80c | 2183 | } |
680a4783 PB |
2184 | if (listener->commit) { |
2185 | listener->commit(listener); | |
2186 | } | |
856d7245 | 2187 | flatview_unref(view); |
7664e80c AK |
2188 | } |
2189 | ||
f6790af6 | 2190 | void memory_listener_register(MemoryListener *listener, AddressSpace *filter) |
7664e80c | 2191 | { |
72e22d2f | 2192 | MemoryListener *other = NULL; |
0d673e36 | 2193 | AddressSpace *as; |
72e22d2f | 2194 | |
7376e582 | 2195 | listener->address_space_filter = filter; |
72e22d2f AK |
2196 | if (QTAILQ_EMPTY(&memory_listeners) |
2197 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
2198 | memory_listeners)->priority) { | |
2199 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
2200 | } else { | |
2201 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
2202 | if (listener->priority < other->priority) { | |
2203 | break; | |
2204 | } | |
2205 | } | |
2206 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
2207 | } | |
0d673e36 AK |
2208 | |
2209 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2210 | listener_add_address_space(listener, as); | |
2211 | } | |
7664e80c AK |
2212 | } |
2213 | ||
2214 | void memory_listener_unregister(MemoryListener *listener) | |
2215 | { | |
72e22d2f | 2216 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 2217 | } |
e2177955 | 2218 | |
7dca8043 | 2219 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1c0ffa58 | 2220 | { |
ac95190e | 2221 | memory_region_ref(root); |
59023ef4 | 2222 | memory_region_transaction_begin(); |
f0c02d15 | 2223 | as->ref_count = 1; |
8786db7c | 2224 | as->root = root; |
f0c02d15 | 2225 | as->malloced = false; |
8786db7c AK |
2226 | as->current_map = g_new(FlatView, 1); |
2227 | flatview_init(as->current_map); | |
4c19eb72 AK |
2228 | as->ioeventfd_nb = 0; |
2229 | as->ioeventfds = NULL; | |
0d673e36 | 2230 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
7dca8043 | 2231 | as->name = g_strdup(name ? name : "anonymous"); |
ac1970fb | 2232 | address_space_init_dispatch(as); |
f43793c7 PB |
2233 | memory_region_update_pending |= root->enabled; |
2234 | memory_region_transaction_commit(); | |
1c0ffa58 | 2235 | } |
658b2224 | 2236 | |
374f2981 | 2237 | static void do_address_space_destroy(AddressSpace *as) |
83f3c251 | 2238 | { |
078c44f4 | 2239 | MemoryListener *listener; |
f0c02d15 | 2240 | bool do_free = as->malloced; |
078c44f4 | 2241 | |
83f3c251 | 2242 | address_space_destroy_dispatch(as); |
078c44f4 DG |
2243 | |
2244 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
2245 | assert(listener->address_space_filter != as); | |
2246 | } | |
2247 | ||
856d7245 | 2248 | flatview_unref(as->current_map); |
7dca8043 | 2249 | g_free(as->name); |
4c19eb72 | 2250 | g_free(as->ioeventfds); |
ac95190e | 2251 | memory_region_unref(as->root); |
f0c02d15 PC |
2252 | if (do_free) { |
2253 | g_free(as); | |
2254 | } | |
2255 | } | |
2256 | ||
2257 | AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name) | |
2258 | { | |
2259 | AddressSpace *as; | |
2260 | ||
2261 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2262 | if (root == as->root && as->malloced) { | |
2263 | as->ref_count++; | |
2264 | return as; | |
2265 | } | |
2266 | } | |
2267 | ||
2268 | as = g_malloc0(sizeof *as); | |
2269 | address_space_init(as, root, name); | |
2270 | as->malloced = true; | |
2271 | return as; | |
83f3c251 AK |
2272 | } |
2273 | ||
374f2981 PB |
2274 | void address_space_destroy(AddressSpace *as) |
2275 | { | |
ac95190e PB |
2276 | MemoryRegion *root = as->root; |
2277 | ||
f0c02d15 PC |
2278 | as->ref_count--; |
2279 | if (as->ref_count) { | |
2280 | return; | |
2281 | } | |
374f2981 PB |
2282 | /* Flush out anything from MemoryListeners listening in on this */ |
2283 | memory_region_transaction_begin(); | |
2284 | as->root = NULL; | |
2285 | memory_region_transaction_commit(); | |
2286 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
6e48e8f9 | 2287 | address_space_unregister(as); |
374f2981 PB |
2288 | |
2289 | /* At this point, as->dispatch and as->current_map are dummy | |
2290 | * entries that the guest should never use. Wait for the old | |
2291 | * values to expire before freeing the data. | |
2292 | */ | |
ac95190e | 2293 | as->root = root; |
374f2981 PB |
2294 | call_rcu(as, do_address_space_destroy, rcu); |
2295 | } | |
2296 | ||
314e2987 BS |
2297 | typedef struct MemoryRegionList MemoryRegionList; |
2298 | ||
2299 | struct MemoryRegionList { | |
2300 | const MemoryRegion *mr; | |
314e2987 BS |
2301 | QTAILQ_ENTRY(MemoryRegionList) queue; |
2302 | }; | |
2303 | ||
2304 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
2305 | ||
2306 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
2307 | const MemoryRegion *mr, unsigned int level, | |
a8170e5e | 2308 | hwaddr base, |
9479c57a | 2309 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 2310 | { |
9479c57a JK |
2311 | MemoryRegionList *new_ml, *ml, *next_ml; |
2312 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
2313 | const MemoryRegion *submr; |
2314 | unsigned int i; | |
2315 | ||
f8a9f720 | 2316 | if (!mr) { |
314e2987 BS |
2317 | return; |
2318 | } | |
2319 | ||
2320 | for (i = 0; i < level; i++) { | |
2321 | mon_printf(f, " "); | |
2322 | } | |
2323 | ||
2324 | if (mr->alias) { | |
2325 | MemoryRegionList *ml; | |
2326 | bool found = false; | |
2327 | ||
2328 | /* check if the alias is already in the queue */ | |
9479c57a | 2329 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
f54bb15f | 2330 | if (ml->mr == mr->alias) { |
314e2987 BS |
2331 | found = true; |
2332 | } | |
2333 | } | |
2334 | ||
2335 | if (!found) { | |
2336 | ml = g_new(MemoryRegionList, 1); | |
2337 | ml->mr = mr->alias; | |
9479c57a | 2338 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 2339 | } |
4896d74b JK |
2340 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
2341 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
f8a9f720 | 2342 | "-" TARGET_FMT_plx "%s\n", |
314e2987 | 2343 | base + mr->addr, |
08dafab4 | 2344 | base + mr->addr |
fd1d9926 AW |
2345 | + (int128_nz(mr->size) ? |
2346 | (hwaddr)int128_get64(int128_sub(mr->size, | |
2347 | int128_one())) : 0), | |
4b474ba7 | 2348 | mr->priority, |
5f9a5ea1 JK |
2349 | mr->romd_mode ? 'R' : '-', |
2350 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
2351 | : '-', | |
3fb18b4d PC |
2352 | memory_region_name(mr), |
2353 | memory_region_name(mr->alias), | |
314e2987 | 2354 | mr->alias_offset, |
08dafab4 | 2355 | mr->alias_offset |
a66670c7 AK |
2356 | + (int128_nz(mr->size) ? |
2357 | (hwaddr)int128_get64(int128_sub(mr->size, | |
f8a9f720 GH |
2358 | int128_one())) : 0), |
2359 | mr->enabled ? "" : " [disabled]"); | |
314e2987 | 2360 | } else { |
4896d74b | 2361 | mon_printf(f, |
f8a9f720 | 2362 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n", |
314e2987 | 2363 | base + mr->addr, |
08dafab4 | 2364 | base + mr->addr |
fd1d9926 AW |
2365 | + (int128_nz(mr->size) ? |
2366 | (hwaddr)int128_get64(int128_sub(mr->size, | |
2367 | int128_one())) : 0), | |
4b474ba7 | 2368 | mr->priority, |
5f9a5ea1 JK |
2369 | mr->romd_mode ? 'R' : '-', |
2370 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
2371 | : '-', | |
f8a9f720 GH |
2372 | memory_region_name(mr), |
2373 | mr->enabled ? "" : " [disabled]"); | |
314e2987 | 2374 | } |
9479c57a JK |
2375 | |
2376 | QTAILQ_INIT(&submr_print_queue); | |
2377 | ||
314e2987 | 2378 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
2379 | new_ml = g_new(MemoryRegionList, 1); |
2380 | new_ml->mr = submr; | |
2381 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
2382 | if (new_ml->mr->addr < ml->mr->addr || | |
2383 | (new_ml->mr->addr == ml->mr->addr && | |
2384 | new_ml->mr->priority > ml->mr->priority)) { | |
2385 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
2386 | new_ml = NULL; | |
2387 | break; | |
2388 | } | |
2389 | } | |
2390 | if (new_ml) { | |
2391 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
2392 | } | |
2393 | } | |
2394 | ||
2395 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
2396 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
2397 | alias_print_queue); | |
2398 | } | |
2399 | ||
88365e47 | 2400 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 2401 | g_free(ml); |
314e2987 BS |
2402 | } |
2403 | } | |
2404 | ||
2405 | void mtree_info(fprintf_function mon_printf, void *f) | |
2406 | { | |
2407 | MemoryRegionListHead ml_head; | |
2408 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 2409 | AddressSpace *as; |
314e2987 BS |
2410 | |
2411 | QTAILQ_INIT(&ml_head); | |
2412 | ||
0d673e36 | 2413 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
e48816aa GH |
2414 | mon_printf(f, "address-space: %s\n", as->name); |
2415 | mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head); | |
2416 | mon_printf(f, "\n"); | |
b9f9be88 BS |
2417 | } |
2418 | ||
314e2987 BS |
2419 | /* print aliased regions */ |
2420 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
e48816aa GH |
2421 | mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr)); |
2422 | mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head); | |
2423 | mon_printf(f, "\n"); | |
314e2987 BS |
2424 | } |
2425 | ||
2426 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 2427 | g_free(ml); |
314e2987 | 2428 | } |
314e2987 | 2429 | } |
b4fefef9 PC |
2430 | |
2431 | static const TypeInfo memory_region_info = { | |
2432 | .parent = TYPE_OBJECT, | |
2433 | .name = TYPE_MEMORY_REGION, | |
2434 | .instance_size = sizeof(MemoryRegion), | |
2435 | .instance_init = memory_region_initfn, | |
2436 | .instance_finalize = memory_region_finalize, | |
2437 | }; | |
2438 | ||
2439 | static void memory_register_types(void) | |
2440 | { | |
2441 | type_register_static(&memory_region_info); | |
2442 | } | |
2443 | ||
2444 | type_init(memory_register_types) |