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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <[email protected]> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
022c62cb PB |
16 | #include "exec/memory.h" |
17 | #include "exec/address-spaces.h" | |
18 | #include "exec/ioport.h" | |
1de7afc9 | 19 | #include "qemu/bitops.h" |
2c9b15ca | 20 | #include "qom/object.h" |
9c17d615 | 21 | #include "sysemu/kvm.h" |
093bc2cd AK |
22 | #include <assert.h> |
23 | ||
022c62cb | 24 | #include "exec/memory-internal.h" |
67d95c15 | 25 | |
d197063f PB |
26 | //#define DEBUG_UNASSIGNED |
27 | ||
22bde714 JK |
28 | static unsigned memory_region_transaction_depth; |
29 | static bool memory_region_update_pending; | |
7664e80c AK |
30 | static bool global_dirty_log = false; |
31 | ||
72e22d2f AK |
32 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
33 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 34 | |
0d673e36 AK |
35 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
36 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
37 | ||
093bc2cd AK |
38 | typedef struct AddrRange AddrRange; |
39 | ||
8417cebf AK |
40 | /* |
41 | * Note using signed integers limits us to physical addresses at most | |
42 | * 63 bits wide. They are needed for negative offsetting in aliases | |
43 | * (large MemoryRegion::alias_offset). | |
44 | */ | |
093bc2cd | 45 | struct AddrRange { |
08dafab4 AK |
46 | Int128 start; |
47 | Int128 size; | |
093bc2cd AK |
48 | }; |
49 | ||
08dafab4 | 50 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
51 | { |
52 | return (AddrRange) { start, size }; | |
53 | } | |
54 | ||
55 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
56 | { | |
08dafab4 | 57 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
58 | } |
59 | ||
08dafab4 | 60 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 61 | { |
08dafab4 | 62 | return int128_add(r.start, r.size); |
093bc2cd AK |
63 | } |
64 | ||
08dafab4 | 65 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 66 | { |
08dafab4 | 67 | int128_addto(&range.start, delta); |
093bc2cd AK |
68 | return range; |
69 | } | |
70 | ||
08dafab4 AK |
71 | static bool addrrange_contains(AddrRange range, Int128 addr) |
72 | { | |
73 | return int128_ge(addr, range.start) | |
74 | && int128_lt(addr, addrrange_end(range)); | |
75 | } | |
76 | ||
093bc2cd AK |
77 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
78 | { | |
08dafab4 AK |
79 | return addrrange_contains(r1, r2.start) |
80 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
81 | } |
82 | ||
83 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
84 | { | |
08dafab4 AK |
85 | Int128 start = int128_max(r1.start, r2.start); |
86 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
87 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
88 | } |
89 | ||
0e0d36b4 AK |
90 | enum ListenerDirection { Forward, Reverse }; |
91 | ||
7376e582 AK |
92 | static bool memory_listener_match(MemoryListener *listener, |
93 | MemoryRegionSection *section) | |
94 | { | |
95 | return !listener->address_space_filter | |
96 | || listener->address_space_filter == section->address_space; | |
97 | } | |
98 | ||
99 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
0e0d36b4 AK |
100 | do { \ |
101 | MemoryListener *_listener; \ | |
102 | \ | |
103 | switch (_direction) { \ | |
104 | case Forward: \ | |
105 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
106 | if (_listener->_callback) { \ |
107 | _listener->_callback(_listener, ##_args); \ | |
108 | } \ | |
0e0d36b4 AK |
109 | } \ |
110 | break; \ | |
111 | case Reverse: \ | |
112 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
113 | memory_listeners, link) { \ | |
975aefe0 AK |
114 | if (_listener->_callback) { \ |
115 | _listener->_callback(_listener, ##_args); \ | |
116 | } \ | |
0e0d36b4 AK |
117 | } \ |
118 | break; \ | |
119 | default: \ | |
120 | abort(); \ | |
121 | } \ | |
122 | } while (0) | |
123 | ||
7376e582 AK |
124 | #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \ |
125 | do { \ | |
126 | MemoryListener *_listener; \ | |
127 | \ | |
128 | switch (_direction) { \ | |
129 | case Forward: \ | |
130 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
131 | if (_listener->_callback \ |
132 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
133 | _listener->_callback(_listener, _section, ##_args); \ |
134 | } \ | |
135 | } \ | |
136 | break; \ | |
137 | case Reverse: \ | |
138 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
139 | memory_listeners, link) { \ | |
975aefe0 AK |
140 | if (_listener->_callback \ |
141 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
142 | _listener->_callback(_listener, _section, ##_args); \ |
143 | } \ | |
144 | } \ | |
145 | break; \ | |
146 | default: \ | |
147 | abort(); \ | |
148 | } \ | |
149 | } while (0) | |
150 | ||
0e0d36b4 | 151 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \ |
7376e582 | 152 | MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
0e0d36b4 | 153 | .mr = (fr)->mr, \ |
f6790af6 | 154 | .address_space = (as), \ |
0e0d36b4 | 155 | .offset_within_region = (fr)->offset_in_region, \ |
052e87b0 | 156 | .size = (fr)->addr.size, \ |
0e0d36b4 | 157 | .offset_within_address_space = int128_get64((fr)->addr.start), \ |
7a8499e8 | 158 | .readonly = (fr)->readonly, \ |
7376e582 | 159 | })) |
0e0d36b4 | 160 | |
093bc2cd AK |
161 | struct CoalescedMemoryRange { |
162 | AddrRange addr; | |
163 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
164 | }; | |
165 | ||
3e9d69e7 AK |
166 | struct MemoryRegionIoeventfd { |
167 | AddrRange addr; | |
168 | bool match_data; | |
169 | uint64_t data; | |
753d5e14 | 170 | EventNotifier *e; |
3e9d69e7 AK |
171 | }; |
172 | ||
173 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
174 | MemoryRegionIoeventfd b) | |
175 | { | |
08dafab4 | 176 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 177 | return true; |
08dafab4 | 178 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 179 | return false; |
08dafab4 | 180 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 181 | return true; |
08dafab4 | 182 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
183 | return false; |
184 | } else if (a.match_data < b.match_data) { | |
185 | return true; | |
186 | } else if (a.match_data > b.match_data) { | |
187 | return false; | |
188 | } else if (a.match_data) { | |
189 | if (a.data < b.data) { | |
190 | return true; | |
191 | } else if (a.data > b.data) { | |
192 | return false; | |
193 | } | |
194 | } | |
753d5e14 | 195 | if (a.e < b.e) { |
3e9d69e7 | 196 | return true; |
753d5e14 | 197 | } else if (a.e > b.e) { |
3e9d69e7 AK |
198 | return false; |
199 | } | |
200 | return false; | |
201 | } | |
202 | ||
203 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
204 | MemoryRegionIoeventfd b) | |
205 | { | |
206 | return !memory_region_ioeventfd_before(a, b) | |
207 | && !memory_region_ioeventfd_before(b, a); | |
208 | } | |
209 | ||
093bc2cd AK |
210 | typedef struct FlatRange FlatRange; |
211 | typedef struct FlatView FlatView; | |
212 | ||
213 | /* Range of memory in the global map. Addresses are absolute. */ | |
214 | struct FlatRange { | |
215 | MemoryRegion *mr; | |
a8170e5e | 216 | hwaddr offset_in_region; |
093bc2cd | 217 | AddrRange addr; |
5a583347 | 218 | uint8_t dirty_log_mask; |
5f9a5ea1 | 219 | bool romd_mode; |
fb1cd6f9 | 220 | bool readonly; |
093bc2cd AK |
221 | }; |
222 | ||
223 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
224 | * order. | |
225 | */ | |
226 | struct FlatView { | |
227 | FlatRange *ranges; | |
228 | unsigned nr; | |
229 | unsigned nr_allocated; | |
230 | }; | |
231 | ||
cc31e6e7 AK |
232 | typedef struct AddressSpaceOps AddressSpaceOps; |
233 | ||
093bc2cd AK |
234 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
235 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
236 | ||
093bc2cd AK |
237 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
238 | { | |
239 | return a->mr == b->mr | |
240 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 241 | && a->offset_in_region == b->offset_in_region |
5f9a5ea1 | 242 | && a->romd_mode == b->romd_mode |
fb1cd6f9 | 243 | && a->readonly == b->readonly; |
093bc2cd AK |
244 | } |
245 | ||
246 | static void flatview_init(FlatView *view) | |
247 | { | |
248 | view->ranges = NULL; | |
249 | view->nr = 0; | |
250 | view->nr_allocated = 0; | |
251 | } | |
252 | ||
253 | /* Insert a range into a given position. Caller is responsible for maintaining | |
254 | * sorting order. | |
255 | */ | |
256 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
257 | { | |
258 | if (view->nr == view->nr_allocated) { | |
259 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 260 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
261 | view->nr_allocated * sizeof(*view->ranges)); |
262 | } | |
263 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
264 | (view->nr - pos) * sizeof(FlatRange)); | |
265 | view->ranges[pos] = *range; | |
266 | ++view->nr; | |
267 | } | |
268 | ||
269 | static void flatview_destroy(FlatView *view) | |
270 | { | |
7267c094 | 271 | g_free(view->ranges); |
093bc2cd AK |
272 | } |
273 | ||
3d8e6bf9 AK |
274 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
275 | { | |
08dafab4 | 276 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 277 | && r1->mr == r2->mr |
08dafab4 AK |
278 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
279 | r1->addr.size), | |
280 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 281 | && r1->dirty_log_mask == r2->dirty_log_mask |
5f9a5ea1 | 282 | && r1->romd_mode == r2->romd_mode |
fb1cd6f9 | 283 | && r1->readonly == r2->readonly; |
3d8e6bf9 AK |
284 | } |
285 | ||
8508e024 | 286 | /* Attempt to simplify a view by merging adjacent ranges */ |
3d8e6bf9 AK |
287 | static void flatview_simplify(FlatView *view) |
288 | { | |
289 | unsigned i, j; | |
290 | ||
291 | i = 0; | |
292 | while (i < view->nr) { | |
293 | j = i + 1; | |
294 | while (j < view->nr | |
295 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 296 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
297 | ++j; |
298 | } | |
299 | ++i; | |
300 | memmove(&view->ranges[i], &view->ranges[j], | |
301 | (view->nr - j) * sizeof(view->ranges[j])); | |
302 | view->nr -= j - i; | |
303 | } | |
304 | } | |
305 | ||
ce5d2f33 PB |
306 | static void memory_region_oldmmio_read_accessor(void *opaque, |
307 | hwaddr addr, | |
308 | uint64_t *value, | |
309 | unsigned size, | |
310 | unsigned shift, | |
311 | uint64_t mask) | |
312 | { | |
313 | MemoryRegion *mr = opaque; | |
314 | uint64_t tmp; | |
315 | ||
316 | tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); | |
317 | *value |= (tmp & mask) << shift; | |
318 | } | |
319 | ||
164a4dcd | 320 | static void memory_region_read_accessor(void *opaque, |
a8170e5e | 321 | hwaddr addr, |
164a4dcd AK |
322 | uint64_t *value, |
323 | unsigned size, | |
324 | unsigned shift, | |
325 | uint64_t mask) | |
326 | { | |
327 | MemoryRegion *mr = opaque; | |
328 | uint64_t tmp; | |
329 | ||
d410515e JK |
330 | if (mr->flush_coalesced_mmio) { |
331 | qemu_flush_coalesced_mmio_buffer(); | |
332 | } | |
164a4dcd AK |
333 | tmp = mr->ops->read(mr->opaque, addr, size); |
334 | *value |= (tmp & mask) << shift; | |
335 | } | |
336 | ||
ce5d2f33 PB |
337 | static void memory_region_oldmmio_write_accessor(void *opaque, |
338 | hwaddr addr, | |
339 | uint64_t *value, | |
340 | unsigned size, | |
341 | unsigned shift, | |
342 | uint64_t mask) | |
343 | { | |
344 | MemoryRegion *mr = opaque; | |
345 | uint64_t tmp; | |
346 | ||
347 | tmp = (*value >> shift) & mask; | |
348 | mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); | |
349 | } | |
350 | ||
164a4dcd | 351 | static void memory_region_write_accessor(void *opaque, |
a8170e5e | 352 | hwaddr addr, |
164a4dcd AK |
353 | uint64_t *value, |
354 | unsigned size, | |
355 | unsigned shift, | |
356 | uint64_t mask) | |
357 | { | |
358 | MemoryRegion *mr = opaque; | |
359 | uint64_t tmp; | |
360 | ||
d410515e JK |
361 | if (mr->flush_coalesced_mmio) { |
362 | qemu_flush_coalesced_mmio_buffer(); | |
363 | } | |
164a4dcd AK |
364 | tmp = (*value >> shift) & mask; |
365 | mr->ops->write(mr->opaque, addr, tmp, size); | |
366 | } | |
367 | ||
a8170e5e | 368 | static void access_with_adjusted_size(hwaddr addr, |
164a4dcd AK |
369 | uint64_t *value, |
370 | unsigned size, | |
371 | unsigned access_size_min, | |
372 | unsigned access_size_max, | |
373 | void (*access)(void *opaque, | |
a8170e5e | 374 | hwaddr addr, |
164a4dcd AK |
375 | uint64_t *value, |
376 | unsigned size, | |
377 | unsigned shift, | |
378 | uint64_t mask), | |
379 | void *opaque) | |
380 | { | |
381 | uint64_t access_mask; | |
382 | unsigned access_size; | |
383 | unsigned i; | |
384 | ||
385 | if (!access_size_min) { | |
386 | access_size_min = 1; | |
387 | } | |
388 | if (!access_size_max) { | |
389 | access_size_max = 4; | |
390 | } | |
ce5d2f33 PB |
391 | |
392 | /* FIXME: support unaligned access? */ | |
164a4dcd AK |
393 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
394 | access_mask = -1ULL >> (64 - access_size * 8); | |
395 | for (i = 0; i < size; i += access_size) { | |
08521e28 PB |
396 | #ifdef TARGET_WORDS_BIGENDIAN |
397 | access(opaque, addr + i, value, access_size, | |
398 | (size - access_size - i) * 8, access_mask); | |
399 | #else | |
164a4dcd | 400 | access(opaque, addr + i, value, access_size, i * 8, access_mask); |
08521e28 | 401 | #endif |
164a4dcd AK |
402 | } |
403 | } | |
404 | ||
e2177955 AK |
405 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
406 | { | |
0d673e36 AK |
407 | AddressSpace *as; |
408 | ||
e2177955 AK |
409 | while (mr->parent) { |
410 | mr = mr->parent; | |
411 | } | |
0d673e36 AK |
412 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
413 | if (mr == as->root) { | |
414 | return as; | |
415 | } | |
e2177955 AK |
416 | } |
417 | abort(); | |
418 | } | |
419 | ||
093bc2cd AK |
420 | /* Render a memory region into the global view. Ranges in @view obscure |
421 | * ranges in @mr. | |
422 | */ | |
423 | static void render_memory_region(FlatView *view, | |
424 | MemoryRegion *mr, | |
08dafab4 | 425 | Int128 base, |
fb1cd6f9 AK |
426 | AddrRange clip, |
427 | bool readonly) | |
093bc2cd AK |
428 | { |
429 | MemoryRegion *subregion; | |
430 | unsigned i; | |
a8170e5e | 431 | hwaddr offset_in_region; |
08dafab4 AK |
432 | Int128 remain; |
433 | Int128 now; | |
093bc2cd AK |
434 | FlatRange fr; |
435 | AddrRange tmp; | |
436 | ||
6bba19ba AK |
437 | if (!mr->enabled) { |
438 | return; | |
439 | } | |
440 | ||
08dafab4 | 441 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 442 | readonly |= mr->readonly; |
093bc2cd AK |
443 | |
444 | tmp = addrrange_make(base, mr->size); | |
445 | ||
446 | if (!addrrange_intersects(tmp, clip)) { | |
447 | return; | |
448 | } | |
449 | ||
450 | clip = addrrange_intersection(tmp, clip); | |
451 | ||
452 | if (mr->alias) { | |
08dafab4 AK |
453 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
454 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 455 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
456 | return; |
457 | } | |
458 | ||
459 | /* Render subregions in priority order. */ | |
460 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 461 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
462 | } |
463 | ||
14a3c10a | 464 | if (!mr->terminates) { |
093bc2cd AK |
465 | return; |
466 | } | |
467 | ||
08dafab4 | 468 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
469 | base = clip.start; |
470 | remain = clip.size; | |
471 | ||
2eb74e1a PC |
472 | fr.mr = mr; |
473 | fr.dirty_log_mask = mr->dirty_log_mask; | |
474 | fr.romd_mode = mr->romd_mode; | |
475 | fr.readonly = readonly; | |
476 | ||
093bc2cd | 477 | /* Render the region itself into any gaps left by the current view. */ |
08dafab4 AK |
478 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
479 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
480 | continue; |
481 | } | |
08dafab4 AK |
482 | if (int128_lt(base, view->ranges[i].addr.start)) { |
483 | now = int128_min(remain, | |
484 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
485 | fr.offset_in_region = offset_in_region; |
486 | fr.addr = addrrange_make(base, now); | |
487 | flatview_insert(view, i, &fr); | |
488 | ++i; | |
08dafab4 AK |
489 | int128_addto(&base, now); |
490 | offset_in_region += int128_get64(now); | |
491 | int128_subfrom(&remain, now); | |
093bc2cd | 492 | } |
d26a8cae AK |
493 | now = int128_sub(int128_min(int128_add(base, remain), |
494 | addrrange_end(view->ranges[i].addr)), | |
495 | base); | |
496 | int128_addto(&base, now); | |
497 | offset_in_region += int128_get64(now); | |
498 | int128_subfrom(&remain, now); | |
093bc2cd | 499 | } |
08dafab4 | 500 | if (int128_nz(remain)) { |
093bc2cd AK |
501 | fr.offset_in_region = offset_in_region; |
502 | fr.addr = addrrange_make(base, remain); | |
503 | flatview_insert(view, i, &fr); | |
504 | } | |
505 | } | |
506 | ||
507 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
508 | static FlatView generate_memory_topology(MemoryRegion *mr) | |
509 | { | |
510 | FlatView view; | |
511 | ||
512 | flatview_init(&view); | |
513 | ||
83f3c251 AK |
514 | if (mr) { |
515 | render_memory_region(&view, mr, int128_zero(), | |
516 | addrrange_make(int128_zero(), int128_2_64()), false); | |
517 | } | |
3d8e6bf9 | 518 | flatview_simplify(&view); |
093bc2cd AK |
519 | |
520 | return view; | |
521 | } | |
522 | ||
3e9d69e7 AK |
523 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
524 | MemoryRegionIoeventfd *fds_new, | |
525 | unsigned fds_new_nb, | |
526 | MemoryRegionIoeventfd *fds_old, | |
527 | unsigned fds_old_nb) | |
528 | { | |
529 | unsigned iold, inew; | |
80a1ea37 AK |
530 | MemoryRegionIoeventfd *fd; |
531 | MemoryRegionSection section; | |
3e9d69e7 AK |
532 | |
533 | /* Generate a symmetric difference of the old and new fd sets, adding | |
534 | * and deleting as necessary. | |
535 | */ | |
536 | ||
537 | iold = inew = 0; | |
538 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
539 | if (iold < fds_old_nb | |
540 | && (inew == fds_new_nb | |
541 | || memory_region_ioeventfd_before(fds_old[iold], | |
542 | fds_new[inew]))) { | |
80a1ea37 AK |
543 | fd = &fds_old[iold]; |
544 | section = (MemoryRegionSection) { | |
f6790af6 | 545 | .address_space = as, |
80a1ea37 | 546 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 547 | .size = fd->addr.size, |
80a1ea37 AK |
548 | }; |
549 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
753d5e14 | 550 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
551 | ++iold; |
552 | } else if (inew < fds_new_nb | |
553 | && (iold == fds_old_nb | |
554 | || memory_region_ioeventfd_before(fds_new[inew], | |
555 | fds_old[iold]))) { | |
80a1ea37 AK |
556 | fd = &fds_new[inew]; |
557 | section = (MemoryRegionSection) { | |
f6790af6 | 558 | .address_space = as, |
80a1ea37 | 559 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 560 | .size = fd->addr.size, |
80a1ea37 AK |
561 | }; |
562 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
753d5e14 | 563 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
564 | ++inew; |
565 | } else { | |
566 | ++iold; | |
567 | ++inew; | |
568 | } | |
569 | } | |
570 | } | |
571 | ||
572 | static void address_space_update_ioeventfds(AddressSpace *as) | |
573 | { | |
574 | FlatRange *fr; | |
575 | unsigned ioeventfd_nb = 0; | |
576 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
577 | AddrRange tmp; | |
578 | unsigned i; | |
579 | ||
8786db7c | 580 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
3e9d69e7 AK |
581 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
582 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
583 | int128_sub(fr->addr.start, |
584 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
585 | if (addrrange_intersects(fr->addr, tmp)) { |
586 | ++ioeventfd_nb; | |
7267c094 | 587 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
588 | ioeventfd_nb * sizeof(*ioeventfds)); |
589 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
590 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
591 | } | |
592 | } | |
593 | } | |
594 | ||
595 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
596 | as->ioeventfds, as->ioeventfd_nb); | |
597 | ||
7267c094 | 598 | g_free(as->ioeventfds); |
3e9d69e7 AK |
599 | as->ioeventfds = ioeventfds; |
600 | as->ioeventfd_nb = ioeventfd_nb; | |
601 | } | |
602 | ||
b8af1afb AK |
603 | static void address_space_update_topology_pass(AddressSpace *as, |
604 | FlatView old_view, | |
605 | FlatView new_view, | |
606 | bool adding) | |
093bc2cd | 607 | { |
093bc2cd AK |
608 | unsigned iold, inew; |
609 | FlatRange *frold, *frnew; | |
093bc2cd AK |
610 | |
611 | /* Generate a symmetric difference of the old and new memory maps. | |
612 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
613 | */ | |
614 | iold = inew = 0; | |
615 | while (iold < old_view.nr || inew < new_view.nr) { | |
616 | if (iold < old_view.nr) { | |
617 | frold = &old_view.ranges[iold]; | |
618 | } else { | |
619 | frold = NULL; | |
620 | } | |
621 | if (inew < new_view.nr) { | |
622 | frnew = &new_view.ranges[inew]; | |
623 | } else { | |
624 | frnew = NULL; | |
625 | } | |
626 | ||
627 | if (frold | |
628 | && (!frnew | |
08dafab4 AK |
629 | || int128_lt(frold->addr.start, frnew->addr.start) |
630 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd | 631 | && !flatrange_equal(frold, frnew)))) { |
41a6e477 | 632 | /* In old but not in new, or in both but attributes changed. */ |
093bc2cd | 633 | |
b8af1afb | 634 | if (!adding) { |
72e22d2f | 635 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
636 | } |
637 | ||
093bc2cd AK |
638 | ++iold; |
639 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
41a6e477 | 640 | /* In both and unchanged (except logging may have changed) */ |
093bc2cd | 641 | |
b8af1afb | 642 | if (adding) { |
50c1e149 | 643 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b8af1afb | 644 | if (frold->dirty_log_mask && !frnew->dirty_log_mask) { |
72e22d2f | 645 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
b8af1afb | 646 | } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { |
72e22d2f | 647 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
b8af1afb | 648 | } |
5a583347 AK |
649 | } |
650 | ||
093bc2cd AK |
651 | ++iold; |
652 | ++inew; | |
093bc2cd AK |
653 | } else { |
654 | /* In new */ | |
655 | ||
b8af1afb | 656 | if (adding) { |
72e22d2f | 657 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
658 | } |
659 | ||
093bc2cd AK |
660 | ++inew; |
661 | } | |
662 | } | |
b8af1afb AK |
663 | } |
664 | ||
665 | ||
666 | static void address_space_update_topology(AddressSpace *as) | |
667 | { | |
8786db7c | 668 | FlatView old_view = *as->current_map; |
b8af1afb AK |
669 | FlatView new_view = generate_memory_topology(as->root); |
670 | ||
671 | address_space_update_topology_pass(as, old_view, new_view, false); | |
672 | address_space_update_topology_pass(as, old_view, new_view, true); | |
673 | ||
8786db7c | 674 | *as->current_map = new_view; |
093bc2cd | 675 | flatview_destroy(&old_view); |
3e9d69e7 | 676 | address_space_update_ioeventfds(as); |
093bc2cd AK |
677 | } |
678 | ||
4ef4db86 AK |
679 | void memory_region_transaction_begin(void) |
680 | { | |
bb880ded | 681 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
682 | ++memory_region_transaction_depth; |
683 | } | |
684 | ||
685 | void memory_region_transaction_commit(void) | |
686 | { | |
0d673e36 AK |
687 | AddressSpace *as; |
688 | ||
4ef4db86 AK |
689 | assert(memory_region_transaction_depth); |
690 | --memory_region_transaction_depth; | |
22bde714 JK |
691 | if (!memory_region_transaction_depth && memory_region_update_pending) { |
692 | memory_region_update_pending = false; | |
02e2b95f JK |
693 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); |
694 | ||
0d673e36 AK |
695 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
696 | address_space_update_topology(as); | |
02e2b95f JK |
697 | } |
698 | ||
699 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); | |
e87c099f | 700 | } |
4ef4db86 AK |
701 | } |
702 | ||
545e92e0 AK |
703 | static void memory_region_destructor_none(MemoryRegion *mr) |
704 | { | |
705 | } | |
706 | ||
707 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
708 | { | |
709 | qemu_ram_free(mr->ram_addr); | |
710 | } | |
711 | ||
712 | static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) | |
713 | { | |
714 | qemu_ram_free_from_ptr(mr->ram_addr); | |
715 | } | |
716 | ||
d0a9b5bc AK |
717 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
718 | { | |
719 | qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); | |
d0a9b5bc AK |
720 | } |
721 | ||
be675c97 AK |
722 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
723 | { | |
2c3579ab | 724 | #ifdef TARGET_WORDS_BIGENDIAN |
be675c97 AK |
725 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; |
726 | #else | |
727 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
728 | #endif | |
729 | } | |
730 | ||
093bc2cd | 731 | void memory_region_init(MemoryRegion *mr, |
2c9b15ca | 732 | Object *owner, |
093bc2cd AK |
733 | const char *name, |
734 | uint64_t size) | |
735 | { | |
2cdfcf27 PB |
736 | mr->ops = &unassigned_mem_ops; |
737 | mr->opaque = NULL; | |
2c9b15ca | 738 | mr->owner = owner; |
30951157 | 739 | mr->iommu_ops = NULL; |
093bc2cd | 740 | mr->parent = NULL; |
803c0816 | 741 | mr->owner = NULL; |
08dafab4 AK |
742 | mr->size = int128_make64(size); |
743 | if (size == UINT64_MAX) { | |
744 | mr->size = int128_2_64(); | |
745 | } | |
093bc2cd | 746 | mr->addr = 0; |
b3b00c78 | 747 | mr->subpage = false; |
6bba19ba | 748 | mr->enabled = true; |
14a3c10a | 749 | mr->terminates = false; |
8ea9252a | 750 | mr->ram = false; |
5f9a5ea1 | 751 | mr->romd_mode = true; |
fb1cd6f9 | 752 | mr->readonly = false; |
75c578dc | 753 | mr->rom_device = false; |
545e92e0 | 754 | mr->destructor = memory_region_destructor_none; |
093bc2cd AK |
755 | mr->priority = 0; |
756 | mr->may_overlap = false; | |
757 | mr->alias = NULL; | |
758 | QTAILQ_INIT(&mr->subregions); | |
759 | memset(&mr->subregions_link, 0, sizeof mr->subregions_link); | |
760 | QTAILQ_INIT(&mr->coalesced); | |
7267c094 | 761 | mr->name = g_strdup(name); |
5a583347 | 762 | mr->dirty_log_mask = 0; |
3e9d69e7 AK |
763 | mr->ioeventfd_nb = 0; |
764 | mr->ioeventfds = NULL; | |
d410515e | 765 | mr->flush_coalesced_mmio = false; |
093bc2cd AK |
766 | } |
767 | ||
b018ddf6 PB |
768 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
769 | unsigned size) | |
770 | { | |
771 | #ifdef DEBUG_UNASSIGNED | |
772 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
773 | #endif | |
c658b94f AF |
774 | if (cpu_single_env != NULL) { |
775 | cpu_unassigned_access(ENV_GET_CPU(cpu_single_env), | |
776 | addr, false, false, 0, size); | |
777 | } | |
b018ddf6 PB |
778 | return 0; |
779 | } | |
780 | ||
781 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
782 | uint64_t val, unsigned size) | |
783 | { | |
784 | #ifdef DEBUG_UNASSIGNED | |
785 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
786 | #endif | |
c658b94f AF |
787 | if (cpu_single_env != NULL) { |
788 | cpu_unassigned_access(ENV_GET_CPU(cpu_single_env), | |
789 | addr, true, false, 0, size); | |
790 | } | |
b018ddf6 PB |
791 | } |
792 | ||
d197063f PB |
793 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
794 | unsigned size, bool is_write) | |
795 | { | |
796 | return false; | |
797 | } | |
798 | ||
799 | const MemoryRegionOps unassigned_mem_ops = { | |
800 | .valid.accepts = unassigned_mem_accepts, | |
801 | .endianness = DEVICE_NATIVE_ENDIAN, | |
802 | }; | |
803 | ||
d2702032 PB |
804 | bool memory_region_access_valid(MemoryRegion *mr, |
805 | hwaddr addr, | |
806 | unsigned size, | |
807 | bool is_write) | |
093bc2cd | 808 | { |
a014ed07 PB |
809 | int access_size_min, access_size_max; |
810 | int access_size, i; | |
897fa7cf | 811 | |
093bc2cd AK |
812 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
813 | return false; | |
814 | } | |
815 | ||
a014ed07 | 816 | if (!mr->ops->valid.accepts) { |
093bc2cd AK |
817 | return true; |
818 | } | |
819 | ||
a014ed07 PB |
820 | access_size_min = mr->ops->valid.min_access_size; |
821 | if (!mr->ops->valid.min_access_size) { | |
822 | access_size_min = 1; | |
823 | } | |
824 | ||
825 | access_size_max = mr->ops->valid.max_access_size; | |
826 | if (!mr->ops->valid.max_access_size) { | |
827 | access_size_max = 4; | |
828 | } | |
829 | ||
830 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
831 | for (i = 0; i < size; i += access_size) { | |
832 | if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, | |
833 | is_write)) { | |
834 | return false; | |
835 | } | |
093bc2cd | 836 | } |
a014ed07 | 837 | |
093bc2cd AK |
838 | return true; |
839 | } | |
840 | ||
a621f38d | 841 | static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, |
a8170e5e | 842 | hwaddr addr, |
a621f38d | 843 | unsigned size) |
093bc2cd | 844 | { |
164a4dcd | 845 | uint64_t data = 0; |
093bc2cd | 846 | |
ce5d2f33 PB |
847 | if (mr->ops->read) { |
848 | access_with_adjusted_size(addr, &data, size, | |
849 | mr->ops->impl.min_access_size, | |
850 | mr->ops->impl.max_access_size, | |
851 | memory_region_read_accessor, mr); | |
852 | } else { | |
853 | access_with_adjusted_size(addr, &data, size, 1, 4, | |
854 | memory_region_oldmmio_read_accessor, mr); | |
74901c3b AK |
855 | } |
856 | ||
093bc2cd AK |
857 | return data; |
858 | } | |
859 | ||
a621f38d | 860 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) |
093bc2cd | 861 | { |
a621f38d AK |
862 | if (memory_region_wrong_endianness(mr)) { |
863 | switch (size) { | |
864 | case 1: | |
865 | break; | |
866 | case 2: | |
867 | *data = bswap16(*data); | |
868 | break; | |
869 | case 4: | |
870 | *data = bswap32(*data); | |
1470a0cd | 871 | break; |
968a5627 PB |
872 | case 8: |
873 | *data = bswap64(*data); | |
874 | break; | |
a621f38d AK |
875 | default: |
876 | abort(); | |
877 | } | |
878 | } | |
879 | } | |
880 | ||
791af8c8 PB |
881 | static bool memory_region_dispatch_read(MemoryRegion *mr, |
882 | hwaddr addr, | |
883 | uint64_t *pval, | |
884 | unsigned size) | |
a621f38d | 885 | { |
791af8c8 PB |
886 | if (!memory_region_access_valid(mr, addr, size, false)) { |
887 | *pval = unassigned_mem_read(mr, addr, size); | |
888 | return true; | |
889 | } | |
a621f38d | 890 | |
791af8c8 PB |
891 | *pval = memory_region_dispatch_read1(mr, addr, size); |
892 | adjust_endianness(mr, pval, size); | |
893 | return false; | |
a621f38d | 894 | } |
093bc2cd | 895 | |
791af8c8 | 896 | static bool memory_region_dispatch_write(MemoryRegion *mr, |
a8170e5e | 897 | hwaddr addr, |
a621f38d AK |
898 | uint64_t data, |
899 | unsigned size) | |
900 | { | |
897fa7cf | 901 | if (!memory_region_access_valid(mr, addr, size, true)) { |
b018ddf6 | 902 | unassigned_mem_write(mr, addr, data, size); |
791af8c8 | 903 | return true; |
093bc2cd AK |
904 | } |
905 | ||
a621f38d AK |
906 | adjust_endianness(mr, &data, size); |
907 | ||
ce5d2f33 PB |
908 | if (mr->ops->write) { |
909 | access_with_adjusted_size(addr, &data, size, | |
910 | mr->ops->impl.min_access_size, | |
911 | mr->ops->impl.max_access_size, | |
912 | memory_region_write_accessor, mr); | |
913 | } else { | |
914 | access_with_adjusted_size(addr, &data, size, 1, 4, | |
915 | memory_region_oldmmio_write_accessor, mr); | |
74901c3b | 916 | } |
791af8c8 | 917 | return false; |
093bc2cd AK |
918 | } |
919 | ||
093bc2cd | 920 | void memory_region_init_io(MemoryRegion *mr, |
2c9b15ca | 921 | Object *owner, |
093bc2cd AK |
922 | const MemoryRegionOps *ops, |
923 | void *opaque, | |
924 | const char *name, | |
925 | uint64_t size) | |
926 | { | |
2c9b15ca | 927 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
928 | mr->ops = ops; |
929 | mr->opaque = opaque; | |
14a3c10a | 930 | mr->terminates = true; |
97161e17 | 931 | mr->ram_addr = ~(ram_addr_t)0; |
093bc2cd AK |
932 | } |
933 | ||
934 | void memory_region_init_ram(MemoryRegion *mr, | |
2c9b15ca | 935 | Object *owner, |
093bc2cd AK |
936 | const char *name, |
937 | uint64_t size) | |
938 | { | |
2c9b15ca | 939 | memory_region_init(mr, owner, name, size); |
8ea9252a | 940 | mr->ram = true; |
14a3c10a | 941 | mr->terminates = true; |
545e92e0 | 942 | mr->destructor = memory_region_destructor_ram; |
c5705a77 | 943 | mr->ram_addr = qemu_ram_alloc(size, mr); |
093bc2cd AK |
944 | } |
945 | ||
946 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
2c9b15ca | 947 | Object *owner, |
093bc2cd AK |
948 | const char *name, |
949 | uint64_t size, | |
950 | void *ptr) | |
951 | { | |
2c9b15ca | 952 | memory_region_init(mr, owner, name, size); |
8ea9252a | 953 | mr->ram = true; |
14a3c10a | 954 | mr->terminates = true; |
545e92e0 | 955 | mr->destructor = memory_region_destructor_ram_from_ptr; |
c5705a77 | 956 | mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
093bc2cd AK |
957 | } |
958 | ||
959 | void memory_region_init_alias(MemoryRegion *mr, | |
2c9b15ca | 960 | Object *owner, |
093bc2cd AK |
961 | const char *name, |
962 | MemoryRegion *orig, | |
a8170e5e | 963 | hwaddr offset, |
093bc2cd AK |
964 | uint64_t size) |
965 | { | |
2c9b15ca | 966 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
967 | mr->alias = orig; |
968 | mr->alias_offset = offset; | |
969 | } | |
970 | ||
d0a9b5bc | 971 | void memory_region_init_rom_device(MemoryRegion *mr, |
2c9b15ca | 972 | Object *owner, |
d0a9b5bc | 973 | const MemoryRegionOps *ops, |
75f5941c | 974 | void *opaque, |
d0a9b5bc AK |
975 | const char *name, |
976 | uint64_t size) | |
977 | { | |
2c9b15ca | 978 | memory_region_init(mr, owner, name, size); |
7bc2b9cd | 979 | mr->ops = ops; |
75f5941c | 980 | mr->opaque = opaque; |
d0a9b5bc | 981 | mr->terminates = true; |
75c578dc | 982 | mr->rom_device = true; |
d0a9b5bc | 983 | mr->destructor = memory_region_destructor_rom_device; |
c5705a77 | 984 | mr->ram_addr = qemu_ram_alloc(size, mr); |
d0a9b5bc AK |
985 | } |
986 | ||
30951157 | 987 | void memory_region_init_iommu(MemoryRegion *mr, |
2c9b15ca | 988 | Object *owner, |
30951157 AK |
989 | const MemoryRegionIOMMUOps *ops, |
990 | const char *name, | |
991 | uint64_t size) | |
992 | { | |
2c9b15ca | 993 | memory_region_init(mr, owner, name, size); |
30951157 AK |
994 | mr->iommu_ops = ops, |
995 | mr->terminates = true; /* then re-forwards */ | |
06866575 | 996 | notifier_list_init(&mr->iommu_notify); |
30951157 AK |
997 | } |
998 | ||
1660e72d | 999 | void memory_region_init_reservation(MemoryRegion *mr, |
2c9b15ca | 1000 | Object *owner, |
1660e72d JK |
1001 | const char *name, |
1002 | uint64_t size) | |
1003 | { | |
2c9b15ca | 1004 | memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size); |
1660e72d JK |
1005 | } |
1006 | ||
093bc2cd AK |
1007 | void memory_region_destroy(MemoryRegion *mr) |
1008 | { | |
1009 | assert(QTAILQ_EMPTY(&mr->subregions)); | |
2be0e25f | 1010 | assert(memory_region_transaction_depth == 0); |
545e92e0 | 1011 | mr->destructor(mr); |
093bc2cd | 1012 | memory_region_clear_coalescing(mr); |
7267c094 AL |
1013 | g_free((char *)mr->name); |
1014 | g_free(mr->ioeventfds); | |
093bc2cd AK |
1015 | } |
1016 | ||
803c0816 PB |
1017 | Object *memory_region_owner(MemoryRegion *mr) |
1018 | { | |
1019 | return mr->owner; | |
1020 | } | |
1021 | ||
46637be2 PB |
1022 | void memory_region_ref(MemoryRegion *mr) |
1023 | { | |
1024 | if (mr && mr->owner) { | |
1025 | object_ref(mr->owner); | |
1026 | } | |
1027 | } | |
1028 | ||
1029 | void memory_region_unref(MemoryRegion *mr) | |
1030 | { | |
1031 | if (mr && mr->owner) { | |
1032 | object_unref(mr->owner); | |
1033 | } | |
1034 | } | |
1035 | ||
093bc2cd AK |
1036 | uint64_t memory_region_size(MemoryRegion *mr) |
1037 | { | |
08dafab4 AK |
1038 | if (int128_eq(mr->size, int128_2_64())) { |
1039 | return UINT64_MAX; | |
1040 | } | |
1041 | return int128_get64(mr->size); | |
093bc2cd AK |
1042 | } |
1043 | ||
8991c79b AK |
1044 | const char *memory_region_name(MemoryRegion *mr) |
1045 | { | |
1046 | return mr->name; | |
1047 | } | |
1048 | ||
8ea9252a AK |
1049 | bool memory_region_is_ram(MemoryRegion *mr) |
1050 | { | |
1051 | return mr->ram; | |
1052 | } | |
1053 | ||
55043ba3 AK |
1054 | bool memory_region_is_logging(MemoryRegion *mr) |
1055 | { | |
1056 | return mr->dirty_log_mask; | |
1057 | } | |
1058 | ||
ce7923da AK |
1059 | bool memory_region_is_rom(MemoryRegion *mr) |
1060 | { | |
1061 | return mr->ram && mr->readonly; | |
1062 | } | |
1063 | ||
30951157 AK |
1064 | bool memory_region_is_iommu(MemoryRegion *mr) |
1065 | { | |
1066 | return mr->iommu_ops; | |
1067 | } | |
1068 | ||
06866575 DG |
1069 | void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n) |
1070 | { | |
1071 | notifier_list_add(&mr->iommu_notify, n); | |
1072 | } | |
1073 | ||
1074 | void memory_region_unregister_iommu_notifier(Notifier *n) | |
1075 | { | |
1076 | notifier_remove(n); | |
1077 | } | |
1078 | ||
1079 | void memory_region_notify_iommu(MemoryRegion *mr, | |
1080 | IOMMUTLBEntry entry) | |
1081 | { | |
1082 | assert(memory_region_is_iommu(mr)); | |
1083 | notifier_list_notify(&mr->iommu_notify, &entry); | |
1084 | } | |
1085 | ||
093bc2cd AK |
1086 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1087 | { | |
5a583347 AK |
1088 | uint8_t mask = 1 << client; |
1089 | ||
59023ef4 | 1090 | memory_region_transaction_begin(); |
5a583347 | 1091 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 1092 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1093 | memory_region_transaction_commit(); |
093bc2cd AK |
1094 | } |
1095 | ||
a8170e5e AK |
1096 | bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr, |
1097 | hwaddr size, unsigned client) | |
093bc2cd | 1098 | { |
14a3c10a | 1099 | assert(mr->terminates); |
cd7a45c9 BS |
1100 | return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, |
1101 | 1 << client); | |
093bc2cd AK |
1102 | } |
1103 | ||
a8170e5e AK |
1104 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
1105 | hwaddr size) | |
093bc2cd | 1106 | { |
14a3c10a | 1107 | assert(mr->terminates); |
fd4aa979 | 1108 | return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1); |
093bc2cd AK |
1109 | } |
1110 | ||
6c279db8 JQ |
1111 | bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr, |
1112 | hwaddr size, unsigned client) | |
1113 | { | |
1114 | bool ret; | |
1115 | assert(mr->terminates); | |
1116 | ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, | |
1117 | 1 << client); | |
1118 | if (ret) { | |
1119 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, | |
1120 | mr->ram_addr + addr + size, | |
1121 | 1 << client); | |
1122 | } | |
1123 | return ret; | |
1124 | } | |
1125 | ||
1126 | ||
093bc2cd AK |
1127 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
1128 | { | |
0d673e36 | 1129 | AddressSpace *as; |
5a583347 AK |
1130 | FlatRange *fr; |
1131 | ||
0d673e36 AK |
1132 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
1133 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { | |
1134 | if (fr->mr == mr) { | |
1135 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); | |
1136 | } | |
5a583347 AK |
1137 | } |
1138 | } | |
093bc2cd AK |
1139 | } |
1140 | ||
1141 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1142 | { | |
fb1cd6f9 | 1143 | if (mr->readonly != readonly) { |
59023ef4 | 1144 | memory_region_transaction_begin(); |
fb1cd6f9 | 1145 | mr->readonly = readonly; |
22bde714 | 1146 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1147 | memory_region_transaction_commit(); |
fb1cd6f9 | 1148 | } |
093bc2cd AK |
1149 | } |
1150 | ||
5f9a5ea1 | 1151 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 1152 | { |
5f9a5ea1 | 1153 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 1154 | memory_region_transaction_begin(); |
5f9a5ea1 | 1155 | mr->romd_mode = romd_mode; |
22bde714 | 1156 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1157 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1158 | } |
1159 | } | |
1160 | ||
a8170e5e AK |
1161 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
1162 | hwaddr size, unsigned client) | |
093bc2cd | 1163 | { |
14a3c10a | 1164 | assert(mr->terminates); |
5a583347 AK |
1165 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, |
1166 | mr->ram_addr + addr + size, | |
1167 | 1 << client); | |
093bc2cd AK |
1168 | } |
1169 | ||
1170 | void *memory_region_get_ram_ptr(MemoryRegion *mr) | |
1171 | { | |
1172 | if (mr->alias) { | |
1173 | return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset; | |
1174 | } | |
1175 | ||
14a3c10a | 1176 | assert(mr->terminates); |
093bc2cd | 1177 | |
021d26d1 | 1178 | return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK); |
093bc2cd AK |
1179 | } |
1180 | ||
0d673e36 | 1181 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
093bc2cd AK |
1182 | { |
1183 | FlatRange *fr; | |
1184 | CoalescedMemoryRange *cmr; | |
1185 | AddrRange tmp; | |
95d2994a | 1186 | MemoryRegionSection section; |
093bc2cd | 1187 | |
0d673e36 | 1188 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
093bc2cd | 1189 | if (fr->mr == mr) { |
95d2994a | 1190 | section = (MemoryRegionSection) { |
f6790af6 | 1191 | .address_space = as, |
95d2994a | 1192 | .offset_within_address_space = int128_get64(fr->addr.start), |
052e87b0 | 1193 | .size = fr->addr.size, |
95d2994a AK |
1194 | }; |
1195 | ||
1196 | MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, §ion, | |
1197 | int128_get64(fr->addr.start), | |
1198 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1199 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1200 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1201 | int128_sub(fr->addr.start, |
1202 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1203 | if (!addrrange_intersects(tmp, fr->addr)) { |
1204 | continue; | |
1205 | } | |
1206 | tmp = addrrange_intersection(tmp, fr->addr); | |
95d2994a AK |
1207 | MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, §ion, |
1208 | int128_get64(tmp.start), | |
1209 | int128_get64(tmp.size)); | |
093bc2cd AK |
1210 | } |
1211 | } | |
1212 | } | |
1213 | } | |
1214 | ||
0d673e36 AK |
1215 | static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1216 | { | |
1217 | AddressSpace *as; | |
1218 | ||
1219 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1220 | memory_region_update_coalesced_range_as(mr, as); | |
1221 | } | |
1222 | } | |
1223 | ||
093bc2cd AK |
1224 | void memory_region_set_coalescing(MemoryRegion *mr) |
1225 | { | |
1226 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1227 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1228 | } |
1229 | ||
1230 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 1231 | hwaddr offset, |
093bc2cd AK |
1232 | uint64_t size) |
1233 | { | |
7267c094 | 1234 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1235 | |
08dafab4 | 1236 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1237 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1238 | memory_region_update_coalesced_range(mr); | |
d410515e | 1239 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1240 | } |
1241 | ||
1242 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1243 | { | |
1244 | CoalescedMemoryRange *cmr; | |
1245 | ||
d410515e JK |
1246 | qemu_flush_coalesced_mmio_buffer(); |
1247 | mr->flush_coalesced_mmio = false; | |
1248 | ||
093bc2cd AK |
1249 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1250 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1251 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1252 | g_free(cmr); |
093bc2cd AK |
1253 | } |
1254 | memory_region_update_coalesced_range(mr); | |
1255 | } | |
1256 | ||
d410515e JK |
1257 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1258 | { | |
1259 | mr->flush_coalesced_mmio = true; | |
1260 | } | |
1261 | ||
1262 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1263 | { | |
1264 | qemu_flush_coalesced_mmio_buffer(); | |
1265 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1266 | mr->flush_coalesced_mmio = false; | |
1267 | } | |
1268 | } | |
1269 | ||
3e9d69e7 | 1270 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 1271 | hwaddr addr, |
3e9d69e7 AK |
1272 | unsigned size, |
1273 | bool match_data, | |
1274 | uint64_t data, | |
753d5e14 | 1275 | EventNotifier *e) |
3e9d69e7 AK |
1276 | { |
1277 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1278 | .addr.start = int128_make64(addr), |
1279 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1280 | .match_data = match_data, |
1281 | .data = data, | |
753d5e14 | 1282 | .e = e, |
3e9d69e7 AK |
1283 | }; |
1284 | unsigned i; | |
1285 | ||
28f362be | 1286 | adjust_endianness(mr, &mrfd.data, size); |
59023ef4 | 1287 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1288 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1289 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1290 | break; | |
1291 | } | |
1292 | } | |
1293 | ++mr->ioeventfd_nb; | |
7267c094 | 1294 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1295 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1296 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1297 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1298 | mr->ioeventfds[i] = mrfd; | |
22bde714 | 1299 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1300 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1301 | } |
1302 | ||
1303 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 1304 | hwaddr addr, |
3e9d69e7 AK |
1305 | unsigned size, |
1306 | bool match_data, | |
1307 | uint64_t data, | |
753d5e14 | 1308 | EventNotifier *e) |
3e9d69e7 AK |
1309 | { |
1310 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1311 | .addr.start = int128_make64(addr), |
1312 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1313 | .match_data = match_data, |
1314 | .data = data, | |
753d5e14 | 1315 | .e = e, |
3e9d69e7 AK |
1316 | }; |
1317 | unsigned i; | |
1318 | ||
28f362be | 1319 | adjust_endianness(mr, &mrfd.data, size); |
59023ef4 | 1320 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1321 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1322 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1323 | break; | |
1324 | } | |
1325 | } | |
1326 | assert(i != mr->ioeventfd_nb); | |
1327 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1328 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1329 | --mr->ioeventfd_nb; | |
7267c094 | 1330 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1331 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
22bde714 | 1332 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1333 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1334 | } |
1335 | ||
093bc2cd | 1336 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
a8170e5e | 1337 | hwaddr offset, |
093bc2cd AK |
1338 | MemoryRegion *subregion) |
1339 | { | |
1340 | MemoryRegion *other; | |
1341 | ||
59023ef4 JK |
1342 | memory_region_transaction_begin(); |
1343 | ||
093bc2cd AK |
1344 | assert(!subregion->parent); |
1345 | subregion->parent = mr; | |
1346 | subregion->addr = offset; | |
1347 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1348 | if (subregion->may_overlap || other->may_overlap) { | |
1349 | continue; | |
1350 | } | |
2c7cfd65 | 1351 | if (int128_ge(int128_make64(offset), |
08dafab4 AK |
1352 | int128_add(int128_make64(other->addr), other->size)) |
1353 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1354 | int128_make64(other->addr))) { | |
093bc2cd AK |
1355 | continue; |
1356 | } | |
a5e1cbc8 | 1357 | #if 0 |
860329b2 MW |
1358 | printf("warning: subregion collision %llx/%llx (%s) " |
1359 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1360 | (unsigned long long)offset, |
08dafab4 | 1361 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1362 | subregion->name, |
1363 | (unsigned long long)other->addr, | |
08dafab4 | 1364 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1365 | other->name); |
a5e1cbc8 | 1366 | #endif |
093bc2cd AK |
1367 | } |
1368 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1369 | if (subregion->priority >= other->priority) { | |
1370 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1371 | goto done; | |
1372 | } | |
1373 | } | |
1374 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1375 | done: | |
22bde714 | 1376 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1377 | memory_region_transaction_commit(); |
093bc2cd AK |
1378 | } |
1379 | ||
1380 | ||
1381 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 1382 | hwaddr offset, |
093bc2cd AK |
1383 | MemoryRegion *subregion) |
1384 | { | |
1385 | subregion->may_overlap = false; | |
1386 | subregion->priority = 0; | |
1387 | memory_region_add_subregion_common(mr, offset, subregion); | |
1388 | } | |
1389 | ||
1390 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 1391 | hwaddr offset, |
093bc2cd AK |
1392 | MemoryRegion *subregion, |
1393 | unsigned priority) | |
1394 | { | |
1395 | subregion->may_overlap = true; | |
1396 | subregion->priority = priority; | |
1397 | memory_region_add_subregion_common(mr, offset, subregion); | |
1398 | } | |
1399 | ||
1400 | void memory_region_del_subregion(MemoryRegion *mr, | |
1401 | MemoryRegion *subregion) | |
1402 | { | |
59023ef4 | 1403 | memory_region_transaction_begin(); |
093bc2cd AK |
1404 | assert(subregion->parent == mr); |
1405 | subregion->parent = NULL; | |
1406 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); | |
22bde714 | 1407 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1408 | memory_region_transaction_commit(); |
6bba19ba AK |
1409 | } |
1410 | ||
1411 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1412 | { | |
1413 | if (enabled == mr->enabled) { | |
1414 | return; | |
1415 | } | |
59023ef4 | 1416 | memory_region_transaction_begin(); |
6bba19ba | 1417 | mr->enabled = enabled; |
22bde714 | 1418 | memory_region_update_pending = true; |
59023ef4 | 1419 | memory_region_transaction_commit(); |
093bc2cd | 1420 | } |
1c0ffa58 | 1421 | |
a8170e5e | 1422 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
2282e1af AK |
1423 | { |
1424 | MemoryRegion *parent = mr->parent; | |
1425 | unsigned priority = mr->priority; | |
1426 | bool may_overlap = mr->may_overlap; | |
1427 | ||
1428 | if (addr == mr->addr || !parent) { | |
1429 | mr->addr = addr; | |
1430 | return; | |
1431 | } | |
1432 | ||
1433 | memory_region_transaction_begin(); | |
1434 | memory_region_del_subregion(parent, mr); | |
1435 | if (may_overlap) { | |
1436 | memory_region_add_subregion_overlap(parent, addr, mr, priority); | |
1437 | } else { | |
1438 | memory_region_add_subregion(parent, addr, mr); | |
1439 | } | |
1440 | memory_region_transaction_commit(); | |
1441 | } | |
1442 | ||
a8170e5e | 1443 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 1444 | { |
4703359e | 1445 | assert(mr->alias); |
4703359e | 1446 | |
59023ef4 | 1447 | if (offset == mr->alias_offset) { |
4703359e AK |
1448 | return; |
1449 | } | |
1450 | ||
59023ef4 JK |
1451 | memory_region_transaction_begin(); |
1452 | mr->alias_offset = offset; | |
22bde714 | 1453 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1454 | memory_region_transaction_commit(); |
4703359e AK |
1455 | } |
1456 | ||
e34911c4 AK |
1457 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1458 | { | |
e34911c4 AK |
1459 | return mr->ram_addr; |
1460 | } | |
1461 | ||
e2177955 AK |
1462 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1463 | { | |
1464 | const AddrRange *addr = addr_; | |
1465 | const FlatRange *fr = fr_; | |
1466 | ||
1467 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1468 | return -1; | |
1469 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1470 | return 1; | |
1471 | } | |
1472 | return 0; | |
1473 | } | |
1474 | ||
1475 | static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr) | |
1476 | { | |
8786db7c | 1477 | return bsearch(&addr, as->current_map->ranges, as->current_map->nr, |
e2177955 AK |
1478 | sizeof(FlatRange), cmp_flatrange_addr); |
1479 | } | |
1480 | ||
3ce10901 PB |
1481 | bool memory_region_present(MemoryRegion *parent, hwaddr addr) |
1482 | { | |
1483 | MemoryRegion *mr = memory_region_find(parent, addr, 1).mr; | |
1484 | if (!mr) { | |
1485 | return false; | |
1486 | } | |
1487 | return true; | |
1488 | } | |
1489 | ||
73034e9e | 1490 | MemoryRegionSection memory_region_find(MemoryRegion *mr, |
a8170e5e | 1491 | hwaddr addr, uint64_t size) |
e2177955 | 1492 | { |
052e87b0 | 1493 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
1494 | MemoryRegion *root; |
1495 | AddressSpace *as; | |
1496 | AddrRange range; | |
1497 | FlatRange *fr; | |
1498 | ||
1499 | addr += mr->addr; | |
1500 | for (root = mr; root->parent; ) { | |
1501 | root = root->parent; | |
1502 | addr += root->addr; | |
1503 | } | |
e2177955 | 1504 | |
73034e9e PB |
1505 | as = memory_region_to_address_space(root); |
1506 | range = addrrange_make(int128_make64(addr), int128_make64(size)); | |
1507 | fr = address_space_lookup(as, range); | |
e2177955 AK |
1508 | if (!fr) { |
1509 | return ret; | |
1510 | } | |
1511 | ||
8786db7c | 1512 | while (fr > as->current_map->ranges |
e2177955 AK |
1513 | && addrrange_intersects(fr[-1].addr, range)) { |
1514 | --fr; | |
1515 | } | |
1516 | ||
1517 | ret.mr = fr->mr; | |
73034e9e | 1518 | ret.address_space = as; |
e2177955 AK |
1519 | range = addrrange_intersection(range, fr->addr); |
1520 | ret.offset_within_region = fr->offset_in_region; | |
1521 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
1522 | fr->addr.start)); | |
052e87b0 | 1523 | ret.size = range.size; |
e2177955 | 1524 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 1525 | ret.readonly = fr->readonly; |
e2177955 AK |
1526 | return ret; |
1527 | } | |
1528 | ||
1d671369 | 1529 | void address_space_sync_dirty_bitmap(AddressSpace *as) |
86e775c6 | 1530 | { |
7664e80c AK |
1531 | FlatRange *fr; |
1532 | ||
8786db7c | 1533 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
72e22d2f | 1534 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c AK |
1535 | } |
1536 | } | |
1537 | ||
1538 | void memory_global_dirty_log_start(void) | |
1539 | { | |
7664e80c | 1540 | global_dirty_log = true; |
7376e582 | 1541 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
7664e80c AK |
1542 | } |
1543 | ||
1544 | void memory_global_dirty_log_stop(void) | |
1545 | { | |
7664e80c | 1546 | global_dirty_log = false; |
7376e582 | 1547 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
1548 | } |
1549 | ||
1550 | static void listener_add_address_space(MemoryListener *listener, | |
1551 | AddressSpace *as) | |
1552 | { | |
1553 | FlatRange *fr; | |
1554 | ||
221b3a3f | 1555 | if (listener->address_space_filter |
f6790af6 | 1556 | && listener->address_space_filter != as) { |
221b3a3f JG |
1557 | return; |
1558 | } | |
1559 | ||
7664e80c | 1560 | if (global_dirty_log) { |
975aefe0 AK |
1561 | if (listener->log_global_start) { |
1562 | listener->log_global_start(listener); | |
1563 | } | |
7664e80c | 1564 | } |
975aefe0 | 1565 | |
8786db7c | 1566 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
7664e80c AK |
1567 | MemoryRegionSection section = { |
1568 | .mr = fr->mr, | |
f6790af6 | 1569 | .address_space = as, |
7664e80c | 1570 | .offset_within_region = fr->offset_in_region, |
052e87b0 | 1571 | .size = fr->addr.size, |
7664e80c | 1572 | .offset_within_address_space = int128_get64(fr->addr.start), |
7a8499e8 | 1573 | .readonly = fr->readonly, |
7664e80c | 1574 | }; |
975aefe0 AK |
1575 | if (listener->region_add) { |
1576 | listener->region_add(listener, §ion); | |
1577 | } | |
7664e80c AK |
1578 | } |
1579 | } | |
1580 | ||
f6790af6 | 1581 | void memory_listener_register(MemoryListener *listener, AddressSpace *filter) |
7664e80c | 1582 | { |
72e22d2f | 1583 | MemoryListener *other = NULL; |
0d673e36 | 1584 | AddressSpace *as; |
72e22d2f | 1585 | |
7376e582 | 1586 | listener->address_space_filter = filter; |
72e22d2f AK |
1587 | if (QTAILQ_EMPTY(&memory_listeners) |
1588 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
1589 | memory_listeners)->priority) { | |
1590 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
1591 | } else { | |
1592 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
1593 | if (listener->priority < other->priority) { | |
1594 | break; | |
1595 | } | |
1596 | } | |
1597 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
1598 | } | |
0d673e36 AK |
1599 | |
1600 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1601 | listener_add_address_space(listener, as); | |
1602 | } | |
7664e80c AK |
1603 | } |
1604 | ||
1605 | void memory_listener_unregister(MemoryListener *listener) | |
1606 | { | |
72e22d2f | 1607 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 1608 | } |
e2177955 | 1609 | |
7dca8043 | 1610 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1c0ffa58 | 1611 | { |
59023ef4 | 1612 | memory_region_transaction_begin(); |
8786db7c AK |
1613 | as->root = root; |
1614 | as->current_map = g_new(FlatView, 1); | |
1615 | flatview_init(as->current_map); | |
4c19eb72 AK |
1616 | as->ioeventfd_nb = 0; |
1617 | as->ioeventfds = NULL; | |
0d673e36 | 1618 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
7dca8043 | 1619 | as->name = g_strdup(name ? name : "anonymous"); |
ac1970fb | 1620 | address_space_init_dispatch(as); |
f43793c7 PB |
1621 | memory_region_update_pending |= root->enabled; |
1622 | memory_region_transaction_commit(); | |
1c0ffa58 | 1623 | } |
658b2224 | 1624 | |
83f3c251 AK |
1625 | void address_space_destroy(AddressSpace *as) |
1626 | { | |
1627 | /* Flush out anything from MemoryListeners listening in on this */ | |
1628 | memory_region_transaction_begin(); | |
1629 | as->root = NULL; | |
1630 | memory_region_transaction_commit(); | |
1631 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
1632 | address_space_destroy_dispatch(as); | |
1633 | flatview_destroy(as->current_map); | |
7dca8043 | 1634 | g_free(as->name); |
83f3c251 | 1635 | g_free(as->current_map); |
4c19eb72 | 1636 | g_free(as->ioeventfds); |
83f3c251 AK |
1637 | } |
1638 | ||
791af8c8 | 1639 | bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size) |
acbbec5d | 1640 | { |
791af8c8 | 1641 | return memory_region_dispatch_read(mr, addr, pval, size); |
acbbec5d AK |
1642 | } |
1643 | ||
791af8c8 | 1644 | bool io_mem_write(MemoryRegion *mr, hwaddr addr, |
acbbec5d AK |
1645 | uint64_t val, unsigned size) |
1646 | { | |
791af8c8 | 1647 | return memory_region_dispatch_write(mr, addr, val, size); |
acbbec5d AK |
1648 | } |
1649 | ||
314e2987 BS |
1650 | typedef struct MemoryRegionList MemoryRegionList; |
1651 | ||
1652 | struct MemoryRegionList { | |
1653 | const MemoryRegion *mr; | |
1654 | bool printed; | |
1655 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
1656 | }; | |
1657 | ||
1658 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
1659 | ||
1660 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
1661 | const MemoryRegion *mr, unsigned int level, | |
a8170e5e | 1662 | hwaddr base, |
9479c57a | 1663 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 1664 | { |
9479c57a JK |
1665 | MemoryRegionList *new_ml, *ml, *next_ml; |
1666 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
1667 | const MemoryRegion *submr; |
1668 | unsigned int i; | |
1669 | ||
7ea692b2 | 1670 | if (!mr || !mr->enabled) { |
314e2987 BS |
1671 | return; |
1672 | } | |
1673 | ||
1674 | for (i = 0; i < level; i++) { | |
1675 | mon_printf(f, " "); | |
1676 | } | |
1677 | ||
1678 | if (mr->alias) { | |
1679 | MemoryRegionList *ml; | |
1680 | bool found = false; | |
1681 | ||
1682 | /* check if the alias is already in the queue */ | |
9479c57a | 1683 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
314e2987 BS |
1684 | if (ml->mr == mr->alias && !ml->printed) { |
1685 | found = true; | |
1686 | } | |
1687 | } | |
1688 | ||
1689 | if (!found) { | |
1690 | ml = g_new(MemoryRegionList, 1); | |
1691 | ml->mr = mr->alias; | |
1692 | ml->printed = false; | |
9479c57a | 1693 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 1694 | } |
4896d74b JK |
1695 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
1696 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
1697 | "-" TARGET_FMT_plx "\n", | |
314e2987 | 1698 | base + mr->addr, |
08dafab4 | 1699 | base + mr->addr |
052e87b0 | 1700 | + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))), |
4b474ba7 | 1701 | mr->priority, |
5f9a5ea1 JK |
1702 | mr->romd_mode ? 'R' : '-', |
1703 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
1704 | : '-', | |
314e2987 BS |
1705 | mr->name, |
1706 | mr->alias->name, | |
1707 | mr->alias_offset, | |
08dafab4 | 1708 | mr->alias_offset |
a8170e5e | 1709 | + (hwaddr)int128_get64(mr->size) - 1); |
314e2987 | 1710 | } else { |
4896d74b JK |
1711 | mon_printf(f, |
1712 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", | |
314e2987 | 1713 | base + mr->addr, |
08dafab4 | 1714 | base + mr->addr |
052e87b0 | 1715 | + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))), |
4b474ba7 | 1716 | mr->priority, |
5f9a5ea1 JK |
1717 | mr->romd_mode ? 'R' : '-', |
1718 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
1719 | : '-', | |
314e2987 BS |
1720 | mr->name); |
1721 | } | |
9479c57a JK |
1722 | |
1723 | QTAILQ_INIT(&submr_print_queue); | |
1724 | ||
314e2987 | 1725 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
1726 | new_ml = g_new(MemoryRegionList, 1); |
1727 | new_ml->mr = submr; | |
1728 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1729 | if (new_ml->mr->addr < ml->mr->addr || | |
1730 | (new_ml->mr->addr == ml->mr->addr && | |
1731 | new_ml->mr->priority > ml->mr->priority)) { | |
1732 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
1733 | new_ml = NULL; | |
1734 | break; | |
1735 | } | |
1736 | } | |
1737 | if (new_ml) { | |
1738 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
1739 | } | |
1740 | } | |
1741 | ||
1742 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1743 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
1744 | alias_print_queue); | |
1745 | } | |
1746 | ||
88365e47 | 1747 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 1748 | g_free(ml); |
314e2987 BS |
1749 | } |
1750 | } | |
1751 | ||
1752 | void mtree_info(fprintf_function mon_printf, void *f) | |
1753 | { | |
1754 | MemoryRegionListHead ml_head; | |
1755 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 1756 | AddressSpace *as; |
314e2987 BS |
1757 | |
1758 | QTAILQ_INIT(&ml_head); | |
1759 | ||
0d673e36 | 1760 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
0d673e36 AK |
1761 | mon_printf(f, "%s\n", as->name); |
1762 | mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head); | |
b9f9be88 BS |
1763 | } |
1764 | ||
1765 | mon_printf(f, "aliases\n"); | |
314e2987 BS |
1766 | /* print aliased regions */ |
1767 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
1768 | if (!ml->printed) { | |
1769 | mon_printf(f, "%s\n", ml->mr->name); | |
1770 | mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); | |
1771 | } | |
1772 | } | |
1773 | ||
1774 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 1775 | g_free(ml); |
314e2987 | 1776 | } |
314e2987 | 1777 | } |