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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <[email protected]> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
d38ea87a | 16 | #include "qemu/osdep.h" |
da34e65c | 17 | #include "qapi/error.h" |
33c11879 PB |
18 | #include "qemu-common.h" |
19 | #include "cpu.h" | |
022c62cb PB |
20 | #include "exec/memory.h" |
21 | #include "exec/address-spaces.h" | |
22 | #include "exec/ioport.h" | |
409ddd01 | 23 | #include "qapi/visitor.h" |
1de7afc9 | 24 | #include "qemu/bitops.h" |
8c56c1a5 | 25 | #include "qemu/error-report.h" |
2c9b15ca | 26 | #include "qom/object.h" |
55d5d048 | 27 | #include "trace.h" |
093bc2cd | 28 | |
022c62cb | 29 | #include "exec/memory-internal.h" |
220c3ebd | 30 | #include "exec/ram_addr.h" |
8c56c1a5 | 31 | #include "sysemu/kvm.h" |
e1c57ab8 | 32 | #include "sysemu/sysemu.h" |
67d95c15 | 33 | |
d197063f PB |
34 | //#define DEBUG_UNASSIGNED |
35 | ||
ec05ec26 PB |
36 | #define RAM_ADDR_INVALID (~(ram_addr_t)0) |
37 | ||
22bde714 JK |
38 | static unsigned memory_region_transaction_depth; |
39 | static bool memory_region_update_pending; | |
4dc56152 | 40 | static bool ioeventfd_update_pending; |
7664e80c AK |
41 | static bool global_dirty_log = false; |
42 | ||
72e22d2f AK |
43 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
44 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 45 | |
0d673e36 AK |
46 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
47 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
48 | ||
093bc2cd AK |
49 | typedef struct AddrRange AddrRange; |
50 | ||
8417cebf | 51 | /* |
c9cdaa3a | 52 | * Note that signed integers are needed for negative offsetting in aliases |
8417cebf AK |
53 | * (large MemoryRegion::alias_offset). |
54 | */ | |
093bc2cd | 55 | struct AddrRange { |
08dafab4 AK |
56 | Int128 start; |
57 | Int128 size; | |
093bc2cd AK |
58 | }; |
59 | ||
08dafab4 | 60 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
61 | { |
62 | return (AddrRange) { start, size }; | |
63 | } | |
64 | ||
65 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
66 | { | |
08dafab4 | 67 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
68 | } |
69 | ||
08dafab4 | 70 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 71 | { |
08dafab4 | 72 | return int128_add(r.start, r.size); |
093bc2cd AK |
73 | } |
74 | ||
08dafab4 | 75 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 76 | { |
08dafab4 | 77 | int128_addto(&range.start, delta); |
093bc2cd AK |
78 | return range; |
79 | } | |
80 | ||
08dafab4 AK |
81 | static bool addrrange_contains(AddrRange range, Int128 addr) |
82 | { | |
83 | return int128_ge(addr, range.start) | |
84 | && int128_lt(addr, addrrange_end(range)); | |
85 | } | |
86 | ||
093bc2cd AK |
87 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
88 | { | |
08dafab4 AK |
89 | return addrrange_contains(r1, r2.start) |
90 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
91 | } |
92 | ||
93 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
94 | { | |
08dafab4 AK |
95 | Int128 start = int128_max(r1.start, r2.start); |
96 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
97 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
98 | } |
99 | ||
0e0d36b4 AK |
100 | enum ListenerDirection { Forward, Reverse }; |
101 | ||
7376e582 AK |
102 | static bool memory_listener_match(MemoryListener *listener, |
103 | MemoryRegionSection *section) | |
104 | { | |
105 | return !listener->address_space_filter | |
106 | || listener->address_space_filter == section->address_space; | |
107 | } | |
108 | ||
109 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
0e0d36b4 AK |
110 | do { \ |
111 | MemoryListener *_listener; \ | |
112 | \ | |
113 | switch (_direction) { \ | |
114 | case Forward: \ | |
115 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
116 | if (_listener->_callback) { \ |
117 | _listener->_callback(_listener, ##_args); \ | |
118 | } \ | |
0e0d36b4 AK |
119 | } \ |
120 | break; \ | |
121 | case Reverse: \ | |
122 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
123 | memory_listeners, link) { \ | |
975aefe0 AK |
124 | if (_listener->_callback) { \ |
125 | _listener->_callback(_listener, ##_args); \ | |
126 | } \ | |
0e0d36b4 AK |
127 | } \ |
128 | break; \ | |
129 | default: \ | |
130 | abort(); \ | |
131 | } \ | |
132 | } while (0) | |
133 | ||
7376e582 AK |
134 | #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \ |
135 | do { \ | |
136 | MemoryListener *_listener; \ | |
137 | \ | |
138 | switch (_direction) { \ | |
139 | case Forward: \ | |
140 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
141 | if (_listener->_callback \ |
142 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
143 | _listener->_callback(_listener, _section, ##_args); \ |
144 | } \ | |
145 | } \ | |
146 | break; \ | |
147 | case Reverse: \ | |
148 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
149 | memory_listeners, link) { \ | |
975aefe0 AK |
150 | if (_listener->_callback \ |
151 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
152 | _listener->_callback(_listener, _section, ##_args); \ |
153 | } \ | |
154 | } \ | |
155 | break; \ | |
156 | default: \ | |
157 | abort(); \ | |
158 | } \ | |
159 | } while (0) | |
160 | ||
dfde4e6e | 161 | /* No need to ref/unref .mr, the FlatRange keeps it alive. */ |
b2dfd71c | 162 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \ |
7376e582 | 163 | MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
0e0d36b4 | 164 | .mr = (fr)->mr, \ |
f6790af6 | 165 | .address_space = (as), \ |
0e0d36b4 | 166 | .offset_within_region = (fr)->offset_in_region, \ |
052e87b0 | 167 | .size = (fr)->addr.size, \ |
0e0d36b4 | 168 | .offset_within_address_space = int128_get64((fr)->addr.start), \ |
7a8499e8 | 169 | .readonly = (fr)->readonly, \ |
b2dfd71c | 170 | }), ##_args) |
0e0d36b4 | 171 | |
093bc2cd AK |
172 | struct CoalescedMemoryRange { |
173 | AddrRange addr; | |
174 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
175 | }; | |
176 | ||
3e9d69e7 AK |
177 | struct MemoryRegionIoeventfd { |
178 | AddrRange addr; | |
179 | bool match_data; | |
180 | uint64_t data; | |
753d5e14 | 181 | EventNotifier *e; |
3e9d69e7 AK |
182 | }; |
183 | ||
184 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
185 | MemoryRegionIoeventfd b) | |
186 | { | |
08dafab4 | 187 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 188 | return true; |
08dafab4 | 189 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 190 | return false; |
08dafab4 | 191 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 192 | return true; |
08dafab4 | 193 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
194 | return false; |
195 | } else if (a.match_data < b.match_data) { | |
196 | return true; | |
197 | } else if (a.match_data > b.match_data) { | |
198 | return false; | |
199 | } else if (a.match_data) { | |
200 | if (a.data < b.data) { | |
201 | return true; | |
202 | } else if (a.data > b.data) { | |
203 | return false; | |
204 | } | |
205 | } | |
753d5e14 | 206 | if (a.e < b.e) { |
3e9d69e7 | 207 | return true; |
753d5e14 | 208 | } else if (a.e > b.e) { |
3e9d69e7 AK |
209 | return false; |
210 | } | |
211 | return false; | |
212 | } | |
213 | ||
214 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
215 | MemoryRegionIoeventfd b) | |
216 | { | |
217 | return !memory_region_ioeventfd_before(a, b) | |
218 | && !memory_region_ioeventfd_before(b, a); | |
219 | } | |
220 | ||
093bc2cd AK |
221 | typedef struct FlatRange FlatRange; |
222 | typedef struct FlatView FlatView; | |
223 | ||
224 | /* Range of memory in the global map. Addresses are absolute. */ | |
225 | struct FlatRange { | |
226 | MemoryRegion *mr; | |
a8170e5e | 227 | hwaddr offset_in_region; |
093bc2cd | 228 | AddrRange addr; |
5a583347 | 229 | uint8_t dirty_log_mask; |
fb1cd6f9 | 230 | bool readonly; |
093bc2cd AK |
231 | }; |
232 | ||
233 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
234 | * order. | |
235 | */ | |
236 | struct FlatView { | |
374f2981 | 237 | struct rcu_head rcu; |
856d7245 | 238 | unsigned ref; |
093bc2cd AK |
239 | FlatRange *ranges; |
240 | unsigned nr; | |
241 | unsigned nr_allocated; | |
242 | }; | |
243 | ||
cc31e6e7 AK |
244 | typedef struct AddressSpaceOps AddressSpaceOps; |
245 | ||
093bc2cd AK |
246 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
247 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
248 | ||
093bc2cd AK |
249 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
250 | { | |
251 | return a->mr == b->mr | |
252 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 253 | && a->offset_in_region == b->offset_in_region |
fb1cd6f9 | 254 | && a->readonly == b->readonly; |
093bc2cd AK |
255 | } |
256 | ||
257 | static void flatview_init(FlatView *view) | |
258 | { | |
856d7245 | 259 | view->ref = 1; |
093bc2cd AK |
260 | view->ranges = NULL; |
261 | view->nr = 0; | |
262 | view->nr_allocated = 0; | |
263 | } | |
264 | ||
265 | /* Insert a range into a given position. Caller is responsible for maintaining | |
266 | * sorting order. | |
267 | */ | |
268 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
269 | { | |
270 | if (view->nr == view->nr_allocated) { | |
271 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 272 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
273 | view->nr_allocated * sizeof(*view->ranges)); |
274 | } | |
275 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
276 | (view->nr - pos) * sizeof(FlatRange)); | |
277 | view->ranges[pos] = *range; | |
dfde4e6e | 278 | memory_region_ref(range->mr); |
093bc2cd AK |
279 | ++view->nr; |
280 | } | |
281 | ||
282 | static void flatview_destroy(FlatView *view) | |
283 | { | |
dfde4e6e PB |
284 | int i; |
285 | ||
286 | for (i = 0; i < view->nr; i++) { | |
287 | memory_region_unref(view->ranges[i].mr); | |
288 | } | |
7267c094 | 289 | g_free(view->ranges); |
a9a0c06d | 290 | g_free(view); |
093bc2cd AK |
291 | } |
292 | ||
856d7245 PB |
293 | static void flatview_ref(FlatView *view) |
294 | { | |
295 | atomic_inc(&view->ref); | |
296 | } | |
297 | ||
298 | static void flatview_unref(FlatView *view) | |
299 | { | |
300 | if (atomic_fetch_dec(&view->ref) == 1) { | |
301 | flatview_destroy(view); | |
302 | } | |
303 | } | |
304 | ||
3d8e6bf9 AK |
305 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
306 | { | |
08dafab4 | 307 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 308 | && r1->mr == r2->mr |
08dafab4 AK |
309 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
310 | r1->addr.size), | |
311 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 312 | && r1->dirty_log_mask == r2->dirty_log_mask |
fb1cd6f9 | 313 | && r1->readonly == r2->readonly; |
3d8e6bf9 AK |
314 | } |
315 | ||
8508e024 | 316 | /* Attempt to simplify a view by merging adjacent ranges */ |
3d8e6bf9 AK |
317 | static void flatview_simplify(FlatView *view) |
318 | { | |
319 | unsigned i, j; | |
320 | ||
321 | i = 0; | |
322 | while (i < view->nr) { | |
323 | j = i + 1; | |
324 | while (j < view->nr | |
325 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 326 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
327 | ++j; |
328 | } | |
329 | ++i; | |
330 | memmove(&view->ranges[i], &view->ranges[j], | |
331 | (view->nr - j) * sizeof(view->ranges[j])); | |
332 | view->nr -= j - i; | |
333 | } | |
334 | } | |
335 | ||
e7342aa3 PB |
336 | static bool memory_region_big_endian(MemoryRegion *mr) |
337 | { | |
338 | #ifdef TARGET_WORDS_BIGENDIAN | |
339 | return mr->ops->endianness != DEVICE_LITTLE_ENDIAN; | |
340 | #else | |
341 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
342 | #endif | |
343 | } | |
344 | ||
e11ef3d1 PB |
345 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
346 | { | |
347 | #ifdef TARGET_WORDS_BIGENDIAN | |
348 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; | |
349 | #else | |
350 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
351 | #endif | |
352 | } | |
353 | ||
354 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) | |
355 | { | |
356 | if (memory_region_wrong_endianness(mr)) { | |
357 | switch (size) { | |
358 | case 1: | |
359 | break; | |
360 | case 2: | |
361 | *data = bswap16(*data); | |
362 | break; | |
363 | case 4: | |
364 | *data = bswap32(*data); | |
365 | break; | |
366 | case 8: | |
367 | *data = bswap64(*data); | |
368 | break; | |
369 | default: | |
370 | abort(); | |
371 | } | |
372 | } | |
373 | } | |
374 | ||
4779dc1d HB |
375 | static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset) |
376 | { | |
377 | MemoryRegion *root; | |
378 | hwaddr abs_addr = offset; | |
379 | ||
380 | abs_addr += mr->addr; | |
381 | for (root = mr; root->container; ) { | |
382 | root = root->container; | |
383 | abs_addr += root->addr; | |
384 | } | |
385 | ||
386 | return abs_addr; | |
387 | } | |
388 | ||
5a68be94 HB |
389 | static int get_cpu_index(void) |
390 | { | |
391 | if (current_cpu) { | |
392 | return current_cpu->cpu_index; | |
393 | } | |
394 | return -1; | |
395 | } | |
396 | ||
cc05c43a PM |
397 | static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr, |
398 | hwaddr addr, | |
399 | uint64_t *value, | |
400 | unsigned size, | |
401 | unsigned shift, | |
402 | uint64_t mask, | |
403 | MemTxAttrs attrs) | |
404 | { | |
405 | uint64_t tmp; | |
406 | ||
407 | tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); | |
23d92d68 | 408 | if (mr->subpage) { |
5a68be94 | 409 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
410 | } else if (mr == &io_mem_notdirty) { |
411 | /* Accesses to code which has previously been translated into a TB show | |
412 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
413 | * MemoryRegion. */ | |
414 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
415 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
416 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 417 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 418 | } |
cc05c43a PM |
419 | *value |= (tmp & mask) << shift; |
420 | return MEMTX_OK; | |
421 | } | |
422 | ||
423 | static MemTxResult memory_region_read_accessor(MemoryRegion *mr, | |
ce5d2f33 PB |
424 | hwaddr addr, |
425 | uint64_t *value, | |
426 | unsigned size, | |
427 | unsigned shift, | |
cc05c43a PM |
428 | uint64_t mask, |
429 | MemTxAttrs attrs) | |
ce5d2f33 | 430 | { |
ce5d2f33 PB |
431 | uint64_t tmp; |
432 | ||
cc05c43a | 433 | tmp = mr->ops->read(mr->opaque, addr, size); |
23d92d68 | 434 | if (mr->subpage) { |
5a68be94 | 435 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
436 | } else if (mr == &io_mem_notdirty) { |
437 | /* Accesses to code which has previously been translated into a TB show | |
438 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
439 | * MemoryRegion. */ | |
440 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
441 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
442 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 443 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 444 | } |
ce5d2f33 | 445 | *value |= (tmp & mask) << shift; |
cc05c43a | 446 | return MEMTX_OK; |
ce5d2f33 PB |
447 | } |
448 | ||
cc05c43a PM |
449 | static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr, |
450 | hwaddr addr, | |
451 | uint64_t *value, | |
452 | unsigned size, | |
453 | unsigned shift, | |
454 | uint64_t mask, | |
455 | MemTxAttrs attrs) | |
164a4dcd | 456 | { |
cc05c43a PM |
457 | uint64_t tmp = 0; |
458 | MemTxResult r; | |
164a4dcd | 459 | |
cc05c43a | 460 | r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs); |
23d92d68 | 461 | if (mr->subpage) { |
5a68be94 | 462 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
463 | } else if (mr == &io_mem_notdirty) { |
464 | /* Accesses to code which has previously been translated into a TB show | |
465 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
466 | * MemoryRegion. */ | |
467 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
468 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
469 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 470 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 471 | } |
164a4dcd | 472 | *value |= (tmp & mask) << shift; |
cc05c43a | 473 | return r; |
164a4dcd AK |
474 | } |
475 | ||
cc05c43a PM |
476 | static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr, |
477 | hwaddr addr, | |
478 | uint64_t *value, | |
479 | unsigned size, | |
480 | unsigned shift, | |
481 | uint64_t mask, | |
482 | MemTxAttrs attrs) | |
ce5d2f33 | 483 | { |
ce5d2f33 PB |
484 | uint64_t tmp; |
485 | ||
486 | tmp = (*value >> shift) & mask; | |
23d92d68 | 487 | if (mr->subpage) { |
5a68be94 | 488 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
489 | } else if (mr == &io_mem_notdirty) { |
490 | /* Accesses to code which has previously been translated into a TB show | |
491 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
492 | * MemoryRegion. */ | |
493 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
494 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
495 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 496 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 497 | } |
ce5d2f33 | 498 | mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); |
cc05c43a | 499 | return MEMTX_OK; |
ce5d2f33 PB |
500 | } |
501 | ||
cc05c43a PM |
502 | static MemTxResult memory_region_write_accessor(MemoryRegion *mr, |
503 | hwaddr addr, | |
504 | uint64_t *value, | |
505 | unsigned size, | |
506 | unsigned shift, | |
507 | uint64_t mask, | |
508 | MemTxAttrs attrs) | |
164a4dcd | 509 | { |
164a4dcd AK |
510 | uint64_t tmp; |
511 | ||
512 | tmp = (*value >> shift) & mask; | |
23d92d68 | 513 | if (mr->subpage) { |
5a68be94 | 514 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
515 | } else if (mr == &io_mem_notdirty) { |
516 | /* Accesses to code which has previously been translated into a TB show | |
517 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
518 | * MemoryRegion. */ | |
519 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
520 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
521 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 522 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 523 | } |
164a4dcd | 524 | mr->ops->write(mr->opaque, addr, tmp, size); |
cc05c43a | 525 | return MEMTX_OK; |
164a4dcd AK |
526 | } |
527 | ||
cc05c43a PM |
528 | static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr, |
529 | hwaddr addr, | |
530 | uint64_t *value, | |
531 | unsigned size, | |
532 | unsigned shift, | |
533 | uint64_t mask, | |
534 | MemTxAttrs attrs) | |
535 | { | |
536 | uint64_t tmp; | |
537 | ||
cc05c43a | 538 | tmp = (*value >> shift) & mask; |
23d92d68 | 539 | if (mr->subpage) { |
5a68be94 | 540 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
541 | } else if (mr == &io_mem_notdirty) { |
542 | /* Accesses to code which has previously been translated into a TB show | |
543 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
544 | * MemoryRegion. */ | |
545 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
546 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
547 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 548 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 549 | } |
cc05c43a PM |
550 | return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs); |
551 | } | |
552 | ||
553 | static MemTxResult access_with_adjusted_size(hwaddr addr, | |
164a4dcd AK |
554 | uint64_t *value, |
555 | unsigned size, | |
556 | unsigned access_size_min, | |
557 | unsigned access_size_max, | |
cc05c43a PM |
558 | MemTxResult (*access)(MemoryRegion *mr, |
559 | hwaddr addr, | |
560 | uint64_t *value, | |
561 | unsigned size, | |
562 | unsigned shift, | |
563 | uint64_t mask, | |
564 | MemTxAttrs attrs), | |
565 | MemoryRegion *mr, | |
566 | MemTxAttrs attrs) | |
164a4dcd AK |
567 | { |
568 | uint64_t access_mask; | |
569 | unsigned access_size; | |
570 | unsigned i; | |
cc05c43a | 571 | MemTxResult r = MEMTX_OK; |
164a4dcd AK |
572 | |
573 | if (!access_size_min) { | |
574 | access_size_min = 1; | |
575 | } | |
576 | if (!access_size_max) { | |
577 | access_size_max = 4; | |
578 | } | |
ce5d2f33 PB |
579 | |
580 | /* FIXME: support unaligned access? */ | |
164a4dcd AK |
581 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
582 | access_mask = -1ULL >> (64 - access_size * 8); | |
e7342aa3 PB |
583 | if (memory_region_big_endian(mr)) { |
584 | for (i = 0; i < size; i += access_size) { | |
cc05c43a PM |
585 | r |= access(mr, addr + i, value, access_size, |
586 | (size - access_size - i) * 8, access_mask, attrs); | |
e7342aa3 PB |
587 | } |
588 | } else { | |
589 | for (i = 0; i < size; i += access_size) { | |
cc05c43a PM |
590 | r |= access(mr, addr + i, value, access_size, i * 8, |
591 | access_mask, attrs); | |
e7342aa3 | 592 | } |
164a4dcd | 593 | } |
cc05c43a | 594 | return r; |
164a4dcd AK |
595 | } |
596 | ||
e2177955 AK |
597 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
598 | { | |
0d673e36 AK |
599 | AddressSpace *as; |
600 | ||
feca4ac1 PB |
601 | while (mr->container) { |
602 | mr = mr->container; | |
e2177955 | 603 | } |
0d673e36 AK |
604 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
605 | if (mr == as->root) { | |
606 | return as; | |
607 | } | |
e2177955 | 608 | } |
eed2bacf | 609 | return NULL; |
e2177955 AK |
610 | } |
611 | ||
093bc2cd AK |
612 | /* Render a memory region into the global view. Ranges in @view obscure |
613 | * ranges in @mr. | |
614 | */ | |
615 | static void render_memory_region(FlatView *view, | |
616 | MemoryRegion *mr, | |
08dafab4 | 617 | Int128 base, |
fb1cd6f9 AK |
618 | AddrRange clip, |
619 | bool readonly) | |
093bc2cd AK |
620 | { |
621 | MemoryRegion *subregion; | |
622 | unsigned i; | |
a8170e5e | 623 | hwaddr offset_in_region; |
08dafab4 AK |
624 | Int128 remain; |
625 | Int128 now; | |
093bc2cd AK |
626 | FlatRange fr; |
627 | AddrRange tmp; | |
628 | ||
6bba19ba AK |
629 | if (!mr->enabled) { |
630 | return; | |
631 | } | |
632 | ||
08dafab4 | 633 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 634 | readonly |= mr->readonly; |
093bc2cd AK |
635 | |
636 | tmp = addrrange_make(base, mr->size); | |
637 | ||
638 | if (!addrrange_intersects(tmp, clip)) { | |
639 | return; | |
640 | } | |
641 | ||
642 | clip = addrrange_intersection(tmp, clip); | |
643 | ||
644 | if (mr->alias) { | |
08dafab4 AK |
645 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
646 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 647 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
648 | return; |
649 | } | |
650 | ||
651 | /* Render subregions in priority order. */ | |
652 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 653 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
654 | } |
655 | ||
14a3c10a | 656 | if (!mr->terminates) { |
093bc2cd AK |
657 | return; |
658 | } | |
659 | ||
08dafab4 | 660 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
661 | base = clip.start; |
662 | remain = clip.size; | |
663 | ||
2eb74e1a | 664 | fr.mr = mr; |
6f6a5ef3 | 665 | fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr); |
2eb74e1a PC |
666 | fr.readonly = readonly; |
667 | ||
093bc2cd | 668 | /* Render the region itself into any gaps left by the current view. */ |
08dafab4 AK |
669 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
670 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
671 | continue; |
672 | } | |
08dafab4 AK |
673 | if (int128_lt(base, view->ranges[i].addr.start)) { |
674 | now = int128_min(remain, | |
675 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
676 | fr.offset_in_region = offset_in_region; |
677 | fr.addr = addrrange_make(base, now); | |
678 | flatview_insert(view, i, &fr); | |
679 | ++i; | |
08dafab4 AK |
680 | int128_addto(&base, now); |
681 | offset_in_region += int128_get64(now); | |
682 | int128_subfrom(&remain, now); | |
093bc2cd | 683 | } |
d26a8cae AK |
684 | now = int128_sub(int128_min(int128_add(base, remain), |
685 | addrrange_end(view->ranges[i].addr)), | |
686 | base); | |
687 | int128_addto(&base, now); | |
688 | offset_in_region += int128_get64(now); | |
689 | int128_subfrom(&remain, now); | |
093bc2cd | 690 | } |
08dafab4 | 691 | if (int128_nz(remain)) { |
093bc2cd AK |
692 | fr.offset_in_region = offset_in_region; |
693 | fr.addr = addrrange_make(base, remain); | |
694 | flatview_insert(view, i, &fr); | |
695 | } | |
696 | } | |
697 | ||
698 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
a9a0c06d | 699 | static FlatView *generate_memory_topology(MemoryRegion *mr) |
093bc2cd | 700 | { |
a9a0c06d | 701 | FlatView *view; |
093bc2cd | 702 | |
a9a0c06d PB |
703 | view = g_new(FlatView, 1); |
704 | flatview_init(view); | |
093bc2cd | 705 | |
83f3c251 | 706 | if (mr) { |
a9a0c06d | 707 | render_memory_region(view, mr, int128_zero(), |
83f3c251 AK |
708 | addrrange_make(int128_zero(), int128_2_64()), false); |
709 | } | |
a9a0c06d | 710 | flatview_simplify(view); |
093bc2cd AK |
711 | |
712 | return view; | |
713 | } | |
714 | ||
3e9d69e7 AK |
715 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
716 | MemoryRegionIoeventfd *fds_new, | |
717 | unsigned fds_new_nb, | |
718 | MemoryRegionIoeventfd *fds_old, | |
719 | unsigned fds_old_nb) | |
720 | { | |
721 | unsigned iold, inew; | |
80a1ea37 AK |
722 | MemoryRegionIoeventfd *fd; |
723 | MemoryRegionSection section; | |
3e9d69e7 AK |
724 | |
725 | /* Generate a symmetric difference of the old and new fd sets, adding | |
726 | * and deleting as necessary. | |
727 | */ | |
728 | ||
729 | iold = inew = 0; | |
730 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
731 | if (iold < fds_old_nb | |
732 | && (inew == fds_new_nb | |
733 | || memory_region_ioeventfd_before(fds_old[iold], | |
734 | fds_new[inew]))) { | |
80a1ea37 AK |
735 | fd = &fds_old[iold]; |
736 | section = (MemoryRegionSection) { | |
f6790af6 | 737 | .address_space = as, |
80a1ea37 | 738 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 739 | .size = fd->addr.size, |
80a1ea37 AK |
740 | }; |
741 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
753d5e14 | 742 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
743 | ++iold; |
744 | } else if (inew < fds_new_nb | |
745 | && (iold == fds_old_nb | |
746 | || memory_region_ioeventfd_before(fds_new[inew], | |
747 | fds_old[iold]))) { | |
80a1ea37 AK |
748 | fd = &fds_new[inew]; |
749 | section = (MemoryRegionSection) { | |
f6790af6 | 750 | .address_space = as, |
80a1ea37 | 751 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 752 | .size = fd->addr.size, |
80a1ea37 AK |
753 | }; |
754 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
753d5e14 | 755 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
756 | ++inew; |
757 | } else { | |
758 | ++iold; | |
759 | ++inew; | |
760 | } | |
761 | } | |
762 | } | |
763 | ||
856d7245 PB |
764 | static FlatView *address_space_get_flatview(AddressSpace *as) |
765 | { | |
766 | FlatView *view; | |
767 | ||
374f2981 PB |
768 | rcu_read_lock(); |
769 | view = atomic_rcu_read(&as->current_map); | |
856d7245 | 770 | flatview_ref(view); |
374f2981 | 771 | rcu_read_unlock(); |
856d7245 PB |
772 | return view; |
773 | } | |
774 | ||
3e9d69e7 AK |
775 | static void address_space_update_ioeventfds(AddressSpace *as) |
776 | { | |
99e86347 | 777 | FlatView *view; |
3e9d69e7 AK |
778 | FlatRange *fr; |
779 | unsigned ioeventfd_nb = 0; | |
780 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
781 | AddrRange tmp; | |
782 | unsigned i; | |
783 | ||
856d7245 | 784 | view = address_space_get_flatview(as); |
99e86347 | 785 | FOR_EACH_FLAT_RANGE(fr, view) { |
3e9d69e7 AK |
786 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
787 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
788 | int128_sub(fr->addr.start, |
789 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
790 | if (addrrange_intersects(fr->addr, tmp)) { |
791 | ++ioeventfd_nb; | |
7267c094 | 792 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
793 | ioeventfd_nb * sizeof(*ioeventfds)); |
794 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
795 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
796 | } | |
797 | } | |
798 | } | |
799 | ||
800 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
801 | as->ioeventfds, as->ioeventfd_nb); | |
802 | ||
7267c094 | 803 | g_free(as->ioeventfds); |
3e9d69e7 AK |
804 | as->ioeventfds = ioeventfds; |
805 | as->ioeventfd_nb = ioeventfd_nb; | |
856d7245 | 806 | flatview_unref(view); |
3e9d69e7 AK |
807 | } |
808 | ||
b8af1afb | 809 | static void address_space_update_topology_pass(AddressSpace *as, |
a9a0c06d PB |
810 | const FlatView *old_view, |
811 | const FlatView *new_view, | |
b8af1afb | 812 | bool adding) |
093bc2cd | 813 | { |
093bc2cd AK |
814 | unsigned iold, inew; |
815 | FlatRange *frold, *frnew; | |
093bc2cd AK |
816 | |
817 | /* Generate a symmetric difference of the old and new memory maps. | |
818 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
819 | */ | |
820 | iold = inew = 0; | |
a9a0c06d PB |
821 | while (iold < old_view->nr || inew < new_view->nr) { |
822 | if (iold < old_view->nr) { | |
823 | frold = &old_view->ranges[iold]; | |
093bc2cd AK |
824 | } else { |
825 | frold = NULL; | |
826 | } | |
a9a0c06d PB |
827 | if (inew < new_view->nr) { |
828 | frnew = &new_view->ranges[inew]; | |
093bc2cd AK |
829 | } else { |
830 | frnew = NULL; | |
831 | } | |
832 | ||
833 | if (frold | |
834 | && (!frnew | |
08dafab4 AK |
835 | || int128_lt(frold->addr.start, frnew->addr.start) |
836 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd | 837 | && !flatrange_equal(frold, frnew)))) { |
41a6e477 | 838 | /* In old but not in new, or in both but attributes changed. */ |
093bc2cd | 839 | |
b8af1afb | 840 | if (!adding) { |
72e22d2f | 841 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
842 | } |
843 | ||
093bc2cd AK |
844 | ++iold; |
845 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
41a6e477 | 846 | /* In both and unchanged (except logging may have changed) */ |
093bc2cd | 847 | |
b8af1afb | 848 | if (adding) { |
50c1e149 | 849 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b2dfd71c PB |
850 | if (frnew->dirty_log_mask & ~frold->dirty_log_mask) { |
851 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start, | |
852 | frold->dirty_log_mask, | |
853 | frnew->dirty_log_mask); | |
854 | } | |
855 | if (frold->dirty_log_mask & ~frnew->dirty_log_mask) { | |
856 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop, | |
857 | frold->dirty_log_mask, | |
858 | frnew->dirty_log_mask); | |
b8af1afb | 859 | } |
5a583347 AK |
860 | } |
861 | ||
093bc2cd AK |
862 | ++iold; |
863 | ++inew; | |
093bc2cd AK |
864 | } else { |
865 | /* In new */ | |
866 | ||
b8af1afb | 867 | if (adding) { |
72e22d2f | 868 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
869 | } |
870 | ||
093bc2cd AK |
871 | ++inew; |
872 | } | |
873 | } | |
b8af1afb AK |
874 | } |
875 | ||
876 | ||
877 | static void address_space_update_topology(AddressSpace *as) | |
878 | { | |
856d7245 | 879 | FlatView *old_view = address_space_get_flatview(as); |
a9a0c06d | 880 | FlatView *new_view = generate_memory_topology(as->root); |
b8af1afb AK |
881 | |
882 | address_space_update_topology_pass(as, old_view, new_view, false); | |
883 | address_space_update_topology_pass(as, old_view, new_view, true); | |
884 | ||
374f2981 PB |
885 | /* Writes are protected by the BQL. */ |
886 | atomic_rcu_set(&as->current_map, new_view); | |
887 | call_rcu(old_view, flatview_unref, rcu); | |
856d7245 PB |
888 | |
889 | /* Note that all the old MemoryRegions are still alive up to this | |
890 | * point. This relieves most MemoryListeners from the need to | |
891 | * ref/unref the MemoryRegions they get---unless they use them | |
892 | * outside the iothread mutex, in which case precise reference | |
893 | * counting is necessary. | |
894 | */ | |
895 | flatview_unref(old_view); | |
896 | ||
3e9d69e7 | 897 | address_space_update_ioeventfds(as); |
093bc2cd AK |
898 | } |
899 | ||
4ef4db86 AK |
900 | void memory_region_transaction_begin(void) |
901 | { | |
bb880ded | 902 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
903 | ++memory_region_transaction_depth; |
904 | } | |
905 | ||
4dc56152 GA |
906 | static void memory_region_clear_pending(void) |
907 | { | |
908 | memory_region_update_pending = false; | |
909 | ioeventfd_update_pending = false; | |
910 | } | |
911 | ||
4ef4db86 AK |
912 | void memory_region_transaction_commit(void) |
913 | { | |
0d673e36 AK |
914 | AddressSpace *as; |
915 | ||
4ef4db86 AK |
916 | assert(memory_region_transaction_depth); |
917 | --memory_region_transaction_depth; | |
4dc56152 GA |
918 | if (!memory_region_transaction_depth) { |
919 | if (memory_region_update_pending) { | |
920 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); | |
02e2b95f | 921 | |
4dc56152 GA |
922 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
923 | address_space_update_topology(as); | |
924 | } | |
02e2b95f | 925 | |
4dc56152 GA |
926 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); |
927 | } else if (ioeventfd_update_pending) { | |
928 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
929 | address_space_update_ioeventfds(as); | |
930 | } | |
931 | } | |
932 | memory_region_clear_pending(); | |
933 | } | |
4ef4db86 AK |
934 | } |
935 | ||
545e92e0 AK |
936 | static void memory_region_destructor_none(MemoryRegion *mr) |
937 | { | |
938 | } | |
939 | ||
940 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
941 | { | |
f1060c55 | 942 | qemu_ram_free(mr->ram_block); |
545e92e0 AK |
943 | } |
944 | ||
d0a9b5bc AK |
945 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
946 | { | |
f1060c55 | 947 | qemu_ram_free(mr->ram_block); |
d0a9b5bc AK |
948 | } |
949 | ||
b4fefef9 PC |
950 | static bool memory_region_need_escape(char c) |
951 | { | |
952 | return c == '/' || c == '[' || c == '\\' || c == ']'; | |
953 | } | |
954 | ||
955 | static char *memory_region_escape_name(const char *name) | |
956 | { | |
957 | const char *p; | |
958 | char *escaped, *q; | |
959 | uint8_t c; | |
960 | size_t bytes = 0; | |
961 | ||
962 | for (p = name; *p; p++) { | |
963 | bytes += memory_region_need_escape(*p) ? 4 : 1; | |
964 | } | |
965 | if (bytes == p - name) { | |
966 | return g_memdup(name, bytes + 1); | |
967 | } | |
968 | ||
969 | escaped = g_malloc(bytes + 1); | |
970 | for (p = name, q = escaped; *p; p++) { | |
971 | c = *p; | |
972 | if (unlikely(memory_region_need_escape(c))) { | |
973 | *q++ = '\\'; | |
974 | *q++ = 'x'; | |
975 | *q++ = "0123456789abcdef"[c >> 4]; | |
976 | c = "0123456789abcdef"[c & 15]; | |
977 | } | |
978 | *q++ = c; | |
979 | } | |
980 | *q = 0; | |
981 | return escaped; | |
982 | } | |
983 | ||
093bc2cd | 984 | void memory_region_init(MemoryRegion *mr, |
2c9b15ca | 985 | Object *owner, |
093bc2cd AK |
986 | const char *name, |
987 | uint64_t size) | |
988 | { | |
22a893e4 | 989 | object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION); |
08dafab4 AK |
990 | mr->size = int128_make64(size); |
991 | if (size == UINT64_MAX) { | |
992 | mr->size = int128_2_64(); | |
993 | } | |
302fa283 | 994 | mr->name = g_strdup(name); |
612263cf | 995 | mr->owner = owner; |
58eaa217 | 996 | mr->ram_block = NULL; |
b4fefef9 PC |
997 | |
998 | if (name) { | |
843ef73a PC |
999 | char *escaped_name = memory_region_escape_name(name); |
1000 | char *name_array = g_strdup_printf("%s[*]", escaped_name); | |
612263cf PB |
1001 | |
1002 | if (!owner) { | |
1003 | owner = container_get(qdev_get_machine(), "/unattached"); | |
1004 | } | |
1005 | ||
843ef73a | 1006 | object_property_add_child(owner, name_array, OBJECT(mr), &error_abort); |
b4fefef9 | 1007 | object_unref(OBJECT(mr)); |
843ef73a PC |
1008 | g_free(name_array); |
1009 | g_free(escaped_name); | |
b4fefef9 PC |
1010 | } |
1011 | } | |
1012 | ||
d7bce999 EB |
1013 | static void memory_region_get_addr(Object *obj, Visitor *v, const char *name, |
1014 | void *opaque, Error **errp) | |
409ddd01 PC |
1015 | { |
1016 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1017 | uint64_t value = mr->addr; | |
1018 | ||
51e72bc1 | 1019 | visit_type_uint64(v, name, &value, errp); |
409ddd01 PC |
1020 | } |
1021 | ||
d7bce999 EB |
1022 | static void memory_region_get_container(Object *obj, Visitor *v, |
1023 | const char *name, void *opaque, | |
1024 | Error **errp) | |
409ddd01 PC |
1025 | { |
1026 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1027 | gchar *path = (gchar *)""; | |
1028 | ||
1029 | if (mr->container) { | |
1030 | path = object_get_canonical_path(OBJECT(mr->container)); | |
1031 | } | |
51e72bc1 | 1032 | visit_type_str(v, name, &path, errp); |
409ddd01 PC |
1033 | if (mr->container) { |
1034 | g_free(path); | |
1035 | } | |
1036 | } | |
1037 | ||
1038 | static Object *memory_region_resolve_container(Object *obj, void *opaque, | |
1039 | const char *part) | |
1040 | { | |
1041 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1042 | ||
1043 | return OBJECT(mr->container); | |
1044 | } | |
1045 | ||
d7bce999 EB |
1046 | static void memory_region_get_priority(Object *obj, Visitor *v, |
1047 | const char *name, void *opaque, | |
1048 | Error **errp) | |
d33382da PC |
1049 | { |
1050 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1051 | int32_t value = mr->priority; | |
1052 | ||
51e72bc1 | 1053 | visit_type_int32(v, name, &value, errp); |
d33382da PC |
1054 | } |
1055 | ||
d7bce999 EB |
1056 | static void memory_region_get_size(Object *obj, Visitor *v, const char *name, |
1057 | void *opaque, Error **errp) | |
52aef7bb PC |
1058 | { |
1059 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1060 | uint64_t value = memory_region_size(mr); | |
1061 | ||
51e72bc1 | 1062 | visit_type_uint64(v, name, &value, errp); |
52aef7bb PC |
1063 | } |
1064 | ||
b4fefef9 PC |
1065 | static void memory_region_initfn(Object *obj) |
1066 | { | |
1067 | MemoryRegion *mr = MEMORY_REGION(obj); | |
409ddd01 | 1068 | ObjectProperty *op; |
b4fefef9 PC |
1069 | |
1070 | mr->ops = &unassigned_mem_ops; | |
6bba19ba | 1071 | mr->enabled = true; |
5f9a5ea1 | 1072 | mr->romd_mode = true; |
196ea131 | 1073 | mr->global_locking = true; |
545e92e0 | 1074 | mr->destructor = memory_region_destructor_none; |
093bc2cd | 1075 | QTAILQ_INIT(&mr->subregions); |
093bc2cd | 1076 | QTAILQ_INIT(&mr->coalesced); |
409ddd01 PC |
1077 | |
1078 | op = object_property_add(OBJECT(mr), "container", | |
1079 | "link<" TYPE_MEMORY_REGION ">", | |
1080 | memory_region_get_container, | |
1081 | NULL, /* memory_region_set_container */ | |
1082 | NULL, NULL, &error_abort); | |
1083 | op->resolve = memory_region_resolve_container; | |
1084 | ||
1085 | object_property_add(OBJECT(mr), "addr", "uint64", | |
1086 | memory_region_get_addr, | |
1087 | NULL, /* memory_region_set_addr */ | |
1088 | NULL, NULL, &error_abort); | |
d33382da PC |
1089 | object_property_add(OBJECT(mr), "priority", "uint32", |
1090 | memory_region_get_priority, | |
1091 | NULL, /* memory_region_set_priority */ | |
1092 | NULL, NULL, &error_abort); | |
52aef7bb PC |
1093 | object_property_add(OBJECT(mr), "size", "uint64", |
1094 | memory_region_get_size, | |
1095 | NULL, /* memory_region_set_size, */ | |
1096 | NULL, NULL, &error_abort); | |
093bc2cd AK |
1097 | } |
1098 | ||
b018ddf6 PB |
1099 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
1100 | unsigned size) | |
1101 | { | |
1102 | #ifdef DEBUG_UNASSIGNED | |
1103 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
1104 | #endif | |
4917cf44 AF |
1105 | if (current_cpu != NULL) { |
1106 | cpu_unassigned_access(current_cpu, addr, false, false, 0, size); | |
c658b94f | 1107 | } |
68a7439a | 1108 | return 0; |
b018ddf6 PB |
1109 | } |
1110 | ||
1111 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
1112 | uint64_t val, unsigned size) | |
1113 | { | |
1114 | #ifdef DEBUG_UNASSIGNED | |
1115 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
1116 | #endif | |
4917cf44 AF |
1117 | if (current_cpu != NULL) { |
1118 | cpu_unassigned_access(current_cpu, addr, true, false, 0, size); | |
c658b94f | 1119 | } |
b018ddf6 PB |
1120 | } |
1121 | ||
d197063f PB |
1122 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
1123 | unsigned size, bool is_write) | |
1124 | { | |
1125 | return false; | |
1126 | } | |
1127 | ||
1128 | const MemoryRegionOps unassigned_mem_ops = { | |
1129 | .valid.accepts = unassigned_mem_accepts, | |
1130 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1131 | }; | |
1132 | ||
d2702032 PB |
1133 | bool memory_region_access_valid(MemoryRegion *mr, |
1134 | hwaddr addr, | |
1135 | unsigned size, | |
1136 | bool is_write) | |
093bc2cd | 1137 | { |
a014ed07 PB |
1138 | int access_size_min, access_size_max; |
1139 | int access_size, i; | |
897fa7cf | 1140 | |
093bc2cd AK |
1141 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
1142 | return false; | |
1143 | } | |
1144 | ||
a014ed07 | 1145 | if (!mr->ops->valid.accepts) { |
093bc2cd AK |
1146 | return true; |
1147 | } | |
1148 | ||
a014ed07 PB |
1149 | access_size_min = mr->ops->valid.min_access_size; |
1150 | if (!mr->ops->valid.min_access_size) { | |
1151 | access_size_min = 1; | |
1152 | } | |
1153 | ||
1154 | access_size_max = mr->ops->valid.max_access_size; | |
1155 | if (!mr->ops->valid.max_access_size) { | |
1156 | access_size_max = 4; | |
1157 | } | |
1158 | ||
1159 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
1160 | for (i = 0; i < size; i += access_size) { | |
1161 | if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, | |
1162 | is_write)) { | |
1163 | return false; | |
1164 | } | |
093bc2cd | 1165 | } |
a014ed07 | 1166 | |
093bc2cd AK |
1167 | return true; |
1168 | } | |
1169 | ||
cc05c43a PM |
1170 | static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr, |
1171 | hwaddr addr, | |
1172 | uint64_t *pval, | |
1173 | unsigned size, | |
1174 | MemTxAttrs attrs) | |
093bc2cd | 1175 | { |
cc05c43a | 1176 | *pval = 0; |
093bc2cd | 1177 | |
ce5d2f33 | 1178 | if (mr->ops->read) { |
cc05c43a PM |
1179 | return access_with_adjusted_size(addr, pval, size, |
1180 | mr->ops->impl.min_access_size, | |
1181 | mr->ops->impl.max_access_size, | |
1182 | memory_region_read_accessor, | |
1183 | mr, attrs); | |
1184 | } else if (mr->ops->read_with_attrs) { | |
1185 | return access_with_adjusted_size(addr, pval, size, | |
1186 | mr->ops->impl.min_access_size, | |
1187 | mr->ops->impl.max_access_size, | |
1188 | memory_region_read_with_attrs_accessor, | |
1189 | mr, attrs); | |
ce5d2f33 | 1190 | } else { |
cc05c43a PM |
1191 | return access_with_adjusted_size(addr, pval, size, 1, 4, |
1192 | memory_region_oldmmio_read_accessor, | |
1193 | mr, attrs); | |
74901c3b | 1194 | } |
093bc2cd AK |
1195 | } |
1196 | ||
3b643495 PM |
1197 | MemTxResult memory_region_dispatch_read(MemoryRegion *mr, |
1198 | hwaddr addr, | |
1199 | uint64_t *pval, | |
1200 | unsigned size, | |
1201 | MemTxAttrs attrs) | |
a621f38d | 1202 | { |
cc05c43a PM |
1203 | MemTxResult r; |
1204 | ||
791af8c8 PB |
1205 | if (!memory_region_access_valid(mr, addr, size, false)) { |
1206 | *pval = unassigned_mem_read(mr, addr, size); | |
cc05c43a | 1207 | return MEMTX_DECODE_ERROR; |
791af8c8 | 1208 | } |
a621f38d | 1209 | |
cc05c43a | 1210 | r = memory_region_dispatch_read1(mr, addr, pval, size, attrs); |
791af8c8 | 1211 | adjust_endianness(mr, pval, size); |
cc05c43a | 1212 | return r; |
a621f38d | 1213 | } |
093bc2cd | 1214 | |
8c56c1a5 PF |
1215 | /* Return true if an eventfd was signalled */ |
1216 | static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr, | |
1217 | hwaddr addr, | |
1218 | uint64_t data, | |
1219 | unsigned size, | |
1220 | MemTxAttrs attrs) | |
1221 | { | |
1222 | MemoryRegionIoeventfd ioeventfd = { | |
1223 | .addr = addrrange_make(int128_make64(addr), int128_make64(size)), | |
1224 | .data = data, | |
1225 | }; | |
1226 | unsigned i; | |
1227 | ||
1228 | for (i = 0; i < mr->ioeventfd_nb; i++) { | |
1229 | ioeventfd.match_data = mr->ioeventfds[i].match_data; | |
1230 | ioeventfd.e = mr->ioeventfds[i].e; | |
1231 | ||
1232 | if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) { | |
1233 | event_notifier_set(ioeventfd.e); | |
1234 | return true; | |
1235 | } | |
1236 | } | |
1237 | ||
1238 | return false; | |
1239 | } | |
1240 | ||
3b643495 PM |
1241 | MemTxResult memory_region_dispatch_write(MemoryRegion *mr, |
1242 | hwaddr addr, | |
1243 | uint64_t data, | |
1244 | unsigned size, | |
1245 | MemTxAttrs attrs) | |
a621f38d | 1246 | { |
897fa7cf | 1247 | if (!memory_region_access_valid(mr, addr, size, true)) { |
b018ddf6 | 1248 | unassigned_mem_write(mr, addr, data, size); |
cc05c43a | 1249 | return MEMTX_DECODE_ERROR; |
093bc2cd AK |
1250 | } |
1251 | ||
a621f38d AK |
1252 | adjust_endianness(mr, &data, size); |
1253 | ||
8c56c1a5 PF |
1254 | if ((!kvm_eventfds_enabled()) && |
1255 | memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) { | |
1256 | return MEMTX_OK; | |
1257 | } | |
1258 | ||
ce5d2f33 | 1259 | if (mr->ops->write) { |
cc05c43a PM |
1260 | return access_with_adjusted_size(addr, &data, size, |
1261 | mr->ops->impl.min_access_size, | |
1262 | mr->ops->impl.max_access_size, | |
1263 | memory_region_write_accessor, mr, | |
1264 | attrs); | |
1265 | } else if (mr->ops->write_with_attrs) { | |
1266 | return | |
1267 | access_with_adjusted_size(addr, &data, size, | |
1268 | mr->ops->impl.min_access_size, | |
1269 | mr->ops->impl.max_access_size, | |
1270 | memory_region_write_with_attrs_accessor, | |
1271 | mr, attrs); | |
ce5d2f33 | 1272 | } else { |
cc05c43a PM |
1273 | return access_with_adjusted_size(addr, &data, size, 1, 4, |
1274 | memory_region_oldmmio_write_accessor, | |
1275 | mr, attrs); | |
74901c3b | 1276 | } |
093bc2cd AK |
1277 | } |
1278 | ||
093bc2cd | 1279 | void memory_region_init_io(MemoryRegion *mr, |
2c9b15ca | 1280 | Object *owner, |
093bc2cd AK |
1281 | const MemoryRegionOps *ops, |
1282 | void *opaque, | |
1283 | const char *name, | |
1284 | uint64_t size) | |
1285 | { | |
2c9b15ca | 1286 | memory_region_init(mr, owner, name, size); |
6d6d2abf | 1287 | mr->ops = ops ? ops : &unassigned_mem_ops; |
093bc2cd | 1288 | mr->opaque = opaque; |
14a3c10a | 1289 | mr->terminates = true; |
093bc2cd AK |
1290 | } |
1291 | ||
1292 | void memory_region_init_ram(MemoryRegion *mr, | |
2c9b15ca | 1293 | Object *owner, |
093bc2cd | 1294 | const char *name, |
49946538 HT |
1295 | uint64_t size, |
1296 | Error **errp) | |
093bc2cd | 1297 | { |
2c9b15ca | 1298 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1299 | mr->ram = true; |
14a3c10a | 1300 | mr->terminates = true; |
545e92e0 | 1301 | mr->destructor = memory_region_destructor_ram; |
8e41fb63 | 1302 | mr->ram_block = qemu_ram_alloc(size, mr, errp); |
677e7805 | 1303 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
0b183fc8 PB |
1304 | } |
1305 | ||
60786ef3 MT |
1306 | void memory_region_init_resizeable_ram(MemoryRegion *mr, |
1307 | Object *owner, | |
1308 | const char *name, | |
1309 | uint64_t size, | |
1310 | uint64_t max_size, | |
1311 | void (*resized)(const char*, | |
1312 | uint64_t length, | |
1313 | void *host), | |
1314 | Error **errp) | |
1315 | { | |
1316 | memory_region_init(mr, owner, name, size); | |
1317 | mr->ram = true; | |
1318 | mr->terminates = true; | |
1319 | mr->destructor = memory_region_destructor_ram; | |
8e41fb63 FZ |
1320 | mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized, |
1321 | mr, errp); | |
677e7805 | 1322 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
60786ef3 MT |
1323 | } |
1324 | ||
0b183fc8 PB |
1325 | #ifdef __linux__ |
1326 | void memory_region_init_ram_from_file(MemoryRegion *mr, | |
1327 | struct Object *owner, | |
1328 | const char *name, | |
1329 | uint64_t size, | |
dbcb8981 | 1330 | bool share, |
7f56e740 PB |
1331 | const char *path, |
1332 | Error **errp) | |
0b183fc8 PB |
1333 | { |
1334 | memory_region_init(mr, owner, name, size); | |
1335 | mr->ram = true; | |
1336 | mr->terminates = true; | |
1337 | mr->destructor = memory_region_destructor_ram; | |
8e41fb63 | 1338 | mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp); |
677e7805 | 1339 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
093bc2cd | 1340 | } |
0b183fc8 | 1341 | #endif |
093bc2cd AK |
1342 | |
1343 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
2c9b15ca | 1344 | Object *owner, |
093bc2cd AK |
1345 | const char *name, |
1346 | uint64_t size, | |
1347 | void *ptr) | |
1348 | { | |
2c9b15ca | 1349 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1350 | mr->ram = true; |
14a3c10a | 1351 | mr->terminates = true; |
fc3e7665 | 1352 | mr->destructor = memory_region_destructor_ram; |
677e7805 | 1353 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
ef701d7b HT |
1354 | |
1355 | /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */ | |
1356 | assert(ptr != NULL); | |
8e41fb63 | 1357 | mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal); |
093bc2cd AK |
1358 | } |
1359 | ||
e4dc3f59 ND |
1360 | void memory_region_set_skip_dump(MemoryRegion *mr) |
1361 | { | |
1362 | mr->skip_dump = true; | |
1363 | } | |
1364 | ||
093bc2cd | 1365 | void memory_region_init_alias(MemoryRegion *mr, |
2c9b15ca | 1366 | Object *owner, |
093bc2cd AK |
1367 | const char *name, |
1368 | MemoryRegion *orig, | |
a8170e5e | 1369 | hwaddr offset, |
093bc2cd AK |
1370 | uint64_t size) |
1371 | { | |
2c9b15ca | 1372 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
1373 | mr->alias = orig; |
1374 | mr->alias_offset = offset; | |
1375 | } | |
1376 | ||
d0a9b5bc | 1377 | void memory_region_init_rom_device(MemoryRegion *mr, |
2c9b15ca | 1378 | Object *owner, |
d0a9b5bc | 1379 | const MemoryRegionOps *ops, |
75f5941c | 1380 | void *opaque, |
d0a9b5bc | 1381 | const char *name, |
33e0eb52 HT |
1382 | uint64_t size, |
1383 | Error **errp) | |
d0a9b5bc | 1384 | { |
2c9b15ca | 1385 | memory_region_init(mr, owner, name, size); |
7bc2b9cd | 1386 | mr->ops = ops; |
75f5941c | 1387 | mr->opaque = opaque; |
d0a9b5bc | 1388 | mr->terminates = true; |
75c578dc | 1389 | mr->rom_device = true; |
d0a9b5bc | 1390 | mr->destructor = memory_region_destructor_rom_device; |
8e41fb63 | 1391 | mr->ram_block = qemu_ram_alloc(size, mr, errp); |
d0a9b5bc AK |
1392 | } |
1393 | ||
30951157 | 1394 | void memory_region_init_iommu(MemoryRegion *mr, |
2c9b15ca | 1395 | Object *owner, |
30951157 AK |
1396 | const MemoryRegionIOMMUOps *ops, |
1397 | const char *name, | |
1398 | uint64_t size) | |
1399 | { | |
2c9b15ca | 1400 | memory_region_init(mr, owner, name, size); |
30951157 AK |
1401 | mr->iommu_ops = ops, |
1402 | mr->terminates = true; /* then re-forwards */ | |
06866575 | 1403 | notifier_list_init(&mr->iommu_notify); |
30951157 AK |
1404 | } |
1405 | ||
b4fefef9 | 1406 | static void memory_region_finalize(Object *obj) |
093bc2cd | 1407 | { |
b4fefef9 PC |
1408 | MemoryRegion *mr = MEMORY_REGION(obj); |
1409 | ||
2e2b8eb7 PB |
1410 | assert(!mr->container); |
1411 | ||
1412 | /* We know the region is not visible in any address space (it | |
1413 | * does not have a container and cannot be a root either because | |
1414 | * it has no references, so we can blindly clear mr->enabled. | |
1415 | * memory_region_set_enabled instead could trigger a transaction | |
1416 | * and cause an infinite loop. | |
1417 | */ | |
1418 | mr->enabled = false; | |
1419 | memory_region_transaction_begin(); | |
1420 | while (!QTAILQ_EMPTY(&mr->subregions)) { | |
1421 | MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions); | |
1422 | memory_region_del_subregion(mr, subregion); | |
1423 | } | |
1424 | memory_region_transaction_commit(); | |
1425 | ||
545e92e0 | 1426 | mr->destructor(mr); |
093bc2cd | 1427 | memory_region_clear_coalescing(mr); |
302fa283 | 1428 | g_free((char *)mr->name); |
7267c094 | 1429 | g_free(mr->ioeventfds); |
093bc2cd AK |
1430 | } |
1431 | ||
803c0816 PB |
1432 | Object *memory_region_owner(MemoryRegion *mr) |
1433 | { | |
22a893e4 PB |
1434 | Object *obj = OBJECT(mr); |
1435 | return obj->parent; | |
803c0816 PB |
1436 | } |
1437 | ||
46637be2 PB |
1438 | void memory_region_ref(MemoryRegion *mr) |
1439 | { | |
22a893e4 PB |
1440 | /* MMIO callbacks most likely will access data that belongs |
1441 | * to the owner, hence the need to ref/unref the owner whenever | |
1442 | * the memory region is in use. | |
1443 | * | |
1444 | * The memory region is a child of its owner. As long as the | |
1445 | * owner doesn't call unparent itself on the memory region, | |
1446 | * ref-ing the owner will also keep the memory region alive. | |
612263cf PB |
1447 | * Memory regions without an owner are supposed to never go away; |
1448 | * we do not ref/unref them because it slows down DMA sensibly. | |
22a893e4 | 1449 | */ |
612263cf PB |
1450 | if (mr && mr->owner) { |
1451 | object_ref(mr->owner); | |
46637be2 PB |
1452 | } |
1453 | } | |
1454 | ||
1455 | void memory_region_unref(MemoryRegion *mr) | |
1456 | { | |
612263cf PB |
1457 | if (mr && mr->owner) { |
1458 | object_unref(mr->owner); | |
46637be2 PB |
1459 | } |
1460 | } | |
1461 | ||
093bc2cd AK |
1462 | uint64_t memory_region_size(MemoryRegion *mr) |
1463 | { | |
08dafab4 AK |
1464 | if (int128_eq(mr->size, int128_2_64())) { |
1465 | return UINT64_MAX; | |
1466 | } | |
1467 | return int128_get64(mr->size); | |
093bc2cd AK |
1468 | } |
1469 | ||
5d546d4b | 1470 | const char *memory_region_name(const MemoryRegion *mr) |
8991c79b | 1471 | { |
d1dd32af PC |
1472 | if (!mr->name) { |
1473 | ((MemoryRegion *)mr)->name = | |
1474 | object_get_canonical_path_component(OBJECT(mr)); | |
1475 | } | |
302fa283 | 1476 | return mr->name; |
8991c79b AK |
1477 | } |
1478 | ||
e4dc3f59 ND |
1479 | bool memory_region_is_skip_dump(MemoryRegion *mr) |
1480 | { | |
1481 | return mr->skip_dump; | |
1482 | } | |
1483 | ||
2d1a35be | 1484 | uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr) |
55043ba3 | 1485 | { |
6f6a5ef3 PB |
1486 | uint8_t mask = mr->dirty_log_mask; |
1487 | if (global_dirty_log) { | |
1488 | mask |= (1 << DIRTY_MEMORY_MIGRATION); | |
1489 | } | |
1490 | return mask; | |
55043ba3 AK |
1491 | } |
1492 | ||
2d1a35be PB |
1493 | bool memory_region_is_logging(MemoryRegion *mr, uint8_t client) |
1494 | { | |
1495 | return memory_region_get_dirty_log_mask(mr) & (1 << client); | |
1496 | } | |
1497 | ||
06866575 DG |
1498 | void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n) |
1499 | { | |
1500 | notifier_list_add(&mr->iommu_notify, n); | |
1501 | } | |
1502 | ||
a788f227 DG |
1503 | void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n, |
1504 | hwaddr granularity, bool is_write) | |
1505 | { | |
1506 | hwaddr addr; | |
1507 | IOMMUTLBEntry iotlb; | |
1508 | ||
1509 | for (addr = 0; addr < memory_region_size(mr); addr += granularity) { | |
1510 | iotlb = mr->iommu_ops->translate(mr, addr, is_write); | |
1511 | if (iotlb.perm != IOMMU_NONE) { | |
1512 | n->notify(n, &iotlb); | |
1513 | } | |
1514 | ||
1515 | /* if (2^64 - MR size) < granularity, it's possible to get an | |
1516 | * infinite loop here. This should catch such a wraparound */ | |
1517 | if ((addr + granularity) < addr) { | |
1518 | break; | |
1519 | } | |
1520 | } | |
1521 | } | |
1522 | ||
06866575 DG |
1523 | void memory_region_unregister_iommu_notifier(Notifier *n) |
1524 | { | |
1525 | notifier_remove(n); | |
1526 | } | |
1527 | ||
1528 | void memory_region_notify_iommu(MemoryRegion *mr, | |
1529 | IOMMUTLBEntry entry) | |
1530 | { | |
1531 | assert(memory_region_is_iommu(mr)); | |
1532 | notifier_list_notify(&mr->iommu_notify, &entry); | |
1533 | } | |
1534 | ||
093bc2cd AK |
1535 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1536 | { | |
5a583347 | 1537 | uint8_t mask = 1 << client; |
deb809ed | 1538 | uint8_t old_logging; |
5a583347 | 1539 | |
dbddac6d | 1540 | assert(client == DIRTY_MEMORY_VGA); |
deb809ed PB |
1541 | old_logging = mr->vga_logging_count; |
1542 | mr->vga_logging_count += log ? 1 : -1; | |
1543 | if (!!old_logging == !!mr->vga_logging_count) { | |
1544 | return; | |
1545 | } | |
1546 | ||
59023ef4 | 1547 | memory_region_transaction_begin(); |
5a583347 | 1548 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 1549 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1550 | memory_region_transaction_commit(); |
093bc2cd AK |
1551 | } |
1552 | ||
a8170e5e AK |
1553 | bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr, |
1554 | hwaddr size, unsigned client) | |
093bc2cd | 1555 | { |
8e41fb63 FZ |
1556 | assert(mr->ram_block); |
1557 | return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr, | |
1558 | size, client); | |
093bc2cd AK |
1559 | } |
1560 | ||
a8170e5e AK |
1561 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
1562 | hwaddr size) | |
093bc2cd | 1563 | { |
8e41fb63 FZ |
1564 | assert(mr->ram_block); |
1565 | cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr, | |
1566 | size, | |
58d2707e | 1567 | memory_region_get_dirty_log_mask(mr)); |
093bc2cd AK |
1568 | } |
1569 | ||
6c279db8 JQ |
1570 | bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr, |
1571 | hwaddr size, unsigned client) | |
1572 | { | |
8e41fb63 FZ |
1573 | assert(mr->ram_block); |
1574 | return cpu_physical_memory_test_and_clear_dirty( | |
1575 | memory_region_get_ram_addr(mr) + addr, size, client); | |
6c279db8 JQ |
1576 | } |
1577 | ||
1578 | ||
093bc2cd AK |
1579 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
1580 | { | |
0d673e36 | 1581 | AddressSpace *as; |
5a583347 AK |
1582 | FlatRange *fr; |
1583 | ||
0d673e36 | 1584 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
856d7245 | 1585 | FlatView *view = address_space_get_flatview(as); |
99e86347 | 1586 | FOR_EACH_FLAT_RANGE(fr, view) { |
0d673e36 AK |
1587 | if (fr->mr == mr) { |
1588 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); | |
1589 | } | |
5a583347 | 1590 | } |
856d7245 | 1591 | flatview_unref(view); |
5a583347 | 1592 | } |
093bc2cd AK |
1593 | } |
1594 | ||
1595 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1596 | { | |
fb1cd6f9 | 1597 | if (mr->readonly != readonly) { |
59023ef4 | 1598 | memory_region_transaction_begin(); |
fb1cd6f9 | 1599 | mr->readonly = readonly; |
22bde714 | 1600 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1601 | memory_region_transaction_commit(); |
fb1cd6f9 | 1602 | } |
093bc2cd AK |
1603 | } |
1604 | ||
5f9a5ea1 | 1605 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 1606 | { |
5f9a5ea1 | 1607 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 1608 | memory_region_transaction_begin(); |
5f9a5ea1 | 1609 | mr->romd_mode = romd_mode; |
22bde714 | 1610 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1611 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1612 | } |
1613 | } | |
1614 | ||
a8170e5e AK |
1615 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
1616 | hwaddr size, unsigned client) | |
093bc2cd | 1617 | { |
8e41fb63 FZ |
1618 | assert(mr->ram_block); |
1619 | cpu_physical_memory_test_and_clear_dirty( | |
1620 | memory_region_get_ram_addr(mr) + addr, size, client); | |
093bc2cd AK |
1621 | } |
1622 | ||
a35ba7be PB |
1623 | int memory_region_get_fd(MemoryRegion *mr) |
1624 | { | |
1625 | if (mr->alias) { | |
1626 | return memory_region_get_fd(mr->alias); | |
1627 | } | |
1628 | ||
8e41fb63 | 1629 | assert(mr->ram_block); |
a35ba7be | 1630 | |
e4e69794 | 1631 | return qemu_get_ram_fd(memory_region_get_ram_addr(mr)); |
a35ba7be PB |
1632 | } |
1633 | ||
093bc2cd AK |
1634 | void *memory_region_get_ram_ptr(MemoryRegion *mr) |
1635 | { | |
49b24afc PB |
1636 | void *ptr; |
1637 | uint64_t offset = 0; | |
093bc2cd | 1638 | |
49b24afc PB |
1639 | rcu_read_lock(); |
1640 | while (mr->alias) { | |
1641 | offset += mr->alias_offset; | |
1642 | mr = mr->alias; | |
1643 | } | |
8e41fb63 | 1644 | assert(mr->ram_block); |
e4e69794 | 1645 | ptr = qemu_get_ram_ptr(mr->ram_block, memory_region_get_ram_addr(mr)); |
49b24afc | 1646 | rcu_read_unlock(); |
093bc2cd | 1647 | |
49b24afc | 1648 | return ptr + offset; |
093bc2cd AK |
1649 | } |
1650 | ||
7ebb2745 FZ |
1651 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1652 | { | |
1653 | return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID; | |
1654 | } | |
1655 | ||
37d7c084 PB |
1656 | void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp) |
1657 | { | |
8e41fb63 | 1658 | assert(mr->ram_block); |
37d7c084 | 1659 | |
fa53a0e5 | 1660 | qemu_ram_resize(mr->ram_block, newsize, errp); |
37d7c084 PB |
1661 | } |
1662 | ||
0d673e36 | 1663 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
093bc2cd | 1664 | { |
99e86347 | 1665 | FlatView *view; |
093bc2cd AK |
1666 | FlatRange *fr; |
1667 | CoalescedMemoryRange *cmr; | |
1668 | AddrRange tmp; | |
95d2994a | 1669 | MemoryRegionSection section; |
093bc2cd | 1670 | |
856d7245 | 1671 | view = address_space_get_flatview(as); |
99e86347 | 1672 | FOR_EACH_FLAT_RANGE(fr, view) { |
093bc2cd | 1673 | if (fr->mr == mr) { |
95d2994a | 1674 | section = (MemoryRegionSection) { |
f6790af6 | 1675 | .address_space = as, |
95d2994a | 1676 | .offset_within_address_space = int128_get64(fr->addr.start), |
052e87b0 | 1677 | .size = fr->addr.size, |
95d2994a AK |
1678 | }; |
1679 | ||
1680 | MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, §ion, | |
1681 | int128_get64(fr->addr.start), | |
1682 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1683 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1684 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1685 | int128_sub(fr->addr.start, |
1686 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1687 | if (!addrrange_intersects(tmp, fr->addr)) { |
1688 | continue; | |
1689 | } | |
1690 | tmp = addrrange_intersection(tmp, fr->addr); | |
95d2994a AK |
1691 | MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, §ion, |
1692 | int128_get64(tmp.start), | |
1693 | int128_get64(tmp.size)); | |
093bc2cd AK |
1694 | } |
1695 | } | |
1696 | } | |
856d7245 | 1697 | flatview_unref(view); |
093bc2cd AK |
1698 | } |
1699 | ||
0d673e36 AK |
1700 | static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1701 | { | |
1702 | AddressSpace *as; | |
1703 | ||
1704 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1705 | memory_region_update_coalesced_range_as(mr, as); | |
1706 | } | |
1707 | } | |
1708 | ||
093bc2cd AK |
1709 | void memory_region_set_coalescing(MemoryRegion *mr) |
1710 | { | |
1711 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1712 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1713 | } |
1714 | ||
1715 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 1716 | hwaddr offset, |
093bc2cd AK |
1717 | uint64_t size) |
1718 | { | |
7267c094 | 1719 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1720 | |
08dafab4 | 1721 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1722 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1723 | memory_region_update_coalesced_range(mr); | |
d410515e | 1724 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1725 | } |
1726 | ||
1727 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1728 | { | |
1729 | CoalescedMemoryRange *cmr; | |
ab5b3db5 | 1730 | bool updated = false; |
093bc2cd | 1731 | |
d410515e JK |
1732 | qemu_flush_coalesced_mmio_buffer(); |
1733 | mr->flush_coalesced_mmio = false; | |
1734 | ||
093bc2cd AK |
1735 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1736 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1737 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1738 | g_free(cmr); |
ab5b3db5 FZ |
1739 | updated = true; |
1740 | } | |
1741 | ||
1742 | if (updated) { | |
1743 | memory_region_update_coalesced_range(mr); | |
093bc2cd | 1744 | } |
093bc2cd AK |
1745 | } |
1746 | ||
d410515e JK |
1747 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1748 | { | |
1749 | mr->flush_coalesced_mmio = true; | |
1750 | } | |
1751 | ||
1752 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1753 | { | |
1754 | qemu_flush_coalesced_mmio_buffer(); | |
1755 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1756 | mr->flush_coalesced_mmio = false; | |
1757 | } | |
1758 | } | |
1759 | ||
196ea131 JK |
1760 | void memory_region_set_global_locking(MemoryRegion *mr) |
1761 | { | |
1762 | mr->global_locking = true; | |
1763 | } | |
1764 | ||
1765 | void memory_region_clear_global_locking(MemoryRegion *mr) | |
1766 | { | |
1767 | mr->global_locking = false; | |
1768 | } | |
1769 | ||
8c56c1a5 PF |
1770 | static bool userspace_eventfd_warning; |
1771 | ||
3e9d69e7 | 1772 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 1773 | hwaddr addr, |
3e9d69e7 AK |
1774 | unsigned size, |
1775 | bool match_data, | |
1776 | uint64_t data, | |
753d5e14 | 1777 | EventNotifier *e) |
3e9d69e7 AK |
1778 | { |
1779 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1780 | .addr.start = int128_make64(addr), |
1781 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1782 | .match_data = match_data, |
1783 | .data = data, | |
753d5e14 | 1784 | .e = e, |
3e9d69e7 AK |
1785 | }; |
1786 | unsigned i; | |
1787 | ||
8c56c1a5 PF |
1788 | if (kvm_enabled() && (!(kvm_eventfds_enabled() || |
1789 | userspace_eventfd_warning))) { | |
1790 | userspace_eventfd_warning = true; | |
1791 | error_report("Using eventfd without MMIO binding in KVM. " | |
1792 | "Suboptimal performance expected"); | |
1793 | } | |
1794 | ||
b8aecea2 JW |
1795 | if (size) { |
1796 | adjust_endianness(mr, &mrfd.data, size); | |
1797 | } | |
59023ef4 | 1798 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1799 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1800 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1801 | break; | |
1802 | } | |
1803 | } | |
1804 | ++mr->ioeventfd_nb; | |
7267c094 | 1805 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1806 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1807 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1808 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1809 | mr->ioeventfds[i] = mrfd; | |
4dc56152 | 1810 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 1811 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1812 | } |
1813 | ||
1814 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 1815 | hwaddr addr, |
3e9d69e7 AK |
1816 | unsigned size, |
1817 | bool match_data, | |
1818 | uint64_t data, | |
753d5e14 | 1819 | EventNotifier *e) |
3e9d69e7 AK |
1820 | { |
1821 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1822 | .addr.start = int128_make64(addr), |
1823 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1824 | .match_data = match_data, |
1825 | .data = data, | |
753d5e14 | 1826 | .e = e, |
3e9d69e7 AK |
1827 | }; |
1828 | unsigned i; | |
1829 | ||
b8aecea2 JW |
1830 | if (size) { |
1831 | adjust_endianness(mr, &mrfd.data, size); | |
1832 | } | |
59023ef4 | 1833 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1834 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1835 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1836 | break; | |
1837 | } | |
1838 | } | |
1839 | assert(i != mr->ioeventfd_nb); | |
1840 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1841 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1842 | --mr->ioeventfd_nb; | |
7267c094 | 1843 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1844 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
4dc56152 | 1845 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 1846 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1847 | } |
1848 | ||
feca4ac1 | 1849 | static void memory_region_update_container_subregions(MemoryRegion *subregion) |
093bc2cd | 1850 | { |
feca4ac1 | 1851 | MemoryRegion *mr = subregion->container; |
093bc2cd AK |
1852 | MemoryRegion *other; |
1853 | ||
59023ef4 JK |
1854 | memory_region_transaction_begin(); |
1855 | ||
dfde4e6e | 1856 | memory_region_ref(subregion); |
093bc2cd AK |
1857 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
1858 | if (subregion->priority >= other->priority) { | |
1859 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1860 | goto done; | |
1861 | } | |
1862 | } | |
1863 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1864 | done: | |
22bde714 | 1865 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1866 | memory_region_transaction_commit(); |
093bc2cd AK |
1867 | } |
1868 | ||
0598701a PC |
1869 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
1870 | hwaddr offset, | |
1871 | MemoryRegion *subregion) | |
1872 | { | |
feca4ac1 PB |
1873 | assert(!subregion->container); |
1874 | subregion->container = mr; | |
0598701a | 1875 | subregion->addr = offset; |
feca4ac1 | 1876 | memory_region_update_container_subregions(subregion); |
0598701a | 1877 | } |
093bc2cd AK |
1878 | |
1879 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 1880 | hwaddr offset, |
093bc2cd AK |
1881 | MemoryRegion *subregion) |
1882 | { | |
093bc2cd AK |
1883 | subregion->priority = 0; |
1884 | memory_region_add_subregion_common(mr, offset, subregion); | |
1885 | } | |
1886 | ||
1887 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 1888 | hwaddr offset, |
093bc2cd | 1889 | MemoryRegion *subregion, |
a1ff8ae0 | 1890 | int priority) |
093bc2cd | 1891 | { |
093bc2cd AK |
1892 | subregion->priority = priority; |
1893 | memory_region_add_subregion_common(mr, offset, subregion); | |
1894 | } | |
1895 | ||
1896 | void memory_region_del_subregion(MemoryRegion *mr, | |
1897 | MemoryRegion *subregion) | |
1898 | { | |
59023ef4 | 1899 | memory_region_transaction_begin(); |
feca4ac1 PB |
1900 | assert(subregion->container == mr); |
1901 | subregion->container = NULL; | |
093bc2cd | 1902 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); |
dfde4e6e | 1903 | memory_region_unref(subregion); |
22bde714 | 1904 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1905 | memory_region_transaction_commit(); |
6bba19ba AK |
1906 | } |
1907 | ||
1908 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1909 | { | |
1910 | if (enabled == mr->enabled) { | |
1911 | return; | |
1912 | } | |
59023ef4 | 1913 | memory_region_transaction_begin(); |
6bba19ba | 1914 | mr->enabled = enabled; |
22bde714 | 1915 | memory_region_update_pending = true; |
59023ef4 | 1916 | memory_region_transaction_commit(); |
093bc2cd | 1917 | } |
1c0ffa58 | 1918 | |
e7af4c67 MT |
1919 | void memory_region_set_size(MemoryRegion *mr, uint64_t size) |
1920 | { | |
1921 | Int128 s = int128_make64(size); | |
1922 | ||
1923 | if (size == UINT64_MAX) { | |
1924 | s = int128_2_64(); | |
1925 | } | |
1926 | if (int128_eq(s, mr->size)) { | |
1927 | return; | |
1928 | } | |
1929 | memory_region_transaction_begin(); | |
1930 | mr->size = s; | |
1931 | memory_region_update_pending = true; | |
1932 | memory_region_transaction_commit(); | |
1933 | } | |
1934 | ||
67891b8a | 1935 | static void memory_region_readd_subregion(MemoryRegion *mr) |
2282e1af | 1936 | { |
feca4ac1 | 1937 | MemoryRegion *container = mr->container; |
2282e1af | 1938 | |
feca4ac1 | 1939 | if (container) { |
67891b8a PC |
1940 | memory_region_transaction_begin(); |
1941 | memory_region_ref(mr); | |
feca4ac1 PB |
1942 | memory_region_del_subregion(container, mr); |
1943 | mr->container = container; | |
1944 | memory_region_update_container_subregions(mr); | |
67891b8a PC |
1945 | memory_region_unref(mr); |
1946 | memory_region_transaction_commit(); | |
2282e1af | 1947 | } |
67891b8a | 1948 | } |
2282e1af | 1949 | |
67891b8a PC |
1950 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
1951 | { | |
1952 | if (addr != mr->addr) { | |
1953 | mr->addr = addr; | |
1954 | memory_region_readd_subregion(mr); | |
1955 | } | |
2282e1af AK |
1956 | } |
1957 | ||
a8170e5e | 1958 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 1959 | { |
4703359e | 1960 | assert(mr->alias); |
4703359e | 1961 | |
59023ef4 | 1962 | if (offset == mr->alias_offset) { |
4703359e AK |
1963 | return; |
1964 | } | |
1965 | ||
59023ef4 JK |
1966 | memory_region_transaction_begin(); |
1967 | mr->alias_offset = offset; | |
22bde714 | 1968 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1969 | memory_region_transaction_commit(); |
4703359e AK |
1970 | } |
1971 | ||
a2b257d6 IM |
1972 | uint64_t memory_region_get_alignment(const MemoryRegion *mr) |
1973 | { | |
1974 | return mr->align; | |
1975 | } | |
1976 | ||
e2177955 AK |
1977 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1978 | { | |
1979 | const AddrRange *addr = addr_; | |
1980 | const FlatRange *fr = fr_; | |
1981 | ||
1982 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1983 | return -1; | |
1984 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1985 | return 1; | |
1986 | } | |
1987 | return 0; | |
1988 | } | |
1989 | ||
99e86347 | 1990 | static FlatRange *flatview_lookup(FlatView *view, AddrRange addr) |
e2177955 | 1991 | { |
99e86347 | 1992 | return bsearch(&addr, view->ranges, view->nr, |
e2177955 AK |
1993 | sizeof(FlatRange), cmp_flatrange_addr); |
1994 | } | |
1995 | ||
eed2bacf IM |
1996 | bool memory_region_is_mapped(MemoryRegion *mr) |
1997 | { | |
1998 | return mr->container ? true : false; | |
1999 | } | |
2000 | ||
c6742b14 PB |
2001 | /* Same as memory_region_find, but it does not add a reference to the |
2002 | * returned region. It must be called from an RCU critical section. | |
2003 | */ | |
2004 | static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr, | |
2005 | hwaddr addr, uint64_t size) | |
e2177955 | 2006 | { |
052e87b0 | 2007 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
2008 | MemoryRegion *root; |
2009 | AddressSpace *as; | |
2010 | AddrRange range; | |
99e86347 | 2011 | FlatView *view; |
73034e9e PB |
2012 | FlatRange *fr; |
2013 | ||
2014 | addr += mr->addr; | |
feca4ac1 PB |
2015 | for (root = mr; root->container; ) { |
2016 | root = root->container; | |
73034e9e PB |
2017 | addr += root->addr; |
2018 | } | |
e2177955 | 2019 | |
73034e9e | 2020 | as = memory_region_to_address_space(root); |
eed2bacf IM |
2021 | if (!as) { |
2022 | return ret; | |
2023 | } | |
73034e9e | 2024 | range = addrrange_make(int128_make64(addr), int128_make64(size)); |
99e86347 | 2025 | |
2b647668 | 2026 | view = atomic_rcu_read(&as->current_map); |
99e86347 | 2027 | fr = flatview_lookup(view, range); |
e2177955 | 2028 | if (!fr) { |
c6742b14 | 2029 | return ret; |
e2177955 AK |
2030 | } |
2031 | ||
99e86347 | 2032 | while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { |
e2177955 AK |
2033 | --fr; |
2034 | } | |
2035 | ||
2036 | ret.mr = fr->mr; | |
73034e9e | 2037 | ret.address_space = as; |
e2177955 AK |
2038 | range = addrrange_intersection(range, fr->addr); |
2039 | ret.offset_within_region = fr->offset_in_region; | |
2040 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
2041 | fr->addr.start)); | |
052e87b0 | 2042 | ret.size = range.size; |
e2177955 | 2043 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 2044 | ret.readonly = fr->readonly; |
c6742b14 PB |
2045 | return ret; |
2046 | } | |
2047 | ||
2048 | MemoryRegionSection memory_region_find(MemoryRegion *mr, | |
2049 | hwaddr addr, uint64_t size) | |
2050 | { | |
2051 | MemoryRegionSection ret; | |
2052 | rcu_read_lock(); | |
2053 | ret = memory_region_find_rcu(mr, addr, size); | |
2054 | if (ret.mr) { | |
2055 | memory_region_ref(ret.mr); | |
2056 | } | |
2b647668 | 2057 | rcu_read_unlock(); |
e2177955 AK |
2058 | return ret; |
2059 | } | |
2060 | ||
c6742b14 PB |
2061 | bool memory_region_present(MemoryRegion *container, hwaddr addr) |
2062 | { | |
2063 | MemoryRegion *mr; | |
2064 | ||
2065 | rcu_read_lock(); | |
2066 | mr = memory_region_find_rcu(container, addr, 1).mr; | |
2067 | rcu_read_unlock(); | |
2068 | return mr && mr != container; | |
2069 | } | |
2070 | ||
1d671369 | 2071 | void address_space_sync_dirty_bitmap(AddressSpace *as) |
86e775c6 | 2072 | { |
99e86347 | 2073 | FlatView *view; |
7664e80c AK |
2074 | FlatRange *fr; |
2075 | ||
856d7245 | 2076 | view = address_space_get_flatview(as); |
99e86347 | 2077 | FOR_EACH_FLAT_RANGE(fr, view) { |
72e22d2f | 2078 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c | 2079 | } |
856d7245 | 2080 | flatview_unref(view); |
7664e80c AK |
2081 | } |
2082 | ||
2083 | void memory_global_dirty_log_start(void) | |
2084 | { | |
7664e80c | 2085 | global_dirty_log = true; |
6f6a5ef3 | 2086 | |
7376e582 | 2087 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
6f6a5ef3 PB |
2088 | |
2089 | /* Refresh DIRTY_LOG_MIGRATION bit. */ | |
2090 | memory_region_transaction_begin(); | |
2091 | memory_region_update_pending = true; | |
2092 | memory_region_transaction_commit(); | |
7664e80c AK |
2093 | } |
2094 | ||
2095 | void memory_global_dirty_log_stop(void) | |
2096 | { | |
7664e80c | 2097 | global_dirty_log = false; |
6f6a5ef3 PB |
2098 | |
2099 | /* Refresh DIRTY_LOG_MIGRATION bit. */ | |
2100 | memory_region_transaction_begin(); | |
2101 | memory_region_update_pending = true; | |
2102 | memory_region_transaction_commit(); | |
2103 | ||
7376e582 | 2104 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
2105 | } |
2106 | ||
2107 | static void listener_add_address_space(MemoryListener *listener, | |
2108 | AddressSpace *as) | |
2109 | { | |
99e86347 | 2110 | FlatView *view; |
7664e80c AK |
2111 | FlatRange *fr; |
2112 | ||
221b3a3f | 2113 | if (listener->address_space_filter |
f6790af6 | 2114 | && listener->address_space_filter != as) { |
221b3a3f JG |
2115 | return; |
2116 | } | |
2117 | ||
680a4783 PB |
2118 | if (listener->begin) { |
2119 | listener->begin(listener); | |
2120 | } | |
7664e80c | 2121 | if (global_dirty_log) { |
975aefe0 AK |
2122 | if (listener->log_global_start) { |
2123 | listener->log_global_start(listener); | |
2124 | } | |
7664e80c | 2125 | } |
975aefe0 | 2126 | |
856d7245 | 2127 | view = address_space_get_flatview(as); |
99e86347 | 2128 | FOR_EACH_FLAT_RANGE(fr, view) { |
7664e80c AK |
2129 | MemoryRegionSection section = { |
2130 | .mr = fr->mr, | |
f6790af6 | 2131 | .address_space = as, |
7664e80c | 2132 | .offset_within_region = fr->offset_in_region, |
052e87b0 | 2133 | .size = fr->addr.size, |
7664e80c | 2134 | .offset_within_address_space = int128_get64(fr->addr.start), |
7a8499e8 | 2135 | .readonly = fr->readonly, |
7664e80c | 2136 | }; |
680a4783 PB |
2137 | if (fr->dirty_log_mask && listener->log_start) { |
2138 | listener->log_start(listener, §ion, 0, fr->dirty_log_mask); | |
2139 | } | |
975aefe0 AK |
2140 | if (listener->region_add) { |
2141 | listener->region_add(listener, §ion); | |
2142 | } | |
7664e80c | 2143 | } |
680a4783 PB |
2144 | if (listener->commit) { |
2145 | listener->commit(listener); | |
2146 | } | |
856d7245 | 2147 | flatview_unref(view); |
7664e80c AK |
2148 | } |
2149 | ||
f6790af6 | 2150 | void memory_listener_register(MemoryListener *listener, AddressSpace *filter) |
7664e80c | 2151 | { |
72e22d2f | 2152 | MemoryListener *other = NULL; |
0d673e36 | 2153 | AddressSpace *as; |
72e22d2f | 2154 | |
7376e582 | 2155 | listener->address_space_filter = filter; |
72e22d2f AK |
2156 | if (QTAILQ_EMPTY(&memory_listeners) |
2157 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
2158 | memory_listeners)->priority) { | |
2159 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
2160 | } else { | |
2161 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
2162 | if (listener->priority < other->priority) { | |
2163 | break; | |
2164 | } | |
2165 | } | |
2166 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
2167 | } | |
0d673e36 AK |
2168 | |
2169 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2170 | listener_add_address_space(listener, as); | |
2171 | } | |
7664e80c AK |
2172 | } |
2173 | ||
2174 | void memory_listener_unregister(MemoryListener *listener) | |
2175 | { | |
72e22d2f | 2176 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 2177 | } |
e2177955 | 2178 | |
7dca8043 | 2179 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1c0ffa58 | 2180 | { |
ac95190e | 2181 | memory_region_ref(root); |
59023ef4 | 2182 | memory_region_transaction_begin(); |
f0c02d15 | 2183 | as->ref_count = 1; |
8786db7c | 2184 | as->root = root; |
f0c02d15 | 2185 | as->malloced = false; |
8786db7c AK |
2186 | as->current_map = g_new(FlatView, 1); |
2187 | flatview_init(as->current_map); | |
4c19eb72 AK |
2188 | as->ioeventfd_nb = 0; |
2189 | as->ioeventfds = NULL; | |
0d673e36 | 2190 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
7dca8043 | 2191 | as->name = g_strdup(name ? name : "anonymous"); |
ac1970fb | 2192 | address_space_init_dispatch(as); |
f43793c7 PB |
2193 | memory_region_update_pending |= root->enabled; |
2194 | memory_region_transaction_commit(); | |
1c0ffa58 | 2195 | } |
658b2224 | 2196 | |
374f2981 | 2197 | static void do_address_space_destroy(AddressSpace *as) |
83f3c251 | 2198 | { |
078c44f4 | 2199 | MemoryListener *listener; |
f0c02d15 | 2200 | bool do_free = as->malloced; |
078c44f4 | 2201 | |
83f3c251 | 2202 | address_space_destroy_dispatch(as); |
078c44f4 DG |
2203 | |
2204 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
2205 | assert(listener->address_space_filter != as); | |
2206 | } | |
2207 | ||
856d7245 | 2208 | flatview_unref(as->current_map); |
7dca8043 | 2209 | g_free(as->name); |
4c19eb72 | 2210 | g_free(as->ioeventfds); |
ac95190e | 2211 | memory_region_unref(as->root); |
f0c02d15 PC |
2212 | if (do_free) { |
2213 | g_free(as); | |
2214 | } | |
2215 | } | |
2216 | ||
2217 | AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name) | |
2218 | { | |
2219 | AddressSpace *as; | |
2220 | ||
2221 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2222 | if (root == as->root && as->malloced) { | |
2223 | as->ref_count++; | |
2224 | return as; | |
2225 | } | |
2226 | } | |
2227 | ||
2228 | as = g_malloc0(sizeof *as); | |
2229 | address_space_init(as, root, name); | |
2230 | as->malloced = true; | |
2231 | return as; | |
83f3c251 AK |
2232 | } |
2233 | ||
374f2981 PB |
2234 | void address_space_destroy(AddressSpace *as) |
2235 | { | |
ac95190e PB |
2236 | MemoryRegion *root = as->root; |
2237 | ||
f0c02d15 PC |
2238 | as->ref_count--; |
2239 | if (as->ref_count) { | |
2240 | return; | |
2241 | } | |
374f2981 PB |
2242 | /* Flush out anything from MemoryListeners listening in on this */ |
2243 | memory_region_transaction_begin(); | |
2244 | as->root = NULL; | |
2245 | memory_region_transaction_commit(); | |
2246 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
6e48e8f9 | 2247 | address_space_unregister(as); |
374f2981 PB |
2248 | |
2249 | /* At this point, as->dispatch and as->current_map are dummy | |
2250 | * entries that the guest should never use. Wait for the old | |
2251 | * values to expire before freeing the data. | |
2252 | */ | |
ac95190e | 2253 | as->root = root; |
374f2981 PB |
2254 | call_rcu(as, do_address_space_destroy, rcu); |
2255 | } | |
2256 | ||
314e2987 BS |
2257 | typedef struct MemoryRegionList MemoryRegionList; |
2258 | ||
2259 | struct MemoryRegionList { | |
2260 | const MemoryRegion *mr; | |
314e2987 BS |
2261 | QTAILQ_ENTRY(MemoryRegionList) queue; |
2262 | }; | |
2263 | ||
2264 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
2265 | ||
2266 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
2267 | const MemoryRegion *mr, unsigned int level, | |
a8170e5e | 2268 | hwaddr base, |
9479c57a | 2269 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 2270 | { |
9479c57a JK |
2271 | MemoryRegionList *new_ml, *ml, *next_ml; |
2272 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
2273 | const MemoryRegion *submr; |
2274 | unsigned int i; | |
2275 | ||
f8a9f720 | 2276 | if (!mr) { |
314e2987 BS |
2277 | return; |
2278 | } | |
2279 | ||
2280 | for (i = 0; i < level; i++) { | |
2281 | mon_printf(f, " "); | |
2282 | } | |
2283 | ||
2284 | if (mr->alias) { | |
2285 | MemoryRegionList *ml; | |
2286 | bool found = false; | |
2287 | ||
2288 | /* check if the alias is already in the queue */ | |
9479c57a | 2289 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
f54bb15f | 2290 | if (ml->mr == mr->alias) { |
314e2987 BS |
2291 | found = true; |
2292 | } | |
2293 | } | |
2294 | ||
2295 | if (!found) { | |
2296 | ml = g_new(MemoryRegionList, 1); | |
2297 | ml->mr = mr->alias; | |
9479c57a | 2298 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 2299 | } |
4896d74b JK |
2300 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
2301 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
f8a9f720 | 2302 | "-" TARGET_FMT_plx "%s\n", |
314e2987 | 2303 | base + mr->addr, |
08dafab4 | 2304 | base + mr->addr |
fd1d9926 AW |
2305 | + (int128_nz(mr->size) ? |
2306 | (hwaddr)int128_get64(int128_sub(mr->size, | |
2307 | int128_one())) : 0), | |
4b474ba7 | 2308 | mr->priority, |
5f9a5ea1 JK |
2309 | mr->romd_mode ? 'R' : '-', |
2310 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
2311 | : '-', | |
3fb18b4d PC |
2312 | memory_region_name(mr), |
2313 | memory_region_name(mr->alias), | |
314e2987 | 2314 | mr->alias_offset, |
08dafab4 | 2315 | mr->alias_offset |
a66670c7 AK |
2316 | + (int128_nz(mr->size) ? |
2317 | (hwaddr)int128_get64(int128_sub(mr->size, | |
f8a9f720 GH |
2318 | int128_one())) : 0), |
2319 | mr->enabled ? "" : " [disabled]"); | |
314e2987 | 2320 | } else { |
4896d74b | 2321 | mon_printf(f, |
f8a9f720 | 2322 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n", |
314e2987 | 2323 | base + mr->addr, |
08dafab4 | 2324 | base + mr->addr |
fd1d9926 AW |
2325 | + (int128_nz(mr->size) ? |
2326 | (hwaddr)int128_get64(int128_sub(mr->size, | |
2327 | int128_one())) : 0), | |
4b474ba7 | 2328 | mr->priority, |
5f9a5ea1 JK |
2329 | mr->romd_mode ? 'R' : '-', |
2330 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
2331 | : '-', | |
f8a9f720 GH |
2332 | memory_region_name(mr), |
2333 | mr->enabled ? "" : " [disabled]"); | |
314e2987 | 2334 | } |
9479c57a JK |
2335 | |
2336 | QTAILQ_INIT(&submr_print_queue); | |
2337 | ||
314e2987 | 2338 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
2339 | new_ml = g_new(MemoryRegionList, 1); |
2340 | new_ml->mr = submr; | |
2341 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
2342 | if (new_ml->mr->addr < ml->mr->addr || | |
2343 | (new_ml->mr->addr == ml->mr->addr && | |
2344 | new_ml->mr->priority > ml->mr->priority)) { | |
2345 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
2346 | new_ml = NULL; | |
2347 | break; | |
2348 | } | |
2349 | } | |
2350 | if (new_ml) { | |
2351 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
2352 | } | |
2353 | } | |
2354 | ||
2355 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
2356 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
2357 | alias_print_queue); | |
2358 | } | |
2359 | ||
88365e47 | 2360 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 2361 | g_free(ml); |
314e2987 BS |
2362 | } |
2363 | } | |
2364 | ||
2365 | void mtree_info(fprintf_function mon_printf, void *f) | |
2366 | { | |
2367 | MemoryRegionListHead ml_head; | |
2368 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 2369 | AddressSpace *as; |
314e2987 BS |
2370 | |
2371 | QTAILQ_INIT(&ml_head); | |
2372 | ||
0d673e36 | 2373 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
e48816aa GH |
2374 | mon_printf(f, "address-space: %s\n", as->name); |
2375 | mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head); | |
2376 | mon_printf(f, "\n"); | |
b9f9be88 BS |
2377 | } |
2378 | ||
314e2987 BS |
2379 | /* print aliased regions */ |
2380 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
e48816aa GH |
2381 | mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr)); |
2382 | mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head); | |
2383 | mon_printf(f, "\n"); | |
314e2987 BS |
2384 | } |
2385 | ||
2386 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 2387 | g_free(ml); |
314e2987 | 2388 | } |
314e2987 | 2389 | } |
b4fefef9 PC |
2390 | |
2391 | static const TypeInfo memory_region_info = { | |
2392 | .parent = TYPE_OBJECT, | |
2393 | .name = TYPE_MEMORY_REGION, | |
2394 | .instance_size = sizeof(MemoryRegion), | |
2395 | .instance_init = memory_region_initfn, | |
2396 | .instance_finalize = memory_region_finalize, | |
2397 | }; | |
2398 | ||
2399 | static void memory_register_types(void) | |
2400 | { | |
2401 | type_register_static(&memory_region_info); | |
2402 | } | |
2403 | ||
2404 | type_init(memory_register_types) |