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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <[email protected]> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
022c62cb PB |
16 | #include "exec/memory.h" |
17 | #include "exec/address-spaces.h" | |
18 | #include "exec/ioport.h" | |
1de7afc9 | 19 | #include "qemu/bitops.h" |
2c9b15ca | 20 | #include "qom/object.h" |
9c17d615 | 21 | #include "sysemu/kvm.h" |
093bc2cd AK |
22 | #include <assert.h> |
23 | ||
022c62cb | 24 | #include "exec/memory-internal.h" |
67d95c15 | 25 | |
d197063f PB |
26 | //#define DEBUG_UNASSIGNED |
27 | ||
22bde714 JK |
28 | static unsigned memory_region_transaction_depth; |
29 | static bool memory_region_update_pending; | |
7664e80c AK |
30 | static bool global_dirty_log = false; |
31 | ||
856d7245 PB |
32 | /* flat_view_mutex is taken around reading as->current_map; the critical |
33 | * section is extremely short, so I'm using a single mutex for every AS. | |
34 | * We could also RCU for the read-side. | |
35 | * | |
36 | * The BQL is taken around transaction commits, hence both locks are taken | |
37 | * while writing to as->current_map (with the BQL taken outside). | |
38 | */ | |
39 | static QemuMutex flat_view_mutex; | |
40 | ||
72e22d2f AK |
41 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
42 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 43 | |
0d673e36 AK |
44 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
45 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
46 | ||
856d7245 PB |
47 | static void memory_init(void) |
48 | { | |
49 | qemu_mutex_init(&flat_view_mutex); | |
50 | } | |
51 | ||
093bc2cd AK |
52 | typedef struct AddrRange AddrRange; |
53 | ||
8417cebf AK |
54 | /* |
55 | * Note using signed integers limits us to physical addresses at most | |
56 | * 63 bits wide. They are needed for negative offsetting in aliases | |
57 | * (large MemoryRegion::alias_offset). | |
58 | */ | |
093bc2cd | 59 | struct AddrRange { |
08dafab4 AK |
60 | Int128 start; |
61 | Int128 size; | |
093bc2cd AK |
62 | }; |
63 | ||
08dafab4 | 64 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
65 | { |
66 | return (AddrRange) { start, size }; | |
67 | } | |
68 | ||
69 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
70 | { | |
08dafab4 | 71 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
72 | } |
73 | ||
08dafab4 | 74 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 75 | { |
08dafab4 | 76 | return int128_add(r.start, r.size); |
093bc2cd AK |
77 | } |
78 | ||
08dafab4 | 79 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 80 | { |
08dafab4 | 81 | int128_addto(&range.start, delta); |
093bc2cd AK |
82 | return range; |
83 | } | |
84 | ||
08dafab4 AK |
85 | static bool addrrange_contains(AddrRange range, Int128 addr) |
86 | { | |
87 | return int128_ge(addr, range.start) | |
88 | && int128_lt(addr, addrrange_end(range)); | |
89 | } | |
90 | ||
093bc2cd AK |
91 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
92 | { | |
08dafab4 AK |
93 | return addrrange_contains(r1, r2.start) |
94 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
95 | } |
96 | ||
97 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
98 | { | |
08dafab4 AK |
99 | Int128 start = int128_max(r1.start, r2.start); |
100 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
101 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
102 | } |
103 | ||
0e0d36b4 AK |
104 | enum ListenerDirection { Forward, Reverse }; |
105 | ||
7376e582 AK |
106 | static bool memory_listener_match(MemoryListener *listener, |
107 | MemoryRegionSection *section) | |
108 | { | |
109 | return !listener->address_space_filter | |
110 | || listener->address_space_filter == section->address_space; | |
111 | } | |
112 | ||
113 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
0e0d36b4 AK |
114 | do { \ |
115 | MemoryListener *_listener; \ | |
116 | \ | |
117 | switch (_direction) { \ | |
118 | case Forward: \ | |
119 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
120 | if (_listener->_callback) { \ |
121 | _listener->_callback(_listener, ##_args); \ | |
122 | } \ | |
0e0d36b4 AK |
123 | } \ |
124 | break; \ | |
125 | case Reverse: \ | |
126 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
127 | memory_listeners, link) { \ | |
975aefe0 AK |
128 | if (_listener->_callback) { \ |
129 | _listener->_callback(_listener, ##_args); \ | |
130 | } \ | |
0e0d36b4 AK |
131 | } \ |
132 | break; \ | |
133 | default: \ | |
134 | abort(); \ | |
135 | } \ | |
136 | } while (0) | |
137 | ||
7376e582 AK |
138 | #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \ |
139 | do { \ | |
140 | MemoryListener *_listener; \ | |
141 | \ | |
142 | switch (_direction) { \ | |
143 | case Forward: \ | |
144 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
145 | if (_listener->_callback \ |
146 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
147 | _listener->_callback(_listener, _section, ##_args); \ |
148 | } \ | |
149 | } \ | |
150 | break; \ | |
151 | case Reverse: \ | |
152 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
153 | memory_listeners, link) { \ | |
975aefe0 AK |
154 | if (_listener->_callback \ |
155 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
156 | _listener->_callback(_listener, _section, ##_args); \ |
157 | } \ | |
158 | } \ | |
159 | break; \ | |
160 | default: \ | |
161 | abort(); \ | |
162 | } \ | |
163 | } while (0) | |
164 | ||
dfde4e6e | 165 | /* No need to ref/unref .mr, the FlatRange keeps it alive. */ |
0e0d36b4 | 166 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \ |
7376e582 | 167 | MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
0e0d36b4 | 168 | .mr = (fr)->mr, \ |
f6790af6 | 169 | .address_space = (as), \ |
0e0d36b4 | 170 | .offset_within_region = (fr)->offset_in_region, \ |
052e87b0 | 171 | .size = (fr)->addr.size, \ |
0e0d36b4 | 172 | .offset_within_address_space = int128_get64((fr)->addr.start), \ |
7a8499e8 | 173 | .readonly = (fr)->readonly, \ |
7376e582 | 174 | })) |
0e0d36b4 | 175 | |
093bc2cd AK |
176 | struct CoalescedMemoryRange { |
177 | AddrRange addr; | |
178 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
179 | }; | |
180 | ||
3e9d69e7 AK |
181 | struct MemoryRegionIoeventfd { |
182 | AddrRange addr; | |
183 | bool match_data; | |
184 | uint64_t data; | |
753d5e14 | 185 | EventNotifier *e; |
3e9d69e7 AK |
186 | }; |
187 | ||
188 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
189 | MemoryRegionIoeventfd b) | |
190 | { | |
08dafab4 | 191 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 192 | return true; |
08dafab4 | 193 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 194 | return false; |
08dafab4 | 195 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 196 | return true; |
08dafab4 | 197 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
198 | return false; |
199 | } else if (a.match_data < b.match_data) { | |
200 | return true; | |
201 | } else if (a.match_data > b.match_data) { | |
202 | return false; | |
203 | } else if (a.match_data) { | |
204 | if (a.data < b.data) { | |
205 | return true; | |
206 | } else if (a.data > b.data) { | |
207 | return false; | |
208 | } | |
209 | } | |
753d5e14 | 210 | if (a.e < b.e) { |
3e9d69e7 | 211 | return true; |
753d5e14 | 212 | } else if (a.e > b.e) { |
3e9d69e7 AK |
213 | return false; |
214 | } | |
215 | return false; | |
216 | } | |
217 | ||
218 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
219 | MemoryRegionIoeventfd b) | |
220 | { | |
221 | return !memory_region_ioeventfd_before(a, b) | |
222 | && !memory_region_ioeventfd_before(b, a); | |
223 | } | |
224 | ||
093bc2cd AK |
225 | typedef struct FlatRange FlatRange; |
226 | typedef struct FlatView FlatView; | |
227 | ||
228 | /* Range of memory in the global map. Addresses are absolute. */ | |
229 | struct FlatRange { | |
230 | MemoryRegion *mr; | |
a8170e5e | 231 | hwaddr offset_in_region; |
093bc2cd | 232 | AddrRange addr; |
5a583347 | 233 | uint8_t dirty_log_mask; |
5f9a5ea1 | 234 | bool romd_mode; |
fb1cd6f9 | 235 | bool readonly; |
093bc2cd AK |
236 | }; |
237 | ||
238 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
239 | * order. | |
240 | */ | |
241 | struct FlatView { | |
856d7245 | 242 | unsigned ref; |
093bc2cd AK |
243 | FlatRange *ranges; |
244 | unsigned nr; | |
245 | unsigned nr_allocated; | |
246 | }; | |
247 | ||
cc31e6e7 AK |
248 | typedef struct AddressSpaceOps AddressSpaceOps; |
249 | ||
093bc2cd AK |
250 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
251 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
252 | ||
093bc2cd AK |
253 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
254 | { | |
255 | return a->mr == b->mr | |
256 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 257 | && a->offset_in_region == b->offset_in_region |
5f9a5ea1 | 258 | && a->romd_mode == b->romd_mode |
fb1cd6f9 | 259 | && a->readonly == b->readonly; |
093bc2cd AK |
260 | } |
261 | ||
262 | static void flatview_init(FlatView *view) | |
263 | { | |
856d7245 | 264 | view->ref = 1; |
093bc2cd AK |
265 | view->ranges = NULL; |
266 | view->nr = 0; | |
267 | view->nr_allocated = 0; | |
268 | } | |
269 | ||
270 | /* Insert a range into a given position. Caller is responsible for maintaining | |
271 | * sorting order. | |
272 | */ | |
273 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
274 | { | |
275 | if (view->nr == view->nr_allocated) { | |
276 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 277 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
278 | view->nr_allocated * sizeof(*view->ranges)); |
279 | } | |
280 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
281 | (view->nr - pos) * sizeof(FlatRange)); | |
282 | view->ranges[pos] = *range; | |
dfde4e6e | 283 | memory_region_ref(range->mr); |
093bc2cd AK |
284 | ++view->nr; |
285 | } | |
286 | ||
287 | static void flatview_destroy(FlatView *view) | |
288 | { | |
dfde4e6e PB |
289 | int i; |
290 | ||
291 | for (i = 0; i < view->nr; i++) { | |
292 | memory_region_unref(view->ranges[i].mr); | |
293 | } | |
7267c094 | 294 | g_free(view->ranges); |
a9a0c06d | 295 | g_free(view); |
093bc2cd AK |
296 | } |
297 | ||
856d7245 PB |
298 | static void flatview_ref(FlatView *view) |
299 | { | |
300 | atomic_inc(&view->ref); | |
301 | } | |
302 | ||
303 | static void flatview_unref(FlatView *view) | |
304 | { | |
305 | if (atomic_fetch_dec(&view->ref) == 1) { | |
306 | flatview_destroy(view); | |
307 | } | |
308 | } | |
309 | ||
3d8e6bf9 AK |
310 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
311 | { | |
08dafab4 | 312 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 313 | && r1->mr == r2->mr |
08dafab4 AK |
314 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
315 | r1->addr.size), | |
316 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 317 | && r1->dirty_log_mask == r2->dirty_log_mask |
5f9a5ea1 | 318 | && r1->romd_mode == r2->romd_mode |
fb1cd6f9 | 319 | && r1->readonly == r2->readonly; |
3d8e6bf9 AK |
320 | } |
321 | ||
8508e024 | 322 | /* Attempt to simplify a view by merging adjacent ranges */ |
3d8e6bf9 AK |
323 | static void flatview_simplify(FlatView *view) |
324 | { | |
325 | unsigned i, j; | |
326 | ||
327 | i = 0; | |
328 | while (i < view->nr) { | |
329 | j = i + 1; | |
330 | while (j < view->nr | |
331 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 332 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
333 | ++j; |
334 | } | |
335 | ++i; | |
336 | memmove(&view->ranges[i], &view->ranges[j], | |
337 | (view->nr - j) * sizeof(view->ranges[j])); | |
338 | view->nr -= j - i; | |
339 | } | |
340 | } | |
341 | ||
ce5d2f33 PB |
342 | static void memory_region_oldmmio_read_accessor(void *opaque, |
343 | hwaddr addr, | |
344 | uint64_t *value, | |
345 | unsigned size, | |
346 | unsigned shift, | |
347 | uint64_t mask) | |
348 | { | |
349 | MemoryRegion *mr = opaque; | |
350 | uint64_t tmp; | |
351 | ||
352 | tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); | |
353 | *value |= (tmp & mask) << shift; | |
354 | } | |
355 | ||
164a4dcd | 356 | static void memory_region_read_accessor(void *opaque, |
a8170e5e | 357 | hwaddr addr, |
164a4dcd AK |
358 | uint64_t *value, |
359 | unsigned size, | |
360 | unsigned shift, | |
361 | uint64_t mask) | |
362 | { | |
363 | MemoryRegion *mr = opaque; | |
364 | uint64_t tmp; | |
365 | ||
d410515e JK |
366 | if (mr->flush_coalesced_mmio) { |
367 | qemu_flush_coalesced_mmio_buffer(); | |
368 | } | |
164a4dcd AK |
369 | tmp = mr->ops->read(mr->opaque, addr, size); |
370 | *value |= (tmp & mask) << shift; | |
371 | } | |
372 | ||
ce5d2f33 PB |
373 | static void memory_region_oldmmio_write_accessor(void *opaque, |
374 | hwaddr addr, | |
375 | uint64_t *value, | |
376 | unsigned size, | |
377 | unsigned shift, | |
378 | uint64_t mask) | |
379 | { | |
380 | MemoryRegion *mr = opaque; | |
381 | uint64_t tmp; | |
382 | ||
383 | tmp = (*value >> shift) & mask; | |
384 | mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); | |
385 | } | |
386 | ||
164a4dcd | 387 | static void memory_region_write_accessor(void *opaque, |
a8170e5e | 388 | hwaddr addr, |
164a4dcd AK |
389 | uint64_t *value, |
390 | unsigned size, | |
391 | unsigned shift, | |
392 | uint64_t mask) | |
393 | { | |
394 | MemoryRegion *mr = opaque; | |
395 | uint64_t tmp; | |
396 | ||
d410515e JK |
397 | if (mr->flush_coalesced_mmio) { |
398 | qemu_flush_coalesced_mmio_buffer(); | |
399 | } | |
164a4dcd AK |
400 | tmp = (*value >> shift) & mask; |
401 | mr->ops->write(mr->opaque, addr, tmp, size); | |
402 | } | |
403 | ||
a8170e5e | 404 | static void access_with_adjusted_size(hwaddr addr, |
164a4dcd AK |
405 | uint64_t *value, |
406 | unsigned size, | |
407 | unsigned access_size_min, | |
408 | unsigned access_size_max, | |
409 | void (*access)(void *opaque, | |
a8170e5e | 410 | hwaddr addr, |
164a4dcd AK |
411 | uint64_t *value, |
412 | unsigned size, | |
413 | unsigned shift, | |
414 | uint64_t mask), | |
415 | void *opaque) | |
416 | { | |
417 | uint64_t access_mask; | |
418 | unsigned access_size; | |
419 | unsigned i; | |
420 | ||
421 | if (!access_size_min) { | |
422 | access_size_min = 1; | |
423 | } | |
424 | if (!access_size_max) { | |
425 | access_size_max = 4; | |
426 | } | |
ce5d2f33 PB |
427 | |
428 | /* FIXME: support unaligned access? */ | |
164a4dcd AK |
429 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
430 | access_mask = -1ULL >> (64 - access_size * 8); | |
431 | for (i = 0; i < size; i += access_size) { | |
08521e28 PB |
432 | #ifdef TARGET_WORDS_BIGENDIAN |
433 | access(opaque, addr + i, value, access_size, | |
434 | (size - access_size - i) * 8, access_mask); | |
435 | #else | |
164a4dcd | 436 | access(opaque, addr + i, value, access_size, i * 8, access_mask); |
08521e28 | 437 | #endif |
164a4dcd AK |
438 | } |
439 | } | |
440 | ||
e2177955 AK |
441 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
442 | { | |
0d673e36 AK |
443 | AddressSpace *as; |
444 | ||
e2177955 AK |
445 | while (mr->parent) { |
446 | mr = mr->parent; | |
447 | } | |
0d673e36 AK |
448 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
449 | if (mr == as->root) { | |
450 | return as; | |
451 | } | |
e2177955 AK |
452 | } |
453 | abort(); | |
454 | } | |
455 | ||
093bc2cd AK |
456 | /* Render a memory region into the global view. Ranges in @view obscure |
457 | * ranges in @mr. | |
458 | */ | |
459 | static void render_memory_region(FlatView *view, | |
460 | MemoryRegion *mr, | |
08dafab4 | 461 | Int128 base, |
fb1cd6f9 AK |
462 | AddrRange clip, |
463 | bool readonly) | |
093bc2cd AK |
464 | { |
465 | MemoryRegion *subregion; | |
466 | unsigned i; | |
a8170e5e | 467 | hwaddr offset_in_region; |
08dafab4 AK |
468 | Int128 remain; |
469 | Int128 now; | |
093bc2cd AK |
470 | FlatRange fr; |
471 | AddrRange tmp; | |
472 | ||
6bba19ba AK |
473 | if (!mr->enabled) { |
474 | return; | |
475 | } | |
476 | ||
08dafab4 | 477 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 478 | readonly |= mr->readonly; |
093bc2cd AK |
479 | |
480 | tmp = addrrange_make(base, mr->size); | |
481 | ||
482 | if (!addrrange_intersects(tmp, clip)) { | |
483 | return; | |
484 | } | |
485 | ||
486 | clip = addrrange_intersection(tmp, clip); | |
487 | ||
488 | if (mr->alias) { | |
08dafab4 AK |
489 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
490 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 491 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
492 | return; |
493 | } | |
494 | ||
495 | /* Render subregions in priority order. */ | |
496 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 497 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
498 | } |
499 | ||
14a3c10a | 500 | if (!mr->terminates) { |
093bc2cd AK |
501 | return; |
502 | } | |
503 | ||
08dafab4 | 504 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
505 | base = clip.start; |
506 | remain = clip.size; | |
507 | ||
2eb74e1a PC |
508 | fr.mr = mr; |
509 | fr.dirty_log_mask = mr->dirty_log_mask; | |
510 | fr.romd_mode = mr->romd_mode; | |
511 | fr.readonly = readonly; | |
512 | ||
093bc2cd | 513 | /* Render the region itself into any gaps left by the current view. */ |
08dafab4 AK |
514 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
515 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
516 | continue; |
517 | } | |
08dafab4 AK |
518 | if (int128_lt(base, view->ranges[i].addr.start)) { |
519 | now = int128_min(remain, | |
520 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
521 | fr.offset_in_region = offset_in_region; |
522 | fr.addr = addrrange_make(base, now); | |
523 | flatview_insert(view, i, &fr); | |
524 | ++i; | |
08dafab4 AK |
525 | int128_addto(&base, now); |
526 | offset_in_region += int128_get64(now); | |
527 | int128_subfrom(&remain, now); | |
093bc2cd | 528 | } |
d26a8cae AK |
529 | now = int128_sub(int128_min(int128_add(base, remain), |
530 | addrrange_end(view->ranges[i].addr)), | |
531 | base); | |
532 | int128_addto(&base, now); | |
533 | offset_in_region += int128_get64(now); | |
534 | int128_subfrom(&remain, now); | |
093bc2cd | 535 | } |
08dafab4 | 536 | if (int128_nz(remain)) { |
093bc2cd AK |
537 | fr.offset_in_region = offset_in_region; |
538 | fr.addr = addrrange_make(base, remain); | |
539 | flatview_insert(view, i, &fr); | |
540 | } | |
541 | } | |
542 | ||
543 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
a9a0c06d | 544 | static FlatView *generate_memory_topology(MemoryRegion *mr) |
093bc2cd | 545 | { |
a9a0c06d | 546 | FlatView *view; |
093bc2cd | 547 | |
a9a0c06d PB |
548 | view = g_new(FlatView, 1); |
549 | flatview_init(view); | |
093bc2cd | 550 | |
83f3c251 | 551 | if (mr) { |
a9a0c06d | 552 | render_memory_region(view, mr, int128_zero(), |
83f3c251 AK |
553 | addrrange_make(int128_zero(), int128_2_64()), false); |
554 | } | |
a9a0c06d | 555 | flatview_simplify(view); |
093bc2cd AK |
556 | |
557 | return view; | |
558 | } | |
559 | ||
3e9d69e7 AK |
560 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
561 | MemoryRegionIoeventfd *fds_new, | |
562 | unsigned fds_new_nb, | |
563 | MemoryRegionIoeventfd *fds_old, | |
564 | unsigned fds_old_nb) | |
565 | { | |
566 | unsigned iold, inew; | |
80a1ea37 AK |
567 | MemoryRegionIoeventfd *fd; |
568 | MemoryRegionSection section; | |
3e9d69e7 AK |
569 | |
570 | /* Generate a symmetric difference of the old and new fd sets, adding | |
571 | * and deleting as necessary. | |
572 | */ | |
573 | ||
574 | iold = inew = 0; | |
575 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
576 | if (iold < fds_old_nb | |
577 | && (inew == fds_new_nb | |
578 | || memory_region_ioeventfd_before(fds_old[iold], | |
579 | fds_new[inew]))) { | |
80a1ea37 AK |
580 | fd = &fds_old[iold]; |
581 | section = (MemoryRegionSection) { | |
f6790af6 | 582 | .address_space = as, |
80a1ea37 | 583 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 584 | .size = fd->addr.size, |
80a1ea37 AK |
585 | }; |
586 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
753d5e14 | 587 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
588 | ++iold; |
589 | } else if (inew < fds_new_nb | |
590 | && (iold == fds_old_nb | |
591 | || memory_region_ioeventfd_before(fds_new[inew], | |
592 | fds_old[iold]))) { | |
80a1ea37 AK |
593 | fd = &fds_new[inew]; |
594 | section = (MemoryRegionSection) { | |
f6790af6 | 595 | .address_space = as, |
80a1ea37 | 596 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 597 | .size = fd->addr.size, |
80a1ea37 AK |
598 | }; |
599 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
753d5e14 | 600 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
601 | ++inew; |
602 | } else { | |
603 | ++iold; | |
604 | ++inew; | |
605 | } | |
606 | } | |
607 | } | |
608 | ||
856d7245 PB |
609 | static FlatView *address_space_get_flatview(AddressSpace *as) |
610 | { | |
611 | FlatView *view; | |
612 | ||
613 | qemu_mutex_lock(&flat_view_mutex); | |
614 | view = as->current_map; | |
615 | flatview_ref(view); | |
616 | qemu_mutex_unlock(&flat_view_mutex); | |
617 | return view; | |
618 | } | |
619 | ||
3e9d69e7 AK |
620 | static void address_space_update_ioeventfds(AddressSpace *as) |
621 | { | |
99e86347 | 622 | FlatView *view; |
3e9d69e7 AK |
623 | FlatRange *fr; |
624 | unsigned ioeventfd_nb = 0; | |
625 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
626 | AddrRange tmp; | |
627 | unsigned i; | |
628 | ||
856d7245 | 629 | view = address_space_get_flatview(as); |
99e86347 | 630 | FOR_EACH_FLAT_RANGE(fr, view) { |
3e9d69e7 AK |
631 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
632 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
633 | int128_sub(fr->addr.start, |
634 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
635 | if (addrrange_intersects(fr->addr, tmp)) { |
636 | ++ioeventfd_nb; | |
7267c094 | 637 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
638 | ioeventfd_nb * sizeof(*ioeventfds)); |
639 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
640 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
641 | } | |
642 | } | |
643 | } | |
644 | ||
645 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
646 | as->ioeventfds, as->ioeventfd_nb); | |
647 | ||
7267c094 | 648 | g_free(as->ioeventfds); |
3e9d69e7 AK |
649 | as->ioeventfds = ioeventfds; |
650 | as->ioeventfd_nb = ioeventfd_nb; | |
856d7245 | 651 | flatview_unref(view); |
3e9d69e7 AK |
652 | } |
653 | ||
b8af1afb | 654 | static void address_space_update_topology_pass(AddressSpace *as, |
a9a0c06d PB |
655 | const FlatView *old_view, |
656 | const FlatView *new_view, | |
b8af1afb | 657 | bool adding) |
093bc2cd | 658 | { |
093bc2cd AK |
659 | unsigned iold, inew; |
660 | FlatRange *frold, *frnew; | |
093bc2cd AK |
661 | |
662 | /* Generate a symmetric difference of the old and new memory maps. | |
663 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
664 | */ | |
665 | iold = inew = 0; | |
a9a0c06d PB |
666 | while (iold < old_view->nr || inew < new_view->nr) { |
667 | if (iold < old_view->nr) { | |
668 | frold = &old_view->ranges[iold]; | |
093bc2cd AK |
669 | } else { |
670 | frold = NULL; | |
671 | } | |
a9a0c06d PB |
672 | if (inew < new_view->nr) { |
673 | frnew = &new_view->ranges[inew]; | |
093bc2cd AK |
674 | } else { |
675 | frnew = NULL; | |
676 | } | |
677 | ||
678 | if (frold | |
679 | && (!frnew | |
08dafab4 AK |
680 | || int128_lt(frold->addr.start, frnew->addr.start) |
681 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd | 682 | && !flatrange_equal(frold, frnew)))) { |
41a6e477 | 683 | /* In old but not in new, or in both but attributes changed. */ |
093bc2cd | 684 | |
b8af1afb | 685 | if (!adding) { |
72e22d2f | 686 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
687 | } |
688 | ||
093bc2cd AK |
689 | ++iold; |
690 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
41a6e477 | 691 | /* In both and unchanged (except logging may have changed) */ |
093bc2cd | 692 | |
b8af1afb | 693 | if (adding) { |
50c1e149 | 694 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b8af1afb | 695 | if (frold->dirty_log_mask && !frnew->dirty_log_mask) { |
72e22d2f | 696 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
b8af1afb | 697 | } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { |
72e22d2f | 698 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
b8af1afb | 699 | } |
5a583347 AK |
700 | } |
701 | ||
093bc2cd AK |
702 | ++iold; |
703 | ++inew; | |
093bc2cd AK |
704 | } else { |
705 | /* In new */ | |
706 | ||
b8af1afb | 707 | if (adding) { |
72e22d2f | 708 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
709 | } |
710 | ||
093bc2cd AK |
711 | ++inew; |
712 | } | |
713 | } | |
b8af1afb AK |
714 | } |
715 | ||
716 | ||
717 | static void address_space_update_topology(AddressSpace *as) | |
718 | { | |
856d7245 | 719 | FlatView *old_view = address_space_get_flatview(as); |
a9a0c06d | 720 | FlatView *new_view = generate_memory_topology(as->root); |
b8af1afb AK |
721 | |
722 | address_space_update_topology_pass(as, old_view, new_view, false); | |
723 | address_space_update_topology_pass(as, old_view, new_view, true); | |
724 | ||
856d7245 PB |
725 | qemu_mutex_lock(&flat_view_mutex); |
726 | flatview_unref(as->current_map); | |
a9a0c06d | 727 | as->current_map = new_view; |
856d7245 PB |
728 | qemu_mutex_unlock(&flat_view_mutex); |
729 | ||
730 | /* Note that all the old MemoryRegions are still alive up to this | |
731 | * point. This relieves most MemoryListeners from the need to | |
732 | * ref/unref the MemoryRegions they get---unless they use them | |
733 | * outside the iothread mutex, in which case precise reference | |
734 | * counting is necessary. | |
735 | */ | |
736 | flatview_unref(old_view); | |
737 | ||
3e9d69e7 | 738 | address_space_update_ioeventfds(as); |
093bc2cd AK |
739 | } |
740 | ||
4ef4db86 AK |
741 | void memory_region_transaction_begin(void) |
742 | { | |
bb880ded | 743 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
744 | ++memory_region_transaction_depth; |
745 | } | |
746 | ||
747 | void memory_region_transaction_commit(void) | |
748 | { | |
0d673e36 AK |
749 | AddressSpace *as; |
750 | ||
4ef4db86 AK |
751 | assert(memory_region_transaction_depth); |
752 | --memory_region_transaction_depth; | |
22bde714 JK |
753 | if (!memory_region_transaction_depth && memory_region_update_pending) { |
754 | memory_region_update_pending = false; | |
02e2b95f JK |
755 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); |
756 | ||
0d673e36 AK |
757 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
758 | address_space_update_topology(as); | |
02e2b95f JK |
759 | } |
760 | ||
761 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); | |
e87c099f | 762 | } |
4ef4db86 AK |
763 | } |
764 | ||
545e92e0 AK |
765 | static void memory_region_destructor_none(MemoryRegion *mr) |
766 | { | |
767 | } | |
768 | ||
769 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
770 | { | |
771 | qemu_ram_free(mr->ram_addr); | |
772 | } | |
773 | ||
dfde4e6e PB |
774 | static void memory_region_destructor_alias(MemoryRegion *mr) |
775 | { | |
776 | memory_region_unref(mr->alias); | |
777 | } | |
778 | ||
545e92e0 AK |
779 | static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) |
780 | { | |
781 | qemu_ram_free_from_ptr(mr->ram_addr); | |
782 | } | |
783 | ||
d0a9b5bc AK |
784 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
785 | { | |
786 | qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); | |
d0a9b5bc AK |
787 | } |
788 | ||
be675c97 AK |
789 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
790 | { | |
2c3579ab | 791 | #ifdef TARGET_WORDS_BIGENDIAN |
be675c97 AK |
792 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; |
793 | #else | |
794 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
795 | #endif | |
796 | } | |
797 | ||
093bc2cd | 798 | void memory_region_init(MemoryRegion *mr, |
2c9b15ca | 799 | Object *owner, |
093bc2cd AK |
800 | const char *name, |
801 | uint64_t size) | |
802 | { | |
2cdfcf27 PB |
803 | mr->ops = &unassigned_mem_ops; |
804 | mr->opaque = NULL; | |
2c9b15ca | 805 | mr->owner = owner; |
30951157 | 806 | mr->iommu_ops = NULL; |
093bc2cd | 807 | mr->parent = NULL; |
803c0816 | 808 | mr->owner = NULL; |
08dafab4 AK |
809 | mr->size = int128_make64(size); |
810 | if (size == UINT64_MAX) { | |
811 | mr->size = int128_2_64(); | |
812 | } | |
093bc2cd | 813 | mr->addr = 0; |
b3b00c78 | 814 | mr->subpage = false; |
6bba19ba | 815 | mr->enabled = true; |
14a3c10a | 816 | mr->terminates = false; |
8ea9252a | 817 | mr->ram = false; |
5f9a5ea1 | 818 | mr->romd_mode = true; |
fb1cd6f9 | 819 | mr->readonly = false; |
75c578dc | 820 | mr->rom_device = false; |
545e92e0 | 821 | mr->destructor = memory_region_destructor_none; |
093bc2cd AK |
822 | mr->priority = 0; |
823 | mr->may_overlap = false; | |
824 | mr->alias = NULL; | |
825 | QTAILQ_INIT(&mr->subregions); | |
826 | memset(&mr->subregions_link, 0, sizeof mr->subregions_link); | |
827 | QTAILQ_INIT(&mr->coalesced); | |
7267c094 | 828 | mr->name = g_strdup(name); |
5a583347 | 829 | mr->dirty_log_mask = 0; |
3e9d69e7 AK |
830 | mr->ioeventfd_nb = 0; |
831 | mr->ioeventfds = NULL; | |
d410515e | 832 | mr->flush_coalesced_mmio = false; |
093bc2cd AK |
833 | } |
834 | ||
b018ddf6 PB |
835 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
836 | unsigned size) | |
837 | { | |
838 | #ifdef DEBUG_UNASSIGNED | |
839 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
840 | #endif | |
4917cf44 AF |
841 | if (current_cpu != NULL) { |
842 | cpu_unassigned_access(current_cpu, addr, false, false, 0, size); | |
c658b94f | 843 | } |
b018ddf6 PB |
844 | return 0; |
845 | } | |
846 | ||
847 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
848 | uint64_t val, unsigned size) | |
849 | { | |
850 | #ifdef DEBUG_UNASSIGNED | |
851 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
852 | #endif | |
4917cf44 AF |
853 | if (current_cpu != NULL) { |
854 | cpu_unassigned_access(current_cpu, addr, true, false, 0, size); | |
c658b94f | 855 | } |
b018ddf6 PB |
856 | } |
857 | ||
d197063f PB |
858 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
859 | unsigned size, bool is_write) | |
860 | { | |
861 | return false; | |
862 | } | |
863 | ||
864 | const MemoryRegionOps unassigned_mem_ops = { | |
865 | .valid.accepts = unassigned_mem_accepts, | |
866 | .endianness = DEVICE_NATIVE_ENDIAN, | |
867 | }; | |
868 | ||
d2702032 PB |
869 | bool memory_region_access_valid(MemoryRegion *mr, |
870 | hwaddr addr, | |
871 | unsigned size, | |
872 | bool is_write) | |
093bc2cd | 873 | { |
a014ed07 PB |
874 | int access_size_min, access_size_max; |
875 | int access_size, i; | |
897fa7cf | 876 | |
093bc2cd AK |
877 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
878 | return false; | |
879 | } | |
880 | ||
a014ed07 | 881 | if (!mr->ops->valid.accepts) { |
093bc2cd AK |
882 | return true; |
883 | } | |
884 | ||
a014ed07 PB |
885 | access_size_min = mr->ops->valid.min_access_size; |
886 | if (!mr->ops->valid.min_access_size) { | |
887 | access_size_min = 1; | |
888 | } | |
889 | ||
890 | access_size_max = mr->ops->valid.max_access_size; | |
891 | if (!mr->ops->valid.max_access_size) { | |
892 | access_size_max = 4; | |
893 | } | |
894 | ||
895 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
896 | for (i = 0; i < size; i += access_size) { | |
897 | if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, | |
898 | is_write)) { | |
899 | return false; | |
900 | } | |
093bc2cd | 901 | } |
a014ed07 | 902 | |
093bc2cd AK |
903 | return true; |
904 | } | |
905 | ||
a621f38d | 906 | static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, |
a8170e5e | 907 | hwaddr addr, |
a621f38d | 908 | unsigned size) |
093bc2cd | 909 | { |
164a4dcd | 910 | uint64_t data = 0; |
093bc2cd | 911 | |
ce5d2f33 PB |
912 | if (mr->ops->read) { |
913 | access_with_adjusted_size(addr, &data, size, | |
914 | mr->ops->impl.min_access_size, | |
915 | mr->ops->impl.max_access_size, | |
916 | memory_region_read_accessor, mr); | |
917 | } else { | |
918 | access_with_adjusted_size(addr, &data, size, 1, 4, | |
919 | memory_region_oldmmio_read_accessor, mr); | |
74901c3b AK |
920 | } |
921 | ||
093bc2cd AK |
922 | return data; |
923 | } | |
924 | ||
a621f38d | 925 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) |
093bc2cd | 926 | { |
a621f38d AK |
927 | if (memory_region_wrong_endianness(mr)) { |
928 | switch (size) { | |
929 | case 1: | |
930 | break; | |
931 | case 2: | |
932 | *data = bswap16(*data); | |
933 | break; | |
934 | case 4: | |
935 | *data = bswap32(*data); | |
1470a0cd | 936 | break; |
968a5627 PB |
937 | case 8: |
938 | *data = bswap64(*data); | |
939 | break; | |
a621f38d AK |
940 | default: |
941 | abort(); | |
942 | } | |
943 | } | |
944 | } | |
945 | ||
791af8c8 PB |
946 | static bool memory_region_dispatch_read(MemoryRegion *mr, |
947 | hwaddr addr, | |
948 | uint64_t *pval, | |
949 | unsigned size) | |
a621f38d | 950 | { |
791af8c8 PB |
951 | if (!memory_region_access_valid(mr, addr, size, false)) { |
952 | *pval = unassigned_mem_read(mr, addr, size); | |
953 | return true; | |
954 | } | |
a621f38d | 955 | |
791af8c8 PB |
956 | *pval = memory_region_dispatch_read1(mr, addr, size); |
957 | adjust_endianness(mr, pval, size); | |
958 | return false; | |
a621f38d | 959 | } |
093bc2cd | 960 | |
791af8c8 | 961 | static bool memory_region_dispatch_write(MemoryRegion *mr, |
a8170e5e | 962 | hwaddr addr, |
a621f38d AK |
963 | uint64_t data, |
964 | unsigned size) | |
965 | { | |
897fa7cf | 966 | if (!memory_region_access_valid(mr, addr, size, true)) { |
b018ddf6 | 967 | unassigned_mem_write(mr, addr, data, size); |
791af8c8 | 968 | return true; |
093bc2cd AK |
969 | } |
970 | ||
a621f38d AK |
971 | adjust_endianness(mr, &data, size); |
972 | ||
ce5d2f33 PB |
973 | if (mr->ops->write) { |
974 | access_with_adjusted_size(addr, &data, size, | |
975 | mr->ops->impl.min_access_size, | |
976 | mr->ops->impl.max_access_size, | |
977 | memory_region_write_accessor, mr); | |
978 | } else { | |
979 | access_with_adjusted_size(addr, &data, size, 1, 4, | |
980 | memory_region_oldmmio_write_accessor, mr); | |
74901c3b | 981 | } |
791af8c8 | 982 | return false; |
093bc2cd AK |
983 | } |
984 | ||
093bc2cd | 985 | void memory_region_init_io(MemoryRegion *mr, |
2c9b15ca | 986 | Object *owner, |
093bc2cd AK |
987 | const MemoryRegionOps *ops, |
988 | void *opaque, | |
989 | const char *name, | |
990 | uint64_t size) | |
991 | { | |
2c9b15ca | 992 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
993 | mr->ops = ops; |
994 | mr->opaque = opaque; | |
14a3c10a | 995 | mr->terminates = true; |
97161e17 | 996 | mr->ram_addr = ~(ram_addr_t)0; |
093bc2cd AK |
997 | } |
998 | ||
999 | void memory_region_init_ram(MemoryRegion *mr, | |
2c9b15ca | 1000 | Object *owner, |
093bc2cd AK |
1001 | const char *name, |
1002 | uint64_t size) | |
1003 | { | |
2c9b15ca | 1004 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1005 | mr->ram = true; |
14a3c10a | 1006 | mr->terminates = true; |
545e92e0 | 1007 | mr->destructor = memory_region_destructor_ram; |
c5705a77 | 1008 | mr->ram_addr = qemu_ram_alloc(size, mr); |
093bc2cd AK |
1009 | } |
1010 | ||
1011 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
2c9b15ca | 1012 | Object *owner, |
093bc2cd AK |
1013 | const char *name, |
1014 | uint64_t size, | |
1015 | void *ptr) | |
1016 | { | |
2c9b15ca | 1017 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1018 | mr->ram = true; |
14a3c10a | 1019 | mr->terminates = true; |
545e92e0 | 1020 | mr->destructor = memory_region_destructor_ram_from_ptr; |
c5705a77 | 1021 | mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
093bc2cd AK |
1022 | } |
1023 | ||
1024 | void memory_region_init_alias(MemoryRegion *mr, | |
2c9b15ca | 1025 | Object *owner, |
093bc2cd AK |
1026 | const char *name, |
1027 | MemoryRegion *orig, | |
a8170e5e | 1028 | hwaddr offset, |
093bc2cd AK |
1029 | uint64_t size) |
1030 | { | |
2c9b15ca | 1031 | memory_region_init(mr, owner, name, size); |
dfde4e6e PB |
1032 | memory_region_ref(orig); |
1033 | mr->destructor = memory_region_destructor_alias; | |
093bc2cd AK |
1034 | mr->alias = orig; |
1035 | mr->alias_offset = offset; | |
1036 | } | |
1037 | ||
d0a9b5bc | 1038 | void memory_region_init_rom_device(MemoryRegion *mr, |
2c9b15ca | 1039 | Object *owner, |
d0a9b5bc | 1040 | const MemoryRegionOps *ops, |
75f5941c | 1041 | void *opaque, |
d0a9b5bc AK |
1042 | const char *name, |
1043 | uint64_t size) | |
1044 | { | |
2c9b15ca | 1045 | memory_region_init(mr, owner, name, size); |
7bc2b9cd | 1046 | mr->ops = ops; |
75f5941c | 1047 | mr->opaque = opaque; |
d0a9b5bc | 1048 | mr->terminates = true; |
75c578dc | 1049 | mr->rom_device = true; |
d0a9b5bc | 1050 | mr->destructor = memory_region_destructor_rom_device; |
c5705a77 | 1051 | mr->ram_addr = qemu_ram_alloc(size, mr); |
d0a9b5bc AK |
1052 | } |
1053 | ||
30951157 | 1054 | void memory_region_init_iommu(MemoryRegion *mr, |
2c9b15ca | 1055 | Object *owner, |
30951157 AK |
1056 | const MemoryRegionIOMMUOps *ops, |
1057 | const char *name, | |
1058 | uint64_t size) | |
1059 | { | |
2c9b15ca | 1060 | memory_region_init(mr, owner, name, size); |
30951157 AK |
1061 | mr->iommu_ops = ops, |
1062 | mr->terminates = true; /* then re-forwards */ | |
06866575 | 1063 | notifier_list_init(&mr->iommu_notify); |
30951157 AK |
1064 | } |
1065 | ||
1660e72d | 1066 | void memory_region_init_reservation(MemoryRegion *mr, |
2c9b15ca | 1067 | Object *owner, |
1660e72d JK |
1068 | const char *name, |
1069 | uint64_t size) | |
1070 | { | |
2c9b15ca | 1071 | memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size); |
1660e72d JK |
1072 | } |
1073 | ||
093bc2cd AK |
1074 | void memory_region_destroy(MemoryRegion *mr) |
1075 | { | |
1076 | assert(QTAILQ_EMPTY(&mr->subregions)); | |
2be0e25f | 1077 | assert(memory_region_transaction_depth == 0); |
545e92e0 | 1078 | mr->destructor(mr); |
093bc2cd | 1079 | memory_region_clear_coalescing(mr); |
7267c094 AL |
1080 | g_free((char *)mr->name); |
1081 | g_free(mr->ioeventfds); | |
093bc2cd AK |
1082 | } |
1083 | ||
803c0816 PB |
1084 | Object *memory_region_owner(MemoryRegion *mr) |
1085 | { | |
1086 | return mr->owner; | |
1087 | } | |
1088 | ||
46637be2 PB |
1089 | void memory_region_ref(MemoryRegion *mr) |
1090 | { | |
1091 | if (mr && mr->owner) { | |
1092 | object_ref(mr->owner); | |
1093 | } | |
1094 | } | |
1095 | ||
1096 | void memory_region_unref(MemoryRegion *mr) | |
1097 | { | |
1098 | if (mr && mr->owner) { | |
1099 | object_unref(mr->owner); | |
1100 | } | |
1101 | } | |
1102 | ||
093bc2cd AK |
1103 | uint64_t memory_region_size(MemoryRegion *mr) |
1104 | { | |
08dafab4 AK |
1105 | if (int128_eq(mr->size, int128_2_64())) { |
1106 | return UINT64_MAX; | |
1107 | } | |
1108 | return int128_get64(mr->size); | |
093bc2cd AK |
1109 | } |
1110 | ||
8991c79b AK |
1111 | const char *memory_region_name(MemoryRegion *mr) |
1112 | { | |
1113 | return mr->name; | |
1114 | } | |
1115 | ||
8ea9252a AK |
1116 | bool memory_region_is_ram(MemoryRegion *mr) |
1117 | { | |
1118 | return mr->ram; | |
1119 | } | |
1120 | ||
55043ba3 AK |
1121 | bool memory_region_is_logging(MemoryRegion *mr) |
1122 | { | |
1123 | return mr->dirty_log_mask; | |
1124 | } | |
1125 | ||
ce7923da AK |
1126 | bool memory_region_is_rom(MemoryRegion *mr) |
1127 | { | |
1128 | return mr->ram && mr->readonly; | |
1129 | } | |
1130 | ||
30951157 AK |
1131 | bool memory_region_is_iommu(MemoryRegion *mr) |
1132 | { | |
1133 | return mr->iommu_ops; | |
1134 | } | |
1135 | ||
06866575 DG |
1136 | void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n) |
1137 | { | |
1138 | notifier_list_add(&mr->iommu_notify, n); | |
1139 | } | |
1140 | ||
1141 | void memory_region_unregister_iommu_notifier(Notifier *n) | |
1142 | { | |
1143 | notifier_remove(n); | |
1144 | } | |
1145 | ||
1146 | void memory_region_notify_iommu(MemoryRegion *mr, | |
1147 | IOMMUTLBEntry entry) | |
1148 | { | |
1149 | assert(memory_region_is_iommu(mr)); | |
1150 | notifier_list_notify(&mr->iommu_notify, &entry); | |
1151 | } | |
1152 | ||
093bc2cd AK |
1153 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1154 | { | |
5a583347 AK |
1155 | uint8_t mask = 1 << client; |
1156 | ||
59023ef4 | 1157 | memory_region_transaction_begin(); |
5a583347 | 1158 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 1159 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1160 | memory_region_transaction_commit(); |
093bc2cd AK |
1161 | } |
1162 | ||
a8170e5e AK |
1163 | bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr, |
1164 | hwaddr size, unsigned client) | |
093bc2cd | 1165 | { |
14a3c10a | 1166 | assert(mr->terminates); |
cd7a45c9 BS |
1167 | return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, |
1168 | 1 << client); | |
093bc2cd AK |
1169 | } |
1170 | ||
a8170e5e AK |
1171 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
1172 | hwaddr size) | |
093bc2cd | 1173 | { |
14a3c10a | 1174 | assert(mr->terminates); |
fd4aa979 | 1175 | return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1); |
093bc2cd AK |
1176 | } |
1177 | ||
6c279db8 JQ |
1178 | bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr, |
1179 | hwaddr size, unsigned client) | |
1180 | { | |
1181 | bool ret; | |
1182 | assert(mr->terminates); | |
1183 | ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, | |
1184 | 1 << client); | |
1185 | if (ret) { | |
1186 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, | |
1187 | mr->ram_addr + addr + size, | |
1188 | 1 << client); | |
1189 | } | |
1190 | return ret; | |
1191 | } | |
1192 | ||
1193 | ||
093bc2cd AK |
1194 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
1195 | { | |
0d673e36 | 1196 | AddressSpace *as; |
5a583347 AK |
1197 | FlatRange *fr; |
1198 | ||
0d673e36 | 1199 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
856d7245 | 1200 | FlatView *view = address_space_get_flatview(as); |
99e86347 | 1201 | FOR_EACH_FLAT_RANGE(fr, view) { |
0d673e36 AK |
1202 | if (fr->mr == mr) { |
1203 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); | |
1204 | } | |
5a583347 | 1205 | } |
856d7245 | 1206 | flatview_unref(view); |
5a583347 | 1207 | } |
093bc2cd AK |
1208 | } |
1209 | ||
1210 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1211 | { | |
fb1cd6f9 | 1212 | if (mr->readonly != readonly) { |
59023ef4 | 1213 | memory_region_transaction_begin(); |
fb1cd6f9 | 1214 | mr->readonly = readonly; |
22bde714 | 1215 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1216 | memory_region_transaction_commit(); |
fb1cd6f9 | 1217 | } |
093bc2cd AK |
1218 | } |
1219 | ||
5f9a5ea1 | 1220 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 1221 | { |
5f9a5ea1 | 1222 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 1223 | memory_region_transaction_begin(); |
5f9a5ea1 | 1224 | mr->romd_mode = romd_mode; |
22bde714 | 1225 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1226 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1227 | } |
1228 | } | |
1229 | ||
a8170e5e AK |
1230 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
1231 | hwaddr size, unsigned client) | |
093bc2cd | 1232 | { |
14a3c10a | 1233 | assert(mr->terminates); |
5a583347 AK |
1234 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, |
1235 | mr->ram_addr + addr + size, | |
1236 | 1 << client); | |
093bc2cd AK |
1237 | } |
1238 | ||
1239 | void *memory_region_get_ram_ptr(MemoryRegion *mr) | |
1240 | { | |
1241 | if (mr->alias) { | |
1242 | return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset; | |
1243 | } | |
1244 | ||
14a3c10a | 1245 | assert(mr->terminates); |
093bc2cd | 1246 | |
021d26d1 | 1247 | return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK); |
093bc2cd AK |
1248 | } |
1249 | ||
0d673e36 | 1250 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
093bc2cd | 1251 | { |
99e86347 | 1252 | FlatView *view; |
093bc2cd AK |
1253 | FlatRange *fr; |
1254 | CoalescedMemoryRange *cmr; | |
1255 | AddrRange tmp; | |
95d2994a | 1256 | MemoryRegionSection section; |
093bc2cd | 1257 | |
856d7245 | 1258 | view = address_space_get_flatview(as); |
99e86347 | 1259 | FOR_EACH_FLAT_RANGE(fr, view) { |
093bc2cd | 1260 | if (fr->mr == mr) { |
95d2994a | 1261 | section = (MemoryRegionSection) { |
f6790af6 | 1262 | .address_space = as, |
95d2994a | 1263 | .offset_within_address_space = int128_get64(fr->addr.start), |
052e87b0 | 1264 | .size = fr->addr.size, |
95d2994a AK |
1265 | }; |
1266 | ||
1267 | MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, §ion, | |
1268 | int128_get64(fr->addr.start), | |
1269 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1270 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1271 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1272 | int128_sub(fr->addr.start, |
1273 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1274 | if (!addrrange_intersects(tmp, fr->addr)) { |
1275 | continue; | |
1276 | } | |
1277 | tmp = addrrange_intersection(tmp, fr->addr); | |
95d2994a AK |
1278 | MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, §ion, |
1279 | int128_get64(tmp.start), | |
1280 | int128_get64(tmp.size)); | |
093bc2cd AK |
1281 | } |
1282 | } | |
1283 | } | |
856d7245 | 1284 | flatview_unref(view); |
093bc2cd AK |
1285 | } |
1286 | ||
0d673e36 AK |
1287 | static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1288 | { | |
1289 | AddressSpace *as; | |
1290 | ||
1291 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1292 | memory_region_update_coalesced_range_as(mr, as); | |
1293 | } | |
1294 | } | |
1295 | ||
093bc2cd AK |
1296 | void memory_region_set_coalescing(MemoryRegion *mr) |
1297 | { | |
1298 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1299 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1300 | } |
1301 | ||
1302 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 1303 | hwaddr offset, |
093bc2cd AK |
1304 | uint64_t size) |
1305 | { | |
7267c094 | 1306 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1307 | |
08dafab4 | 1308 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1309 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1310 | memory_region_update_coalesced_range(mr); | |
d410515e | 1311 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1312 | } |
1313 | ||
1314 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1315 | { | |
1316 | CoalescedMemoryRange *cmr; | |
1317 | ||
d410515e JK |
1318 | qemu_flush_coalesced_mmio_buffer(); |
1319 | mr->flush_coalesced_mmio = false; | |
1320 | ||
093bc2cd AK |
1321 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1322 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1323 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1324 | g_free(cmr); |
093bc2cd AK |
1325 | } |
1326 | memory_region_update_coalesced_range(mr); | |
1327 | } | |
1328 | ||
d410515e JK |
1329 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1330 | { | |
1331 | mr->flush_coalesced_mmio = true; | |
1332 | } | |
1333 | ||
1334 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1335 | { | |
1336 | qemu_flush_coalesced_mmio_buffer(); | |
1337 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1338 | mr->flush_coalesced_mmio = false; | |
1339 | } | |
1340 | } | |
1341 | ||
3e9d69e7 | 1342 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 1343 | hwaddr addr, |
3e9d69e7 AK |
1344 | unsigned size, |
1345 | bool match_data, | |
1346 | uint64_t data, | |
753d5e14 | 1347 | EventNotifier *e) |
3e9d69e7 AK |
1348 | { |
1349 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1350 | .addr.start = int128_make64(addr), |
1351 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1352 | .match_data = match_data, |
1353 | .data = data, | |
753d5e14 | 1354 | .e = e, |
3e9d69e7 AK |
1355 | }; |
1356 | unsigned i; | |
1357 | ||
28f362be | 1358 | adjust_endianness(mr, &mrfd.data, size); |
59023ef4 | 1359 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1360 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1361 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1362 | break; | |
1363 | } | |
1364 | } | |
1365 | ++mr->ioeventfd_nb; | |
7267c094 | 1366 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1367 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1368 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1369 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1370 | mr->ioeventfds[i] = mrfd; | |
22bde714 | 1371 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1372 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1373 | } |
1374 | ||
1375 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 1376 | hwaddr addr, |
3e9d69e7 AK |
1377 | unsigned size, |
1378 | bool match_data, | |
1379 | uint64_t data, | |
753d5e14 | 1380 | EventNotifier *e) |
3e9d69e7 AK |
1381 | { |
1382 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1383 | .addr.start = int128_make64(addr), |
1384 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1385 | .match_data = match_data, |
1386 | .data = data, | |
753d5e14 | 1387 | .e = e, |
3e9d69e7 AK |
1388 | }; |
1389 | unsigned i; | |
1390 | ||
28f362be | 1391 | adjust_endianness(mr, &mrfd.data, size); |
59023ef4 | 1392 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1393 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1394 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1395 | break; | |
1396 | } | |
1397 | } | |
1398 | assert(i != mr->ioeventfd_nb); | |
1399 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1400 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1401 | --mr->ioeventfd_nb; | |
7267c094 | 1402 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1403 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
22bde714 | 1404 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1405 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1406 | } |
1407 | ||
093bc2cd | 1408 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
a8170e5e | 1409 | hwaddr offset, |
093bc2cd AK |
1410 | MemoryRegion *subregion) |
1411 | { | |
1412 | MemoryRegion *other; | |
1413 | ||
59023ef4 JK |
1414 | memory_region_transaction_begin(); |
1415 | ||
093bc2cd | 1416 | assert(!subregion->parent); |
dfde4e6e | 1417 | memory_region_ref(subregion); |
093bc2cd AK |
1418 | subregion->parent = mr; |
1419 | subregion->addr = offset; | |
1420 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1421 | if (subregion->may_overlap || other->may_overlap) { | |
1422 | continue; | |
1423 | } | |
2c7cfd65 | 1424 | if (int128_ge(int128_make64(offset), |
08dafab4 AK |
1425 | int128_add(int128_make64(other->addr), other->size)) |
1426 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1427 | int128_make64(other->addr))) { | |
093bc2cd AK |
1428 | continue; |
1429 | } | |
a5e1cbc8 | 1430 | #if 0 |
860329b2 MW |
1431 | printf("warning: subregion collision %llx/%llx (%s) " |
1432 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1433 | (unsigned long long)offset, |
08dafab4 | 1434 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1435 | subregion->name, |
1436 | (unsigned long long)other->addr, | |
08dafab4 | 1437 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1438 | other->name); |
a5e1cbc8 | 1439 | #endif |
093bc2cd AK |
1440 | } |
1441 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1442 | if (subregion->priority >= other->priority) { | |
1443 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1444 | goto done; | |
1445 | } | |
1446 | } | |
1447 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1448 | done: | |
22bde714 | 1449 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1450 | memory_region_transaction_commit(); |
093bc2cd AK |
1451 | } |
1452 | ||
1453 | ||
1454 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 1455 | hwaddr offset, |
093bc2cd AK |
1456 | MemoryRegion *subregion) |
1457 | { | |
1458 | subregion->may_overlap = false; | |
1459 | subregion->priority = 0; | |
1460 | memory_region_add_subregion_common(mr, offset, subregion); | |
1461 | } | |
1462 | ||
1463 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 1464 | hwaddr offset, |
093bc2cd AK |
1465 | MemoryRegion *subregion, |
1466 | unsigned priority) | |
1467 | { | |
1468 | subregion->may_overlap = true; | |
1469 | subregion->priority = priority; | |
1470 | memory_region_add_subregion_common(mr, offset, subregion); | |
1471 | } | |
1472 | ||
1473 | void memory_region_del_subregion(MemoryRegion *mr, | |
1474 | MemoryRegion *subregion) | |
1475 | { | |
59023ef4 | 1476 | memory_region_transaction_begin(); |
093bc2cd AK |
1477 | assert(subregion->parent == mr); |
1478 | subregion->parent = NULL; | |
1479 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); | |
dfde4e6e | 1480 | memory_region_unref(subregion); |
22bde714 | 1481 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1482 | memory_region_transaction_commit(); |
6bba19ba AK |
1483 | } |
1484 | ||
1485 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1486 | { | |
1487 | if (enabled == mr->enabled) { | |
1488 | return; | |
1489 | } | |
59023ef4 | 1490 | memory_region_transaction_begin(); |
6bba19ba | 1491 | mr->enabled = enabled; |
22bde714 | 1492 | memory_region_update_pending = true; |
59023ef4 | 1493 | memory_region_transaction_commit(); |
093bc2cd | 1494 | } |
1c0ffa58 | 1495 | |
a8170e5e | 1496 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
2282e1af AK |
1497 | { |
1498 | MemoryRegion *parent = mr->parent; | |
1499 | unsigned priority = mr->priority; | |
1500 | bool may_overlap = mr->may_overlap; | |
1501 | ||
1502 | if (addr == mr->addr || !parent) { | |
1503 | mr->addr = addr; | |
1504 | return; | |
1505 | } | |
1506 | ||
1507 | memory_region_transaction_begin(); | |
dfde4e6e | 1508 | memory_region_ref(mr); |
2282e1af AK |
1509 | memory_region_del_subregion(parent, mr); |
1510 | if (may_overlap) { | |
1511 | memory_region_add_subregion_overlap(parent, addr, mr, priority); | |
1512 | } else { | |
1513 | memory_region_add_subregion(parent, addr, mr); | |
1514 | } | |
dfde4e6e | 1515 | memory_region_unref(mr); |
2282e1af AK |
1516 | memory_region_transaction_commit(); |
1517 | } | |
1518 | ||
a8170e5e | 1519 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 1520 | { |
4703359e | 1521 | assert(mr->alias); |
4703359e | 1522 | |
59023ef4 | 1523 | if (offset == mr->alias_offset) { |
4703359e AK |
1524 | return; |
1525 | } | |
1526 | ||
59023ef4 JK |
1527 | memory_region_transaction_begin(); |
1528 | mr->alias_offset = offset; | |
22bde714 | 1529 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1530 | memory_region_transaction_commit(); |
4703359e AK |
1531 | } |
1532 | ||
e34911c4 AK |
1533 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1534 | { | |
e34911c4 AK |
1535 | return mr->ram_addr; |
1536 | } | |
1537 | ||
e2177955 AK |
1538 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1539 | { | |
1540 | const AddrRange *addr = addr_; | |
1541 | const FlatRange *fr = fr_; | |
1542 | ||
1543 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1544 | return -1; | |
1545 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1546 | return 1; | |
1547 | } | |
1548 | return 0; | |
1549 | } | |
1550 | ||
99e86347 | 1551 | static FlatRange *flatview_lookup(FlatView *view, AddrRange addr) |
e2177955 | 1552 | { |
99e86347 | 1553 | return bsearch(&addr, view->ranges, view->nr, |
e2177955 AK |
1554 | sizeof(FlatRange), cmp_flatrange_addr); |
1555 | } | |
1556 | ||
3ce10901 PB |
1557 | bool memory_region_present(MemoryRegion *parent, hwaddr addr) |
1558 | { | |
1559 | MemoryRegion *mr = memory_region_find(parent, addr, 1).mr; | |
1560 | if (!mr) { | |
1561 | return false; | |
1562 | } | |
dfde4e6e | 1563 | memory_region_unref(mr); |
3ce10901 PB |
1564 | return true; |
1565 | } | |
1566 | ||
73034e9e | 1567 | MemoryRegionSection memory_region_find(MemoryRegion *mr, |
a8170e5e | 1568 | hwaddr addr, uint64_t size) |
e2177955 | 1569 | { |
052e87b0 | 1570 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
1571 | MemoryRegion *root; |
1572 | AddressSpace *as; | |
1573 | AddrRange range; | |
99e86347 | 1574 | FlatView *view; |
73034e9e PB |
1575 | FlatRange *fr; |
1576 | ||
1577 | addr += mr->addr; | |
1578 | for (root = mr; root->parent; ) { | |
1579 | root = root->parent; | |
1580 | addr += root->addr; | |
1581 | } | |
e2177955 | 1582 | |
73034e9e PB |
1583 | as = memory_region_to_address_space(root); |
1584 | range = addrrange_make(int128_make64(addr), int128_make64(size)); | |
99e86347 | 1585 | |
856d7245 | 1586 | view = address_space_get_flatview(as); |
99e86347 | 1587 | fr = flatview_lookup(view, range); |
e2177955 AK |
1588 | if (!fr) { |
1589 | return ret; | |
1590 | } | |
1591 | ||
99e86347 | 1592 | while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { |
e2177955 AK |
1593 | --fr; |
1594 | } | |
1595 | ||
1596 | ret.mr = fr->mr; | |
73034e9e | 1597 | ret.address_space = as; |
e2177955 AK |
1598 | range = addrrange_intersection(range, fr->addr); |
1599 | ret.offset_within_region = fr->offset_in_region; | |
1600 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
1601 | fr->addr.start)); | |
052e87b0 | 1602 | ret.size = range.size; |
e2177955 | 1603 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 1604 | ret.readonly = fr->readonly; |
dfde4e6e PB |
1605 | memory_region_ref(ret.mr); |
1606 | ||
856d7245 | 1607 | flatview_unref(view); |
e2177955 AK |
1608 | return ret; |
1609 | } | |
1610 | ||
1d671369 | 1611 | void address_space_sync_dirty_bitmap(AddressSpace *as) |
86e775c6 | 1612 | { |
99e86347 | 1613 | FlatView *view; |
7664e80c AK |
1614 | FlatRange *fr; |
1615 | ||
856d7245 | 1616 | view = address_space_get_flatview(as); |
99e86347 | 1617 | FOR_EACH_FLAT_RANGE(fr, view) { |
72e22d2f | 1618 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c | 1619 | } |
856d7245 | 1620 | flatview_unref(view); |
7664e80c AK |
1621 | } |
1622 | ||
1623 | void memory_global_dirty_log_start(void) | |
1624 | { | |
7664e80c | 1625 | global_dirty_log = true; |
7376e582 | 1626 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
7664e80c AK |
1627 | } |
1628 | ||
1629 | void memory_global_dirty_log_stop(void) | |
1630 | { | |
7664e80c | 1631 | global_dirty_log = false; |
7376e582 | 1632 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
1633 | } |
1634 | ||
1635 | static void listener_add_address_space(MemoryListener *listener, | |
1636 | AddressSpace *as) | |
1637 | { | |
99e86347 | 1638 | FlatView *view; |
7664e80c AK |
1639 | FlatRange *fr; |
1640 | ||
221b3a3f | 1641 | if (listener->address_space_filter |
f6790af6 | 1642 | && listener->address_space_filter != as) { |
221b3a3f JG |
1643 | return; |
1644 | } | |
1645 | ||
7664e80c | 1646 | if (global_dirty_log) { |
975aefe0 AK |
1647 | if (listener->log_global_start) { |
1648 | listener->log_global_start(listener); | |
1649 | } | |
7664e80c | 1650 | } |
975aefe0 | 1651 | |
856d7245 | 1652 | view = address_space_get_flatview(as); |
99e86347 | 1653 | FOR_EACH_FLAT_RANGE(fr, view) { |
7664e80c AK |
1654 | MemoryRegionSection section = { |
1655 | .mr = fr->mr, | |
f6790af6 | 1656 | .address_space = as, |
7664e80c | 1657 | .offset_within_region = fr->offset_in_region, |
052e87b0 | 1658 | .size = fr->addr.size, |
7664e80c | 1659 | .offset_within_address_space = int128_get64(fr->addr.start), |
7a8499e8 | 1660 | .readonly = fr->readonly, |
7664e80c | 1661 | }; |
975aefe0 AK |
1662 | if (listener->region_add) { |
1663 | listener->region_add(listener, §ion); | |
1664 | } | |
7664e80c | 1665 | } |
856d7245 | 1666 | flatview_unref(view); |
7664e80c AK |
1667 | } |
1668 | ||
f6790af6 | 1669 | void memory_listener_register(MemoryListener *listener, AddressSpace *filter) |
7664e80c | 1670 | { |
72e22d2f | 1671 | MemoryListener *other = NULL; |
0d673e36 | 1672 | AddressSpace *as; |
72e22d2f | 1673 | |
7376e582 | 1674 | listener->address_space_filter = filter; |
72e22d2f AK |
1675 | if (QTAILQ_EMPTY(&memory_listeners) |
1676 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
1677 | memory_listeners)->priority) { | |
1678 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
1679 | } else { | |
1680 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
1681 | if (listener->priority < other->priority) { | |
1682 | break; | |
1683 | } | |
1684 | } | |
1685 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
1686 | } | |
0d673e36 AK |
1687 | |
1688 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1689 | listener_add_address_space(listener, as); | |
1690 | } | |
7664e80c AK |
1691 | } |
1692 | ||
1693 | void memory_listener_unregister(MemoryListener *listener) | |
1694 | { | |
72e22d2f | 1695 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 1696 | } |
e2177955 | 1697 | |
7dca8043 | 1698 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1c0ffa58 | 1699 | { |
856d7245 PB |
1700 | if (QTAILQ_EMPTY(&address_spaces)) { |
1701 | memory_init(); | |
1702 | } | |
1703 | ||
59023ef4 | 1704 | memory_region_transaction_begin(); |
8786db7c AK |
1705 | as->root = root; |
1706 | as->current_map = g_new(FlatView, 1); | |
1707 | flatview_init(as->current_map); | |
4c19eb72 AK |
1708 | as->ioeventfd_nb = 0; |
1709 | as->ioeventfds = NULL; | |
0d673e36 | 1710 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
7dca8043 | 1711 | as->name = g_strdup(name ? name : "anonymous"); |
ac1970fb | 1712 | address_space_init_dispatch(as); |
f43793c7 PB |
1713 | memory_region_update_pending |= root->enabled; |
1714 | memory_region_transaction_commit(); | |
1c0ffa58 | 1715 | } |
658b2224 | 1716 | |
83f3c251 AK |
1717 | void address_space_destroy(AddressSpace *as) |
1718 | { | |
1719 | /* Flush out anything from MemoryListeners listening in on this */ | |
1720 | memory_region_transaction_begin(); | |
1721 | as->root = NULL; | |
1722 | memory_region_transaction_commit(); | |
1723 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
1724 | address_space_destroy_dispatch(as); | |
856d7245 | 1725 | flatview_unref(as->current_map); |
7dca8043 | 1726 | g_free(as->name); |
4c19eb72 | 1727 | g_free(as->ioeventfds); |
83f3c251 AK |
1728 | } |
1729 | ||
791af8c8 | 1730 | bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size) |
acbbec5d | 1731 | { |
791af8c8 | 1732 | return memory_region_dispatch_read(mr, addr, pval, size); |
acbbec5d AK |
1733 | } |
1734 | ||
791af8c8 | 1735 | bool io_mem_write(MemoryRegion *mr, hwaddr addr, |
acbbec5d AK |
1736 | uint64_t val, unsigned size) |
1737 | { | |
791af8c8 | 1738 | return memory_region_dispatch_write(mr, addr, val, size); |
acbbec5d AK |
1739 | } |
1740 | ||
314e2987 BS |
1741 | typedef struct MemoryRegionList MemoryRegionList; |
1742 | ||
1743 | struct MemoryRegionList { | |
1744 | const MemoryRegion *mr; | |
1745 | bool printed; | |
1746 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
1747 | }; | |
1748 | ||
1749 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
1750 | ||
1751 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
1752 | const MemoryRegion *mr, unsigned int level, | |
a8170e5e | 1753 | hwaddr base, |
9479c57a | 1754 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 1755 | { |
9479c57a JK |
1756 | MemoryRegionList *new_ml, *ml, *next_ml; |
1757 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
1758 | const MemoryRegion *submr; |
1759 | unsigned int i; | |
1760 | ||
7ea692b2 | 1761 | if (!mr || !mr->enabled) { |
314e2987 BS |
1762 | return; |
1763 | } | |
1764 | ||
1765 | for (i = 0; i < level; i++) { | |
1766 | mon_printf(f, " "); | |
1767 | } | |
1768 | ||
1769 | if (mr->alias) { | |
1770 | MemoryRegionList *ml; | |
1771 | bool found = false; | |
1772 | ||
1773 | /* check if the alias is already in the queue */ | |
9479c57a | 1774 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
314e2987 BS |
1775 | if (ml->mr == mr->alias && !ml->printed) { |
1776 | found = true; | |
1777 | } | |
1778 | } | |
1779 | ||
1780 | if (!found) { | |
1781 | ml = g_new(MemoryRegionList, 1); | |
1782 | ml->mr = mr->alias; | |
1783 | ml->printed = false; | |
9479c57a | 1784 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 1785 | } |
4896d74b JK |
1786 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
1787 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
1788 | "-" TARGET_FMT_plx "\n", | |
314e2987 | 1789 | base + mr->addr, |
08dafab4 | 1790 | base + mr->addr |
052e87b0 | 1791 | + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))), |
4b474ba7 | 1792 | mr->priority, |
5f9a5ea1 JK |
1793 | mr->romd_mode ? 'R' : '-', |
1794 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
1795 | : '-', | |
314e2987 BS |
1796 | mr->name, |
1797 | mr->alias->name, | |
1798 | mr->alias_offset, | |
08dafab4 | 1799 | mr->alias_offset |
a8170e5e | 1800 | + (hwaddr)int128_get64(mr->size) - 1); |
314e2987 | 1801 | } else { |
4896d74b JK |
1802 | mon_printf(f, |
1803 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", | |
314e2987 | 1804 | base + mr->addr, |
08dafab4 | 1805 | base + mr->addr |
052e87b0 | 1806 | + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))), |
4b474ba7 | 1807 | mr->priority, |
5f9a5ea1 JK |
1808 | mr->romd_mode ? 'R' : '-', |
1809 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
1810 | : '-', | |
314e2987 BS |
1811 | mr->name); |
1812 | } | |
9479c57a JK |
1813 | |
1814 | QTAILQ_INIT(&submr_print_queue); | |
1815 | ||
314e2987 | 1816 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
1817 | new_ml = g_new(MemoryRegionList, 1); |
1818 | new_ml->mr = submr; | |
1819 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1820 | if (new_ml->mr->addr < ml->mr->addr || | |
1821 | (new_ml->mr->addr == ml->mr->addr && | |
1822 | new_ml->mr->priority > ml->mr->priority)) { | |
1823 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
1824 | new_ml = NULL; | |
1825 | break; | |
1826 | } | |
1827 | } | |
1828 | if (new_ml) { | |
1829 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
1830 | } | |
1831 | } | |
1832 | ||
1833 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1834 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
1835 | alias_print_queue); | |
1836 | } | |
1837 | ||
88365e47 | 1838 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 1839 | g_free(ml); |
314e2987 BS |
1840 | } |
1841 | } | |
1842 | ||
1843 | void mtree_info(fprintf_function mon_printf, void *f) | |
1844 | { | |
1845 | MemoryRegionListHead ml_head; | |
1846 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 1847 | AddressSpace *as; |
314e2987 BS |
1848 | |
1849 | QTAILQ_INIT(&ml_head); | |
1850 | ||
0d673e36 | 1851 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
0d673e36 AK |
1852 | mon_printf(f, "%s\n", as->name); |
1853 | mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head); | |
b9f9be88 BS |
1854 | } |
1855 | ||
1856 | mon_printf(f, "aliases\n"); | |
314e2987 BS |
1857 | /* print aliased regions */ |
1858 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
1859 | if (!ml->printed) { | |
1860 | mon_printf(f, "%s\n", ml->mr->name); | |
1861 | mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); | |
1862 | } | |
1863 | } | |
1864 | ||
1865 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 1866 | g_free(ml); |
314e2987 | 1867 | } |
314e2987 | 1868 | } |