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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <[email protected]> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
16 | #include "memory.h" | |
1c0ffa58 | 17 | #include "exec-memory.h" |
658b2224 | 18 | #include "ioport.h" |
74901c3b | 19 | #include "bitops.h" |
3e9d69e7 | 20 | #include "kvm.h" |
093bc2cd AK |
21 | #include <assert.h> |
22 | ||
67d95c15 AK |
23 | #define WANT_EXEC_OBSOLETE |
24 | #include "exec-obsolete.h" | |
25 | ||
4ef4db86 | 26 | unsigned memory_region_transaction_depth = 0; |
7664e80c AK |
27 | static bool global_dirty_log = false; |
28 | ||
72e22d2f AK |
29 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
30 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 31 | |
093bc2cd AK |
32 | typedef struct AddrRange AddrRange; |
33 | ||
8417cebf AK |
34 | /* |
35 | * Note using signed integers limits us to physical addresses at most | |
36 | * 63 bits wide. They are needed for negative offsetting in aliases | |
37 | * (large MemoryRegion::alias_offset). | |
38 | */ | |
093bc2cd | 39 | struct AddrRange { |
08dafab4 AK |
40 | Int128 start; |
41 | Int128 size; | |
093bc2cd AK |
42 | }; |
43 | ||
08dafab4 | 44 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
45 | { |
46 | return (AddrRange) { start, size }; | |
47 | } | |
48 | ||
49 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
50 | { | |
08dafab4 | 51 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
52 | } |
53 | ||
08dafab4 | 54 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 55 | { |
08dafab4 | 56 | return int128_add(r.start, r.size); |
093bc2cd AK |
57 | } |
58 | ||
08dafab4 | 59 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 60 | { |
08dafab4 | 61 | int128_addto(&range.start, delta); |
093bc2cd AK |
62 | return range; |
63 | } | |
64 | ||
08dafab4 AK |
65 | static bool addrrange_contains(AddrRange range, Int128 addr) |
66 | { | |
67 | return int128_ge(addr, range.start) | |
68 | && int128_lt(addr, addrrange_end(range)); | |
69 | } | |
70 | ||
093bc2cd AK |
71 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
72 | { | |
08dafab4 AK |
73 | return addrrange_contains(r1, r2.start) |
74 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
75 | } |
76 | ||
77 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
78 | { | |
08dafab4 AK |
79 | Int128 start = int128_max(r1.start, r2.start); |
80 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
81 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
82 | } |
83 | ||
0e0d36b4 AK |
84 | enum ListenerDirection { Forward, Reverse }; |
85 | ||
7376e582 AK |
86 | static bool memory_listener_match(MemoryListener *listener, |
87 | MemoryRegionSection *section) | |
88 | { | |
89 | return !listener->address_space_filter | |
90 | || listener->address_space_filter == section->address_space; | |
91 | } | |
92 | ||
93 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
0e0d36b4 AK |
94 | do { \ |
95 | MemoryListener *_listener; \ | |
96 | \ | |
97 | switch (_direction) { \ | |
98 | case Forward: \ | |
99 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
100 | _listener->_callback(_listener, ##_args); \ | |
101 | } \ | |
102 | break; \ | |
103 | case Reverse: \ | |
104 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
105 | memory_listeners, link) { \ | |
106 | _listener->_callback(_listener, ##_args); \ | |
107 | } \ | |
108 | break; \ | |
109 | default: \ | |
110 | abort(); \ | |
111 | } \ | |
112 | } while (0) | |
113 | ||
7376e582 AK |
114 | #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \ |
115 | do { \ | |
116 | MemoryListener *_listener; \ | |
117 | \ | |
118 | switch (_direction) { \ | |
119 | case Forward: \ | |
120 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
121 | if (memory_listener_match(_listener, _section)) { \ | |
122 | _listener->_callback(_listener, _section, ##_args); \ | |
123 | } \ | |
124 | } \ | |
125 | break; \ | |
126 | case Reverse: \ | |
127 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
128 | memory_listeners, link) { \ | |
129 | if (memory_listener_match(_listener, _section)) { \ | |
130 | _listener->_callback(_listener, _section, ##_args); \ | |
131 | } \ | |
132 | } \ | |
133 | break; \ | |
134 | default: \ | |
135 | abort(); \ | |
136 | } \ | |
137 | } while (0) | |
138 | ||
0e0d36b4 | 139 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \ |
7376e582 | 140 | MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
0e0d36b4 AK |
141 | .mr = (fr)->mr, \ |
142 | .address_space = (as)->root, \ | |
143 | .offset_within_region = (fr)->offset_in_region, \ | |
144 | .size = int128_get64((fr)->addr.size), \ | |
145 | .offset_within_address_space = int128_get64((fr)->addr.start), \ | |
7a8499e8 | 146 | .readonly = (fr)->readonly, \ |
7376e582 | 147 | })) |
0e0d36b4 | 148 | |
093bc2cd AK |
149 | struct CoalescedMemoryRange { |
150 | AddrRange addr; | |
151 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
152 | }; | |
153 | ||
3e9d69e7 AK |
154 | struct MemoryRegionIoeventfd { |
155 | AddrRange addr; | |
156 | bool match_data; | |
157 | uint64_t data; | |
753d5e14 | 158 | EventNotifier *e; |
3e9d69e7 AK |
159 | }; |
160 | ||
161 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
162 | MemoryRegionIoeventfd b) | |
163 | { | |
08dafab4 | 164 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 165 | return true; |
08dafab4 | 166 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 167 | return false; |
08dafab4 | 168 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 169 | return true; |
08dafab4 | 170 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
171 | return false; |
172 | } else if (a.match_data < b.match_data) { | |
173 | return true; | |
174 | } else if (a.match_data > b.match_data) { | |
175 | return false; | |
176 | } else if (a.match_data) { | |
177 | if (a.data < b.data) { | |
178 | return true; | |
179 | } else if (a.data > b.data) { | |
180 | return false; | |
181 | } | |
182 | } | |
753d5e14 | 183 | if (a.e < b.e) { |
3e9d69e7 | 184 | return true; |
753d5e14 | 185 | } else if (a.e > b.e) { |
3e9d69e7 AK |
186 | return false; |
187 | } | |
188 | return false; | |
189 | } | |
190 | ||
191 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
192 | MemoryRegionIoeventfd b) | |
193 | { | |
194 | return !memory_region_ioeventfd_before(a, b) | |
195 | && !memory_region_ioeventfd_before(b, a); | |
196 | } | |
197 | ||
093bc2cd AK |
198 | typedef struct FlatRange FlatRange; |
199 | typedef struct FlatView FlatView; | |
200 | ||
201 | /* Range of memory in the global map. Addresses are absolute. */ | |
202 | struct FlatRange { | |
203 | MemoryRegion *mr; | |
204 | target_phys_addr_t offset_in_region; | |
205 | AddrRange addr; | |
5a583347 | 206 | uint8_t dirty_log_mask; |
d0a9b5bc | 207 | bool readable; |
fb1cd6f9 | 208 | bool readonly; |
093bc2cd AK |
209 | }; |
210 | ||
211 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
212 | * order. | |
213 | */ | |
214 | struct FlatView { | |
215 | FlatRange *ranges; | |
216 | unsigned nr; | |
217 | unsigned nr_allocated; | |
218 | }; | |
219 | ||
cc31e6e7 AK |
220 | typedef struct AddressSpace AddressSpace; |
221 | typedef struct AddressSpaceOps AddressSpaceOps; | |
222 | ||
223 | /* A system address space - I/O, memory, etc. */ | |
224 | struct AddressSpace { | |
cc31e6e7 AK |
225 | MemoryRegion *root; |
226 | FlatView current_map; | |
3e9d69e7 AK |
227 | int ioeventfd_nb; |
228 | MemoryRegionIoeventfd *ioeventfds; | |
cc31e6e7 AK |
229 | }; |
230 | ||
093bc2cd AK |
231 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
232 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
233 | ||
093bc2cd AK |
234 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
235 | { | |
236 | return a->mr == b->mr | |
237 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 238 | && a->offset_in_region == b->offset_in_region |
fb1cd6f9 AK |
239 | && a->readable == b->readable |
240 | && a->readonly == b->readonly; | |
093bc2cd AK |
241 | } |
242 | ||
243 | static void flatview_init(FlatView *view) | |
244 | { | |
245 | view->ranges = NULL; | |
246 | view->nr = 0; | |
247 | view->nr_allocated = 0; | |
248 | } | |
249 | ||
250 | /* Insert a range into a given position. Caller is responsible for maintaining | |
251 | * sorting order. | |
252 | */ | |
253 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
254 | { | |
255 | if (view->nr == view->nr_allocated) { | |
256 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 257 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
258 | view->nr_allocated * sizeof(*view->ranges)); |
259 | } | |
260 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
261 | (view->nr - pos) * sizeof(FlatRange)); | |
262 | view->ranges[pos] = *range; | |
263 | ++view->nr; | |
264 | } | |
265 | ||
266 | static void flatview_destroy(FlatView *view) | |
267 | { | |
7267c094 | 268 | g_free(view->ranges); |
093bc2cd AK |
269 | } |
270 | ||
3d8e6bf9 AK |
271 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
272 | { | |
08dafab4 | 273 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 274 | && r1->mr == r2->mr |
08dafab4 AK |
275 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
276 | r1->addr.size), | |
277 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 278 | && r1->dirty_log_mask == r2->dirty_log_mask |
fb1cd6f9 AK |
279 | && r1->readable == r2->readable |
280 | && r1->readonly == r2->readonly; | |
3d8e6bf9 AK |
281 | } |
282 | ||
283 | /* Attempt to simplify a view by merging ajacent ranges */ | |
284 | static void flatview_simplify(FlatView *view) | |
285 | { | |
286 | unsigned i, j; | |
287 | ||
288 | i = 0; | |
289 | while (i < view->nr) { | |
290 | j = i + 1; | |
291 | while (j < view->nr | |
292 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 293 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
294 | ++j; |
295 | } | |
296 | ++i; | |
297 | memmove(&view->ranges[i], &view->ranges[j], | |
298 | (view->nr - j) * sizeof(view->ranges[j])); | |
299 | view->nr -= j - i; | |
300 | } | |
301 | } | |
302 | ||
164a4dcd AK |
303 | static void memory_region_read_accessor(void *opaque, |
304 | target_phys_addr_t addr, | |
305 | uint64_t *value, | |
306 | unsigned size, | |
307 | unsigned shift, | |
308 | uint64_t mask) | |
309 | { | |
310 | MemoryRegion *mr = opaque; | |
311 | uint64_t tmp; | |
312 | ||
d410515e JK |
313 | if (mr->flush_coalesced_mmio) { |
314 | qemu_flush_coalesced_mmio_buffer(); | |
315 | } | |
164a4dcd AK |
316 | tmp = mr->ops->read(mr->opaque, addr, size); |
317 | *value |= (tmp & mask) << shift; | |
318 | } | |
319 | ||
320 | static void memory_region_write_accessor(void *opaque, | |
321 | target_phys_addr_t addr, | |
322 | uint64_t *value, | |
323 | unsigned size, | |
324 | unsigned shift, | |
325 | uint64_t mask) | |
326 | { | |
327 | MemoryRegion *mr = opaque; | |
328 | uint64_t tmp; | |
329 | ||
d410515e JK |
330 | if (mr->flush_coalesced_mmio) { |
331 | qemu_flush_coalesced_mmio_buffer(); | |
332 | } | |
164a4dcd AK |
333 | tmp = (*value >> shift) & mask; |
334 | mr->ops->write(mr->opaque, addr, tmp, size); | |
335 | } | |
336 | ||
337 | static void access_with_adjusted_size(target_phys_addr_t addr, | |
338 | uint64_t *value, | |
339 | unsigned size, | |
340 | unsigned access_size_min, | |
341 | unsigned access_size_max, | |
342 | void (*access)(void *opaque, | |
343 | target_phys_addr_t addr, | |
344 | uint64_t *value, | |
345 | unsigned size, | |
346 | unsigned shift, | |
347 | uint64_t mask), | |
348 | void *opaque) | |
349 | { | |
350 | uint64_t access_mask; | |
351 | unsigned access_size; | |
352 | unsigned i; | |
353 | ||
354 | if (!access_size_min) { | |
355 | access_size_min = 1; | |
356 | } | |
357 | if (!access_size_max) { | |
358 | access_size_max = 4; | |
359 | } | |
360 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
361 | access_mask = -1ULL >> (64 - access_size * 8); | |
362 | for (i = 0; i < size; i += access_size) { | |
363 | /* FIXME: big-endian support */ | |
364 | access(opaque, addr + i, value, access_size, i * 8, access_mask); | |
365 | } | |
366 | } | |
367 | ||
8df8a843 | 368 | static AddressSpace address_space_memory; |
cc31e6e7 | 369 | |
627a0e90 AK |
370 | static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset, |
371 | unsigned width, bool write) | |
372 | { | |
373 | const MemoryRegionPortio *mrp; | |
374 | ||
375 | for (mrp = mr->ops->old_portio; mrp->size; ++mrp) { | |
376 | if (offset >= mrp->offset && offset < mrp->offset + mrp->len | |
377 | && width == mrp->size | |
378 | && (write ? (bool)mrp->write : (bool)mrp->read)) { | |
379 | return mrp; | |
380 | } | |
381 | } | |
382 | return NULL; | |
383 | } | |
384 | ||
658b2224 AK |
385 | static void memory_region_iorange_read(IORange *iorange, |
386 | uint64_t offset, | |
387 | unsigned width, | |
388 | uint64_t *data) | |
389 | { | |
a2d33521 AK |
390 | MemoryRegionIORange *mrio |
391 | = container_of(iorange, MemoryRegionIORange, iorange); | |
392 | MemoryRegion *mr = mrio->mr; | |
658b2224 | 393 | |
a2d33521 | 394 | offset += mrio->offset; |
627a0e90 | 395 | if (mr->ops->old_portio) { |
a2d33521 AK |
396 | const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset, |
397 | width, false); | |
627a0e90 AK |
398 | |
399 | *data = ((uint64_t)1 << (width * 8)) - 1; | |
400 | if (mrp) { | |
2b50aa1f | 401 | *data = mrp->read(mr->opaque, offset); |
03808f58 | 402 | } else if (width == 2) { |
a2d33521 | 403 | mrp = find_portio(mr, offset - mrio->offset, 1, false); |
03808f58 | 404 | assert(mrp); |
2b50aa1f AK |
405 | *data = mrp->read(mr->opaque, offset) | |
406 | (mrp->read(mr->opaque, offset + 1) << 8); | |
627a0e90 AK |
407 | } |
408 | return; | |
409 | } | |
3a130f4e | 410 | *data = 0; |
2b50aa1f | 411 | access_with_adjusted_size(offset, data, width, |
3a130f4e AK |
412 | mr->ops->impl.min_access_size, |
413 | mr->ops->impl.max_access_size, | |
414 | memory_region_read_accessor, mr); | |
658b2224 AK |
415 | } |
416 | ||
417 | static void memory_region_iorange_write(IORange *iorange, | |
418 | uint64_t offset, | |
419 | unsigned width, | |
420 | uint64_t data) | |
421 | { | |
a2d33521 AK |
422 | MemoryRegionIORange *mrio |
423 | = container_of(iorange, MemoryRegionIORange, iorange); | |
424 | MemoryRegion *mr = mrio->mr; | |
658b2224 | 425 | |
a2d33521 | 426 | offset += mrio->offset; |
627a0e90 | 427 | if (mr->ops->old_portio) { |
a2d33521 AK |
428 | const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset, |
429 | width, true); | |
627a0e90 AK |
430 | |
431 | if (mrp) { | |
2b50aa1f | 432 | mrp->write(mr->opaque, offset, data); |
03808f58 | 433 | } else if (width == 2) { |
7e2a62d8 | 434 | mrp = find_portio(mr, offset - mrio->offset, 1, true); |
03808f58 | 435 | assert(mrp); |
2b50aa1f AK |
436 | mrp->write(mr->opaque, offset, data & 0xff); |
437 | mrp->write(mr->opaque, offset + 1, data >> 8); | |
627a0e90 AK |
438 | } |
439 | return; | |
440 | } | |
2b50aa1f | 441 | access_with_adjusted_size(offset, &data, width, |
3a130f4e AK |
442 | mr->ops->impl.min_access_size, |
443 | mr->ops->impl.max_access_size, | |
444 | memory_region_write_accessor, mr); | |
658b2224 AK |
445 | } |
446 | ||
a2d33521 AK |
447 | static void memory_region_iorange_destructor(IORange *iorange) |
448 | { | |
449 | g_free(container_of(iorange, MemoryRegionIORange, iorange)); | |
450 | } | |
451 | ||
93632747 | 452 | const IORangeOps memory_region_iorange_ops = { |
658b2224 AK |
453 | .read = memory_region_iorange_read, |
454 | .write = memory_region_iorange_write, | |
a2d33521 | 455 | .destructor = memory_region_iorange_destructor, |
658b2224 AK |
456 | }; |
457 | ||
8df8a843 | 458 | static AddressSpace address_space_io; |
658b2224 | 459 | |
e2177955 AK |
460 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
461 | { | |
462 | while (mr->parent) { | |
463 | mr = mr->parent; | |
464 | } | |
465 | if (mr == address_space_memory.root) { | |
466 | return &address_space_memory; | |
467 | } | |
468 | if (mr == address_space_io.root) { | |
469 | return &address_space_io; | |
470 | } | |
471 | abort(); | |
472 | } | |
473 | ||
093bc2cd AK |
474 | /* Render a memory region into the global view. Ranges in @view obscure |
475 | * ranges in @mr. | |
476 | */ | |
477 | static void render_memory_region(FlatView *view, | |
478 | MemoryRegion *mr, | |
08dafab4 | 479 | Int128 base, |
fb1cd6f9 AK |
480 | AddrRange clip, |
481 | bool readonly) | |
093bc2cd AK |
482 | { |
483 | MemoryRegion *subregion; | |
484 | unsigned i; | |
485 | target_phys_addr_t offset_in_region; | |
08dafab4 AK |
486 | Int128 remain; |
487 | Int128 now; | |
093bc2cd AK |
488 | FlatRange fr; |
489 | AddrRange tmp; | |
490 | ||
6bba19ba AK |
491 | if (!mr->enabled) { |
492 | return; | |
493 | } | |
494 | ||
08dafab4 | 495 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 496 | readonly |= mr->readonly; |
093bc2cd AK |
497 | |
498 | tmp = addrrange_make(base, mr->size); | |
499 | ||
500 | if (!addrrange_intersects(tmp, clip)) { | |
501 | return; | |
502 | } | |
503 | ||
504 | clip = addrrange_intersection(tmp, clip); | |
505 | ||
506 | if (mr->alias) { | |
08dafab4 AK |
507 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
508 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 509 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
510 | return; |
511 | } | |
512 | ||
513 | /* Render subregions in priority order. */ | |
514 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 515 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
516 | } |
517 | ||
14a3c10a | 518 | if (!mr->terminates) { |
093bc2cd AK |
519 | return; |
520 | } | |
521 | ||
08dafab4 | 522 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
523 | base = clip.start; |
524 | remain = clip.size; | |
525 | ||
526 | /* Render the region itself into any gaps left by the current view. */ | |
08dafab4 AK |
527 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
528 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
529 | continue; |
530 | } | |
08dafab4 AK |
531 | if (int128_lt(base, view->ranges[i].addr.start)) { |
532 | now = int128_min(remain, | |
533 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
534 | fr.mr = mr; |
535 | fr.offset_in_region = offset_in_region; | |
536 | fr.addr = addrrange_make(base, now); | |
5a583347 | 537 | fr.dirty_log_mask = mr->dirty_log_mask; |
d0a9b5bc | 538 | fr.readable = mr->readable; |
fb1cd6f9 | 539 | fr.readonly = readonly; |
093bc2cd AK |
540 | flatview_insert(view, i, &fr); |
541 | ++i; | |
08dafab4 AK |
542 | int128_addto(&base, now); |
543 | offset_in_region += int128_get64(now); | |
544 | int128_subfrom(&remain, now); | |
093bc2cd | 545 | } |
08dafab4 AK |
546 | if (int128_eq(base, view->ranges[i].addr.start)) { |
547 | now = int128_min(remain, view->ranges[i].addr.size); | |
548 | int128_addto(&base, now); | |
549 | offset_in_region += int128_get64(now); | |
550 | int128_subfrom(&remain, now); | |
093bc2cd AK |
551 | } |
552 | } | |
08dafab4 | 553 | if (int128_nz(remain)) { |
093bc2cd AK |
554 | fr.mr = mr; |
555 | fr.offset_in_region = offset_in_region; | |
556 | fr.addr = addrrange_make(base, remain); | |
5a583347 | 557 | fr.dirty_log_mask = mr->dirty_log_mask; |
d0a9b5bc | 558 | fr.readable = mr->readable; |
fb1cd6f9 | 559 | fr.readonly = readonly; |
093bc2cd AK |
560 | flatview_insert(view, i, &fr); |
561 | } | |
562 | } | |
563 | ||
564 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
565 | static FlatView generate_memory_topology(MemoryRegion *mr) | |
566 | { | |
567 | FlatView view; | |
568 | ||
569 | flatview_init(&view); | |
570 | ||
08dafab4 AK |
571 | render_memory_region(&view, mr, int128_zero(), |
572 | addrrange_make(int128_zero(), int128_2_64()), false); | |
3d8e6bf9 | 573 | flatview_simplify(&view); |
093bc2cd AK |
574 | |
575 | return view; | |
576 | } | |
577 | ||
3e9d69e7 AK |
578 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
579 | MemoryRegionIoeventfd *fds_new, | |
580 | unsigned fds_new_nb, | |
581 | MemoryRegionIoeventfd *fds_old, | |
582 | unsigned fds_old_nb) | |
583 | { | |
584 | unsigned iold, inew; | |
80a1ea37 AK |
585 | MemoryRegionIoeventfd *fd; |
586 | MemoryRegionSection section; | |
3e9d69e7 AK |
587 | |
588 | /* Generate a symmetric difference of the old and new fd sets, adding | |
589 | * and deleting as necessary. | |
590 | */ | |
591 | ||
592 | iold = inew = 0; | |
593 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
594 | if (iold < fds_old_nb | |
595 | && (inew == fds_new_nb | |
596 | || memory_region_ioeventfd_before(fds_old[iold], | |
597 | fds_new[inew]))) { | |
80a1ea37 AK |
598 | fd = &fds_old[iold]; |
599 | section = (MemoryRegionSection) { | |
600 | .address_space = as->root, | |
601 | .offset_within_address_space = int128_get64(fd->addr.start), | |
602 | .size = int128_get64(fd->addr.size), | |
603 | }; | |
604 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
753d5e14 | 605 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
606 | ++iold; |
607 | } else if (inew < fds_new_nb | |
608 | && (iold == fds_old_nb | |
609 | || memory_region_ioeventfd_before(fds_new[inew], | |
610 | fds_old[iold]))) { | |
80a1ea37 AK |
611 | fd = &fds_new[inew]; |
612 | section = (MemoryRegionSection) { | |
613 | .address_space = as->root, | |
614 | .offset_within_address_space = int128_get64(fd->addr.start), | |
615 | .size = int128_get64(fd->addr.size), | |
616 | }; | |
617 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
753d5e14 | 618 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
619 | ++inew; |
620 | } else { | |
621 | ++iold; | |
622 | ++inew; | |
623 | } | |
624 | } | |
625 | } | |
626 | ||
627 | static void address_space_update_ioeventfds(AddressSpace *as) | |
628 | { | |
629 | FlatRange *fr; | |
630 | unsigned ioeventfd_nb = 0; | |
631 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
632 | AddrRange tmp; | |
633 | unsigned i; | |
634 | ||
635 | FOR_EACH_FLAT_RANGE(fr, &as->current_map) { | |
636 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { | |
637 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
638 | int128_sub(fr->addr.start, |
639 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
640 | if (addrrange_intersects(fr->addr, tmp)) { |
641 | ++ioeventfd_nb; | |
7267c094 | 642 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
643 | ioeventfd_nb * sizeof(*ioeventfds)); |
644 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
645 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
646 | } | |
647 | } | |
648 | } | |
649 | ||
650 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
651 | as->ioeventfds, as->ioeventfd_nb); | |
652 | ||
7267c094 | 653 | g_free(as->ioeventfds); |
3e9d69e7 AK |
654 | as->ioeventfds = ioeventfds; |
655 | as->ioeventfd_nb = ioeventfd_nb; | |
656 | } | |
657 | ||
b8af1afb AK |
658 | static void address_space_update_topology_pass(AddressSpace *as, |
659 | FlatView old_view, | |
660 | FlatView new_view, | |
661 | bool adding) | |
093bc2cd | 662 | { |
093bc2cd AK |
663 | unsigned iold, inew; |
664 | FlatRange *frold, *frnew; | |
093bc2cd AK |
665 | |
666 | /* Generate a symmetric difference of the old and new memory maps. | |
667 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
668 | */ | |
669 | iold = inew = 0; | |
670 | while (iold < old_view.nr || inew < new_view.nr) { | |
671 | if (iold < old_view.nr) { | |
672 | frold = &old_view.ranges[iold]; | |
673 | } else { | |
674 | frold = NULL; | |
675 | } | |
676 | if (inew < new_view.nr) { | |
677 | frnew = &new_view.ranges[inew]; | |
678 | } else { | |
679 | frnew = NULL; | |
680 | } | |
681 | ||
682 | if (frold | |
683 | && (!frnew | |
08dafab4 AK |
684 | || int128_lt(frold->addr.start, frnew->addr.start) |
685 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd AK |
686 | && !flatrange_equal(frold, frnew)))) { |
687 | /* In old, but (not in new, or in new but attributes changed). */ | |
688 | ||
b8af1afb | 689 | if (!adding) { |
72e22d2f | 690 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
691 | } |
692 | ||
093bc2cd AK |
693 | ++iold; |
694 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
695 | /* In both (logging may have changed) */ | |
696 | ||
b8af1afb | 697 | if (adding) { |
50c1e149 | 698 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b8af1afb | 699 | if (frold->dirty_log_mask && !frnew->dirty_log_mask) { |
72e22d2f | 700 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
b8af1afb | 701 | } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { |
72e22d2f | 702 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
b8af1afb | 703 | } |
5a583347 AK |
704 | } |
705 | ||
093bc2cd AK |
706 | ++iold; |
707 | ++inew; | |
093bc2cd AK |
708 | } else { |
709 | /* In new */ | |
710 | ||
b8af1afb | 711 | if (adding) { |
72e22d2f | 712 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
713 | } |
714 | ||
093bc2cd AK |
715 | ++inew; |
716 | } | |
717 | } | |
b8af1afb AK |
718 | } |
719 | ||
720 | ||
721 | static void address_space_update_topology(AddressSpace *as) | |
722 | { | |
723 | FlatView old_view = as->current_map; | |
724 | FlatView new_view = generate_memory_topology(as->root); | |
725 | ||
726 | address_space_update_topology_pass(as, old_view, new_view, false); | |
727 | address_space_update_topology_pass(as, old_view, new_view, true); | |
728 | ||
cc31e6e7 | 729 | as->current_map = new_view; |
093bc2cd | 730 | flatview_destroy(&old_view); |
3e9d69e7 | 731 | address_space_update_ioeventfds(as); |
093bc2cd AK |
732 | } |
733 | ||
4ef4db86 AK |
734 | void memory_region_transaction_begin(void) |
735 | { | |
bb880ded | 736 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
737 | ++memory_region_transaction_depth; |
738 | } | |
739 | ||
740 | void memory_region_transaction_commit(void) | |
741 | { | |
742 | assert(memory_region_transaction_depth); | |
743 | --memory_region_transaction_depth; | |
02e2b95f JK |
744 | if (!memory_region_transaction_depth) { |
745 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); | |
746 | ||
747 | if (address_space_memory.root) { | |
748 | address_space_update_topology(&address_space_memory); | |
749 | } | |
750 | if (address_space_io.root) { | |
751 | address_space_update_topology(&address_space_io); | |
752 | } | |
753 | ||
754 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); | |
e87c099f | 755 | } |
4ef4db86 AK |
756 | } |
757 | ||
545e92e0 AK |
758 | static void memory_region_destructor_none(MemoryRegion *mr) |
759 | { | |
760 | } | |
761 | ||
762 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
763 | { | |
764 | qemu_ram_free(mr->ram_addr); | |
765 | } | |
766 | ||
767 | static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) | |
768 | { | |
769 | qemu_ram_free_from_ptr(mr->ram_addr); | |
770 | } | |
771 | ||
772 | static void memory_region_destructor_iomem(MemoryRegion *mr) | |
773 | { | |
545e92e0 AK |
774 | } |
775 | ||
d0a9b5bc AK |
776 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
777 | { | |
778 | qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); | |
d0a9b5bc AK |
779 | } |
780 | ||
be675c97 AK |
781 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
782 | { | |
2c3579ab | 783 | #ifdef TARGET_WORDS_BIGENDIAN |
be675c97 AK |
784 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; |
785 | #else | |
786 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
787 | #endif | |
788 | } | |
789 | ||
093bc2cd AK |
790 | void memory_region_init(MemoryRegion *mr, |
791 | const char *name, | |
792 | uint64_t size) | |
793 | { | |
794 | mr->ops = NULL; | |
795 | mr->parent = NULL; | |
08dafab4 AK |
796 | mr->size = int128_make64(size); |
797 | if (size == UINT64_MAX) { | |
798 | mr->size = int128_2_64(); | |
799 | } | |
093bc2cd | 800 | mr->addr = 0; |
b3b00c78 | 801 | mr->subpage = false; |
6bba19ba | 802 | mr->enabled = true; |
14a3c10a | 803 | mr->terminates = false; |
8ea9252a | 804 | mr->ram = false; |
d0a9b5bc | 805 | mr->readable = true; |
fb1cd6f9 | 806 | mr->readonly = false; |
75c578dc | 807 | mr->rom_device = false; |
545e92e0 | 808 | mr->destructor = memory_region_destructor_none; |
093bc2cd AK |
809 | mr->priority = 0; |
810 | mr->may_overlap = false; | |
811 | mr->alias = NULL; | |
812 | QTAILQ_INIT(&mr->subregions); | |
813 | memset(&mr->subregions_link, 0, sizeof mr->subregions_link); | |
814 | QTAILQ_INIT(&mr->coalesced); | |
7267c094 | 815 | mr->name = g_strdup(name); |
5a583347 | 816 | mr->dirty_log_mask = 0; |
3e9d69e7 AK |
817 | mr->ioeventfd_nb = 0; |
818 | mr->ioeventfds = NULL; | |
d410515e | 819 | mr->flush_coalesced_mmio = false; |
093bc2cd AK |
820 | } |
821 | ||
822 | static bool memory_region_access_valid(MemoryRegion *mr, | |
823 | target_phys_addr_t addr, | |
897fa7cf AK |
824 | unsigned size, |
825 | bool is_write) | |
093bc2cd | 826 | { |
897fa7cf AK |
827 | if (mr->ops->valid.accepts |
828 | && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) { | |
829 | return false; | |
830 | } | |
831 | ||
093bc2cd AK |
832 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
833 | return false; | |
834 | } | |
835 | ||
836 | /* Treat zero as compatibility all valid */ | |
837 | if (!mr->ops->valid.max_access_size) { | |
838 | return true; | |
839 | } | |
840 | ||
841 | if (size > mr->ops->valid.max_access_size | |
842 | || size < mr->ops->valid.min_access_size) { | |
843 | return false; | |
844 | } | |
845 | return true; | |
846 | } | |
847 | ||
a621f38d AK |
848 | static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, |
849 | target_phys_addr_t addr, | |
850 | unsigned size) | |
093bc2cd | 851 | { |
164a4dcd | 852 | uint64_t data = 0; |
093bc2cd | 853 | |
897fa7cf | 854 | if (!memory_region_access_valid(mr, addr, size, false)) { |
093bc2cd AK |
855 | return -1U; /* FIXME: better signalling */ |
856 | } | |
857 | ||
74901c3b AK |
858 | if (!mr->ops->read) { |
859 | return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr); | |
860 | } | |
861 | ||
093bc2cd | 862 | /* FIXME: support unaligned access */ |
2b50aa1f | 863 | access_with_adjusted_size(addr, &data, size, |
164a4dcd AK |
864 | mr->ops->impl.min_access_size, |
865 | mr->ops->impl.max_access_size, | |
866 | memory_region_read_accessor, mr); | |
093bc2cd AK |
867 | |
868 | return data; | |
869 | } | |
870 | ||
a621f38d | 871 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) |
093bc2cd | 872 | { |
a621f38d AK |
873 | if (memory_region_wrong_endianness(mr)) { |
874 | switch (size) { | |
875 | case 1: | |
876 | break; | |
877 | case 2: | |
878 | *data = bswap16(*data); | |
879 | break; | |
880 | case 4: | |
881 | *data = bswap32(*data); | |
1470a0cd | 882 | break; |
a621f38d AK |
883 | default: |
884 | abort(); | |
885 | } | |
886 | } | |
887 | } | |
888 | ||
889 | static uint64_t memory_region_dispatch_read(MemoryRegion *mr, | |
890 | target_phys_addr_t addr, | |
891 | unsigned size) | |
892 | { | |
893 | uint64_t ret; | |
894 | ||
895 | ret = memory_region_dispatch_read1(mr, addr, size); | |
896 | adjust_endianness(mr, &ret, size); | |
897 | return ret; | |
898 | } | |
093bc2cd | 899 | |
a621f38d AK |
900 | static void memory_region_dispatch_write(MemoryRegion *mr, |
901 | target_phys_addr_t addr, | |
902 | uint64_t data, | |
903 | unsigned size) | |
904 | { | |
897fa7cf | 905 | if (!memory_region_access_valid(mr, addr, size, true)) { |
093bc2cd AK |
906 | return; /* FIXME: better signalling */ |
907 | } | |
908 | ||
a621f38d AK |
909 | adjust_endianness(mr, &data, size); |
910 | ||
74901c3b AK |
911 | if (!mr->ops->write) { |
912 | mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data); | |
913 | return; | |
914 | } | |
915 | ||
093bc2cd | 916 | /* FIXME: support unaligned access */ |
2b50aa1f | 917 | access_with_adjusted_size(addr, &data, size, |
164a4dcd AK |
918 | mr->ops->impl.min_access_size, |
919 | mr->ops->impl.max_access_size, | |
920 | memory_region_write_accessor, mr); | |
093bc2cd AK |
921 | } |
922 | ||
093bc2cd AK |
923 | void memory_region_init_io(MemoryRegion *mr, |
924 | const MemoryRegionOps *ops, | |
925 | void *opaque, | |
926 | const char *name, | |
927 | uint64_t size) | |
928 | { | |
929 | memory_region_init(mr, name, size); | |
930 | mr->ops = ops; | |
931 | mr->opaque = opaque; | |
14a3c10a | 932 | mr->terminates = true; |
26a83ad0 | 933 | mr->destructor = memory_region_destructor_iomem; |
97161e17 | 934 | mr->ram_addr = ~(ram_addr_t)0; |
093bc2cd AK |
935 | } |
936 | ||
937 | void memory_region_init_ram(MemoryRegion *mr, | |
093bc2cd AK |
938 | const char *name, |
939 | uint64_t size) | |
940 | { | |
941 | memory_region_init(mr, name, size); | |
8ea9252a | 942 | mr->ram = true; |
14a3c10a | 943 | mr->terminates = true; |
545e92e0 | 944 | mr->destructor = memory_region_destructor_ram; |
c5705a77 | 945 | mr->ram_addr = qemu_ram_alloc(size, mr); |
093bc2cd AK |
946 | } |
947 | ||
948 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
093bc2cd AK |
949 | const char *name, |
950 | uint64_t size, | |
951 | void *ptr) | |
952 | { | |
953 | memory_region_init(mr, name, size); | |
8ea9252a | 954 | mr->ram = true; |
14a3c10a | 955 | mr->terminates = true; |
545e92e0 | 956 | mr->destructor = memory_region_destructor_ram_from_ptr; |
c5705a77 | 957 | mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
093bc2cd AK |
958 | } |
959 | ||
960 | void memory_region_init_alias(MemoryRegion *mr, | |
961 | const char *name, | |
962 | MemoryRegion *orig, | |
963 | target_phys_addr_t offset, | |
964 | uint64_t size) | |
965 | { | |
966 | memory_region_init(mr, name, size); | |
967 | mr->alias = orig; | |
968 | mr->alias_offset = offset; | |
969 | } | |
970 | ||
d0a9b5bc AK |
971 | void memory_region_init_rom_device(MemoryRegion *mr, |
972 | const MemoryRegionOps *ops, | |
75f5941c | 973 | void *opaque, |
d0a9b5bc AK |
974 | const char *name, |
975 | uint64_t size) | |
976 | { | |
977 | memory_region_init(mr, name, size); | |
7bc2b9cd | 978 | mr->ops = ops; |
75f5941c | 979 | mr->opaque = opaque; |
d0a9b5bc | 980 | mr->terminates = true; |
75c578dc | 981 | mr->rom_device = true; |
d0a9b5bc | 982 | mr->destructor = memory_region_destructor_rom_device; |
c5705a77 | 983 | mr->ram_addr = qemu_ram_alloc(size, mr); |
d0a9b5bc AK |
984 | } |
985 | ||
1660e72d JK |
986 | static uint64_t invalid_read(void *opaque, target_phys_addr_t addr, |
987 | unsigned size) | |
988 | { | |
989 | MemoryRegion *mr = opaque; | |
990 | ||
991 | if (!mr->warning_printed) { | |
992 | fprintf(stderr, "Invalid read from memory region %s\n", mr->name); | |
993 | mr->warning_printed = true; | |
994 | } | |
995 | return -1U; | |
996 | } | |
997 | ||
998 | static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data, | |
999 | unsigned size) | |
1000 | { | |
1001 | MemoryRegion *mr = opaque; | |
1002 | ||
1003 | if (!mr->warning_printed) { | |
1004 | fprintf(stderr, "Invalid write to memory region %s\n", mr->name); | |
1005 | mr->warning_printed = true; | |
1006 | } | |
1007 | } | |
1008 | ||
1009 | static const MemoryRegionOps reservation_ops = { | |
1010 | .read = invalid_read, | |
1011 | .write = invalid_write, | |
1012 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1013 | }; | |
1014 | ||
1015 | void memory_region_init_reservation(MemoryRegion *mr, | |
1016 | const char *name, | |
1017 | uint64_t size) | |
1018 | { | |
1019 | memory_region_init_io(mr, &reservation_ops, mr, name, size); | |
1020 | } | |
1021 | ||
093bc2cd AK |
1022 | void memory_region_destroy(MemoryRegion *mr) |
1023 | { | |
1024 | assert(QTAILQ_EMPTY(&mr->subregions)); | |
545e92e0 | 1025 | mr->destructor(mr); |
093bc2cd | 1026 | memory_region_clear_coalescing(mr); |
7267c094 AL |
1027 | g_free((char *)mr->name); |
1028 | g_free(mr->ioeventfds); | |
093bc2cd AK |
1029 | } |
1030 | ||
1031 | uint64_t memory_region_size(MemoryRegion *mr) | |
1032 | { | |
08dafab4 AK |
1033 | if (int128_eq(mr->size, int128_2_64())) { |
1034 | return UINT64_MAX; | |
1035 | } | |
1036 | return int128_get64(mr->size); | |
093bc2cd AK |
1037 | } |
1038 | ||
8991c79b AK |
1039 | const char *memory_region_name(MemoryRegion *mr) |
1040 | { | |
1041 | return mr->name; | |
1042 | } | |
1043 | ||
8ea9252a AK |
1044 | bool memory_region_is_ram(MemoryRegion *mr) |
1045 | { | |
1046 | return mr->ram; | |
1047 | } | |
1048 | ||
55043ba3 AK |
1049 | bool memory_region_is_logging(MemoryRegion *mr) |
1050 | { | |
1051 | return mr->dirty_log_mask; | |
1052 | } | |
1053 | ||
ce7923da AK |
1054 | bool memory_region_is_rom(MemoryRegion *mr) |
1055 | { | |
1056 | return mr->ram && mr->readonly; | |
1057 | } | |
1058 | ||
093bc2cd AK |
1059 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1060 | { | |
5a583347 AK |
1061 | uint8_t mask = 1 << client; |
1062 | ||
59023ef4 | 1063 | memory_region_transaction_begin(); |
5a583347 | 1064 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
59023ef4 | 1065 | memory_region_transaction_commit(); |
093bc2cd AK |
1066 | } |
1067 | ||
1068 | bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr, | |
cd7a45c9 | 1069 | target_phys_addr_t size, unsigned client) |
093bc2cd | 1070 | { |
14a3c10a | 1071 | assert(mr->terminates); |
cd7a45c9 BS |
1072 | return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, |
1073 | 1 << client); | |
093bc2cd AK |
1074 | } |
1075 | ||
fd4aa979 BS |
1076 | void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr, |
1077 | target_phys_addr_t size) | |
093bc2cd | 1078 | { |
14a3c10a | 1079 | assert(mr->terminates); |
fd4aa979 | 1080 | return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1); |
093bc2cd AK |
1081 | } |
1082 | ||
1083 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) | |
1084 | { | |
5a583347 AK |
1085 | FlatRange *fr; |
1086 | ||
cc31e6e7 | 1087 | FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) { |
5a583347 | 1088 | if (fr->mr == mr) { |
72e22d2f AK |
1089 | MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory, |
1090 | Forward, log_sync); | |
5a583347 AK |
1091 | } |
1092 | } | |
093bc2cd AK |
1093 | } |
1094 | ||
1095 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1096 | { | |
fb1cd6f9 | 1097 | if (mr->readonly != readonly) { |
59023ef4 | 1098 | memory_region_transaction_begin(); |
fb1cd6f9 | 1099 | mr->readonly = readonly; |
59023ef4 | 1100 | memory_region_transaction_commit(); |
fb1cd6f9 | 1101 | } |
093bc2cd AK |
1102 | } |
1103 | ||
d0a9b5bc AK |
1104 | void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable) |
1105 | { | |
1106 | if (mr->readable != readable) { | |
59023ef4 | 1107 | memory_region_transaction_begin(); |
d0a9b5bc | 1108 | mr->readable = readable; |
59023ef4 | 1109 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1110 | } |
1111 | } | |
1112 | ||
093bc2cd AK |
1113 | void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr, |
1114 | target_phys_addr_t size, unsigned client) | |
1115 | { | |
14a3c10a | 1116 | assert(mr->terminates); |
5a583347 AK |
1117 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, |
1118 | mr->ram_addr + addr + size, | |
1119 | 1 << client); | |
093bc2cd AK |
1120 | } |
1121 | ||
1122 | void *memory_region_get_ram_ptr(MemoryRegion *mr) | |
1123 | { | |
1124 | if (mr->alias) { | |
1125 | return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset; | |
1126 | } | |
1127 | ||
14a3c10a | 1128 | assert(mr->terminates); |
093bc2cd | 1129 | |
021d26d1 | 1130 | return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK); |
093bc2cd AK |
1131 | } |
1132 | ||
1133 | static void memory_region_update_coalesced_range(MemoryRegion *mr) | |
1134 | { | |
1135 | FlatRange *fr; | |
1136 | CoalescedMemoryRange *cmr; | |
1137 | AddrRange tmp; | |
1138 | ||
cc31e6e7 | 1139 | FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) { |
093bc2cd | 1140 | if (fr->mr == mr) { |
08dafab4 AK |
1141 | qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start), |
1142 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1143 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1144 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1145 | int128_sub(fr->addr.start, |
1146 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1147 | if (!addrrange_intersects(tmp, fr->addr)) { |
1148 | continue; | |
1149 | } | |
1150 | tmp = addrrange_intersection(tmp, fr->addr); | |
08dafab4 AK |
1151 | qemu_register_coalesced_mmio(int128_get64(tmp.start), |
1152 | int128_get64(tmp.size)); | |
093bc2cd AK |
1153 | } |
1154 | } | |
1155 | } | |
1156 | } | |
1157 | ||
1158 | void memory_region_set_coalescing(MemoryRegion *mr) | |
1159 | { | |
1160 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1161 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1162 | } |
1163 | ||
1164 | void memory_region_add_coalescing(MemoryRegion *mr, | |
1165 | target_phys_addr_t offset, | |
1166 | uint64_t size) | |
1167 | { | |
7267c094 | 1168 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1169 | |
08dafab4 | 1170 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1171 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1172 | memory_region_update_coalesced_range(mr); | |
d410515e | 1173 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1174 | } |
1175 | ||
1176 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1177 | { | |
1178 | CoalescedMemoryRange *cmr; | |
1179 | ||
d410515e JK |
1180 | qemu_flush_coalesced_mmio_buffer(); |
1181 | mr->flush_coalesced_mmio = false; | |
1182 | ||
093bc2cd AK |
1183 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1184 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1185 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1186 | g_free(cmr); |
093bc2cd AK |
1187 | } |
1188 | memory_region_update_coalesced_range(mr); | |
1189 | } | |
1190 | ||
d410515e JK |
1191 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1192 | { | |
1193 | mr->flush_coalesced_mmio = true; | |
1194 | } | |
1195 | ||
1196 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1197 | { | |
1198 | qemu_flush_coalesced_mmio_buffer(); | |
1199 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1200 | mr->flush_coalesced_mmio = false; | |
1201 | } | |
1202 | } | |
1203 | ||
3e9d69e7 AK |
1204 | void memory_region_add_eventfd(MemoryRegion *mr, |
1205 | target_phys_addr_t addr, | |
1206 | unsigned size, | |
1207 | bool match_data, | |
1208 | uint64_t data, | |
753d5e14 | 1209 | EventNotifier *e) |
3e9d69e7 AK |
1210 | { |
1211 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1212 | .addr.start = int128_make64(addr), |
1213 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1214 | .match_data = match_data, |
1215 | .data = data, | |
753d5e14 | 1216 | .e = e, |
3e9d69e7 AK |
1217 | }; |
1218 | unsigned i; | |
1219 | ||
59023ef4 | 1220 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1221 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1222 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1223 | break; | |
1224 | } | |
1225 | } | |
1226 | ++mr->ioeventfd_nb; | |
7267c094 | 1227 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1228 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1229 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1230 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1231 | mr->ioeventfds[i] = mrfd; | |
59023ef4 | 1232 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1233 | } |
1234 | ||
1235 | void memory_region_del_eventfd(MemoryRegion *mr, | |
1236 | target_phys_addr_t addr, | |
1237 | unsigned size, | |
1238 | bool match_data, | |
1239 | uint64_t data, | |
753d5e14 | 1240 | EventNotifier *e) |
3e9d69e7 AK |
1241 | { |
1242 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1243 | .addr.start = int128_make64(addr), |
1244 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1245 | .match_data = match_data, |
1246 | .data = data, | |
753d5e14 | 1247 | .e = e, |
3e9d69e7 AK |
1248 | }; |
1249 | unsigned i; | |
1250 | ||
59023ef4 | 1251 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1252 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1253 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1254 | break; | |
1255 | } | |
1256 | } | |
1257 | assert(i != mr->ioeventfd_nb); | |
1258 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1259 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1260 | --mr->ioeventfd_nb; | |
7267c094 | 1261 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1262 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
59023ef4 | 1263 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1264 | } |
1265 | ||
093bc2cd AK |
1266 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
1267 | target_phys_addr_t offset, | |
1268 | MemoryRegion *subregion) | |
1269 | { | |
1270 | MemoryRegion *other; | |
1271 | ||
59023ef4 JK |
1272 | memory_region_transaction_begin(); |
1273 | ||
093bc2cd AK |
1274 | assert(!subregion->parent); |
1275 | subregion->parent = mr; | |
1276 | subregion->addr = offset; | |
1277 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1278 | if (subregion->may_overlap || other->may_overlap) { | |
1279 | continue; | |
1280 | } | |
08dafab4 AK |
1281 | if (int128_gt(int128_make64(offset), |
1282 | int128_add(int128_make64(other->addr), other->size)) | |
1283 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1284 | int128_make64(other->addr))) { | |
093bc2cd AK |
1285 | continue; |
1286 | } | |
a5e1cbc8 | 1287 | #if 0 |
860329b2 MW |
1288 | printf("warning: subregion collision %llx/%llx (%s) " |
1289 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1290 | (unsigned long long)offset, |
08dafab4 | 1291 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1292 | subregion->name, |
1293 | (unsigned long long)other->addr, | |
08dafab4 | 1294 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1295 | other->name); |
a5e1cbc8 | 1296 | #endif |
093bc2cd AK |
1297 | } |
1298 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1299 | if (subregion->priority >= other->priority) { | |
1300 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1301 | goto done; | |
1302 | } | |
1303 | } | |
1304 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1305 | done: | |
59023ef4 | 1306 | memory_region_transaction_commit(); |
093bc2cd AK |
1307 | } |
1308 | ||
1309 | ||
1310 | void memory_region_add_subregion(MemoryRegion *mr, | |
1311 | target_phys_addr_t offset, | |
1312 | MemoryRegion *subregion) | |
1313 | { | |
1314 | subregion->may_overlap = false; | |
1315 | subregion->priority = 0; | |
1316 | memory_region_add_subregion_common(mr, offset, subregion); | |
1317 | } | |
1318 | ||
1319 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
1320 | target_phys_addr_t offset, | |
1321 | MemoryRegion *subregion, | |
1322 | unsigned priority) | |
1323 | { | |
1324 | subregion->may_overlap = true; | |
1325 | subregion->priority = priority; | |
1326 | memory_region_add_subregion_common(mr, offset, subregion); | |
1327 | } | |
1328 | ||
1329 | void memory_region_del_subregion(MemoryRegion *mr, | |
1330 | MemoryRegion *subregion) | |
1331 | { | |
59023ef4 | 1332 | memory_region_transaction_begin(); |
093bc2cd AK |
1333 | assert(subregion->parent == mr); |
1334 | subregion->parent = NULL; | |
1335 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); | |
59023ef4 | 1336 | memory_region_transaction_commit(); |
6bba19ba AK |
1337 | } |
1338 | ||
1339 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1340 | { | |
1341 | if (enabled == mr->enabled) { | |
1342 | return; | |
1343 | } | |
59023ef4 | 1344 | memory_region_transaction_begin(); |
6bba19ba | 1345 | mr->enabled = enabled; |
59023ef4 | 1346 | memory_region_transaction_commit(); |
093bc2cd | 1347 | } |
1c0ffa58 | 1348 | |
2282e1af AK |
1349 | void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr) |
1350 | { | |
1351 | MemoryRegion *parent = mr->parent; | |
1352 | unsigned priority = mr->priority; | |
1353 | bool may_overlap = mr->may_overlap; | |
1354 | ||
1355 | if (addr == mr->addr || !parent) { | |
1356 | mr->addr = addr; | |
1357 | return; | |
1358 | } | |
1359 | ||
1360 | memory_region_transaction_begin(); | |
1361 | memory_region_del_subregion(parent, mr); | |
1362 | if (may_overlap) { | |
1363 | memory_region_add_subregion_overlap(parent, addr, mr, priority); | |
1364 | } else { | |
1365 | memory_region_add_subregion(parent, addr, mr); | |
1366 | } | |
1367 | memory_region_transaction_commit(); | |
1368 | } | |
1369 | ||
4703359e AK |
1370 | void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset) |
1371 | { | |
4703359e | 1372 | assert(mr->alias); |
4703359e | 1373 | |
59023ef4 | 1374 | if (offset == mr->alias_offset) { |
4703359e AK |
1375 | return; |
1376 | } | |
1377 | ||
59023ef4 JK |
1378 | memory_region_transaction_begin(); |
1379 | mr->alias_offset = offset; | |
1380 | memory_region_transaction_commit(); | |
4703359e AK |
1381 | } |
1382 | ||
e34911c4 AK |
1383 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1384 | { | |
e34911c4 AK |
1385 | return mr->ram_addr; |
1386 | } | |
1387 | ||
e2177955 AK |
1388 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1389 | { | |
1390 | const AddrRange *addr = addr_; | |
1391 | const FlatRange *fr = fr_; | |
1392 | ||
1393 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1394 | return -1; | |
1395 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1396 | return 1; | |
1397 | } | |
1398 | return 0; | |
1399 | } | |
1400 | ||
1401 | static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr) | |
1402 | { | |
1403 | return bsearch(&addr, as->current_map.ranges, as->current_map.nr, | |
1404 | sizeof(FlatRange), cmp_flatrange_addr); | |
1405 | } | |
1406 | ||
1407 | MemoryRegionSection memory_region_find(MemoryRegion *address_space, | |
1408 | target_phys_addr_t addr, uint64_t size) | |
1409 | { | |
1410 | AddressSpace *as = memory_region_to_address_space(address_space); | |
1411 | AddrRange range = addrrange_make(int128_make64(addr), | |
1412 | int128_make64(size)); | |
1413 | FlatRange *fr = address_space_lookup(as, range); | |
1414 | MemoryRegionSection ret = { .mr = NULL, .size = 0 }; | |
1415 | ||
1416 | if (!fr) { | |
1417 | return ret; | |
1418 | } | |
1419 | ||
1420 | while (fr > as->current_map.ranges | |
1421 | && addrrange_intersects(fr[-1].addr, range)) { | |
1422 | --fr; | |
1423 | } | |
1424 | ||
1425 | ret.mr = fr->mr; | |
1426 | range = addrrange_intersection(range, fr->addr); | |
1427 | ret.offset_within_region = fr->offset_in_region; | |
1428 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
1429 | fr->addr.start)); | |
1430 | ret.size = int128_get64(range.size); | |
1431 | ret.offset_within_address_space = int128_get64(range.start); | |
7a8499e8 | 1432 | ret.readonly = fr->readonly; |
e2177955 AK |
1433 | return ret; |
1434 | } | |
1435 | ||
86e775c6 AK |
1436 | void memory_global_sync_dirty_bitmap(MemoryRegion *address_space) |
1437 | { | |
7664e80c AK |
1438 | AddressSpace *as = memory_region_to_address_space(address_space); |
1439 | FlatRange *fr; | |
1440 | ||
7664e80c | 1441 | FOR_EACH_FLAT_RANGE(fr, &as->current_map) { |
72e22d2f | 1442 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c AK |
1443 | } |
1444 | } | |
1445 | ||
1446 | void memory_global_dirty_log_start(void) | |
1447 | { | |
7664e80c | 1448 | global_dirty_log = true; |
7376e582 | 1449 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
7664e80c AK |
1450 | } |
1451 | ||
1452 | void memory_global_dirty_log_stop(void) | |
1453 | { | |
7664e80c | 1454 | global_dirty_log = false; |
7376e582 | 1455 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
1456 | } |
1457 | ||
1458 | static void listener_add_address_space(MemoryListener *listener, | |
1459 | AddressSpace *as) | |
1460 | { | |
1461 | FlatRange *fr; | |
1462 | ||
221b3a3f JG |
1463 | if (listener->address_space_filter |
1464 | && listener->address_space_filter != as->root) { | |
1465 | return; | |
1466 | } | |
1467 | ||
7664e80c AK |
1468 | if (global_dirty_log) { |
1469 | listener->log_global_start(listener); | |
1470 | } | |
1471 | FOR_EACH_FLAT_RANGE(fr, &as->current_map) { | |
1472 | MemoryRegionSection section = { | |
1473 | .mr = fr->mr, | |
1474 | .address_space = as->root, | |
1475 | .offset_within_region = fr->offset_in_region, | |
1476 | .size = int128_get64(fr->addr.size), | |
1477 | .offset_within_address_space = int128_get64(fr->addr.start), | |
7a8499e8 | 1478 | .readonly = fr->readonly, |
7664e80c AK |
1479 | }; |
1480 | listener->region_add(listener, §ion); | |
1481 | } | |
1482 | } | |
1483 | ||
7376e582 | 1484 | void memory_listener_register(MemoryListener *listener, MemoryRegion *filter) |
7664e80c | 1485 | { |
72e22d2f AK |
1486 | MemoryListener *other = NULL; |
1487 | ||
7376e582 | 1488 | listener->address_space_filter = filter; |
72e22d2f AK |
1489 | if (QTAILQ_EMPTY(&memory_listeners) |
1490 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
1491 | memory_listeners)->priority) { | |
1492 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
1493 | } else { | |
1494 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
1495 | if (listener->priority < other->priority) { | |
1496 | break; | |
1497 | } | |
1498 | } | |
1499 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
1500 | } | |
7664e80c AK |
1501 | listener_add_address_space(listener, &address_space_memory); |
1502 | listener_add_address_space(listener, &address_space_io); | |
1503 | } | |
1504 | ||
1505 | void memory_listener_unregister(MemoryListener *listener) | |
1506 | { | |
72e22d2f | 1507 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 1508 | } |
e2177955 | 1509 | |
1c0ffa58 AK |
1510 | void set_system_memory_map(MemoryRegion *mr) |
1511 | { | |
59023ef4 | 1512 | memory_region_transaction_begin(); |
cc31e6e7 | 1513 | address_space_memory.root = mr; |
59023ef4 | 1514 | memory_region_transaction_commit(); |
1c0ffa58 | 1515 | } |
658b2224 AK |
1516 | |
1517 | void set_system_io_map(MemoryRegion *mr) | |
1518 | { | |
59023ef4 | 1519 | memory_region_transaction_begin(); |
658b2224 | 1520 | address_space_io.root = mr; |
59023ef4 | 1521 | memory_region_transaction_commit(); |
658b2224 | 1522 | } |
314e2987 | 1523 | |
37ec01d4 | 1524 | uint64_t io_mem_read(MemoryRegion *mr, target_phys_addr_t addr, unsigned size) |
acbbec5d | 1525 | { |
37ec01d4 | 1526 | return memory_region_dispatch_read(mr, addr, size); |
acbbec5d AK |
1527 | } |
1528 | ||
37ec01d4 | 1529 | void io_mem_write(MemoryRegion *mr, target_phys_addr_t addr, |
acbbec5d AK |
1530 | uint64_t val, unsigned size) |
1531 | { | |
37ec01d4 | 1532 | memory_region_dispatch_write(mr, addr, val, size); |
acbbec5d AK |
1533 | } |
1534 | ||
314e2987 BS |
1535 | typedef struct MemoryRegionList MemoryRegionList; |
1536 | ||
1537 | struct MemoryRegionList { | |
1538 | const MemoryRegion *mr; | |
1539 | bool printed; | |
1540 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
1541 | }; | |
1542 | ||
1543 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
1544 | ||
1545 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
1546 | const MemoryRegion *mr, unsigned int level, | |
1547 | target_phys_addr_t base, | |
9479c57a | 1548 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 1549 | { |
9479c57a JK |
1550 | MemoryRegionList *new_ml, *ml, *next_ml; |
1551 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
1552 | const MemoryRegion *submr; |
1553 | unsigned int i; | |
1554 | ||
314e2987 BS |
1555 | if (!mr) { |
1556 | return; | |
1557 | } | |
1558 | ||
1559 | for (i = 0; i < level; i++) { | |
1560 | mon_printf(f, " "); | |
1561 | } | |
1562 | ||
1563 | if (mr->alias) { | |
1564 | MemoryRegionList *ml; | |
1565 | bool found = false; | |
1566 | ||
1567 | /* check if the alias is already in the queue */ | |
9479c57a | 1568 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
314e2987 BS |
1569 | if (ml->mr == mr->alias && !ml->printed) { |
1570 | found = true; | |
1571 | } | |
1572 | } | |
1573 | ||
1574 | if (!found) { | |
1575 | ml = g_new(MemoryRegionList, 1); | |
1576 | ml->mr = mr->alias; | |
1577 | ml->printed = false; | |
9479c57a | 1578 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 1579 | } |
4896d74b JK |
1580 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
1581 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
1582 | "-" TARGET_FMT_plx "\n", | |
314e2987 | 1583 | base + mr->addr, |
08dafab4 AK |
1584 | base + mr->addr |
1585 | + (target_phys_addr_t)int128_get64(mr->size) - 1, | |
4b474ba7 | 1586 | mr->priority, |
4896d74b JK |
1587 | mr->readable ? 'R' : '-', |
1588 | !mr->readonly && !(mr->rom_device && mr->readable) ? 'W' | |
1589 | : '-', | |
314e2987 BS |
1590 | mr->name, |
1591 | mr->alias->name, | |
1592 | mr->alias_offset, | |
08dafab4 AK |
1593 | mr->alias_offset |
1594 | + (target_phys_addr_t)int128_get64(mr->size) - 1); | |
314e2987 | 1595 | } else { |
4896d74b JK |
1596 | mon_printf(f, |
1597 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", | |
314e2987 | 1598 | base + mr->addr, |
08dafab4 AK |
1599 | base + mr->addr |
1600 | + (target_phys_addr_t)int128_get64(mr->size) - 1, | |
4b474ba7 | 1601 | mr->priority, |
4896d74b JK |
1602 | mr->readable ? 'R' : '-', |
1603 | !mr->readonly && !(mr->rom_device && mr->readable) ? 'W' | |
1604 | : '-', | |
314e2987 BS |
1605 | mr->name); |
1606 | } | |
9479c57a JK |
1607 | |
1608 | QTAILQ_INIT(&submr_print_queue); | |
1609 | ||
314e2987 | 1610 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
1611 | new_ml = g_new(MemoryRegionList, 1); |
1612 | new_ml->mr = submr; | |
1613 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1614 | if (new_ml->mr->addr < ml->mr->addr || | |
1615 | (new_ml->mr->addr == ml->mr->addr && | |
1616 | new_ml->mr->priority > ml->mr->priority)) { | |
1617 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
1618 | new_ml = NULL; | |
1619 | break; | |
1620 | } | |
1621 | } | |
1622 | if (new_ml) { | |
1623 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
1624 | } | |
1625 | } | |
1626 | ||
1627 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1628 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
1629 | alias_print_queue); | |
1630 | } | |
1631 | ||
88365e47 | 1632 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 1633 | g_free(ml); |
314e2987 BS |
1634 | } |
1635 | } | |
1636 | ||
1637 | void mtree_info(fprintf_function mon_printf, void *f) | |
1638 | { | |
1639 | MemoryRegionListHead ml_head; | |
1640 | MemoryRegionList *ml, *ml2; | |
1641 | ||
1642 | QTAILQ_INIT(&ml_head); | |
1643 | ||
1644 | mon_printf(f, "memory\n"); | |
1645 | mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head); | |
1646 | ||
b9f9be88 BS |
1647 | if (address_space_io.root && |
1648 | !QTAILQ_EMPTY(&address_space_io.root->subregions)) { | |
1649 | mon_printf(f, "I/O\n"); | |
1650 | mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head); | |
1651 | } | |
1652 | ||
1653 | mon_printf(f, "aliases\n"); | |
314e2987 BS |
1654 | /* print aliased regions */ |
1655 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
1656 | if (!ml->printed) { | |
1657 | mon_printf(f, "%s\n", ml->mr->name); | |
1658 | mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); | |
1659 | } | |
1660 | } | |
1661 | ||
1662 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 1663 | g_free(ml); |
314e2987 | 1664 | } |
314e2987 | 1665 | } |