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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <[email protected]> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
d38ea87a | 16 | #include "qemu/osdep.h" |
da34e65c | 17 | #include "qapi/error.h" |
33c11879 PB |
18 | #include "qemu-common.h" |
19 | #include "cpu.h" | |
022c62cb PB |
20 | #include "exec/memory.h" |
21 | #include "exec/address-spaces.h" | |
22 | #include "exec/ioport.h" | |
409ddd01 | 23 | #include "qapi/visitor.h" |
1de7afc9 | 24 | #include "qemu/bitops.h" |
8c56c1a5 | 25 | #include "qemu/error-report.h" |
2c9b15ca | 26 | #include "qom/object.h" |
0ab8ed18 | 27 | #include "trace-root.h" |
093bc2cd | 28 | |
022c62cb | 29 | #include "exec/memory-internal.h" |
220c3ebd | 30 | #include "exec/ram_addr.h" |
8c56c1a5 | 31 | #include "sysemu/kvm.h" |
e1c57ab8 | 32 | #include "sysemu/sysemu.h" |
67d95c15 | 33 | |
d197063f PB |
34 | //#define DEBUG_UNASSIGNED |
35 | ||
22bde714 JK |
36 | static unsigned memory_region_transaction_depth; |
37 | static bool memory_region_update_pending; | |
4dc56152 | 38 | static bool ioeventfd_update_pending; |
7664e80c AK |
39 | static bool global_dirty_log = false; |
40 | ||
72e22d2f AK |
41 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
42 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 43 | |
0d673e36 AK |
44 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
45 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
46 | ||
093bc2cd AK |
47 | typedef struct AddrRange AddrRange; |
48 | ||
8417cebf | 49 | /* |
c9cdaa3a | 50 | * Note that signed integers are needed for negative offsetting in aliases |
8417cebf AK |
51 | * (large MemoryRegion::alias_offset). |
52 | */ | |
093bc2cd | 53 | struct AddrRange { |
08dafab4 AK |
54 | Int128 start; |
55 | Int128 size; | |
093bc2cd AK |
56 | }; |
57 | ||
08dafab4 | 58 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
59 | { |
60 | return (AddrRange) { start, size }; | |
61 | } | |
62 | ||
63 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
64 | { | |
08dafab4 | 65 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
66 | } |
67 | ||
08dafab4 | 68 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 69 | { |
08dafab4 | 70 | return int128_add(r.start, r.size); |
093bc2cd AK |
71 | } |
72 | ||
08dafab4 | 73 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 74 | { |
08dafab4 | 75 | int128_addto(&range.start, delta); |
093bc2cd AK |
76 | return range; |
77 | } | |
78 | ||
08dafab4 AK |
79 | static bool addrrange_contains(AddrRange range, Int128 addr) |
80 | { | |
81 | return int128_ge(addr, range.start) | |
82 | && int128_lt(addr, addrrange_end(range)); | |
83 | } | |
84 | ||
093bc2cd AK |
85 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
86 | { | |
08dafab4 AK |
87 | return addrrange_contains(r1, r2.start) |
88 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
89 | } |
90 | ||
91 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
92 | { | |
08dafab4 AK |
93 | Int128 start = int128_max(r1.start, r2.start); |
94 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
95 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
96 | } |
97 | ||
0e0d36b4 AK |
98 | enum ListenerDirection { Forward, Reverse }; |
99 | ||
7376e582 | 100 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ |
0e0d36b4 AK |
101 | do { \ |
102 | MemoryListener *_listener; \ | |
103 | \ | |
104 | switch (_direction) { \ | |
105 | case Forward: \ | |
106 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
107 | if (_listener->_callback) { \ |
108 | _listener->_callback(_listener, ##_args); \ | |
109 | } \ | |
0e0d36b4 AK |
110 | } \ |
111 | break; \ | |
112 | case Reverse: \ | |
113 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
114 | memory_listeners, link) { \ | |
975aefe0 AK |
115 | if (_listener->_callback) { \ |
116 | _listener->_callback(_listener, ##_args); \ | |
117 | } \ | |
0e0d36b4 AK |
118 | } \ |
119 | break; \ | |
120 | default: \ | |
121 | abort(); \ | |
122 | } \ | |
123 | } while (0) | |
124 | ||
9a54635d | 125 | #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \ |
7376e582 AK |
126 | do { \ |
127 | MemoryListener *_listener; \ | |
9a54635d | 128 | struct memory_listeners_as *list = &(_as)->listeners; \ |
7376e582 AK |
129 | \ |
130 | switch (_direction) { \ | |
131 | case Forward: \ | |
9a54635d PB |
132 | QTAILQ_FOREACH(_listener, list, link_as) { \ |
133 | if (_listener->_callback) { \ | |
7376e582 AK |
134 | _listener->_callback(_listener, _section, ##_args); \ |
135 | } \ | |
136 | } \ | |
137 | break; \ | |
138 | case Reverse: \ | |
9a54635d PB |
139 | QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \ |
140 | link_as) { \ | |
141 | if (_listener->_callback) { \ | |
7376e582 AK |
142 | _listener->_callback(_listener, _section, ##_args); \ |
143 | } \ | |
144 | } \ | |
145 | break; \ | |
146 | default: \ | |
147 | abort(); \ | |
148 | } \ | |
149 | } while (0) | |
150 | ||
dfde4e6e | 151 | /* No need to ref/unref .mr, the FlatRange keeps it alive. */ |
b2dfd71c | 152 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \ |
9c1f8f44 PB |
153 | do { \ |
154 | MemoryRegionSection mrs = section_from_flat_range(fr, as); \ | |
9a54635d | 155 | MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \ |
9c1f8f44 | 156 | } while(0) |
0e0d36b4 | 157 | |
093bc2cd AK |
158 | struct CoalescedMemoryRange { |
159 | AddrRange addr; | |
160 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
161 | }; | |
162 | ||
3e9d69e7 AK |
163 | struct MemoryRegionIoeventfd { |
164 | AddrRange addr; | |
165 | bool match_data; | |
166 | uint64_t data; | |
753d5e14 | 167 | EventNotifier *e; |
3e9d69e7 AK |
168 | }; |
169 | ||
170 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
171 | MemoryRegionIoeventfd b) | |
172 | { | |
08dafab4 | 173 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 174 | return true; |
08dafab4 | 175 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 176 | return false; |
08dafab4 | 177 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 178 | return true; |
08dafab4 | 179 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
180 | return false; |
181 | } else if (a.match_data < b.match_data) { | |
182 | return true; | |
183 | } else if (a.match_data > b.match_data) { | |
184 | return false; | |
185 | } else if (a.match_data) { | |
186 | if (a.data < b.data) { | |
187 | return true; | |
188 | } else if (a.data > b.data) { | |
189 | return false; | |
190 | } | |
191 | } | |
753d5e14 | 192 | if (a.e < b.e) { |
3e9d69e7 | 193 | return true; |
753d5e14 | 194 | } else if (a.e > b.e) { |
3e9d69e7 AK |
195 | return false; |
196 | } | |
197 | return false; | |
198 | } | |
199 | ||
200 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
201 | MemoryRegionIoeventfd b) | |
202 | { | |
203 | return !memory_region_ioeventfd_before(a, b) | |
204 | && !memory_region_ioeventfd_before(b, a); | |
205 | } | |
206 | ||
093bc2cd AK |
207 | typedef struct FlatRange FlatRange; |
208 | typedef struct FlatView FlatView; | |
209 | ||
210 | /* Range of memory in the global map. Addresses are absolute. */ | |
211 | struct FlatRange { | |
212 | MemoryRegion *mr; | |
a8170e5e | 213 | hwaddr offset_in_region; |
093bc2cd | 214 | AddrRange addr; |
5a583347 | 215 | uint8_t dirty_log_mask; |
b138e654 | 216 | bool romd_mode; |
fb1cd6f9 | 217 | bool readonly; |
093bc2cd AK |
218 | }; |
219 | ||
220 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
221 | * order. | |
222 | */ | |
223 | struct FlatView { | |
374f2981 | 224 | struct rcu_head rcu; |
856d7245 | 225 | unsigned ref; |
093bc2cd AK |
226 | FlatRange *ranges; |
227 | unsigned nr; | |
228 | unsigned nr_allocated; | |
229 | }; | |
230 | ||
cc31e6e7 AK |
231 | typedef struct AddressSpaceOps AddressSpaceOps; |
232 | ||
093bc2cd AK |
233 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
234 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
235 | ||
9c1f8f44 PB |
236 | static inline MemoryRegionSection |
237 | section_from_flat_range(FlatRange *fr, AddressSpace *as) | |
238 | { | |
239 | return (MemoryRegionSection) { | |
240 | .mr = fr->mr, | |
241 | .address_space = as, | |
242 | .offset_within_region = fr->offset_in_region, | |
243 | .size = fr->addr.size, | |
244 | .offset_within_address_space = int128_get64(fr->addr.start), | |
245 | .readonly = fr->readonly, | |
246 | }; | |
247 | } | |
248 | ||
093bc2cd AK |
249 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
250 | { | |
251 | return a->mr == b->mr | |
252 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 253 | && a->offset_in_region == b->offset_in_region |
b138e654 | 254 | && a->romd_mode == b->romd_mode |
fb1cd6f9 | 255 | && a->readonly == b->readonly; |
093bc2cd AK |
256 | } |
257 | ||
258 | static void flatview_init(FlatView *view) | |
259 | { | |
856d7245 | 260 | view->ref = 1; |
093bc2cd AK |
261 | view->ranges = NULL; |
262 | view->nr = 0; | |
263 | view->nr_allocated = 0; | |
264 | } | |
265 | ||
266 | /* Insert a range into a given position. Caller is responsible for maintaining | |
267 | * sorting order. | |
268 | */ | |
269 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
270 | { | |
271 | if (view->nr == view->nr_allocated) { | |
272 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 273 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
274 | view->nr_allocated * sizeof(*view->ranges)); |
275 | } | |
276 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
277 | (view->nr - pos) * sizeof(FlatRange)); | |
278 | view->ranges[pos] = *range; | |
dfde4e6e | 279 | memory_region_ref(range->mr); |
093bc2cd AK |
280 | ++view->nr; |
281 | } | |
282 | ||
283 | static void flatview_destroy(FlatView *view) | |
284 | { | |
dfde4e6e PB |
285 | int i; |
286 | ||
287 | for (i = 0; i < view->nr; i++) { | |
288 | memory_region_unref(view->ranges[i].mr); | |
289 | } | |
7267c094 | 290 | g_free(view->ranges); |
a9a0c06d | 291 | g_free(view); |
093bc2cd AK |
292 | } |
293 | ||
856d7245 PB |
294 | static void flatview_ref(FlatView *view) |
295 | { | |
296 | atomic_inc(&view->ref); | |
297 | } | |
298 | ||
299 | static void flatview_unref(FlatView *view) | |
300 | { | |
301 | if (atomic_fetch_dec(&view->ref) == 1) { | |
302 | flatview_destroy(view); | |
303 | } | |
304 | } | |
305 | ||
3d8e6bf9 AK |
306 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
307 | { | |
08dafab4 | 308 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 309 | && r1->mr == r2->mr |
08dafab4 AK |
310 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
311 | r1->addr.size), | |
312 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 313 | && r1->dirty_log_mask == r2->dirty_log_mask |
b138e654 | 314 | && r1->romd_mode == r2->romd_mode |
fb1cd6f9 | 315 | && r1->readonly == r2->readonly; |
3d8e6bf9 AK |
316 | } |
317 | ||
8508e024 | 318 | /* Attempt to simplify a view by merging adjacent ranges */ |
3d8e6bf9 AK |
319 | static void flatview_simplify(FlatView *view) |
320 | { | |
321 | unsigned i, j; | |
322 | ||
323 | i = 0; | |
324 | while (i < view->nr) { | |
325 | j = i + 1; | |
326 | while (j < view->nr | |
327 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 328 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
329 | ++j; |
330 | } | |
331 | ++i; | |
332 | memmove(&view->ranges[i], &view->ranges[j], | |
333 | (view->nr - j) * sizeof(view->ranges[j])); | |
334 | view->nr -= j - i; | |
335 | } | |
336 | } | |
337 | ||
e7342aa3 PB |
338 | static bool memory_region_big_endian(MemoryRegion *mr) |
339 | { | |
340 | #ifdef TARGET_WORDS_BIGENDIAN | |
341 | return mr->ops->endianness != DEVICE_LITTLE_ENDIAN; | |
342 | #else | |
343 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
344 | #endif | |
345 | } | |
346 | ||
e11ef3d1 PB |
347 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
348 | { | |
349 | #ifdef TARGET_WORDS_BIGENDIAN | |
350 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; | |
351 | #else | |
352 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
353 | #endif | |
354 | } | |
355 | ||
356 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) | |
357 | { | |
358 | if (memory_region_wrong_endianness(mr)) { | |
359 | switch (size) { | |
360 | case 1: | |
361 | break; | |
362 | case 2: | |
363 | *data = bswap16(*data); | |
364 | break; | |
365 | case 4: | |
366 | *data = bswap32(*data); | |
367 | break; | |
368 | case 8: | |
369 | *data = bswap64(*data); | |
370 | break; | |
371 | default: | |
372 | abort(); | |
373 | } | |
374 | } | |
375 | } | |
376 | ||
4779dc1d HB |
377 | static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset) |
378 | { | |
379 | MemoryRegion *root; | |
380 | hwaddr abs_addr = offset; | |
381 | ||
382 | abs_addr += mr->addr; | |
383 | for (root = mr; root->container; ) { | |
384 | root = root->container; | |
385 | abs_addr += root->addr; | |
386 | } | |
387 | ||
388 | return abs_addr; | |
389 | } | |
390 | ||
5a68be94 HB |
391 | static int get_cpu_index(void) |
392 | { | |
393 | if (current_cpu) { | |
394 | return current_cpu->cpu_index; | |
395 | } | |
396 | return -1; | |
397 | } | |
398 | ||
cc05c43a PM |
399 | static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr, |
400 | hwaddr addr, | |
401 | uint64_t *value, | |
402 | unsigned size, | |
403 | unsigned shift, | |
404 | uint64_t mask, | |
405 | MemTxAttrs attrs) | |
406 | { | |
407 | uint64_t tmp; | |
408 | ||
409 | tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); | |
23d92d68 | 410 | if (mr->subpage) { |
5a68be94 | 411 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
412 | } else if (mr == &io_mem_notdirty) { |
413 | /* Accesses to code which has previously been translated into a TB show | |
414 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
415 | * MemoryRegion. */ | |
416 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
417 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
418 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 419 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 420 | } |
cc05c43a PM |
421 | *value |= (tmp & mask) << shift; |
422 | return MEMTX_OK; | |
423 | } | |
424 | ||
425 | static MemTxResult memory_region_read_accessor(MemoryRegion *mr, | |
ce5d2f33 PB |
426 | hwaddr addr, |
427 | uint64_t *value, | |
428 | unsigned size, | |
429 | unsigned shift, | |
cc05c43a PM |
430 | uint64_t mask, |
431 | MemTxAttrs attrs) | |
ce5d2f33 | 432 | { |
ce5d2f33 PB |
433 | uint64_t tmp; |
434 | ||
cc05c43a | 435 | tmp = mr->ops->read(mr->opaque, addr, size); |
23d92d68 | 436 | if (mr->subpage) { |
5a68be94 | 437 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
438 | } else if (mr == &io_mem_notdirty) { |
439 | /* Accesses to code which has previously been translated into a TB show | |
440 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
441 | * MemoryRegion. */ | |
442 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
443 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
444 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 445 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 446 | } |
ce5d2f33 | 447 | *value |= (tmp & mask) << shift; |
cc05c43a | 448 | return MEMTX_OK; |
ce5d2f33 PB |
449 | } |
450 | ||
cc05c43a PM |
451 | static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr, |
452 | hwaddr addr, | |
453 | uint64_t *value, | |
454 | unsigned size, | |
455 | unsigned shift, | |
456 | uint64_t mask, | |
457 | MemTxAttrs attrs) | |
164a4dcd | 458 | { |
cc05c43a PM |
459 | uint64_t tmp = 0; |
460 | MemTxResult r; | |
164a4dcd | 461 | |
cc05c43a | 462 | r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs); |
23d92d68 | 463 | if (mr->subpage) { |
5a68be94 | 464 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
465 | } else if (mr == &io_mem_notdirty) { |
466 | /* Accesses to code which has previously been translated into a TB show | |
467 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
468 | * MemoryRegion. */ | |
469 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
470 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
471 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 472 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 473 | } |
164a4dcd | 474 | *value |= (tmp & mask) << shift; |
cc05c43a | 475 | return r; |
164a4dcd AK |
476 | } |
477 | ||
cc05c43a PM |
478 | static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr, |
479 | hwaddr addr, | |
480 | uint64_t *value, | |
481 | unsigned size, | |
482 | unsigned shift, | |
483 | uint64_t mask, | |
484 | MemTxAttrs attrs) | |
ce5d2f33 | 485 | { |
ce5d2f33 PB |
486 | uint64_t tmp; |
487 | ||
488 | tmp = (*value >> shift) & mask; | |
23d92d68 | 489 | if (mr->subpage) { |
5a68be94 | 490 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
491 | } else if (mr == &io_mem_notdirty) { |
492 | /* Accesses to code which has previously been translated into a TB show | |
493 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
494 | * MemoryRegion. */ | |
495 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
496 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
497 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 498 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 499 | } |
ce5d2f33 | 500 | mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); |
cc05c43a | 501 | return MEMTX_OK; |
ce5d2f33 PB |
502 | } |
503 | ||
cc05c43a PM |
504 | static MemTxResult memory_region_write_accessor(MemoryRegion *mr, |
505 | hwaddr addr, | |
506 | uint64_t *value, | |
507 | unsigned size, | |
508 | unsigned shift, | |
509 | uint64_t mask, | |
510 | MemTxAttrs attrs) | |
164a4dcd | 511 | { |
164a4dcd AK |
512 | uint64_t tmp; |
513 | ||
514 | tmp = (*value >> shift) & mask; | |
23d92d68 | 515 | if (mr->subpage) { |
5a68be94 | 516 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
517 | } else if (mr == &io_mem_notdirty) { |
518 | /* Accesses to code which has previously been translated into a TB show | |
519 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
520 | * MemoryRegion. */ | |
521 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
522 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
523 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 524 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 525 | } |
164a4dcd | 526 | mr->ops->write(mr->opaque, addr, tmp, size); |
cc05c43a | 527 | return MEMTX_OK; |
164a4dcd AK |
528 | } |
529 | ||
cc05c43a PM |
530 | static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr, |
531 | hwaddr addr, | |
532 | uint64_t *value, | |
533 | unsigned size, | |
534 | unsigned shift, | |
535 | uint64_t mask, | |
536 | MemTxAttrs attrs) | |
537 | { | |
538 | uint64_t tmp; | |
539 | ||
cc05c43a | 540 | tmp = (*value >> shift) & mask; |
23d92d68 | 541 | if (mr->subpage) { |
5a68be94 | 542 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
543 | } else if (mr == &io_mem_notdirty) { |
544 | /* Accesses to code which has previously been translated into a TB show | |
545 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
546 | * MemoryRegion. */ | |
547 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
548 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
549 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 550 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 551 | } |
cc05c43a PM |
552 | return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs); |
553 | } | |
554 | ||
555 | static MemTxResult access_with_adjusted_size(hwaddr addr, | |
164a4dcd AK |
556 | uint64_t *value, |
557 | unsigned size, | |
558 | unsigned access_size_min, | |
559 | unsigned access_size_max, | |
cc05c43a PM |
560 | MemTxResult (*access)(MemoryRegion *mr, |
561 | hwaddr addr, | |
562 | uint64_t *value, | |
563 | unsigned size, | |
564 | unsigned shift, | |
565 | uint64_t mask, | |
566 | MemTxAttrs attrs), | |
567 | MemoryRegion *mr, | |
568 | MemTxAttrs attrs) | |
164a4dcd AK |
569 | { |
570 | uint64_t access_mask; | |
571 | unsigned access_size; | |
572 | unsigned i; | |
cc05c43a | 573 | MemTxResult r = MEMTX_OK; |
164a4dcd AK |
574 | |
575 | if (!access_size_min) { | |
576 | access_size_min = 1; | |
577 | } | |
578 | if (!access_size_max) { | |
579 | access_size_max = 4; | |
580 | } | |
ce5d2f33 PB |
581 | |
582 | /* FIXME: support unaligned access? */ | |
164a4dcd AK |
583 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
584 | access_mask = -1ULL >> (64 - access_size * 8); | |
e7342aa3 PB |
585 | if (memory_region_big_endian(mr)) { |
586 | for (i = 0; i < size; i += access_size) { | |
cc05c43a PM |
587 | r |= access(mr, addr + i, value, access_size, |
588 | (size - access_size - i) * 8, access_mask, attrs); | |
e7342aa3 PB |
589 | } |
590 | } else { | |
591 | for (i = 0; i < size; i += access_size) { | |
cc05c43a PM |
592 | r |= access(mr, addr + i, value, access_size, i * 8, |
593 | access_mask, attrs); | |
e7342aa3 | 594 | } |
164a4dcd | 595 | } |
cc05c43a | 596 | return r; |
164a4dcd AK |
597 | } |
598 | ||
e2177955 AK |
599 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
600 | { | |
0d673e36 AK |
601 | AddressSpace *as; |
602 | ||
feca4ac1 PB |
603 | while (mr->container) { |
604 | mr = mr->container; | |
e2177955 | 605 | } |
0d673e36 AK |
606 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
607 | if (mr == as->root) { | |
608 | return as; | |
609 | } | |
e2177955 | 610 | } |
eed2bacf | 611 | return NULL; |
e2177955 AK |
612 | } |
613 | ||
093bc2cd AK |
614 | /* Render a memory region into the global view. Ranges in @view obscure |
615 | * ranges in @mr. | |
616 | */ | |
617 | static void render_memory_region(FlatView *view, | |
618 | MemoryRegion *mr, | |
08dafab4 | 619 | Int128 base, |
fb1cd6f9 AK |
620 | AddrRange clip, |
621 | bool readonly) | |
093bc2cd AK |
622 | { |
623 | MemoryRegion *subregion; | |
624 | unsigned i; | |
a8170e5e | 625 | hwaddr offset_in_region; |
08dafab4 AK |
626 | Int128 remain; |
627 | Int128 now; | |
093bc2cd AK |
628 | FlatRange fr; |
629 | AddrRange tmp; | |
630 | ||
6bba19ba AK |
631 | if (!mr->enabled) { |
632 | return; | |
633 | } | |
634 | ||
08dafab4 | 635 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 636 | readonly |= mr->readonly; |
093bc2cd AK |
637 | |
638 | tmp = addrrange_make(base, mr->size); | |
639 | ||
640 | if (!addrrange_intersects(tmp, clip)) { | |
641 | return; | |
642 | } | |
643 | ||
644 | clip = addrrange_intersection(tmp, clip); | |
645 | ||
646 | if (mr->alias) { | |
08dafab4 AK |
647 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
648 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 649 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
650 | return; |
651 | } | |
652 | ||
653 | /* Render subregions in priority order. */ | |
654 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 655 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
656 | } |
657 | ||
14a3c10a | 658 | if (!mr->terminates) { |
093bc2cd AK |
659 | return; |
660 | } | |
661 | ||
08dafab4 | 662 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
663 | base = clip.start; |
664 | remain = clip.size; | |
665 | ||
2eb74e1a | 666 | fr.mr = mr; |
6f6a5ef3 | 667 | fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr); |
b138e654 | 668 | fr.romd_mode = mr->romd_mode; |
2eb74e1a PC |
669 | fr.readonly = readonly; |
670 | ||
093bc2cd | 671 | /* Render the region itself into any gaps left by the current view. */ |
08dafab4 AK |
672 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
673 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
674 | continue; |
675 | } | |
08dafab4 AK |
676 | if (int128_lt(base, view->ranges[i].addr.start)) { |
677 | now = int128_min(remain, | |
678 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
679 | fr.offset_in_region = offset_in_region; |
680 | fr.addr = addrrange_make(base, now); | |
681 | flatview_insert(view, i, &fr); | |
682 | ++i; | |
08dafab4 AK |
683 | int128_addto(&base, now); |
684 | offset_in_region += int128_get64(now); | |
685 | int128_subfrom(&remain, now); | |
093bc2cd | 686 | } |
d26a8cae AK |
687 | now = int128_sub(int128_min(int128_add(base, remain), |
688 | addrrange_end(view->ranges[i].addr)), | |
689 | base); | |
690 | int128_addto(&base, now); | |
691 | offset_in_region += int128_get64(now); | |
692 | int128_subfrom(&remain, now); | |
093bc2cd | 693 | } |
08dafab4 | 694 | if (int128_nz(remain)) { |
093bc2cd AK |
695 | fr.offset_in_region = offset_in_region; |
696 | fr.addr = addrrange_make(base, remain); | |
697 | flatview_insert(view, i, &fr); | |
698 | } | |
699 | } | |
700 | ||
701 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
a9a0c06d | 702 | static FlatView *generate_memory_topology(MemoryRegion *mr) |
093bc2cd | 703 | { |
a9a0c06d | 704 | FlatView *view; |
093bc2cd | 705 | |
a9a0c06d PB |
706 | view = g_new(FlatView, 1); |
707 | flatview_init(view); | |
093bc2cd | 708 | |
83f3c251 | 709 | if (mr) { |
a9a0c06d | 710 | render_memory_region(view, mr, int128_zero(), |
83f3c251 AK |
711 | addrrange_make(int128_zero(), int128_2_64()), false); |
712 | } | |
a9a0c06d | 713 | flatview_simplify(view); |
093bc2cd AK |
714 | |
715 | return view; | |
716 | } | |
717 | ||
3e9d69e7 AK |
718 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
719 | MemoryRegionIoeventfd *fds_new, | |
720 | unsigned fds_new_nb, | |
721 | MemoryRegionIoeventfd *fds_old, | |
722 | unsigned fds_old_nb) | |
723 | { | |
724 | unsigned iold, inew; | |
80a1ea37 AK |
725 | MemoryRegionIoeventfd *fd; |
726 | MemoryRegionSection section; | |
3e9d69e7 AK |
727 | |
728 | /* Generate a symmetric difference of the old and new fd sets, adding | |
729 | * and deleting as necessary. | |
730 | */ | |
731 | ||
732 | iold = inew = 0; | |
733 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
734 | if (iold < fds_old_nb | |
735 | && (inew == fds_new_nb | |
736 | || memory_region_ioeventfd_before(fds_old[iold], | |
737 | fds_new[inew]))) { | |
80a1ea37 AK |
738 | fd = &fds_old[iold]; |
739 | section = (MemoryRegionSection) { | |
f6790af6 | 740 | .address_space = as, |
80a1ea37 | 741 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 742 | .size = fd->addr.size, |
80a1ea37 | 743 | }; |
9a54635d | 744 | MEMORY_LISTENER_CALL(as, eventfd_del, Forward, §ion, |
753d5e14 | 745 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
746 | ++iold; |
747 | } else if (inew < fds_new_nb | |
748 | && (iold == fds_old_nb | |
749 | || memory_region_ioeventfd_before(fds_new[inew], | |
750 | fds_old[iold]))) { | |
80a1ea37 AK |
751 | fd = &fds_new[inew]; |
752 | section = (MemoryRegionSection) { | |
f6790af6 | 753 | .address_space = as, |
80a1ea37 | 754 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 755 | .size = fd->addr.size, |
80a1ea37 | 756 | }; |
9a54635d | 757 | MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, §ion, |
753d5e14 | 758 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
759 | ++inew; |
760 | } else { | |
761 | ++iold; | |
762 | ++inew; | |
763 | } | |
764 | } | |
765 | } | |
766 | ||
856d7245 PB |
767 | static FlatView *address_space_get_flatview(AddressSpace *as) |
768 | { | |
769 | FlatView *view; | |
770 | ||
374f2981 PB |
771 | rcu_read_lock(); |
772 | view = atomic_rcu_read(&as->current_map); | |
856d7245 | 773 | flatview_ref(view); |
374f2981 | 774 | rcu_read_unlock(); |
856d7245 PB |
775 | return view; |
776 | } | |
777 | ||
3e9d69e7 AK |
778 | static void address_space_update_ioeventfds(AddressSpace *as) |
779 | { | |
99e86347 | 780 | FlatView *view; |
3e9d69e7 AK |
781 | FlatRange *fr; |
782 | unsigned ioeventfd_nb = 0; | |
783 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
784 | AddrRange tmp; | |
785 | unsigned i; | |
786 | ||
856d7245 | 787 | view = address_space_get_flatview(as); |
99e86347 | 788 | FOR_EACH_FLAT_RANGE(fr, view) { |
3e9d69e7 AK |
789 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
790 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
791 | int128_sub(fr->addr.start, |
792 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
793 | if (addrrange_intersects(fr->addr, tmp)) { |
794 | ++ioeventfd_nb; | |
7267c094 | 795 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
796 | ioeventfd_nb * sizeof(*ioeventfds)); |
797 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
798 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
799 | } | |
800 | } | |
801 | } | |
802 | ||
803 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
804 | as->ioeventfds, as->ioeventfd_nb); | |
805 | ||
7267c094 | 806 | g_free(as->ioeventfds); |
3e9d69e7 AK |
807 | as->ioeventfds = ioeventfds; |
808 | as->ioeventfd_nb = ioeventfd_nb; | |
856d7245 | 809 | flatview_unref(view); |
3e9d69e7 AK |
810 | } |
811 | ||
b8af1afb | 812 | static void address_space_update_topology_pass(AddressSpace *as, |
a9a0c06d PB |
813 | const FlatView *old_view, |
814 | const FlatView *new_view, | |
b8af1afb | 815 | bool adding) |
093bc2cd | 816 | { |
093bc2cd AK |
817 | unsigned iold, inew; |
818 | FlatRange *frold, *frnew; | |
093bc2cd AK |
819 | |
820 | /* Generate a symmetric difference of the old and new memory maps. | |
821 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
822 | */ | |
823 | iold = inew = 0; | |
a9a0c06d PB |
824 | while (iold < old_view->nr || inew < new_view->nr) { |
825 | if (iold < old_view->nr) { | |
826 | frold = &old_view->ranges[iold]; | |
093bc2cd AK |
827 | } else { |
828 | frold = NULL; | |
829 | } | |
a9a0c06d PB |
830 | if (inew < new_view->nr) { |
831 | frnew = &new_view->ranges[inew]; | |
093bc2cd AK |
832 | } else { |
833 | frnew = NULL; | |
834 | } | |
835 | ||
836 | if (frold | |
837 | && (!frnew | |
08dafab4 AK |
838 | || int128_lt(frold->addr.start, frnew->addr.start) |
839 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd | 840 | && !flatrange_equal(frold, frnew)))) { |
41a6e477 | 841 | /* In old but not in new, or in both but attributes changed. */ |
093bc2cd | 842 | |
b8af1afb | 843 | if (!adding) { |
72e22d2f | 844 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
845 | } |
846 | ||
093bc2cd AK |
847 | ++iold; |
848 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
41a6e477 | 849 | /* In both and unchanged (except logging may have changed) */ |
093bc2cd | 850 | |
b8af1afb | 851 | if (adding) { |
50c1e149 | 852 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b2dfd71c PB |
853 | if (frnew->dirty_log_mask & ~frold->dirty_log_mask) { |
854 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start, | |
855 | frold->dirty_log_mask, | |
856 | frnew->dirty_log_mask); | |
857 | } | |
858 | if (frold->dirty_log_mask & ~frnew->dirty_log_mask) { | |
859 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop, | |
860 | frold->dirty_log_mask, | |
861 | frnew->dirty_log_mask); | |
b8af1afb | 862 | } |
5a583347 AK |
863 | } |
864 | ||
093bc2cd AK |
865 | ++iold; |
866 | ++inew; | |
093bc2cd AK |
867 | } else { |
868 | /* In new */ | |
869 | ||
b8af1afb | 870 | if (adding) { |
72e22d2f | 871 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
872 | } |
873 | ||
093bc2cd AK |
874 | ++inew; |
875 | } | |
876 | } | |
b8af1afb AK |
877 | } |
878 | ||
879 | ||
880 | static void address_space_update_topology(AddressSpace *as) | |
881 | { | |
856d7245 | 882 | FlatView *old_view = address_space_get_flatview(as); |
a9a0c06d | 883 | FlatView *new_view = generate_memory_topology(as->root); |
b8af1afb AK |
884 | |
885 | address_space_update_topology_pass(as, old_view, new_view, false); | |
886 | address_space_update_topology_pass(as, old_view, new_view, true); | |
887 | ||
374f2981 PB |
888 | /* Writes are protected by the BQL. */ |
889 | atomic_rcu_set(&as->current_map, new_view); | |
890 | call_rcu(old_view, flatview_unref, rcu); | |
856d7245 PB |
891 | |
892 | /* Note that all the old MemoryRegions are still alive up to this | |
893 | * point. This relieves most MemoryListeners from the need to | |
894 | * ref/unref the MemoryRegions they get---unless they use them | |
895 | * outside the iothread mutex, in which case precise reference | |
896 | * counting is necessary. | |
897 | */ | |
898 | flatview_unref(old_view); | |
899 | ||
3e9d69e7 | 900 | address_space_update_ioeventfds(as); |
093bc2cd AK |
901 | } |
902 | ||
4ef4db86 AK |
903 | void memory_region_transaction_begin(void) |
904 | { | |
bb880ded | 905 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
906 | ++memory_region_transaction_depth; |
907 | } | |
908 | ||
909 | void memory_region_transaction_commit(void) | |
910 | { | |
0d673e36 AK |
911 | AddressSpace *as; |
912 | ||
4ef4db86 | 913 | assert(memory_region_transaction_depth); |
8d04fb55 JK |
914 | assert(qemu_mutex_iothread_locked()); |
915 | ||
4ef4db86 | 916 | --memory_region_transaction_depth; |
4dc56152 GA |
917 | if (!memory_region_transaction_depth) { |
918 | if (memory_region_update_pending) { | |
919 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); | |
02e2b95f | 920 | |
4dc56152 GA |
921 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
922 | address_space_update_topology(as); | |
923 | } | |
ade9c1aa | 924 | memory_region_update_pending = false; |
4dc56152 GA |
925 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); |
926 | } else if (ioeventfd_update_pending) { | |
927 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
928 | address_space_update_ioeventfds(as); | |
929 | } | |
ade9c1aa | 930 | ioeventfd_update_pending = false; |
4dc56152 | 931 | } |
4dc56152 | 932 | } |
4ef4db86 AK |
933 | } |
934 | ||
545e92e0 AK |
935 | static void memory_region_destructor_none(MemoryRegion *mr) |
936 | { | |
937 | } | |
938 | ||
939 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
940 | { | |
f1060c55 | 941 | qemu_ram_free(mr->ram_block); |
545e92e0 AK |
942 | } |
943 | ||
b4fefef9 PC |
944 | static bool memory_region_need_escape(char c) |
945 | { | |
946 | return c == '/' || c == '[' || c == '\\' || c == ']'; | |
947 | } | |
948 | ||
949 | static char *memory_region_escape_name(const char *name) | |
950 | { | |
951 | const char *p; | |
952 | char *escaped, *q; | |
953 | uint8_t c; | |
954 | size_t bytes = 0; | |
955 | ||
956 | for (p = name; *p; p++) { | |
957 | bytes += memory_region_need_escape(*p) ? 4 : 1; | |
958 | } | |
959 | if (bytes == p - name) { | |
960 | return g_memdup(name, bytes + 1); | |
961 | } | |
962 | ||
963 | escaped = g_malloc(bytes + 1); | |
964 | for (p = name, q = escaped; *p; p++) { | |
965 | c = *p; | |
966 | if (unlikely(memory_region_need_escape(c))) { | |
967 | *q++ = '\\'; | |
968 | *q++ = 'x'; | |
969 | *q++ = "0123456789abcdef"[c >> 4]; | |
970 | c = "0123456789abcdef"[c & 15]; | |
971 | } | |
972 | *q++ = c; | |
973 | } | |
974 | *q = 0; | |
975 | return escaped; | |
976 | } | |
977 | ||
093bc2cd | 978 | void memory_region_init(MemoryRegion *mr, |
2c9b15ca | 979 | Object *owner, |
093bc2cd AK |
980 | const char *name, |
981 | uint64_t size) | |
982 | { | |
22a893e4 | 983 | object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION); |
08dafab4 AK |
984 | mr->size = int128_make64(size); |
985 | if (size == UINT64_MAX) { | |
986 | mr->size = int128_2_64(); | |
987 | } | |
302fa283 | 988 | mr->name = g_strdup(name); |
612263cf | 989 | mr->owner = owner; |
58eaa217 | 990 | mr->ram_block = NULL; |
b4fefef9 PC |
991 | |
992 | if (name) { | |
843ef73a PC |
993 | char *escaped_name = memory_region_escape_name(name); |
994 | char *name_array = g_strdup_printf("%s[*]", escaped_name); | |
612263cf PB |
995 | |
996 | if (!owner) { | |
997 | owner = container_get(qdev_get_machine(), "/unattached"); | |
998 | } | |
999 | ||
843ef73a | 1000 | object_property_add_child(owner, name_array, OBJECT(mr), &error_abort); |
b4fefef9 | 1001 | object_unref(OBJECT(mr)); |
843ef73a PC |
1002 | g_free(name_array); |
1003 | g_free(escaped_name); | |
b4fefef9 PC |
1004 | } |
1005 | } | |
1006 | ||
d7bce999 EB |
1007 | static void memory_region_get_addr(Object *obj, Visitor *v, const char *name, |
1008 | void *opaque, Error **errp) | |
409ddd01 PC |
1009 | { |
1010 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1011 | uint64_t value = mr->addr; | |
1012 | ||
51e72bc1 | 1013 | visit_type_uint64(v, name, &value, errp); |
409ddd01 PC |
1014 | } |
1015 | ||
d7bce999 EB |
1016 | static void memory_region_get_container(Object *obj, Visitor *v, |
1017 | const char *name, void *opaque, | |
1018 | Error **errp) | |
409ddd01 PC |
1019 | { |
1020 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1021 | gchar *path = (gchar *)""; | |
1022 | ||
1023 | if (mr->container) { | |
1024 | path = object_get_canonical_path(OBJECT(mr->container)); | |
1025 | } | |
51e72bc1 | 1026 | visit_type_str(v, name, &path, errp); |
409ddd01 PC |
1027 | if (mr->container) { |
1028 | g_free(path); | |
1029 | } | |
1030 | } | |
1031 | ||
1032 | static Object *memory_region_resolve_container(Object *obj, void *opaque, | |
1033 | const char *part) | |
1034 | { | |
1035 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1036 | ||
1037 | return OBJECT(mr->container); | |
1038 | } | |
1039 | ||
d7bce999 EB |
1040 | static void memory_region_get_priority(Object *obj, Visitor *v, |
1041 | const char *name, void *opaque, | |
1042 | Error **errp) | |
d33382da PC |
1043 | { |
1044 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1045 | int32_t value = mr->priority; | |
1046 | ||
51e72bc1 | 1047 | visit_type_int32(v, name, &value, errp); |
d33382da PC |
1048 | } |
1049 | ||
d7bce999 EB |
1050 | static void memory_region_get_size(Object *obj, Visitor *v, const char *name, |
1051 | void *opaque, Error **errp) | |
52aef7bb PC |
1052 | { |
1053 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1054 | uint64_t value = memory_region_size(mr); | |
1055 | ||
51e72bc1 | 1056 | visit_type_uint64(v, name, &value, errp); |
52aef7bb PC |
1057 | } |
1058 | ||
b4fefef9 PC |
1059 | static void memory_region_initfn(Object *obj) |
1060 | { | |
1061 | MemoryRegion *mr = MEMORY_REGION(obj); | |
409ddd01 | 1062 | ObjectProperty *op; |
b4fefef9 PC |
1063 | |
1064 | mr->ops = &unassigned_mem_ops; | |
6bba19ba | 1065 | mr->enabled = true; |
5f9a5ea1 | 1066 | mr->romd_mode = true; |
196ea131 | 1067 | mr->global_locking = true; |
545e92e0 | 1068 | mr->destructor = memory_region_destructor_none; |
093bc2cd | 1069 | QTAILQ_INIT(&mr->subregions); |
093bc2cd | 1070 | QTAILQ_INIT(&mr->coalesced); |
409ddd01 PC |
1071 | |
1072 | op = object_property_add(OBJECT(mr), "container", | |
1073 | "link<" TYPE_MEMORY_REGION ">", | |
1074 | memory_region_get_container, | |
1075 | NULL, /* memory_region_set_container */ | |
1076 | NULL, NULL, &error_abort); | |
1077 | op->resolve = memory_region_resolve_container; | |
1078 | ||
1079 | object_property_add(OBJECT(mr), "addr", "uint64", | |
1080 | memory_region_get_addr, | |
1081 | NULL, /* memory_region_set_addr */ | |
1082 | NULL, NULL, &error_abort); | |
d33382da PC |
1083 | object_property_add(OBJECT(mr), "priority", "uint32", |
1084 | memory_region_get_priority, | |
1085 | NULL, /* memory_region_set_priority */ | |
1086 | NULL, NULL, &error_abort); | |
52aef7bb PC |
1087 | object_property_add(OBJECT(mr), "size", "uint64", |
1088 | memory_region_get_size, | |
1089 | NULL, /* memory_region_set_size, */ | |
1090 | NULL, NULL, &error_abort); | |
093bc2cd AK |
1091 | } |
1092 | ||
b018ddf6 PB |
1093 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
1094 | unsigned size) | |
1095 | { | |
1096 | #ifdef DEBUG_UNASSIGNED | |
1097 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
1098 | #endif | |
4917cf44 AF |
1099 | if (current_cpu != NULL) { |
1100 | cpu_unassigned_access(current_cpu, addr, false, false, 0, size); | |
c658b94f | 1101 | } |
68a7439a | 1102 | return 0; |
b018ddf6 PB |
1103 | } |
1104 | ||
1105 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
1106 | uint64_t val, unsigned size) | |
1107 | { | |
1108 | #ifdef DEBUG_UNASSIGNED | |
1109 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
1110 | #endif | |
4917cf44 AF |
1111 | if (current_cpu != NULL) { |
1112 | cpu_unassigned_access(current_cpu, addr, true, false, 0, size); | |
c658b94f | 1113 | } |
b018ddf6 PB |
1114 | } |
1115 | ||
d197063f PB |
1116 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
1117 | unsigned size, bool is_write) | |
1118 | { | |
1119 | return false; | |
1120 | } | |
1121 | ||
1122 | const MemoryRegionOps unassigned_mem_ops = { | |
1123 | .valid.accepts = unassigned_mem_accepts, | |
1124 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1125 | }; | |
1126 | ||
4a2e242b AW |
1127 | static uint64_t memory_region_ram_device_read(void *opaque, |
1128 | hwaddr addr, unsigned size) | |
1129 | { | |
1130 | MemoryRegion *mr = opaque; | |
1131 | uint64_t data = (uint64_t)~0; | |
1132 | ||
1133 | switch (size) { | |
1134 | case 1: | |
1135 | data = *(uint8_t *)(mr->ram_block->host + addr); | |
1136 | break; | |
1137 | case 2: | |
1138 | data = *(uint16_t *)(mr->ram_block->host + addr); | |
1139 | break; | |
1140 | case 4: | |
1141 | data = *(uint32_t *)(mr->ram_block->host + addr); | |
1142 | break; | |
1143 | case 8: | |
1144 | data = *(uint64_t *)(mr->ram_block->host + addr); | |
1145 | break; | |
1146 | } | |
1147 | ||
1148 | trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size); | |
1149 | ||
1150 | return data; | |
1151 | } | |
1152 | ||
1153 | static void memory_region_ram_device_write(void *opaque, hwaddr addr, | |
1154 | uint64_t data, unsigned size) | |
1155 | { | |
1156 | MemoryRegion *mr = opaque; | |
1157 | ||
1158 | trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size); | |
1159 | ||
1160 | switch (size) { | |
1161 | case 1: | |
1162 | *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data; | |
1163 | break; | |
1164 | case 2: | |
1165 | *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data; | |
1166 | break; | |
1167 | case 4: | |
1168 | *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data; | |
1169 | break; | |
1170 | case 8: | |
1171 | *(uint64_t *)(mr->ram_block->host + addr) = data; | |
1172 | break; | |
1173 | } | |
1174 | } | |
1175 | ||
1176 | static const MemoryRegionOps ram_device_mem_ops = { | |
1177 | .read = memory_region_ram_device_read, | |
1178 | .write = memory_region_ram_device_write, | |
c99a29e7 | 1179 | .endianness = DEVICE_HOST_ENDIAN, |
4a2e242b AW |
1180 | .valid = { |
1181 | .min_access_size = 1, | |
1182 | .max_access_size = 8, | |
1183 | .unaligned = true, | |
1184 | }, | |
1185 | .impl = { | |
1186 | .min_access_size = 1, | |
1187 | .max_access_size = 8, | |
1188 | .unaligned = true, | |
1189 | }, | |
1190 | }; | |
1191 | ||
d2702032 PB |
1192 | bool memory_region_access_valid(MemoryRegion *mr, |
1193 | hwaddr addr, | |
1194 | unsigned size, | |
1195 | bool is_write) | |
093bc2cd | 1196 | { |
a014ed07 PB |
1197 | int access_size_min, access_size_max; |
1198 | int access_size, i; | |
897fa7cf | 1199 | |
093bc2cd AK |
1200 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
1201 | return false; | |
1202 | } | |
1203 | ||
a014ed07 | 1204 | if (!mr->ops->valid.accepts) { |
093bc2cd AK |
1205 | return true; |
1206 | } | |
1207 | ||
a014ed07 PB |
1208 | access_size_min = mr->ops->valid.min_access_size; |
1209 | if (!mr->ops->valid.min_access_size) { | |
1210 | access_size_min = 1; | |
1211 | } | |
1212 | ||
1213 | access_size_max = mr->ops->valid.max_access_size; | |
1214 | if (!mr->ops->valid.max_access_size) { | |
1215 | access_size_max = 4; | |
1216 | } | |
1217 | ||
1218 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
1219 | for (i = 0; i < size; i += access_size) { | |
1220 | if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, | |
1221 | is_write)) { | |
1222 | return false; | |
1223 | } | |
093bc2cd | 1224 | } |
a014ed07 | 1225 | |
093bc2cd AK |
1226 | return true; |
1227 | } | |
1228 | ||
cc05c43a PM |
1229 | static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr, |
1230 | hwaddr addr, | |
1231 | uint64_t *pval, | |
1232 | unsigned size, | |
1233 | MemTxAttrs attrs) | |
093bc2cd | 1234 | { |
cc05c43a | 1235 | *pval = 0; |
093bc2cd | 1236 | |
ce5d2f33 | 1237 | if (mr->ops->read) { |
cc05c43a PM |
1238 | return access_with_adjusted_size(addr, pval, size, |
1239 | mr->ops->impl.min_access_size, | |
1240 | mr->ops->impl.max_access_size, | |
1241 | memory_region_read_accessor, | |
1242 | mr, attrs); | |
1243 | } else if (mr->ops->read_with_attrs) { | |
1244 | return access_with_adjusted_size(addr, pval, size, | |
1245 | mr->ops->impl.min_access_size, | |
1246 | mr->ops->impl.max_access_size, | |
1247 | memory_region_read_with_attrs_accessor, | |
1248 | mr, attrs); | |
ce5d2f33 | 1249 | } else { |
cc05c43a PM |
1250 | return access_with_adjusted_size(addr, pval, size, 1, 4, |
1251 | memory_region_oldmmio_read_accessor, | |
1252 | mr, attrs); | |
74901c3b | 1253 | } |
093bc2cd AK |
1254 | } |
1255 | ||
3b643495 PM |
1256 | MemTxResult memory_region_dispatch_read(MemoryRegion *mr, |
1257 | hwaddr addr, | |
1258 | uint64_t *pval, | |
1259 | unsigned size, | |
1260 | MemTxAttrs attrs) | |
a621f38d | 1261 | { |
cc05c43a PM |
1262 | MemTxResult r; |
1263 | ||
791af8c8 PB |
1264 | if (!memory_region_access_valid(mr, addr, size, false)) { |
1265 | *pval = unassigned_mem_read(mr, addr, size); | |
cc05c43a | 1266 | return MEMTX_DECODE_ERROR; |
791af8c8 | 1267 | } |
a621f38d | 1268 | |
cc05c43a | 1269 | r = memory_region_dispatch_read1(mr, addr, pval, size, attrs); |
791af8c8 | 1270 | adjust_endianness(mr, pval, size); |
cc05c43a | 1271 | return r; |
a621f38d | 1272 | } |
093bc2cd | 1273 | |
8c56c1a5 PF |
1274 | /* Return true if an eventfd was signalled */ |
1275 | static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr, | |
1276 | hwaddr addr, | |
1277 | uint64_t data, | |
1278 | unsigned size, | |
1279 | MemTxAttrs attrs) | |
1280 | { | |
1281 | MemoryRegionIoeventfd ioeventfd = { | |
1282 | .addr = addrrange_make(int128_make64(addr), int128_make64(size)), | |
1283 | .data = data, | |
1284 | }; | |
1285 | unsigned i; | |
1286 | ||
1287 | for (i = 0; i < mr->ioeventfd_nb; i++) { | |
1288 | ioeventfd.match_data = mr->ioeventfds[i].match_data; | |
1289 | ioeventfd.e = mr->ioeventfds[i].e; | |
1290 | ||
1291 | if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) { | |
1292 | event_notifier_set(ioeventfd.e); | |
1293 | return true; | |
1294 | } | |
1295 | } | |
1296 | ||
1297 | return false; | |
1298 | } | |
1299 | ||
3b643495 PM |
1300 | MemTxResult memory_region_dispatch_write(MemoryRegion *mr, |
1301 | hwaddr addr, | |
1302 | uint64_t data, | |
1303 | unsigned size, | |
1304 | MemTxAttrs attrs) | |
a621f38d | 1305 | { |
897fa7cf | 1306 | if (!memory_region_access_valid(mr, addr, size, true)) { |
b018ddf6 | 1307 | unassigned_mem_write(mr, addr, data, size); |
cc05c43a | 1308 | return MEMTX_DECODE_ERROR; |
093bc2cd AK |
1309 | } |
1310 | ||
a621f38d AK |
1311 | adjust_endianness(mr, &data, size); |
1312 | ||
8c56c1a5 PF |
1313 | if ((!kvm_eventfds_enabled()) && |
1314 | memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) { | |
1315 | return MEMTX_OK; | |
1316 | } | |
1317 | ||
ce5d2f33 | 1318 | if (mr->ops->write) { |
cc05c43a PM |
1319 | return access_with_adjusted_size(addr, &data, size, |
1320 | mr->ops->impl.min_access_size, | |
1321 | mr->ops->impl.max_access_size, | |
1322 | memory_region_write_accessor, mr, | |
1323 | attrs); | |
1324 | } else if (mr->ops->write_with_attrs) { | |
1325 | return | |
1326 | access_with_adjusted_size(addr, &data, size, | |
1327 | mr->ops->impl.min_access_size, | |
1328 | mr->ops->impl.max_access_size, | |
1329 | memory_region_write_with_attrs_accessor, | |
1330 | mr, attrs); | |
ce5d2f33 | 1331 | } else { |
cc05c43a PM |
1332 | return access_with_adjusted_size(addr, &data, size, 1, 4, |
1333 | memory_region_oldmmio_write_accessor, | |
1334 | mr, attrs); | |
74901c3b | 1335 | } |
093bc2cd AK |
1336 | } |
1337 | ||
093bc2cd | 1338 | void memory_region_init_io(MemoryRegion *mr, |
2c9b15ca | 1339 | Object *owner, |
093bc2cd AK |
1340 | const MemoryRegionOps *ops, |
1341 | void *opaque, | |
1342 | const char *name, | |
1343 | uint64_t size) | |
1344 | { | |
2c9b15ca | 1345 | memory_region_init(mr, owner, name, size); |
6d6d2abf | 1346 | mr->ops = ops ? ops : &unassigned_mem_ops; |
093bc2cd | 1347 | mr->opaque = opaque; |
14a3c10a | 1348 | mr->terminates = true; |
093bc2cd AK |
1349 | } |
1350 | ||
1351 | void memory_region_init_ram(MemoryRegion *mr, | |
2c9b15ca | 1352 | Object *owner, |
093bc2cd | 1353 | const char *name, |
49946538 HT |
1354 | uint64_t size, |
1355 | Error **errp) | |
093bc2cd | 1356 | { |
2c9b15ca | 1357 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1358 | mr->ram = true; |
14a3c10a | 1359 | mr->terminates = true; |
545e92e0 | 1360 | mr->destructor = memory_region_destructor_ram; |
8e41fb63 | 1361 | mr->ram_block = qemu_ram_alloc(size, mr, errp); |
677e7805 | 1362 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
0b183fc8 PB |
1363 | } |
1364 | ||
60786ef3 MT |
1365 | void memory_region_init_resizeable_ram(MemoryRegion *mr, |
1366 | Object *owner, | |
1367 | const char *name, | |
1368 | uint64_t size, | |
1369 | uint64_t max_size, | |
1370 | void (*resized)(const char*, | |
1371 | uint64_t length, | |
1372 | void *host), | |
1373 | Error **errp) | |
1374 | { | |
1375 | memory_region_init(mr, owner, name, size); | |
1376 | mr->ram = true; | |
1377 | mr->terminates = true; | |
1378 | mr->destructor = memory_region_destructor_ram; | |
8e41fb63 FZ |
1379 | mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized, |
1380 | mr, errp); | |
677e7805 | 1381 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
60786ef3 MT |
1382 | } |
1383 | ||
0b183fc8 PB |
1384 | #ifdef __linux__ |
1385 | void memory_region_init_ram_from_file(MemoryRegion *mr, | |
1386 | struct Object *owner, | |
1387 | const char *name, | |
1388 | uint64_t size, | |
dbcb8981 | 1389 | bool share, |
7f56e740 PB |
1390 | const char *path, |
1391 | Error **errp) | |
0b183fc8 PB |
1392 | { |
1393 | memory_region_init(mr, owner, name, size); | |
1394 | mr->ram = true; | |
1395 | mr->terminates = true; | |
1396 | mr->destructor = memory_region_destructor_ram; | |
8e41fb63 | 1397 | mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp); |
677e7805 | 1398 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
093bc2cd | 1399 | } |
0b183fc8 | 1400 | #endif |
093bc2cd AK |
1401 | |
1402 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
2c9b15ca | 1403 | Object *owner, |
093bc2cd AK |
1404 | const char *name, |
1405 | uint64_t size, | |
1406 | void *ptr) | |
1407 | { | |
2c9b15ca | 1408 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1409 | mr->ram = true; |
14a3c10a | 1410 | mr->terminates = true; |
fc3e7665 | 1411 | mr->destructor = memory_region_destructor_ram; |
677e7805 | 1412 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
ef701d7b HT |
1413 | |
1414 | /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */ | |
1415 | assert(ptr != NULL); | |
8e41fb63 | 1416 | mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal); |
093bc2cd AK |
1417 | } |
1418 | ||
21e00fa5 AW |
1419 | void memory_region_init_ram_device_ptr(MemoryRegion *mr, |
1420 | Object *owner, | |
1421 | const char *name, | |
1422 | uint64_t size, | |
1423 | void *ptr) | |
e4dc3f59 | 1424 | { |
21e00fa5 AW |
1425 | memory_region_init_ram_ptr(mr, owner, name, size, ptr); |
1426 | mr->ram_device = true; | |
4a2e242b AW |
1427 | mr->ops = &ram_device_mem_ops; |
1428 | mr->opaque = mr; | |
e4dc3f59 ND |
1429 | } |
1430 | ||
093bc2cd | 1431 | void memory_region_init_alias(MemoryRegion *mr, |
2c9b15ca | 1432 | Object *owner, |
093bc2cd AK |
1433 | const char *name, |
1434 | MemoryRegion *orig, | |
a8170e5e | 1435 | hwaddr offset, |
093bc2cd AK |
1436 | uint64_t size) |
1437 | { | |
2c9b15ca | 1438 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
1439 | mr->alias = orig; |
1440 | mr->alias_offset = offset; | |
1441 | } | |
1442 | ||
a1777f7f PM |
1443 | void memory_region_init_rom(MemoryRegion *mr, |
1444 | struct Object *owner, | |
1445 | const char *name, | |
1446 | uint64_t size, | |
1447 | Error **errp) | |
1448 | { | |
1449 | memory_region_init(mr, owner, name, size); | |
1450 | mr->ram = true; | |
1451 | mr->readonly = true; | |
1452 | mr->terminates = true; | |
1453 | mr->destructor = memory_region_destructor_ram; | |
1454 | mr->ram_block = qemu_ram_alloc(size, mr, errp); | |
1455 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; | |
1456 | } | |
1457 | ||
d0a9b5bc | 1458 | void memory_region_init_rom_device(MemoryRegion *mr, |
2c9b15ca | 1459 | Object *owner, |
d0a9b5bc | 1460 | const MemoryRegionOps *ops, |
75f5941c | 1461 | void *opaque, |
d0a9b5bc | 1462 | const char *name, |
33e0eb52 HT |
1463 | uint64_t size, |
1464 | Error **errp) | |
d0a9b5bc | 1465 | { |
39e0b03d | 1466 | assert(ops); |
2c9b15ca | 1467 | memory_region_init(mr, owner, name, size); |
7bc2b9cd | 1468 | mr->ops = ops; |
75f5941c | 1469 | mr->opaque = opaque; |
d0a9b5bc | 1470 | mr->terminates = true; |
75c578dc | 1471 | mr->rom_device = true; |
58268c8d | 1472 | mr->destructor = memory_region_destructor_ram; |
8e41fb63 | 1473 | mr->ram_block = qemu_ram_alloc(size, mr, errp); |
d0a9b5bc AK |
1474 | } |
1475 | ||
30951157 | 1476 | void memory_region_init_iommu(MemoryRegion *mr, |
2c9b15ca | 1477 | Object *owner, |
30951157 AK |
1478 | const MemoryRegionIOMMUOps *ops, |
1479 | const char *name, | |
1480 | uint64_t size) | |
1481 | { | |
2c9b15ca | 1482 | memory_region_init(mr, owner, name, size); |
30951157 AK |
1483 | mr->iommu_ops = ops, |
1484 | mr->terminates = true; /* then re-forwards */ | |
cdb30812 | 1485 | QLIST_INIT(&mr->iommu_notify); |
5bf3d319 | 1486 | mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE; |
30951157 AK |
1487 | } |
1488 | ||
b4fefef9 | 1489 | static void memory_region_finalize(Object *obj) |
093bc2cd | 1490 | { |
b4fefef9 PC |
1491 | MemoryRegion *mr = MEMORY_REGION(obj); |
1492 | ||
2e2b8eb7 PB |
1493 | assert(!mr->container); |
1494 | ||
1495 | /* We know the region is not visible in any address space (it | |
1496 | * does not have a container and cannot be a root either because | |
1497 | * it has no references, so we can blindly clear mr->enabled. | |
1498 | * memory_region_set_enabled instead could trigger a transaction | |
1499 | * and cause an infinite loop. | |
1500 | */ | |
1501 | mr->enabled = false; | |
1502 | memory_region_transaction_begin(); | |
1503 | while (!QTAILQ_EMPTY(&mr->subregions)) { | |
1504 | MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions); | |
1505 | memory_region_del_subregion(mr, subregion); | |
1506 | } | |
1507 | memory_region_transaction_commit(); | |
1508 | ||
545e92e0 | 1509 | mr->destructor(mr); |
093bc2cd | 1510 | memory_region_clear_coalescing(mr); |
302fa283 | 1511 | g_free((char *)mr->name); |
7267c094 | 1512 | g_free(mr->ioeventfds); |
093bc2cd AK |
1513 | } |
1514 | ||
803c0816 PB |
1515 | Object *memory_region_owner(MemoryRegion *mr) |
1516 | { | |
22a893e4 PB |
1517 | Object *obj = OBJECT(mr); |
1518 | return obj->parent; | |
803c0816 PB |
1519 | } |
1520 | ||
46637be2 PB |
1521 | void memory_region_ref(MemoryRegion *mr) |
1522 | { | |
22a893e4 PB |
1523 | /* MMIO callbacks most likely will access data that belongs |
1524 | * to the owner, hence the need to ref/unref the owner whenever | |
1525 | * the memory region is in use. | |
1526 | * | |
1527 | * The memory region is a child of its owner. As long as the | |
1528 | * owner doesn't call unparent itself on the memory region, | |
1529 | * ref-ing the owner will also keep the memory region alive. | |
612263cf PB |
1530 | * Memory regions without an owner are supposed to never go away; |
1531 | * we do not ref/unref them because it slows down DMA sensibly. | |
22a893e4 | 1532 | */ |
612263cf PB |
1533 | if (mr && mr->owner) { |
1534 | object_ref(mr->owner); | |
46637be2 PB |
1535 | } |
1536 | } | |
1537 | ||
1538 | void memory_region_unref(MemoryRegion *mr) | |
1539 | { | |
612263cf PB |
1540 | if (mr && mr->owner) { |
1541 | object_unref(mr->owner); | |
46637be2 PB |
1542 | } |
1543 | } | |
1544 | ||
093bc2cd AK |
1545 | uint64_t memory_region_size(MemoryRegion *mr) |
1546 | { | |
08dafab4 AK |
1547 | if (int128_eq(mr->size, int128_2_64())) { |
1548 | return UINT64_MAX; | |
1549 | } | |
1550 | return int128_get64(mr->size); | |
093bc2cd AK |
1551 | } |
1552 | ||
5d546d4b | 1553 | const char *memory_region_name(const MemoryRegion *mr) |
8991c79b | 1554 | { |
d1dd32af PC |
1555 | if (!mr->name) { |
1556 | ((MemoryRegion *)mr)->name = | |
1557 | object_get_canonical_path_component(OBJECT(mr)); | |
1558 | } | |
302fa283 | 1559 | return mr->name; |
8991c79b AK |
1560 | } |
1561 | ||
21e00fa5 | 1562 | bool memory_region_is_ram_device(MemoryRegion *mr) |
e4dc3f59 | 1563 | { |
21e00fa5 | 1564 | return mr->ram_device; |
e4dc3f59 ND |
1565 | } |
1566 | ||
2d1a35be | 1567 | uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr) |
55043ba3 | 1568 | { |
6f6a5ef3 | 1569 | uint8_t mask = mr->dirty_log_mask; |
adaad61c | 1570 | if (global_dirty_log && mr->ram_block) { |
6f6a5ef3 PB |
1571 | mask |= (1 << DIRTY_MEMORY_MIGRATION); |
1572 | } | |
1573 | return mask; | |
55043ba3 AK |
1574 | } |
1575 | ||
2d1a35be PB |
1576 | bool memory_region_is_logging(MemoryRegion *mr, uint8_t client) |
1577 | { | |
1578 | return memory_region_get_dirty_log_mask(mr) & (1 << client); | |
1579 | } | |
1580 | ||
5bf3d319 PX |
1581 | static void memory_region_update_iommu_notify_flags(MemoryRegion *mr) |
1582 | { | |
1583 | IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE; | |
1584 | IOMMUNotifier *iommu_notifier; | |
1585 | ||
512fa408 | 1586 | IOMMU_NOTIFIER_FOREACH(iommu_notifier, mr) { |
5bf3d319 PX |
1587 | flags |= iommu_notifier->notifier_flags; |
1588 | } | |
1589 | ||
1590 | if (flags != mr->iommu_notify_flags && | |
1591 | mr->iommu_ops->notify_flag_changed) { | |
1592 | mr->iommu_ops->notify_flag_changed(mr, mr->iommu_notify_flags, | |
1593 | flags); | |
1594 | } | |
1595 | ||
1596 | mr->iommu_notify_flags = flags; | |
1597 | } | |
1598 | ||
cdb30812 PX |
1599 | void memory_region_register_iommu_notifier(MemoryRegion *mr, |
1600 | IOMMUNotifier *n) | |
06866575 | 1601 | { |
efcd38c5 JW |
1602 | if (mr->alias) { |
1603 | memory_region_register_iommu_notifier(mr->alias, n); | |
1604 | return; | |
1605 | } | |
1606 | ||
cdb30812 PX |
1607 | /* We need to register for at least one bitfield */ |
1608 | assert(n->notifier_flags != IOMMU_NOTIFIER_NONE); | |
698feb5e | 1609 | assert(n->start <= n->end); |
cdb30812 | 1610 | QLIST_INSERT_HEAD(&mr->iommu_notify, n, node); |
5bf3d319 | 1611 | memory_region_update_iommu_notify_flags(mr); |
06866575 DG |
1612 | } |
1613 | ||
f682e9c2 | 1614 | uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr) |
a788f227 | 1615 | { |
f682e9c2 AK |
1616 | assert(memory_region_is_iommu(mr)); |
1617 | if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) { | |
1618 | return mr->iommu_ops->get_min_page_size(mr); | |
1619 | } | |
1620 | return TARGET_PAGE_SIZE; | |
1621 | } | |
1622 | ||
ad523590 | 1623 | void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n) |
f682e9c2 AK |
1624 | { |
1625 | hwaddr addr, granularity; | |
a788f227 DG |
1626 | IOMMUTLBEntry iotlb; |
1627 | ||
faa362e3 PX |
1628 | /* If the IOMMU has its own replay callback, override */ |
1629 | if (mr->iommu_ops->replay) { | |
1630 | mr->iommu_ops->replay(mr, n); | |
1631 | return; | |
1632 | } | |
1633 | ||
f682e9c2 AK |
1634 | granularity = memory_region_iommu_get_min_page_size(mr); |
1635 | ||
a788f227 | 1636 | for (addr = 0; addr < memory_region_size(mr); addr += granularity) { |
ad523590 | 1637 | iotlb = mr->iommu_ops->translate(mr, addr, IOMMU_NONE); |
a788f227 DG |
1638 | if (iotlb.perm != IOMMU_NONE) { |
1639 | n->notify(n, &iotlb); | |
1640 | } | |
1641 | ||
1642 | /* if (2^64 - MR size) < granularity, it's possible to get an | |
1643 | * infinite loop here. This should catch such a wraparound */ | |
1644 | if ((addr + granularity) < addr) { | |
1645 | break; | |
1646 | } | |
1647 | } | |
1648 | } | |
1649 | ||
de472e4a PX |
1650 | void memory_region_iommu_replay_all(MemoryRegion *mr) |
1651 | { | |
1652 | IOMMUNotifier *notifier; | |
1653 | ||
1654 | IOMMU_NOTIFIER_FOREACH(notifier, mr) { | |
ad523590 | 1655 | memory_region_iommu_replay(mr, notifier); |
de472e4a PX |
1656 | } |
1657 | } | |
1658 | ||
cdb30812 PX |
1659 | void memory_region_unregister_iommu_notifier(MemoryRegion *mr, |
1660 | IOMMUNotifier *n) | |
06866575 | 1661 | { |
efcd38c5 JW |
1662 | if (mr->alias) { |
1663 | memory_region_unregister_iommu_notifier(mr->alias, n); | |
1664 | return; | |
1665 | } | |
cdb30812 | 1666 | QLIST_REMOVE(n, node); |
5bf3d319 | 1667 | memory_region_update_iommu_notify_flags(mr); |
06866575 DG |
1668 | } |
1669 | ||
bd2bfa4c PX |
1670 | void memory_region_notify_one(IOMMUNotifier *notifier, |
1671 | IOMMUTLBEntry *entry) | |
06866575 | 1672 | { |
cdb30812 PX |
1673 | IOMMUNotifierFlag request_flags; |
1674 | ||
bd2bfa4c PX |
1675 | /* |
1676 | * Skip the notification if the notification does not overlap | |
1677 | * with registered range. | |
1678 | */ | |
1679 | if (notifier->start > entry->iova + entry->addr_mask + 1 || | |
1680 | notifier->end < entry->iova) { | |
1681 | return; | |
1682 | } | |
cdb30812 | 1683 | |
bd2bfa4c | 1684 | if (entry->perm & IOMMU_RW) { |
cdb30812 PX |
1685 | request_flags = IOMMU_NOTIFIER_MAP; |
1686 | } else { | |
1687 | request_flags = IOMMU_NOTIFIER_UNMAP; | |
1688 | } | |
1689 | ||
bd2bfa4c PX |
1690 | if (notifier->notifier_flags & request_flags) { |
1691 | notifier->notify(notifier, entry); | |
1692 | } | |
1693 | } | |
1694 | ||
1695 | void memory_region_notify_iommu(MemoryRegion *mr, | |
1696 | IOMMUTLBEntry entry) | |
1697 | { | |
1698 | IOMMUNotifier *iommu_notifier; | |
1699 | ||
1700 | assert(memory_region_is_iommu(mr)); | |
1701 | ||
512fa408 | 1702 | IOMMU_NOTIFIER_FOREACH(iommu_notifier, mr) { |
bd2bfa4c | 1703 | memory_region_notify_one(iommu_notifier, &entry); |
cdb30812 | 1704 | } |
06866575 DG |
1705 | } |
1706 | ||
093bc2cd AK |
1707 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1708 | { | |
5a583347 | 1709 | uint8_t mask = 1 << client; |
deb809ed | 1710 | uint8_t old_logging; |
5a583347 | 1711 | |
dbddac6d | 1712 | assert(client == DIRTY_MEMORY_VGA); |
deb809ed PB |
1713 | old_logging = mr->vga_logging_count; |
1714 | mr->vga_logging_count += log ? 1 : -1; | |
1715 | if (!!old_logging == !!mr->vga_logging_count) { | |
1716 | return; | |
1717 | } | |
1718 | ||
59023ef4 | 1719 | memory_region_transaction_begin(); |
5a583347 | 1720 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 1721 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1722 | memory_region_transaction_commit(); |
093bc2cd AK |
1723 | } |
1724 | ||
a8170e5e AK |
1725 | bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr, |
1726 | hwaddr size, unsigned client) | |
093bc2cd | 1727 | { |
8e41fb63 FZ |
1728 | assert(mr->ram_block); |
1729 | return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr, | |
1730 | size, client); | |
093bc2cd AK |
1731 | } |
1732 | ||
a8170e5e AK |
1733 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
1734 | hwaddr size) | |
093bc2cd | 1735 | { |
8e41fb63 FZ |
1736 | assert(mr->ram_block); |
1737 | cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr, | |
1738 | size, | |
58d2707e | 1739 | memory_region_get_dirty_log_mask(mr)); |
093bc2cd AK |
1740 | } |
1741 | ||
6c279db8 JQ |
1742 | bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr, |
1743 | hwaddr size, unsigned client) | |
1744 | { | |
8e41fb63 FZ |
1745 | assert(mr->ram_block); |
1746 | return cpu_physical_memory_test_and_clear_dirty( | |
1747 | memory_region_get_ram_addr(mr) + addr, size, client); | |
6c279db8 JQ |
1748 | } |
1749 | ||
8deaf12c GH |
1750 | DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr, |
1751 | hwaddr addr, | |
1752 | hwaddr size, | |
1753 | unsigned client) | |
1754 | { | |
1755 | assert(mr->ram_block); | |
1756 | return cpu_physical_memory_snapshot_and_clear_dirty( | |
1757 | memory_region_get_ram_addr(mr) + addr, size, client); | |
1758 | } | |
1759 | ||
1760 | bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap, | |
1761 | hwaddr addr, hwaddr size) | |
1762 | { | |
1763 | assert(mr->ram_block); | |
1764 | return cpu_physical_memory_snapshot_get_dirty(snap, | |
1765 | memory_region_get_ram_addr(mr) + addr, size); | |
1766 | } | |
6c279db8 | 1767 | |
093bc2cd AK |
1768 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
1769 | { | |
0a752eee | 1770 | MemoryListener *listener; |
0d673e36 | 1771 | AddressSpace *as; |
0a752eee | 1772 | FlatView *view; |
5a583347 AK |
1773 | FlatRange *fr; |
1774 | ||
0a752eee PB |
1775 | /* If the same address space has multiple log_sync listeners, we |
1776 | * visit that address space's FlatView multiple times. But because | |
1777 | * log_sync listeners are rare, it's still cheaper than walking each | |
1778 | * address space once. | |
1779 | */ | |
1780 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
1781 | if (!listener->log_sync) { | |
1782 | continue; | |
1783 | } | |
1784 | as = listener->address_space; | |
1785 | view = address_space_get_flatview(as); | |
99e86347 | 1786 | FOR_EACH_FLAT_RANGE(fr, view) { |
0d673e36 | 1787 | if (fr->mr == mr) { |
0a752eee PB |
1788 | MemoryRegionSection mrs = section_from_flat_range(fr, as); |
1789 | listener->log_sync(listener, &mrs); | |
0d673e36 | 1790 | } |
5a583347 | 1791 | } |
856d7245 | 1792 | flatview_unref(view); |
5a583347 | 1793 | } |
093bc2cd AK |
1794 | } |
1795 | ||
1796 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1797 | { | |
fb1cd6f9 | 1798 | if (mr->readonly != readonly) { |
59023ef4 | 1799 | memory_region_transaction_begin(); |
fb1cd6f9 | 1800 | mr->readonly = readonly; |
22bde714 | 1801 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1802 | memory_region_transaction_commit(); |
fb1cd6f9 | 1803 | } |
093bc2cd AK |
1804 | } |
1805 | ||
5f9a5ea1 | 1806 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 1807 | { |
5f9a5ea1 | 1808 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 1809 | memory_region_transaction_begin(); |
5f9a5ea1 | 1810 | mr->romd_mode = romd_mode; |
22bde714 | 1811 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1812 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1813 | } |
1814 | } | |
1815 | ||
a8170e5e AK |
1816 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
1817 | hwaddr size, unsigned client) | |
093bc2cd | 1818 | { |
8e41fb63 FZ |
1819 | assert(mr->ram_block); |
1820 | cpu_physical_memory_test_and_clear_dirty( | |
1821 | memory_region_get_ram_addr(mr) + addr, size, client); | |
093bc2cd AK |
1822 | } |
1823 | ||
a35ba7be PB |
1824 | int memory_region_get_fd(MemoryRegion *mr) |
1825 | { | |
4ff87573 PB |
1826 | int fd; |
1827 | ||
1828 | rcu_read_lock(); | |
1829 | while (mr->alias) { | |
1830 | mr = mr->alias; | |
a35ba7be | 1831 | } |
4ff87573 PB |
1832 | fd = mr->ram_block->fd; |
1833 | rcu_read_unlock(); | |
a35ba7be | 1834 | |
4ff87573 PB |
1835 | return fd; |
1836 | } | |
a35ba7be | 1837 | |
4ff87573 PB |
1838 | void memory_region_set_fd(MemoryRegion *mr, int fd) |
1839 | { | |
1840 | rcu_read_lock(); | |
1841 | while (mr->alias) { | |
1842 | mr = mr->alias; | |
1843 | } | |
1844 | mr->ram_block->fd = fd; | |
1845 | rcu_read_unlock(); | |
a35ba7be PB |
1846 | } |
1847 | ||
093bc2cd AK |
1848 | void *memory_region_get_ram_ptr(MemoryRegion *mr) |
1849 | { | |
49b24afc PB |
1850 | void *ptr; |
1851 | uint64_t offset = 0; | |
093bc2cd | 1852 | |
49b24afc PB |
1853 | rcu_read_lock(); |
1854 | while (mr->alias) { | |
1855 | offset += mr->alias_offset; | |
1856 | mr = mr->alias; | |
1857 | } | |
8e41fb63 | 1858 | assert(mr->ram_block); |
0878d0e1 | 1859 | ptr = qemu_map_ram_ptr(mr->ram_block, offset); |
49b24afc | 1860 | rcu_read_unlock(); |
093bc2cd | 1861 | |
0878d0e1 | 1862 | return ptr; |
093bc2cd AK |
1863 | } |
1864 | ||
07bdaa41 PB |
1865 | MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset) |
1866 | { | |
1867 | RAMBlock *block; | |
1868 | ||
1869 | block = qemu_ram_block_from_host(ptr, false, offset); | |
1870 | if (!block) { | |
1871 | return NULL; | |
1872 | } | |
1873 | ||
1874 | return block->mr; | |
1875 | } | |
1876 | ||
7ebb2745 FZ |
1877 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1878 | { | |
1879 | return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID; | |
1880 | } | |
1881 | ||
37d7c084 PB |
1882 | void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp) |
1883 | { | |
8e41fb63 | 1884 | assert(mr->ram_block); |
37d7c084 | 1885 | |
fa53a0e5 | 1886 | qemu_ram_resize(mr->ram_block, newsize, errp); |
37d7c084 PB |
1887 | } |
1888 | ||
0d673e36 | 1889 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
093bc2cd | 1890 | { |
99e86347 | 1891 | FlatView *view; |
093bc2cd AK |
1892 | FlatRange *fr; |
1893 | CoalescedMemoryRange *cmr; | |
1894 | AddrRange tmp; | |
95d2994a | 1895 | MemoryRegionSection section; |
093bc2cd | 1896 | |
856d7245 | 1897 | view = address_space_get_flatview(as); |
99e86347 | 1898 | FOR_EACH_FLAT_RANGE(fr, view) { |
093bc2cd | 1899 | if (fr->mr == mr) { |
95d2994a | 1900 | section = (MemoryRegionSection) { |
f6790af6 | 1901 | .address_space = as, |
95d2994a | 1902 | .offset_within_address_space = int128_get64(fr->addr.start), |
052e87b0 | 1903 | .size = fr->addr.size, |
95d2994a AK |
1904 | }; |
1905 | ||
9a54635d | 1906 | MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, §ion, |
95d2994a AK |
1907 | int128_get64(fr->addr.start), |
1908 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1909 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1910 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1911 | int128_sub(fr->addr.start, |
1912 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1913 | if (!addrrange_intersects(tmp, fr->addr)) { |
1914 | continue; | |
1915 | } | |
1916 | tmp = addrrange_intersection(tmp, fr->addr); | |
9a54635d | 1917 | MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, §ion, |
95d2994a AK |
1918 | int128_get64(tmp.start), |
1919 | int128_get64(tmp.size)); | |
093bc2cd AK |
1920 | } |
1921 | } | |
1922 | } | |
856d7245 | 1923 | flatview_unref(view); |
093bc2cd AK |
1924 | } |
1925 | ||
0d673e36 AK |
1926 | static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1927 | { | |
1928 | AddressSpace *as; | |
1929 | ||
1930 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1931 | memory_region_update_coalesced_range_as(mr, as); | |
1932 | } | |
1933 | } | |
1934 | ||
093bc2cd AK |
1935 | void memory_region_set_coalescing(MemoryRegion *mr) |
1936 | { | |
1937 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1938 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1939 | } |
1940 | ||
1941 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 1942 | hwaddr offset, |
093bc2cd AK |
1943 | uint64_t size) |
1944 | { | |
7267c094 | 1945 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1946 | |
08dafab4 | 1947 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1948 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1949 | memory_region_update_coalesced_range(mr); | |
d410515e | 1950 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1951 | } |
1952 | ||
1953 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1954 | { | |
1955 | CoalescedMemoryRange *cmr; | |
ab5b3db5 | 1956 | bool updated = false; |
093bc2cd | 1957 | |
d410515e JK |
1958 | qemu_flush_coalesced_mmio_buffer(); |
1959 | mr->flush_coalesced_mmio = false; | |
1960 | ||
093bc2cd AK |
1961 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1962 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1963 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1964 | g_free(cmr); |
ab5b3db5 FZ |
1965 | updated = true; |
1966 | } | |
1967 | ||
1968 | if (updated) { | |
1969 | memory_region_update_coalesced_range(mr); | |
093bc2cd | 1970 | } |
093bc2cd AK |
1971 | } |
1972 | ||
d410515e JK |
1973 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1974 | { | |
1975 | mr->flush_coalesced_mmio = true; | |
1976 | } | |
1977 | ||
1978 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1979 | { | |
1980 | qemu_flush_coalesced_mmio_buffer(); | |
1981 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1982 | mr->flush_coalesced_mmio = false; | |
1983 | } | |
1984 | } | |
1985 | ||
196ea131 JK |
1986 | void memory_region_set_global_locking(MemoryRegion *mr) |
1987 | { | |
1988 | mr->global_locking = true; | |
1989 | } | |
1990 | ||
1991 | void memory_region_clear_global_locking(MemoryRegion *mr) | |
1992 | { | |
1993 | mr->global_locking = false; | |
1994 | } | |
1995 | ||
8c56c1a5 PF |
1996 | static bool userspace_eventfd_warning; |
1997 | ||
3e9d69e7 | 1998 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 1999 | hwaddr addr, |
3e9d69e7 AK |
2000 | unsigned size, |
2001 | bool match_data, | |
2002 | uint64_t data, | |
753d5e14 | 2003 | EventNotifier *e) |
3e9d69e7 AK |
2004 | { |
2005 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
2006 | .addr.start = int128_make64(addr), |
2007 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
2008 | .match_data = match_data, |
2009 | .data = data, | |
753d5e14 | 2010 | .e = e, |
3e9d69e7 AK |
2011 | }; |
2012 | unsigned i; | |
2013 | ||
8c56c1a5 PF |
2014 | if (kvm_enabled() && (!(kvm_eventfds_enabled() || |
2015 | userspace_eventfd_warning))) { | |
2016 | userspace_eventfd_warning = true; | |
2017 | error_report("Using eventfd without MMIO binding in KVM. " | |
2018 | "Suboptimal performance expected"); | |
2019 | } | |
2020 | ||
b8aecea2 JW |
2021 | if (size) { |
2022 | adjust_endianness(mr, &mrfd.data, size); | |
2023 | } | |
59023ef4 | 2024 | memory_region_transaction_begin(); |
3e9d69e7 AK |
2025 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
2026 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
2027 | break; | |
2028 | } | |
2029 | } | |
2030 | ++mr->ioeventfd_nb; | |
7267c094 | 2031 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
2032 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
2033 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
2034 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
2035 | mr->ioeventfds[i] = mrfd; | |
4dc56152 | 2036 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 2037 | memory_region_transaction_commit(); |
3e9d69e7 AK |
2038 | } |
2039 | ||
2040 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 2041 | hwaddr addr, |
3e9d69e7 AK |
2042 | unsigned size, |
2043 | bool match_data, | |
2044 | uint64_t data, | |
753d5e14 | 2045 | EventNotifier *e) |
3e9d69e7 AK |
2046 | { |
2047 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
2048 | .addr.start = int128_make64(addr), |
2049 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
2050 | .match_data = match_data, |
2051 | .data = data, | |
753d5e14 | 2052 | .e = e, |
3e9d69e7 AK |
2053 | }; |
2054 | unsigned i; | |
2055 | ||
b8aecea2 JW |
2056 | if (size) { |
2057 | adjust_endianness(mr, &mrfd.data, size); | |
2058 | } | |
59023ef4 | 2059 | memory_region_transaction_begin(); |
3e9d69e7 AK |
2060 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
2061 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
2062 | break; | |
2063 | } | |
2064 | } | |
2065 | assert(i != mr->ioeventfd_nb); | |
2066 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
2067 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
2068 | --mr->ioeventfd_nb; | |
7267c094 | 2069 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 2070 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
4dc56152 | 2071 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 2072 | memory_region_transaction_commit(); |
3e9d69e7 AK |
2073 | } |
2074 | ||
feca4ac1 | 2075 | static void memory_region_update_container_subregions(MemoryRegion *subregion) |
093bc2cd | 2076 | { |
feca4ac1 | 2077 | MemoryRegion *mr = subregion->container; |
093bc2cd AK |
2078 | MemoryRegion *other; |
2079 | ||
59023ef4 JK |
2080 | memory_region_transaction_begin(); |
2081 | ||
dfde4e6e | 2082 | memory_region_ref(subregion); |
093bc2cd AK |
2083 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
2084 | if (subregion->priority >= other->priority) { | |
2085 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
2086 | goto done; | |
2087 | } | |
2088 | } | |
2089 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
2090 | done: | |
22bde714 | 2091 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 2092 | memory_region_transaction_commit(); |
093bc2cd AK |
2093 | } |
2094 | ||
0598701a PC |
2095 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
2096 | hwaddr offset, | |
2097 | MemoryRegion *subregion) | |
2098 | { | |
feca4ac1 PB |
2099 | assert(!subregion->container); |
2100 | subregion->container = mr; | |
0598701a | 2101 | subregion->addr = offset; |
feca4ac1 | 2102 | memory_region_update_container_subregions(subregion); |
0598701a | 2103 | } |
093bc2cd AK |
2104 | |
2105 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 2106 | hwaddr offset, |
093bc2cd AK |
2107 | MemoryRegion *subregion) |
2108 | { | |
093bc2cd AK |
2109 | subregion->priority = 0; |
2110 | memory_region_add_subregion_common(mr, offset, subregion); | |
2111 | } | |
2112 | ||
2113 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 2114 | hwaddr offset, |
093bc2cd | 2115 | MemoryRegion *subregion, |
a1ff8ae0 | 2116 | int priority) |
093bc2cd | 2117 | { |
093bc2cd AK |
2118 | subregion->priority = priority; |
2119 | memory_region_add_subregion_common(mr, offset, subregion); | |
2120 | } | |
2121 | ||
2122 | void memory_region_del_subregion(MemoryRegion *mr, | |
2123 | MemoryRegion *subregion) | |
2124 | { | |
59023ef4 | 2125 | memory_region_transaction_begin(); |
feca4ac1 PB |
2126 | assert(subregion->container == mr); |
2127 | subregion->container = NULL; | |
093bc2cd | 2128 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); |
dfde4e6e | 2129 | memory_region_unref(subregion); |
22bde714 | 2130 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 2131 | memory_region_transaction_commit(); |
6bba19ba AK |
2132 | } |
2133 | ||
2134 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
2135 | { | |
2136 | if (enabled == mr->enabled) { | |
2137 | return; | |
2138 | } | |
59023ef4 | 2139 | memory_region_transaction_begin(); |
6bba19ba | 2140 | mr->enabled = enabled; |
22bde714 | 2141 | memory_region_update_pending = true; |
59023ef4 | 2142 | memory_region_transaction_commit(); |
093bc2cd | 2143 | } |
1c0ffa58 | 2144 | |
e7af4c67 MT |
2145 | void memory_region_set_size(MemoryRegion *mr, uint64_t size) |
2146 | { | |
2147 | Int128 s = int128_make64(size); | |
2148 | ||
2149 | if (size == UINT64_MAX) { | |
2150 | s = int128_2_64(); | |
2151 | } | |
2152 | if (int128_eq(s, mr->size)) { | |
2153 | return; | |
2154 | } | |
2155 | memory_region_transaction_begin(); | |
2156 | mr->size = s; | |
2157 | memory_region_update_pending = true; | |
2158 | memory_region_transaction_commit(); | |
2159 | } | |
2160 | ||
67891b8a | 2161 | static void memory_region_readd_subregion(MemoryRegion *mr) |
2282e1af | 2162 | { |
feca4ac1 | 2163 | MemoryRegion *container = mr->container; |
2282e1af | 2164 | |
feca4ac1 | 2165 | if (container) { |
67891b8a PC |
2166 | memory_region_transaction_begin(); |
2167 | memory_region_ref(mr); | |
feca4ac1 PB |
2168 | memory_region_del_subregion(container, mr); |
2169 | mr->container = container; | |
2170 | memory_region_update_container_subregions(mr); | |
67891b8a PC |
2171 | memory_region_unref(mr); |
2172 | memory_region_transaction_commit(); | |
2282e1af | 2173 | } |
67891b8a | 2174 | } |
2282e1af | 2175 | |
67891b8a PC |
2176 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
2177 | { | |
2178 | if (addr != mr->addr) { | |
2179 | mr->addr = addr; | |
2180 | memory_region_readd_subregion(mr); | |
2181 | } | |
2282e1af AK |
2182 | } |
2183 | ||
a8170e5e | 2184 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 2185 | { |
4703359e | 2186 | assert(mr->alias); |
4703359e | 2187 | |
59023ef4 | 2188 | if (offset == mr->alias_offset) { |
4703359e AK |
2189 | return; |
2190 | } | |
2191 | ||
59023ef4 JK |
2192 | memory_region_transaction_begin(); |
2193 | mr->alias_offset = offset; | |
22bde714 | 2194 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 2195 | memory_region_transaction_commit(); |
4703359e AK |
2196 | } |
2197 | ||
a2b257d6 IM |
2198 | uint64_t memory_region_get_alignment(const MemoryRegion *mr) |
2199 | { | |
2200 | return mr->align; | |
2201 | } | |
2202 | ||
e2177955 AK |
2203 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
2204 | { | |
2205 | const AddrRange *addr = addr_; | |
2206 | const FlatRange *fr = fr_; | |
2207 | ||
2208 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
2209 | return -1; | |
2210 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
2211 | return 1; | |
2212 | } | |
2213 | return 0; | |
2214 | } | |
2215 | ||
99e86347 | 2216 | static FlatRange *flatview_lookup(FlatView *view, AddrRange addr) |
e2177955 | 2217 | { |
99e86347 | 2218 | return bsearch(&addr, view->ranges, view->nr, |
e2177955 AK |
2219 | sizeof(FlatRange), cmp_flatrange_addr); |
2220 | } | |
2221 | ||
eed2bacf IM |
2222 | bool memory_region_is_mapped(MemoryRegion *mr) |
2223 | { | |
2224 | return mr->container ? true : false; | |
2225 | } | |
2226 | ||
c6742b14 PB |
2227 | /* Same as memory_region_find, but it does not add a reference to the |
2228 | * returned region. It must be called from an RCU critical section. | |
2229 | */ | |
2230 | static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr, | |
2231 | hwaddr addr, uint64_t size) | |
e2177955 | 2232 | { |
052e87b0 | 2233 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
2234 | MemoryRegion *root; |
2235 | AddressSpace *as; | |
2236 | AddrRange range; | |
99e86347 | 2237 | FlatView *view; |
73034e9e PB |
2238 | FlatRange *fr; |
2239 | ||
2240 | addr += mr->addr; | |
feca4ac1 PB |
2241 | for (root = mr; root->container; ) { |
2242 | root = root->container; | |
73034e9e PB |
2243 | addr += root->addr; |
2244 | } | |
e2177955 | 2245 | |
73034e9e | 2246 | as = memory_region_to_address_space(root); |
eed2bacf IM |
2247 | if (!as) { |
2248 | return ret; | |
2249 | } | |
73034e9e | 2250 | range = addrrange_make(int128_make64(addr), int128_make64(size)); |
99e86347 | 2251 | |
2b647668 | 2252 | view = atomic_rcu_read(&as->current_map); |
99e86347 | 2253 | fr = flatview_lookup(view, range); |
e2177955 | 2254 | if (!fr) { |
c6742b14 | 2255 | return ret; |
e2177955 AK |
2256 | } |
2257 | ||
99e86347 | 2258 | while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { |
e2177955 AK |
2259 | --fr; |
2260 | } | |
2261 | ||
2262 | ret.mr = fr->mr; | |
73034e9e | 2263 | ret.address_space = as; |
e2177955 AK |
2264 | range = addrrange_intersection(range, fr->addr); |
2265 | ret.offset_within_region = fr->offset_in_region; | |
2266 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
2267 | fr->addr.start)); | |
052e87b0 | 2268 | ret.size = range.size; |
e2177955 | 2269 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 2270 | ret.readonly = fr->readonly; |
c6742b14 PB |
2271 | return ret; |
2272 | } | |
2273 | ||
2274 | MemoryRegionSection memory_region_find(MemoryRegion *mr, | |
2275 | hwaddr addr, uint64_t size) | |
2276 | { | |
2277 | MemoryRegionSection ret; | |
2278 | rcu_read_lock(); | |
2279 | ret = memory_region_find_rcu(mr, addr, size); | |
2280 | if (ret.mr) { | |
2281 | memory_region_ref(ret.mr); | |
2282 | } | |
2b647668 | 2283 | rcu_read_unlock(); |
e2177955 AK |
2284 | return ret; |
2285 | } | |
2286 | ||
c6742b14 PB |
2287 | bool memory_region_present(MemoryRegion *container, hwaddr addr) |
2288 | { | |
2289 | MemoryRegion *mr; | |
2290 | ||
2291 | rcu_read_lock(); | |
2292 | mr = memory_region_find_rcu(container, addr, 1).mr; | |
2293 | rcu_read_unlock(); | |
2294 | return mr && mr != container; | |
2295 | } | |
2296 | ||
9c1f8f44 | 2297 | void memory_global_dirty_log_sync(void) |
86e775c6 | 2298 | { |
9c1f8f44 PB |
2299 | MemoryListener *listener; |
2300 | AddressSpace *as; | |
99e86347 | 2301 | FlatView *view; |
7664e80c AK |
2302 | FlatRange *fr; |
2303 | ||
9c1f8f44 PB |
2304 | QTAILQ_FOREACH(listener, &memory_listeners, link) { |
2305 | if (!listener->log_sync) { | |
2306 | continue; | |
2307 | } | |
d45fa784 | 2308 | as = listener->address_space; |
9c1f8f44 PB |
2309 | view = address_space_get_flatview(as); |
2310 | FOR_EACH_FLAT_RANGE(fr, view) { | |
adaad61c PB |
2311 | if (fr->dirty_log_mask) { |
2312 | MemoryRegionSection mrs = section_from_flat_range(fr, as); | |
2313 | listener->log_sync(listener, &mrs); | |
2314 | } | |
9c1f8f44 PB |
2315 | } |
2316 | flatview_unref(view); | |
7664e80c AK |
2317 | } |
2318 | } | |
2319 | ||
2320 | void memory_global_dirty_log_start(void) | |
2321 | { | |
7664e80c | 2322 | global_dirty_log = true; |
6f6a5ef3 | 2323 | |
7376e582 | 2324 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
6f6a5ef3 PB |
2325 | |
2326 | /* Refresh DIRTY_LOG_MIGRATION bit. */ | |
2327 | memory_region_transaction_begin(); | |
2328 | memory_region_update_pending = true; | |
2329 | memory_region_transaction_commit(); | |
7664e80c AK |
2330 | } |
2331 | ||
2332 | void memory_global_dirty_log_stop(void) | |
2333 | { | |
7664e80c | 2334 | global_dirty_log = false; |
6f6a5ef3 PB |
2335 | |
2336 | /* Refresh DIRTY_LOG_MIGRATION bit. */ | |
2337 | memory_region_transaction_begin(); | |
2338 | memory_region_update_pending = true; | |
2339 | memory_region_transaction_commit(); | |
2340 | ||
7376e582 | 2341 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
2342 | } |
2343 | ||
2344 | static void listener_add_address_space(MemoryListener *listener, | |
2345 | AddressSpace *as) | |
2346 | { | |
99e86347 | 2347 | FlatView *view; |
7664e80c AK |
2348 | FlatRange *fr; |
2349 | ||
680a4783 PB |
2350 | if (listener->begin) { |
2351 | listener->begin(listener); | |
2352 | } | |
7664e80c | 2353 | if (global_dirty_log) { |
975aefe0 AK |
2354 | if (listener->log_global_start) { |
2355 | listener->log_global_start(listener); | |
2356 | } | |
7664e80c | 2357 | } |
975aefe0 | 2358 | |
856d7245 | 2359 | view = address_space_get_flatview(as); |
99e86347 | 2360 | FOR_EACH_FLAT_RANGE(fr, view) { |
7664e80c AK |
2361 | MemoryRegionSection section = { |
2362 | .mr = fr->mr, | |
f6790af6 | 2363 | .address_space = as, |
7664e80c | 2364 | .offset_within_region = fr->offset_in_region, |
052e87b0 | 2365 | .size = fr->addr.size, |
7664e80c | 2366 | .offset_within_address_space = int128_get64(fr->addr.start), |
7a8499e8 | 2367 | .readonly = fr->readonly, |
7664e80c | 2368 | }; |
680a4783 PB |
2369 | if (fr->dirty_log_mask && listener->log_start) { |
2370 | listener->log_start(listener, §ion, 0, fr->dirty_log_mask); | |
2371 | } | |
975aefe0 AK |
2372 | if (listener->region_add) { |
2373 | listener->region_add(listener, §ion); | |
2374 | } | |
7664e80c | 2375 | } |
680a4783 PB |
2376 | if (listener->commit) { |
2377 | listener->commit(listener); | |
2378 | } | |
856d7245 | 2379 | flatview_unref(view); |
7664e80c AK |
2380 | } |
2381 | ||
d45fa784 | 2382 | void memory_listener_register(MemoryListener *listener, AddressSpace *as) |
7664e80c | 2383 | { |
72e22d2f AK |
2384 | MemoryListener *other = NULL; |
2385 | ||
d45fa784 | 2386 | listener->address_space = as; |
72e22d2f AK |
2387 | if (QTAILQ_EMPTY(&memory_listeners) |
2388 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
2389 | memory_listeners)->priority) { | |
2390 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
2391 | } else { | |
2392 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
2393 | if (listener->priority < other->priority) { | |
2394 | break; | |
2395 | } | |
2396 | } | |
2397 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
2398 | } | |
0d673e36 | 2399 | |
9a54635d PB |
2400 | if (QTAILQ_EMPTY(&as->listeners) |
2401 | || listener->priority >= QTAILQ_LAST(&as->listeners, | |
2402 | memory_listeners)->priority) { | |
2403 | QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as); | |
2404 | } else { | |
2405 | QTAILQ_FOREACH(other, &as->listeners, link_as) { | |
2406 | if (listener->priority < other->priority) { | |
2407 | break; | |
2408 | } | |
2409 | } | |
2410 | QTAILQ_INSERT_BEFORE(other, listener, link_as); | |
2411 | } | |
2412 | ||
d45fa784 | 2413 | listener_add_address_space(listener, as); |
7664e80c AK |
2414 | } |
2415 | ||
2416 | void memory_listener_unregister(MemoryListener *listener) | |
2417 | { | |
1d8280c1 PB |
2418 | if (!listener->address_space) { |
2419 | return; | |
2420 | } | |
2421 | ||
72e22d2f | 2422 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
9a54635d | 2423 | QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as); |
1d8280c1 | 2424 | listener->address_space = NULL; |
86e775c6 | 2425 | } |
e2177955 | 2426 | |
7dca8043 | 2427 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1c0ffa58 | 2428 | { |
ac95190e | 2429 | memory_region_ref(root); |
59023ef4 | 2430 | memory_region_transaction_begin(); |
f0c02d15 | 2431 | as->ref_count = 1; |
8786db7c | 2432 | as->root = root; |
f0c02d15 | 2433 | as->malloced = false; |
8786db7c AK |
2434 | as->current_map = g_new(FlatView, 1); |
2435 | flatview_init(as->current_map); | |
4c19eb72 AK |
2436 | as->ioeventfd_nb = 0; |
2437 | as->ioeventfds = NULL; | |
9a54635d | 2438 | QTAILQ_INIT(&as->listeners); |
0d673e36 | 2439 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
7dca8043 | 2440 | as->name = g_strdup(name ? name : "anonymous"); |
ac1970fb | 2441 | address_space_init_dispatch(as); |
f43793c7 PB |
2442 | memory_region_update_pending |= root->enabled; |
2443 | memory_region_transaction_commit(); | |
1c0ffa58 | 2444 | } |
658b2224 | 2445 | |
374f2981 | 2446 | static void do_address_space_destroy(AddressSpace *as) |
83f3c251 | 2447 | { |
f0c02d15 | 2448 | bool do_free = as->malloced; |
078c44f4 | 2449 | |
83f3c251 | 2450 | address_space_destroy_dispatch(as); |
9a54635d | 2451 | assert(QTAILQ_EMPTY(&as->listeners)); |
078c44f4 | 2452 | |
856d7245 | 2453 | flatview_unref(as->current_map); |
7dca8043 | 2454 | g_free(as->name); |
4c19eb72 | 2455 | g_free(as->ioeventfds); |
ac95190e | 2456 | memory_region_unref(as->root); |
f0c02d15 PC |
2457 | if (do_free) { |
2458 | g_free(as); | |
2459 | } | |
2460 | } | |
2461 | ||
2462 | AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name) | |
2463 | { | |
2464 | AddressSpace *as; | |
2465 | ||
2466 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2467 | if (root == as->root && as->malloced) { | |
2468 | as->ref_count++; | |
2469 | return as; | |
2470 | } | |
2471 | } | |
2472 | ||
2473 | as = g_malloc0(sizeof *as); | |
2474 | address_space_init(as, root, name); | |
2475 | as->malloced = true; | |
2476 | return as; | |
83f3c251 AK |
2477 | } |
2478 | ||
374f2981 PB |
2479 | void address_space_destroy(AddressSpace *as) |
2480 | { | |
ac95190e PB |
2481 | MemoryRegion *root = as->root; |
2482 | ||
f0c02d15 PC |
2483 | as->ref_count--; |
2484 | if (as->ref_count) { | |
2485 | return; | |
2486 | } | |
374f2981 PB |
2487 | /* Flush out anything from MemoryListeners listening in on this */ |
2488 | memory_region_transaction_begin(); | |
2489 | as->root = NULL; | |
2490 | memory_region_transaction_commit(); | |
2491 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
6e48e8f9 | 2492 | address_space_unregister(as); |
374f2981 PB |
2493 | |
2494 | /* At this point, as->dispatch and as->current_map are dummy | |
2495 | * entries that the guest should never use. Wait for the old | |
2496 | * values to expire before freeing the data. | |
2497 | */ | |
ac95190e | 2498 | as->root = root; |
374f2981 PB |
2499 | call_rcu(as, do_address_space_destroy, rcu); |
2500 | } | |
2501 | ||
4e831901 PX |
2502 | static const char *memory_region_type(MemoryRegion *mr) |
2503 | { | |
2504 | if (memory_region_is_ram_device(mr)) { | |
2505 | return "ramd"; | |
2506 | } else if (memory_region_is_romd(mr)) { | |
2507 | return "romd"; | |
2508 | } else if (memory_region_is_rom(mr)) { | |
2509 | return "rom"; | |
2510 | } else if (memory_region_is_ram(mr)) { | |
2511 | return "ram"; | |
2512 | } else { | |
2513 | return "i/o"; | |
2514 | } | |
2515 | } | |
2516 | ||
314e2987 BS |
2517 | typedef struct MemoryRegionList MemoryRegionList; |
2518 | ||
2519 | struct MemoryRegionList { | |
2520 | const MemoryRegion *mr; | |
314e2987 BS |
2521 | QTAILQ_ENTRY(MemoryRegionList) queue; |
2522 | }; | |
2523 | ||
2524 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
2525 | ||
4e831901 PX |
2526 | #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \ |
2527 | int128_sub((size), int128_one())) : 0) | |
2528 | #define MTREE_INDENT " " | |
2529 | ||
314e2987 BS |
2530 | static void mtree_print_mr(fprintf_function mon_printf, void *f, |
2531 | const MemoryRegion *mr, unsigned int level, | |
a8170e5e | 2532 | hwaddr base, |
9479c57a | 2533 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 2534 | { |
9479c57a JK |
2535 | MemoryRegionList *new_ml, *ml, *next_ml; |
2536 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
2537 | const MemoryRegion *submr; |
2538 | unsigned int i; | |
b31f8412 | 2539 | hwaddr cur_start, cur_end; |
314e2987 | 2540 | |
f8a9f720 | 2541 | if (!mr) { |
314e2987 BS |
2542 | return; |
2543 | } | |
2544 | ||
2545 | for (i = 0; i < level; i++) { | |
4e831901 | 2546 | mon_printf(f, MTREE_INDENT); |
314e2987 BS |
2547 | } |
2548 | ||
b31f8412 PX |
2549 | cur_start = base + mr->addr; |
2550 | cur_end = cur_start + MR_SIZE(mr->size); | |
2551 | ||
2552 | /* | |
2553 | * Try to detect overflow of memory region. This should never | |
2554 | * happen normally. When it happens, we dump something to warn the | |
2555 | * user who is observing this. | |
2556 | */ | |
2557 | if (cur_start < base || cur_end < cur_start) { | |
2558 | mon_printf(f, "[DETECTED OVERFLOW!] "); | |
2559 | } | |
2560 | ||
314e2987 BS |
2561 | if (mr->alias) { |
2562 | MemoryRegionList *ml; | |
2563 | bool found = false; | |
2564 | ||
2565 | /* check if the alias is already in the queue */ | |
9479c57a | 2566 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
f54bb15f | 2567 | if (ml->mr == mr->alias) { |
314e2987 BS |
2568 | found = true; |
2569 | } | |
2570 | } | |
2571 | ||
2572 | if (!found) { | |
2573 | ml = g_new(MemoryRegionList, 1); | |
2574 | ml->mr = mr->alias; | |
9479c57a | 2575 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 2576 | } |
4896d74b | 2577 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
4e831901 | 2578 | " (prio %d, %s): alias %s @%s " TARGET_FMT_plx |
f8a9f720 | 2579 | "-" TARGET_FMT_plx "%s\n", |
b31f8412 | 2580 | cur_start, cur_end, |
4b474ba7 | 2581 | mr->priority, |
4e831901 | 2582 | memory_region_type((MemoryRegion *)mr), |
3fb18b4d PC |
2583 | memory_region_name(mr), |
2584 | memory_region_name(mr->alias), | |
314e2987 | 2585 | mr->alias_offset, |
4e831901 | 2586 | mr->alias_offset + MR_SIZE(mr->size), |
f8a9f720 | 2587 | mr->enabled ? "" : " [disabled]"); |
314e2987 | 2588 | } else { |
4896d74b | 2589 | mon_printf(f, |
4e831901 | 2590 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n", |
b31f8412 | 2591 | cur_start, cur_end, |
4b474ba7 | 2592 | mr->priority, |
4e831901 | 2593 | memory_region_type((MemoryRegion *)mr), |
f8a9f720 GH |
2594 | memory_region_name(mr), |
2595 | mr->enabled ? "" : " [disabled]"); | |
314e2987 | 2596 | } |
9479c57a JK |
2597 | |
2598 | QTAILQ_INIT(&submr_print_queue); | |
2599 | ||
314e2987 | 2600 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
2601 | new_ml = g_new(MemoryRegionList, 1); |
2602 | new_ml->mr = submr; | |
2603 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
2604 | if (new_ml->mr->addr < ml->mr->addr || | |
2605 | (new_ml->mr->addr == ml->mr->addr && | |
2606 | new_ml->mr->priority > ml->mr->priority)) { | |
2607 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
2608 | new_ml = NULL; | |
2609 | break; | |
2610 | } | |
2611 | } | |
2612 | if (new_ml) { | |
2613 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
2614 | } | |
2615 | } | |
2616 | ||
2617 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
b31f8412 | 2618 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start, |
9479c57a JK |
2619 | alias_print_queue); |
2620 | } | |
2621 | ||
88365e47 | 2622 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 2623 | g_free(ml); |
314e2987 BS |
2624 | } |
2625 | } | |
2626 | ||
57bb40c9 PX |
2627 | static void mtree_print_flatview(fprintf_function p, void *f, |
2628 | AddressSpace *as) | |
2629 | { | |
2630 | FlatView *view = address_space_get_flatview(as); | |
2631 | FlatRange *range = &view->ranges[0]; | |
2632 | MemoryRegion *mr; | |
2633 | int n = view->nr; | |
2634 | ||
2635 | if (n <= 0) { | |
2636 | p(f, MTREE_INDENT "No rendered FlatView for " | |
2637 | "address space '%s'\n", as->name); | |
2638 | flatview_unref(view); | |
2639 | return; | |
2640 | } | |
2641 | ||
2642 | while (n--) { | |
2643 | mr = range->mr; | |
377a07aa PB |
2644 | if (range->offset_in_region) { |
2645 | p(f, MTREE_INDENT TARGET_FMT_plx "-" | |
2646 | TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n", | |
2647 | int128_get64(range->addr.start), | |
2648 | int128_get64(range->addr.start) + MR_SIZE(range->addr.size), | |
2649 | mr->priority, | |
2650 | range->readonly ? "rom" : memory_region_type(mr), | |
2651 | memory_region_name(mr), | |
2652 | range->offset_in_region); | |
2653 | } else { | |
2654 | p(f, MTREE_INDENT TARGET_FMT_plx "-" | |
2655 | TARGET_FMT_plx " (prio %d, %s): %s\n", | |
2656 | int128_get64(range->addr.start), | |
2657 | int128_get64(range->addr.start) + MR_SIZE(range->addr.size), | |
2658 | mr->priority, | |
2659 | range->readonly ? "rom" : memory_region_type(mr), | |
2660 | memory_region_name(mr)); | |
2661 | } | |
57bb40c9 PX |
2662 | range++; |
2663 | } | |
2664 | ||
2665 | flatview_unref(view); | |
2666 | } | |
2667 | ||
2668 | void mtree_info(fprintf_function mon_printf, void *f, bool flatview) | |
314e2987 BS |
2669 | { |
2670 | MemoryRegionListHead ml_head; | |
2671 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 2672 | AddressSpace *as; |
314e2987 | 2673 | |
57bb40c9 PX |
2674 | if (flatview) { |
2675 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2676 | mon_printf(f, "address-space (flat view): %s\n", as->name); | |
2677 | mtree_print_flatview(mon_printf, f, as); | |
2678 | mon_printf(f, "\n"); | |
2679 | } | |
2680 | return; | |
2681 | } | |
2682 | ||
314e2987 BS |
2683 | QTAILQ_INIT(&ml_head); |
2684 | ||
0d673e36 | 2685 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
e48816aa GH |
2686 | mon_printf(f, "address-space: %s\n", as->name); |
2687 | mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head); | |
2688 | mon_printf(f, "\n"); | |
b9f9be88 BS |
2689 | } |
2690 | ||
314e2987 BS |
2691 | /* print aliased regions */ |
2692 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
e48816aa GH |
2693 | mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr)); |
2694 | mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head); | |
2695 | mon_printf(f, "\n"); | |
314e2987 BS |
2696 | } |
2697 | ||
2698 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 2699 | g_free(ml); |
314e2987 | 2700 | } |
314e2987 | 2701 | } |
b4fefef9 PC |
2702 | |
2703 | static const TypeInfo memory_region_info = { | |
2704 | .parent = TYPE_OBJECT, | |
2705 | .name = TYPE_MEMORY_REGION, | |
2706 | .instance_size = sizeof(MemoryRegion), | |
2707 | .instance_init = memory_region_initfn, | |
2708 | .instance_finalize = memory_region_finalize, | |
2709 | }; | |
2710 | ||
2711 | static void memory_register_types(void) | |
2712 | { | |
2713 | type_register_static(&memory_region_info); | |
2714 | } | |
2715 | ||
2716 | type_init(memory_register_types) |