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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
6f6430d7 SG |
2 | /* |
3 | * Copyright (c) 2011 The Chromium OS Authors. | |
4 | * (C) Copyright 2002-2006 | |
5 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
6 | * | |
7 | * (C) Copyright 2002 | |
8 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
9 | * Marius Groeger <[email protected]> | |
6f6430d7 SG |
10 | */ |
11 | ||
03de305e | 12 | #include <config.h> |
12d738ae | 13 | #include <api.h> |
52f24238 | 14 | #include <bootstage.h> |
1eb69ae4 | 15 | #include <cpu_func.h> |
70545642 | 16 | #include <cyclic.h> |
4e4bf944 | 17 | #include <display_options.h> |
a6f2aafe | 18 | #include <exports.h> |
17ead040 | 19 | #ifdef CONFIG_MTD_NOR_FLASH |
b79fdc76 | 20 | #include <flash.h> |
17ead040 | 21 | #endif |
db41d65a | 22 | #include <hang.h> |
8e8ccfe1 | 23 | #include <image.h> |
36bf446b | 24 | #include <irq_func.h> |
b6400de7 | 25 | #include <lmb.h> |
f7ae49fc | 26 | #include <log.h> |
5e6267af | 27 | #include <net.h> |
90526e9f | 28 | #include <asm/cache.h> |
401d1c4f | 29 | #include <asm/global_data.h> |
3db71108 | 30 | #include <u-boot/crc.h> |
3c10dc95 | 31 | #include <binman.h> |
cbb2df20 | 32 | #include <command.h> |
24b852a7 | 33 | #include <console.h> |
1ce60176 | 34 | #include <dm.h> |
92e75ee4 | 35 | #include <efi_loader.h> |
3f989e7b | 36 | #include <env.h> |
f3998fdc | 37 | #include <env_internal.h> |
6f6430d7 | 38 | #include <fdtdec.h> |
c2240d4d | 39 | #include <ide.h> |
6b8d3cea | 40 | #include <init.h> |
6f6430d7 | 41 | #include <initcall.h> |
c2240d4d | 42 | #include <kgdb.h> |
c30b7adb | 43 | #include <irq_func.h> |
fc55ae03 | 44 | #include <led.h> |
6f6430d7 | 45 | #include <malloc.h> |
0eb25b61 | 46 | #include <mapmem.h> |
c2240d4d | 47 | #include <miiphy.h> |
6f6430d7 | 48 | #include <mmc.h> |
90a979d7 | 49 | #include <mux.h> |
6f6430d7 | 50 | #include <nand.h> |
3af86a4e | 51 | #include <of_live.h> |
6f6430d7 | 52 | #include <onenand_uboot.h> |
722bc5b5 | 53 | #include <pvblock.h> |
c2240d4d | 54 | #include <scsi.h> |
6f6430d7 | 55 | #include <serial.h> |
c3e4430e | 56 | #include <status_led.h> |
6f6430d7 | 57 | #include <stdio_dev.h> |
1057e6cf | 58 | #include <timer.h> |
71c52dba | 59 | #include <trace.h> |
c2240d4d | 60 | #include <watchdog.h> |
48654416 | 61 | #include <xen.h> |
6f6430d7 | 62 | #include <asm/sections.h> |
1ce60176 | 63 | #include <dm/root.h> |
7de8bd03 | 64 | #include <dm/ofnode.h> |
c2240d4d | 65 | #include <linux/compiler.h> |
1ce60176 | 66 | #include <linux/err.h> |
06985289 | 67 | #include <wdt.h> |
fd765b0e | 68 | #include <asm-generic/gpio.h> |
13ae36cc | 69 | #include <relocate.h> |
6f6430d7 SG |
70 | |
71 | DECLARE_GLOBAL_DATA_PTR; | |
72 | ||
73 | ulong monitor_flash_len; | |
74 | ||
dd2a6cd0 | 75 | __weak int board_flash_wp_on(void) |
c2240d4d SG |
76 | { |
77 | /* | |
78 | * Most flashes can't be detected when write protection is enabled, | |
79 | * so provide a way to let U-Boot gracefully ignore write protected | |
80 | * devices. | |
81 | */ | |
82 | return 0; | |
83 | } | |
84 | ||
fb504b2c | 85 | __weak int cpu_secondary_init_r(void) |
c2240d4d | 86 | { |
c2240d4d SG |
87 | return 0; |
88 | } | |
6f6430d7 | 89 | |
71c52dba SG |
90 | static int initr_trace(void) |
91 | { | |
92 | #ifdef CONFIG_TRACE | |
93 | trace_init(gd->trace_buff, CONFIG_TRACE_BUFFER_SIZE); | |
94 | #endif | |
95 | ||
96 | return 0; | |
97 | } | |
98 | ||
6f6430d7 SG |
99 | static int initr_reloc(void) |
100 | { | |
c9356be3 SG |
101 | /* tell others: relocation done */ |
102 | gd->flags |= GD_FLG_RELOC | GD_FLG_FULL_MALLOC_INIT; | |
6f6430d7 SG |
103 | |
104 | return 0; | |
105 | } | |
106 | ||
4d4222d0 | 107 | #if defined(CONFIG_ARM) || defined(CONFIG_RISCV) |
6f6430d7 SG |
108 | /* |
109 | * Some of these functions are needed purely because the functions they | |
110 | * call return void. If we change them to return 0, these stubs can go away. | |
111 | */ | |
112 | static int initr_caches(void) | |
113 | { | |
114 | /* Enable caches */ | |
115 | enable_caches(); | |
116 | return 0; | |
117 | } | |
118 | #endif | |
119 | ||
c2240d4d SG |
120 | __weak int fixup_cpu(void) |
121 | { | |
122 | return 0; | |
123 | } | |
124 | ||
6f6430d7 SG |
125 | static int initr_reloc_global_data(void) |
126 | { | |
b60eff31 AA |
127 | #ifdef __ARM__ |
128 | monitor_flash_len = _end - __image_copy_start; | |
11232139 | 129 | #elif defined(CONFIG_RISCV) |
ccea96f4 | 130 | monitor_flash_len = (ulong)_end - (ulong)_start; |
5ff10aa7 | 131 | #elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2) |
ccea96f4 | 132 | monitor_flash_len = (ulong)__init_end - gd->relocaddr; |
6f6430d7 | 133 | #endif |
c2240d4d SG |
134 | #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) |
135 | /* | |
136 | * The gd->cpu pointer is set to an address in flash before relocation. | |
137 | * We need to update it to point to the same CPU entry in RAM. | |
138 | * TODO: why not just add gd->reloc_ofs? | |
139 | */ | |
a0ba279a | 140 | gd->arch.cpu += gd->relocaddr - CONFIG_SYS_MONITOR_BASE; |
c2240d4d SG |
141 | |
142 | /* | |
143 | * If we didn't know the cpu mask & # cores, we can save them of | |
144 | * now rather than 'computing' them constantly | |
145 | */ | |
146 | fixup_cpu(); | |
147 | #endif | |
8d8ee47e | 148 | #ifdef CONFIG_SYS_RELOC_GD_ENV_ADDR |
c2240d4d | 149 | /* |
6c6add60 SG |
150 | * Relocate the early env_addr pointer unless we know it is not inside |
151 | * the binary. Some systems need this and for the rest, it doesn't hurt. | |
c2240d4d | 152 | */ |
6c6add60 | 153 | gd->env_addr += gd->reloc_off; |
c2240d4d | 154 | #endif |
acab6e78 EB |
155 | |
156 | /* | |
157 | * For CONFIG_OF_EMBED case the FDT is embedded into ELF, available by | |
623f5cf5 | 158 | * __dtb_dt_begin. After U-Boot ELF self-relocation to RAM top address |
acab6e78 EB |
159 | * it is worth to update fdt_blob in global_data |
160 | */ | |
161 | if (IS_ENABLED(CONFIG_OF_EMBED)) | |
623f5cf5 | 162 | fdtdec_setup_embed(); |
acab6e78 | 163 | |
50149ea3 | 164 | #ifdef CONFIG_EFI_LOADER |
e7ac009b HS |
165 | /* |
166 | * On the ARM architecture gd is mapped to a fixed register (r9 or x18). | |
167 | * As this register may be overwritten by an EFI payload we save it here | |
168 | * and restore it on every callback entered. | |
169 | */ | |
170 | efi_save_gd(); | |
171 | ||
50149ea3 AG |
172 | efi_runtime_relocate(gd->relocaddr, NULL); |
173 | #endif | |
e9acb9ea | 174 | |
c2240d4d | 175 | return 0; |
6f6430d7 SG |
176 | } |
177 | ||
130845ba | 178 | __weak int arch_initr_trap(void) |
c2240d4d | 179 | { |
c2240d4d SG |
180 | return 0; |
181 | } | |
c2240d4d | 182 | |
c2240d4d SG |
183 | #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) |
184 | static int initr_unlock_ram_in_cache(void) | |
185 | { | |
186 | unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */ | |
187 | return 0; | |
188 | } | |
189 | #endif | |
190 | ||
c2240d4d SG |
191 | static int initr_barrier(void) |
192 | { | |
193 | #ifdef CONFIG_PPC | |
194 | /* TODO: Can we not use dmb() macros for this? */ | |
195 | asm("sync ; isync"); | |
196 | #endif | |
197 | return 0; | |
198 | } | |
199 | ||
6f6430d7 SG |
200 | static int initr_malloc(void) |
201 | { | |
0be0f205 | 202 | ulong start; |
6f6430d7 | 203 | |
3d6d5075 | 204 | #if CONFIG_IS_ENABLED(SYS_MALLOC_F) |
92aa3ec3 | 205 | debug("Pre-reloc malloc() used %#x bytes (%d KB)\n", gd->malloc_ptr, |
d59476b6 SG |
206 | gd->malloc_ptr / 1024); |
207 | #endif | |
6f6430d7 | 208 | /* The malloc area is immediately below the monitor copy in DRAM */ |
5e0404ff SW |
209 | /* |
210 | * This value MUST match the value of gd->start_addr_sp in board_f.c: | |
211 | * reserve_noncached(). | |
212 | */ | |
0be0f205 SG |
213 | start = gd->relocaddr - TOTAL_MALLOC_LEN; |
214 | gd_set_malloc_start(start); | |
41fecdc9 | 215 | mem_malloc_init(start, TOTAL_MALLOC_LEN); |
6f6430d7 SG |
216 | return 0; |
217 | } | |
218 | ||
3af86a4e SG |
219 | static int initr_of_live(void) |
220 | { | |
a652d9c7 SG |
221 | if (CONFIG_IS_ENABLED(OF_LIVE)) { |
222 | int ret; | |
a132f770 | 223 | |
a652d9c7 SG |
224 | bootstage_start(BOOTSTAGE_ID_ACCUM_OF_LIVE, "of_live"); |
225 | ret = of_live_build(gd->fdt_blob, | |
226 | (struct device_node **)gd_of_root_ptr()); | |
227 | bootstage_accum(BOOTSTAGE_ID_ACCUM_OF_LIVE); | |
228 | if (ret) | |
229 | return ret; | |
230 | } | |
a132f770 SG |
231 | |
232 | return 0; | |
3af86a4e | 233 | } |
3af86a4e | 234 | |
1ce60176 SG |
235 | #ifdef CONFIG_DM |
236 | static int initr_dm(void) | |
237 | { | |
1057e6cf SG |
238 | int ret; |
239 | ||
ee88ba71 SG |
240 | oftree_reset(); |
241 | ||
a8729a26 | 242 | /* Drop the pre-reloc driver model and start a new one */ |
ab7cd627 | 243 | gd->dm_root = NULL; |
d74d6b44 SG |
244 | #ifdef CONFIG_TIMER |
245 | gd->timer = NULL; | |
246 | #endif | |
b67eefdb | 247 | bootstage_start(BOOTSTAGE_ID_ACCUM_DM_R, "dm_r"); |
1057e6cf | 248 | ret = dm_init_and_scan(false); |
b67eefdb | 249 | bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_R); |
1057e6cf SG |
250 | if (ret) |
251 | return ret; | |
1057e6cf | 252 | |
6995f2c8 | 253 | return dm_autoprobe(); |
1ce60176 SG |
254 | } |
255 | #endif | |
256 | ||
dd0edcb2 SG |
257 | static int initr_dm_devices(void) |
258 | { | |
259 | int ret; | |
260 | ||
261 | if (IS_ENABLED(CONFIG_TIMER_EARLY)) { | |
262 | ret = dm_timer_init(); | |
263 | if (ret) | |
264 | return ret; | |
265 | } | |
266 | ||
90a979d7 JJH |
267 | if (IS_ENABLED(CONFIG_MULTIPLEXER)) { |
268 | /* | |
269 | * Initialize the multiplexer controls to their default state. | |
270 | * This must be done early as other drivers may unknowingly | |
271 | * rely on it. | |
272 | */ | |
273 | ret = dm_mux_init(); | |
274 | if (ret) | |
275 | return ret; | |
276 | } | |
277 | ||
dd0edcb2 SG |
278 | return 0; |
279 | } | |
280 | ||
881c124a SG |
281 | static int initr_bootstage(void) |
282 | { | |
881c124a SG |
283 | bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_R, "board_init_r"); |
284 | ||
285 | return 0; | |
286 | } | |
287 | ||
6f6430d7 SG |
288 | __weak int power_init_board(void) |
289 | { | |
290 | return 0; | |
291 | } | |
292 | ||
293 | static int initr_announce(void) | |
294 | { | |
a0ba279a | 295 | debug("Now running in RAM - U-Boot at: %08lx\n", gd->relocaddr); |
6f6430d7 SG |
296 | return 0; |
297 | } | |
298 | ||
417409e5 | 299 | static int __maybe_unused initr_binman(void) |
3c10dc95 | 300 | { |
c03cb022 TH |
301 | int ret; |
302 | ||
c03cb022 TH |
303 | ret = binman_init(); |
304 | if (ret) | |
305 | printf("binman_init failed:%d\n", ret); | |
306 | ||
307 | return ret; | |
3c10dc95 SG |
308 | } |
309 | ||
e856bdcf | 310 | #if defined(CONFIG_MTD_NOR_FLASH) |
62d3a58d PG |
311 | __weak int is_flash_available(void) |
312 | { | |
313 | return 1; | |
314 | } | |
315 | ||
6f6430d7 SG |
316 | static int initr_flash(void) |
317 | { | |
c2240d4d | 318 | ulong flash_size = 0; |
b75d8dc5 | 319 | struct bd_info *bd = gd->bd; |
6f6430d7 | 320 | |
62d3a58d PG |
321 | if (!is_flash_available()) |
322 | return 0; | |
323 | ||
6f6430d7 SG |
324 | puts("Flash: "); |
325 | ||
70879a92 | 326 | if (board_flash_wp_on()) |
c2240d4d | 327 | printf("Uninitialized - Write Protect On\n"); |
70879a92 | 328 | else |
c2240d4d | 329 | flash_size = flash_init(); |
70879a92 | 330 | |
6f6430d7 SG |
331 | print_size(flash_size, ""); |
332 | #ifdef CONFIG_SYS_FLASH_CHECKSUM | |
333 | /* | |
92f84b67 MS |
334 | * Compute and print flash CRC if flashchecksum is set to 'y' |
335 | * | |
29caf930 | 336 | * NOTE: Maybe we should add some schedule()? XXX |
92f84b67 | 337 | */ |
bfebc8c9 | 338 | if (env_get_yesno("flashchecksum") == 1) { |
65cc0e2a | 339 | const uchar *flash_base = (const uchar *)CFG_SYS_FLASH_BASE; |
92f84b67 | 340 | |
6f6430d7 | 341 | printf(" CRC: %08X", crc32(0, |
92f84b67 MS |
342 | flash_base, |
343 | flash_size)); | |
6f6430d7 SG |
344 | } |
345 | #endif /* CONFIG_SYS_FLASH_CHECKSUM */ | |
346 | putc('\n'); | |
347 | ||
c2240d4d | 348 | /* update start of FLASH memory */ |
65cc0e2a TR |
349 | #ifdef CFG_SYS_FLASH_BASE |
350 | bd->bi_flashstart = CFG_SYS_FLASH_BASE; | |
c2240d4d SG |
351 | #endif |
352 | /* size of FLASH memory (final value) */ | |
353 | bd->bi_flashsize = flash_size; | |
354 | ||
355 | #if defined(CONFIG_SYS_UPDATE_FLASH_SIZE) | |
356 | /* Make a update of the Memctrl. */ | |
357 | update_flash_size(flash_size); | |
358 | #endif | |
359 | ||
c2240d4d SG |
360 | #if defined(CONFIG_OXC) || defined(CONFIG_RMU) |
361 | /* flash mapped at end of memory map */ | |
98463903 | 362 | bd->bi_flashoffset = CONFIG_TEXT_BASE + flash_size; |
65cc0e2a | 363 | #elif CONFIG_SYS_MONITOR_BASE == CFG_SYS_FLASH_BASE |
c2240d4d SG |
364 | bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */ |
365 | #endif | |
366 | return 0; | |
367 | } | |
368 | #endif | |
369 | ||
6f6430d7 SG |
370 | #ifdef CONFIG_CMD_NAND |
371 | /* go init the NAND */ | |
2588ba14 | 372 | static int initr_nand(void) |
6f6430d7 SG |
373 | { |
374 | puts("NAND: "); | |
375 | nand_init(); | |
203db38a | 376 | printf("%lu MiB\n", nand_size() / 1024); |
6f6430d7 SG |
377 | return 0; |
378 | } | |
379 | #endif | |
380 | ||
381 | #if defined(CONFIG_CMD_ONENAND) | |
382 | /* go init the NAND */ | |
2588ba14 | 383 | static int initr_onenand(void) |
6f6430d7 SG |
384 | { |
385 | puts("NAND: "); | |
386 | onenand_init(); | |
387 | return 0; | |
388 | } | |
389 | #endif | |
390 | ||
4aa2ba3a | 391 | #ifdef CONFIG_MMC |
2588ba14 | 392 | static int initr_mmc(void) |
6f6430d7 SG |
393 | { |
394 | puts("MMC: "); | |
395 | mmc_initialize(gd->bd); | |
396 | return 0; | |
397 | } | |
398 | #endif | |
399 | ||
722bc5b5 AL |
400 | #ifdef CONFIG_PVBLOCK |
401 | static int initr_pvblock(void) | |
402 | { | |
403 | puts("PVBLOCK: "); | |
404 | pvblock_init(); | |
405 | return 0; | |
406 | } | |
407 | #endif | |
408 | ||
6f6430d7 SG |
409 | /* |
410 | * Tell if it's OK to load the environment early in boot. | |
411 | * | |
776babd7 | 412 | * If CONFIG_OF_CONTROL is defined, we'll check with the FDT to see |
6f6430d7 SG |
413 | * if this is OK (defaulting to saying it's OK). |
414 | * | |
415 | * NOTE: Loading the environment early can be a bad idea if security is | |
416 | * important, since no verification is done on the environment. | |
417 | * | |
185f812c | 418 | * Return: 0 if environment should not be loaded, !=0 if it is ok to load |
6f6430d7 SG |
419 | */ |
420 | static int should_load_env(void) | |
421 | { | |
9441f8cb | 422 | if (IS_ENABLED(CONFIG_OF_CONTROL)) |
7de8bd03 | 423 | return ofnode_conf_read_int("load-environment", 1); |
9441f8cb OP |
424 | |
425 | if (IS_ENABLED(CONFIG_DELAY_ENVIRONMENT)) | |
426 | return 0; | |
427 | ||
6f6430d7 | 428 | return 1; |
6f6430d7 SG |
429 | } |
430 | ||
431 | static int initr_env(void) | |
432 | { | |
433 | /* initialize environment */ | |
434 | if (should_load_env()) | |
435 | env_relocate(); | |
436 | else | |
0ac7d722 | 437 | env_set_default(NULL, 0); |
9441f8cb | 438 | |
95fd9772 RV |
439 | env_import_fdt(); |
440 | ||
9441f8cb OP |
441 | if (IS_ENABLED(CONFIG_OF_CONTROL)) |
442 | env_set_hex("fdtcontroladdr", | |
443 | (unsigned long)map_to_sysmem(gd->fdt_blob)); | |
6f6430d7 | 444 | |
4c776089 | 445 | #if (IS_ENABLED(CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR) || \ |
10f8bc09 | 446 | IS_ENABLED(CONFIG_SAVE_PREV_BL_FDT_ADDR)) |
12a3e1ad DS |
447 | save_prev_bl_data(); |
448 | #endif | |
449 | ||
6f6430d7 | 450 | /* Initialize from environment */ |
bb872dd9 | 451 | image_load_addr = env_get_ulong("loadaddr", 16, image_load_addr); |
c2240d4d | 452 | |
c2240d4d SG |
453 | return 0; |
454 | } | |
455 | ||
167f699b | 456 | #ifdef CONFIG_SYS_MALLOC_BOOTPARAMS |
c722f0b0 AB |
457 | static int initr_malloc_bootparams(void) |
458 | { | |
459 | gd->bd->bi_boot_params = (ulong)malloc(CONFIG_SYS_BOOTPARAMS_LEN); | |
460 | if (!gd->bd->bi_boot_params) { | |
461 | puts("WARNING: Cannot allocate space for boot parameters\n"); | |
462 | return -ENOMEM; | |
463 | } | |
464 | return 0; | |
465 | } | |
466 | #endif | |
467 | ||
c2240d4d SG |
468 | static int initr_status_led(void) |
469 | { | |
13cfbe51 | 470 | status_led_init(); |
fc55ae03 CM |
471 | |
472 | return 0; | |
473 | } | |
474 | ||
475 | static int initr_boot_led_blink(void) | |
476 | { | |
477 | status_led_boot_blink(); | |
478 | ||
479 | led_boot_blink(); | |
480 | ||
481 | return 0; | |
482 | } | |
483 | ||
484 | static int initr_boot_led_on(void) | |
485 | { | |
486 | led_boot_on(); | |
487 | ||
c2240d4d SG |
488 | return 0; |
489 | } | |
c2240d4d | 490 | |
98ad145d | 491 | #if defined(CONFIG_CMD_NET) |
6f6430d7 SG |
492 | static int initr_net(void) |
493 | { | |
494 | puts("Net: "); | |
d2eaec60 | 495 | eth_initialize(); |
6f6430d7 SG |
496 | #if defined(CONFIG_RESET_PHY_R) |
497 | debug("Reset Ethernet PHY\n"); | |
498 | reset_phy(); | |
499 | #endif | |
500 | return 0; | |
501 | } | |
502 | #endif | |
503 | ||
504 | #ifdef CONFIG_POST | |
505 | static int initr_post(void) | |
506 | { | |
507 | post_run(NULL, POST_RAM | post_bootmode_get(0)); | |
508 | return 0; | |
509 | } | |
510 | #endif | |
511 | ||
7c5c137c | 512 | #if defined(CFG_PRAM) |
6f6430d7 SG |
513 | /* |
514 | * Export available size of memory for Linux, taking into account the | |
515 | * protected RAM at top of memory | |
516 | */ | |
517 | int initr_mem(void) | |
518 | { | |
519 | ulong pram = 0; | |
520 | char memsz[32]; | |
521 | ||
7c5c137c | 522 | pram = env_get_ulong("pram", 10, CFG_PRAM); |
92f84b67 | 523 | sprintf(memsz, "%ldk", (long int)((gd->ram_size / 1024) - pram)); |
382bee57 | 524 | env_set("mem", memsz); |
c2240d4d SG |
525 | |
526 | return 0; | |
527 | } | |
528 | #endif | |
529 | ||
b6400de7 SG |
530 | static int initr_lmb(void) |
531 | { | |
532 | if (CONFIG_IS_ENABLED(LMB)) | |
533 | return lmb_init(); | |
534 | else | |
535 | return 0; | |
536 | } | |
537 | ||
ff66e7bb SG |
538 | static int dm_announce(void) |
539 | { | |
540 | int device_count; | |
541 | int uclass_count; | |
542 | ||
543 | if (IS_ENABLED(CONFIG_DM)) { | |
544 | dm_get_stats(&device_count, &uclass_count); | |
545 | printf("Core: %d devices, %d uclasses", device_count, | |
546 | uclass_count); | |
547 | if (CONFIG_IS_ENABLED(OF_REAL)) | |
548 | printf(", devicetree: %s", fdtdec_get_srcname()); | |
0fc406ab SG |
549 | if (CONFIG_IS_ENABLED(UPL)) |
550 | printf(", universal payload active"); | |
ff66e7bb | 551 | printf("\n"); |
93233b07 SG |
552 | if (IS_ENABLED(CONFIG_OF_HAS_PRIOR_STAGE) && |
553 | (gd->fdt_src == FDTSRC_SEPARATE || | |
554 | gd->fdt_src == FDTSRC_EMBED)) { | |
555 | printf("Warning: Unexpected devicetree source (not from a prior stage)"); | |
556 | printf("Warning: U-Boot may not function properly\n"); | |
557 | } | |
c74e0341 SG |
558 | if (IS_ENABLED(CONFIG_OF_TAG_MIGRATE) && |
559 | (gd->flags & GD_FLG_OF_TAG_MIGRATE)) | |
560 | /* | |
561 | * U-Boot will silently fail to work after 2023.07 if | |
562 | * there are old tags present | |
563 | */ | |
564 | printf("Warning: Device tree includes old 'u-boot,dm-' tags: please fix by 2023.07!\n"); | |
ff66e7bb SG |
565 | } |
566 | ||
567 | return 0; | |
568 | } | |
569 | ||
6f6430d7 SG |
570 | static int run_main_loop(void) |
571 | { | |
a733b06b SG |
572 | #ifdef CONFIG_SANDBOX |
573 | sandbox_main_loop_init(); | |
574 | #endif | |
467bad5e SG |
575 | |
576 | event_notify_null(EVT_MAIN_LOOP); | |
577 | ||
6f6430d7 SG |
578 | /* main_loop() can return to retry autoboot, if so just run it again */ |
579 | for (;;) | |
580 | main_loop(); | |
581 | return 0; | |
582 | } | |
583 | ||
584 | /* | |
e7f59dea SG |
585 | * Over time we hope to remove these functions with code fragments and |
586 | * stub functions, and instead call the relevant function directly. | |
587 | * | |
588 | * We also hope to remove most of the driver-related init and do it if/when | |
6f6430d7 | 589 | * the driver is later used. |
c2240d4d SG |
590 | * |
591 | * TODO: perhaps reset the watchdog in the initcall function after each call? | |
6f6430d7 | 592 | */ |
4acff452 | 593 | static init_fnc_t init_sequence_r[] = { |
71c52dba | 594 | initr_trace, |
6f6430d7 | 595 | initr_reloc, |
87a5d1b5 | 596 | event_init, |
c2240d4d | 597 | /* TODO: could x86/PPC have this also perhaps? */ |
4d4222d0 | 598 | #if defined(CONFIG_ARM) || defined(CONFIG_RISCV) |
6f6430d7 | 599 | initr_caches, |
12eaf31c YS |
600 | /* Note: For Freescale LS2 SoCs, new MMU table is created in DDR. |
601 | * A temporary mapping of IFC high region is since removed, | |
92f84b67 | 602 | * so environmental variables in NOR flash is not available |
12eaf31c YS |
603 | * until board_init() is called below to remap IFC to high |
604 | * region. | |
605 | */ | |
9fb02491 SG |
606 | #endif |
607 | initr_reloc_global_data, | |
fef3e25f YS |
608 | #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) |
609 | initr_unlock_ram_in_cache, | |
610 | #endif | |
9fb02491 SG |
611 | initr_barrier, |
612 | initr_malloc, | |
af1bc0cf | 613 | log_init, |
5ac44a55 | 614 | initr_bootstage, /* Needs malloc() but has its own timer */ |
51c5a2c5 OP |
615 | #if defined(CONFIG_CONSOLE_RECORD) |
616 | console_record_init, | |
617 | #endif | |
671fa63e | 618 | #ifdef CONFIG_SYS_NONCACHED_MEMORY |
42d0d422 | 619 | noncached_init, |
671fa63e | 620 | #endif |
3af86a4e | 621 | initr_of_live, |
9fb02491 SG |
622 | #ifdef CONFIG_DM |
623 | initr_dm, | |
624 | #endif | |
a43b598c | 625 | #ifdef CONFIG_ADDR_MAP |
1b212bb9 | 626 | init_addr_map, |
a43b598c | 627 | #endif |
11232139 | 628 | #if defined(CONFIG_ARM) || defined(CONFIG_RISCV) || defined(CONFIG_SANDBOX) |
6f6430d7 | 629 | board_init, /* Setup chipselects */ |
c2240d4d SG |
630 | #endif |
631 | /* | |
632 | * TODO: printing of the clock inforamtion of the board is now | |
633 | * implemented as part of bdinfo command. Currently only support for | |
634 | * davinci SOC's is added. Remove this check once all the board | |
635 | * implement this. | |
636 | */ | |
637 | #ifdef CONFIG_CLOCKS | |
638 | set_cpu_clk_info, /* Setup clock information */ | |
5d00995c | 639 | #endif |
b6400de7 | 640 | initr_lmb, |
5d00995c AG |
641 | #ifdef CONFIG_EFI_LOADER |
642 | efi_memory_init, | |
6f6430d7 | 643 | #endif |
417409e5 | 644 | #ifdef CONFIG_BINMAN_FDT |
3c10dc95 | 645 | initr_binman, |
417409e5 | 646 | #endif |
fe08d39d SG |
647 | #ifdef CONFIG_FSP_VERSION2 |
648 | arch_fsp_init_r, | |
649 | #endif | |
dd0edcb2 | 650 | initr_dm_devices, |
9fb02491 | 651 | stdio_init_tables, |
bf2fb81a | 652 | serial_initialize, |
6f6430d7 | 653 | initr_announce, |
ff66e7bb | 654 | dm_announce, |
6874cb72 | 655 | #if CONFIG_IS_ENABLED(WDT) |
84b2416b WG |
656 | initr_watchdog, |
657 | #endif | |
c2240d4d | 658 | INIT_FUNC_WATCHDOG_RESET |
130845ba | 659 | arch_initr_trap, |
c2240d4d SG |
660 | #if defined(CONFIG_BOARD_EARLY_INIT_R) |
661 | board_early_init_r, | |
662 | #endif | |
663 | INIT_FUNC_WATCHDOG_RESET | |
6f6430d7 | 664 | #ifdef CONFIG_POST |
7addd3c6 | 665 | post_output_backlog, |
6f6430d7 | 666 | #endif |
c2240d4d | 667 | INIT_FUNC_WATCHDOG_RESET |
b9f6d0f7 | 668 | #if defined(CONFIG_PCI_INIT_R) && defined(CONFIG_SYS_EARLY_PCI_INIT) |
c2240d4d SG |
669 | /* |
670 | * Do early PCI configuration _before_ the flash gets initialised, | |
92f84b67 | 671 | * because PCU resources are crucial for flash access on some boards. |
c2240d4d | 672 | */ |
b9f6d0f7 | 673 | pci_init, |
c2240d4d | 674 | #endif |
6f6430d7 SG |
675 | #ifdef CONFIG_ARCH_EARLY_INIT_R |
676 | arch_early_init_r, | |
677 | #endif | |
678 | power_init_board, | |
e856bdcf | 679 | #ifdef CONFIG_MTD_NOR_FLASH |
6f6430d7 | 680 | initr_flash, |
c2240d4d SG |
681 | #endif |
682 | INIT_FUNC_WATCHDOG_RESET | |
936478e7 | 683 | #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86) |
c2240d4d SG |
684 | /* initialize higher level parts of CPU like time base and timers */ |
685 | cpu_init_r, | |
be274b99 | 686 | #endif |
023d9c93 | 687 | #ifdef CONFIG_EFI_LOADER |
5e847f77 HS |
688 | efi_init_early, |
689 | #endif | |
6f6430d7 SG |
690 | #ifdef CONFIG_CMD_NAND |
691 | initr_nand, | |
692 | #endif | |
693 | #ifdef CONFIG_CMD_ONENAND | |
694 | initr_onenand, | |
695 | #endif | |
4aa2ba3a | 696 | #ifdef CONFIG_MMC |
6f6430d7 | 697 | initr_mmc, |
48654416 OA |
698 | #endif |
699 | #ifdef CONFIG_XEN | |
eb2825b7 | 700 | xen_init, |
722bc5b5 AL |
701 | #endif |
702 | #ifdef CONFIG_PVBLOCK | |
703 | initr_pvblock, | |
6f6430d7 SG |
704 | #endif |
705 | initr_env, | |
167f699b | 706 | #ifdef CONFIG_SYS_MALLOC_BOOTPARAMS |
c722f0b0 AB |
707 | initr_malloc_bootparams, |
708 | #endif | |
c2240d4d | 709 | INIT_FUNC_WATCHDOG_RESET |
fb504b2c | 710 | cpu_secondary_init_r, |
d7d40f61 | 711 | #if defined(CONFIG_ID_EEPROM) |
c2240d4d SG |
712 | mac_read_from_eeprom, |
713 | #endif | |
6092ce50 | 714 | INITCALL_EVENT(EVT_SETTINGS_R), |
c2240d4d | 715 | INIT_FUNC_WATCHDOG_RESET |
b9f6d0f7 | 716 | #if defined(CONFIG_PCI_INIT_R) && !defined(CONFIG_SYS_EARLY_PCI_INIT) |
c2240d4d SG |
717 | /* |
718 | * Do pci configuration | |
719 | */ | |
b9f6d0f7 | 720 | pci_init, |
c2240d4d | 721 | #endif |
9fb02491 | 722 | stdio_add_devices, |
01548580 | 723 | jumptable_init, |
6f6430d7 | 724 | #ifdef CONFIG_API |
ce41e735 | 725 | api_init, |
6f6430d7 SG |
726 | #endif |
727 | console_init_r, /* fully init console as a device */ | |
728 | #ifdef CONFIG_DISPLAY_BOARDINFO_LATE | |
b0895384 | 729 | console_announce_r, |
0365ffcc | 730 | show_board_info, |
6f6430d7 SG |
731 | #endif |
732 | #ifdef CONFIG_ARCH_MISC_INIT | |
733 | arch_misc_init, /* miscellaneous arch-dependent init */ | |
734 | #endif | |
735 | #ifdef CONFIG_MISC_INIT_R | |
736 | misc_init_r, /* miscellaneous platform-dependent init */ | |
c2240d4d SG |
737 | #endif |
738 | INIT_FUNC_WATCHDOG_RESET | |
739 | #ifdef CONFIG_CMD_KGDB | |
78fc0395 | 740 | kgdb_init, |
6f6430d7 SG |
741 | #endif |
742 | interrupt_init, | |
daab59ac | 743 | #if defined(CONFIG_MICROBLAZE) || defined(CONFIG_M68K) |
be274b99 SG |
744 | timer_init, /* initialize timer */ |
745 | #endif | |
c2240d4d | 746 | initr_status_led, |
fc55ae03 | 747 | initr_boot_led_blink, |
c2240d4d | 748 | /* PPC has a udelay(20) here dating from 2002. Why? */ |
6f6430d7 SG |
749 | #ifdef CONFIG_BOARD_LATE_INIT |
750 | board_late_init, | |
751 | #endif | |
752 | #ifdef CONFIG_BITBANGMII | |
c65abc70 | 753 | bb_miiphy_init, |
6f6430d7 | 754 | #endif |
fd00c53f | 755 | #ifdef CONFIG_PCI_ENDPOINT |
c343e8c0 | 756 | pci_ep_init, |
fd00c53f | 757 | #endif |
98ad145d | 758 | #if defined(CONFIG_CMD_NET) |
c2240d4d | 759 | INIT_FUNC_WATCHDOG_RESET |
6f6430d7 SG |
760 | initr_net, |
761 | #endif | |
762 | #ifdef CONFIG_POST | |
763 | initr_post, | |
c2240d4d | 764 | #endif |
c2240d4d | 765 | INIT_FUNC_WATCHDOG_RESET |
91caa3bb | 766 | INITCALL_EVENT(EVT_LAST_STAGE_INIT), |
7c5c137c | 767 | #if defined(CFG_PRAM) |
c2240d4d | 768 | initr_mem, |
6f6430d7 | 769 | #endif |
fc55ae03 | 770 | initr_boot_led_on, |
6f6430d7 SG |
771 | run_main_loop, |
772 | }; | |
773 | ||
774 | void board_init_r(gd_t *new_gd, ulong dest_addr) | |
775 | { | |
c38a21d7 SG |
776 | /* |
777 | * The pre-relocation drivers may be using memory that has now gone | |
778 | * away. Mark serial as unavailable - this will fall back to the debug | |
779 | * UART if available. | |
780 | * | |
781 | * Do the same with log drivers since the memory may not be available. | |
782 | */ | |
783 | gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY); | |
784 | ||
fb92308b SG |
785 | /* |
786 | * Set up the new global data pointer. So far only x86 does this | |
787 | * here. | |
788 | * TODO([email protected]): Consider doing this for all archs, or | |
789 | * dropping the new_gd parameter. | |
790 | */ | |
86bb4888 SG |
791 | if (CONFIG_IS_ENABLED(X86_64) && !IS_ENABLED(CONFIG_EFI_APP)) |
792 | arch_setup_gd(new_gd); | |
fb92308b | 793 | |
47a602ea | 794 | #if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64) |
6f6430d7 | 795 | gd = new_gd; |
be274b99 | 796 | #endif |
af1bc0cf | 797 | gd->flags &= ~GD_FLG_LOG_READY; |
7395398a | 798 | |
6f6430d7 SG |
799 | if (initcall_run_list(init_sequence_r)) |
800 | hang(); | |
801 | ||
802 | /* NOTREACHED - run_main_loop() does not return */ | |
803 | hang(); | |
804 | } |