]> Git Repo - J-u-boot.git/blame - common/board_r.c
Merge branch '2022-04-25-initial-implementation-of-stdboot'
[J-u-boot.git] / common / board_r.c
CommitLineData
83d290c5 1// SPDX-License-Identifier: GPL-2.0+
6f6430d7
SG
2/*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, [email protected].
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <[email protected]>
6f6430d7
SG
10 */
11
12#include <common.h>
12d738ae 13#include <api.h>
52f24238 14#include <bootstage.h>
1eb69ae4 15#include <cpu_func.h>
a6f2aafe 16#include <exports.h>
b79fdc76 17#include <flash.h>
db41d65a 18#include <hang.h>
8e8ccfe1 19#include <image.h>
36bf446b 20#include <irq_func.h>
f7ae49fc 21#include <log.h>
5e6267af 22#include <net.h>
90526e9f 23#include <asm/cache.h>
401d1c4f 24#include <asm/global_data.h>
3db71108 25#include <u-boot/crc.h>
3c10dc95 26#include <binman.h>
cbb2df20 27#include <command.h>
24b852a7 28#include <console.h>
1ce60176 29#include <dm.h>
3f989e7b 30#include <env.h>
f3998fdc 31#include <env_internal.h>
6f6430d7 32#include <fdtdec.h>
c2240d4d 33#include <ide.h>
6b8d3cea 34#include <init.h>
6f6430d7 35#include <initcall.h>
c2240d4d 36#include <kgdb.h>
c30b7adb 37#include <irq_func.h>
6f6430d7 38#include <malloc.h>
0eb25b61 39#include <mapmem.h>
c2240d4d 40#include <miiphy.h>
6f6430d7 41#include <mmc.h>
90a979d7 42#include <mux.h>
6f6430d7 43#include <nand.h>
3af86a4e 44#include <of_live.h>
6f6430d7 45#include <onenand_uboot.h>
722bc5b5 46#include <pvblock.h>
c2240d4d 47#include <scsi.h>
6f6430d7 48#include <serial.h>
c3e4430e 49#include <status_led.h>
6f6430d7 50#include <stdio_dev.h>
1057e6cf 51#include <timer.h>
71c52dba 52#include <trace.h>
c2240d4d 53#include <watchdog.h>
48654416 54#include <xen.h>
6f6430d7 55#include <asm/sections.h>
1ce60176 56#include <dm/root.h>
7de8bd03 57#include <dm/ofnode.h>
c2240d4d 58#include <linux/compiler.h>
1ce60176 59#include <linux/err.h>
50149ea3 60#include <efi_loader.h>
06985289 61#include <wdt.h>
fd765b0e 62#include <asm-generic/gpio.h>
c57c9439 63#include <efi_loader.h>
6f6430d7
SG
64
65DECLARE_GLOBAL_DATA_PTR;
66
67ulong monitor_flash_len;
68
dd2a6cd0 69__weak int board_flash_wp_on(void)
c2240d4d
SG
70{
71 /*
72 * Most flashes can't be detected when write protection is enabled,
73 * so provide a way to let U-Boot gracefully ignore write protected
74 * devices.
75 */
76 return 0;
77}
78
fb504b2c 79__weak int cpu_secondary_init_r(void)
c2240d4d 80{
c2240d4d
SG
81 return 0;
82}
6f6430d7 83
71c52dba
SG
84static int initr_trace(void)
85{
86#ifdef CONFIG_TRACE
87 trace_init(gd->trace_buff, CONFIG_TRACE_BUFFER_SIZE);
88#endif
89
90 return 0;
91}
92
6f6430d7
SG
93static int initr_reloc(void)
94{
c9356be3
SG
95 /* tell others: relocation done */
96 gd->flags |= GD_FLG_RELOC | GD_FLG_FULL_MALLOC_INIT;
6f6430d7
SG
97
98 return 0;
99}
100
4d4222d0 101#if defined(CONFIG_ARM) || defined(CONFIG_RISCV)
6f6430d7
SG
102/*
103 * Some of these functions are needed purely because the functions they
104 * call return void. If we change them to return 0, these stubs can go away.
105 */
106static int initr_caches(void)
107{
108 /* Enable caches */
109 enable_caches();
110 return 0;
111}
112#endif
113
c2240d4d
SG
114__weak int fixup_cpu(void)
115{
116 return 0;
117}
118
6f6430d7
SG
119static int initr_reloc_global_data(void)
120{
b60eff31
AA
121#ifdef __ARM__
122 monitor_flash_len = _end - __image_copy_start;
068feb9b 123#elif defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
2e88bb28 124 monitor_flash_len = (ulong)&_end - (ulong)&_start;
5ff10aa7 125#elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
a0ba279a 126 monitor_flash_len = (ulong)&__init_end - gd->relocaddr;
6f6430d7 127#endif
c2240d4d
SG
128#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
129 /*
130 * The gd->cpu pointer is set to an address in flash before relocation.
131 * We need to update it to point to the same CPU entry in RAM.
132 * TODO: why not just add gd->reloc_ofs?
133 */
a0ba279a 134 gd->arch.cpu += gd->relocaddr - CONFIG_SYS_MONITOR_BASE;
c2240d4d
SG
135
136 /*
137 * If we didn't know the cpu mask & # cores, we can save them of
138 * now rather than 'computing' them constantly
139 */
140 fixup_cpu();
141#endif
8d8ee47e 142#ifdef CONFIG_SYS_RELOC_GD_ENV_ADDR
c2240d4d 143 /*
6c6add60
SG
144 * Relocate the early env_addr pointer unless we know it is not inside
145 * the binary. Some systems need this and for the rest, it doesn't hurt.
c2240d4d 146 */
6c6add60 147 gd->env_addr += gd->reloc_off;
c2240d4d 148#endif
e9acb9ea
SDPP
149#ifdef CONFIG_OF_EMBED
150 /*
92f84b67
MS
151 * The fdt_blob needs to be moved to new relocation address
152 * incase of FDT blob is embedded with in image
153 */
e9acb9ea
SDPP
154 gd->fdt_blob += gd->reloc_off;
155#endif
50149ea3 156#ifdef CONFIG_EFI_LOADER
e7ac009b
HS
157 /*
158 * On the ARM architecture gd is mapped to a fixed register (r9 or x18).
159 * As this register may be overwritten by an EFI payload we save it here
160 * and restore it on every callback entered.
161 */
162 efi_save_gd();
163
50149ea3
AG
164 efi_runtime_relocate(gd->relocaddr, NULL);
165#endif
e9acb9ea 166
c2240d4d 167 return 0;
6f6430d7
SG
168}
169
130845ba 170__weak int arch_initr_trap(void)
c2240d4d 171{
c2240d4d
SG
172 return 0;
173}
c2240d4d 174
c2240d4d
SG
175#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
176static int initr_unlock_ram_in_cache(void)
177{
178 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
179 return 0;
180}
181#endif
182
c2240d4d
SG
183static int initr_barrier(void)
184{
185#ifdef CONFIG_PPC
186 /* TODO: Can we not use dmb() macros for this? */
187 asm("sync ; isync");
188#endif
189 return 0;
190}
191
6f6430d7
SG
192static int initr_malloc(void)
193{
194 ulong malloc_start;
195
f1896c45 196#if CONFIG_VAL(SYS_MALLOC_F_LEN)
d59476b6
SG
197 debug("Pre-reloc malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
198 gd->malloc_ptr / 1024);
199#endif
6f6430d7 200 /* The malloc area is immediately below the monitor copy in DRAM */
5e0404ff
SW
201 /*
202 * This value MUST match the value of gd->start_addr_sp in board_f.c:
203 * reserve_noncached().
204 */
a0ba279a 205 malloc_start = gd->relocaddr - TOTAL_MALLOC_LEN;
a733b06b
SG
206 mem_malloc_init((ulong)map_sysmem(malloc_start, TOTAL_MALLOC_LEN),
207 TOTAL_MALLOC_LEN);
6f6430d7
SG
208 return 0;
209}
210
3af86a4e
SG
211static int initr_of_live(void)
212{
a652d9c7
SG
213 if (CONFIG_IS_ENABLED(OF_LIVE)) {
214 int ret;
a132f770 215
a652d9c7
SG
216 bootstage_start(BOOTSTAGE_ID_ACCUM_OF_LIVE, "of_live");
217 ret = of_live_build(gd->fdt_blob,
218 (struct device_node **)gd_of_root_ptr());
219 bootstage_accum(BOOTSTAGE_ID_ACCUM_OF_LIVE);
220 if (ret)
221 return ret;
222 }
a132f770
SG
223
224 return 0;
3af86a4e 225}
3af86a4e 226
1ce60176
SG
227#ifdef CONFIG_DM
228static int initr_dm(void)
229{
1057e6cf
SG
230 int ret;
231
ab7cd627
SG
232 /* Save the pre-reloc driver model and start a new one */
233 gd->dm_root_f = gd->dm_root;
234 gd->dm_root = NULL;
d74d6b44
SG
235#ifdef CONFIG_TIMER
236 gd->timer = NULL;
237#endif
b67eefdb 238 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_R, "dm_r");
1057e6cf 239 ret = dm_init_and_scan(false);
b67eefdb 240 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_R);
1057e6cf
SG
241 if (ret)
242 return ret;
1057e6cf
SG
243
244 return 0;
1ce60176
SG
245}
246#endif
247
dd0edcb2
SG
248static int initr_dm_devices(void)
249{
250 int ret;
251
252 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
253 ret = dm_timer_init();
254 if (ret)
255 return ret;
256 }
257
90a979d7
JJH
258 if (IS_ENABLED(CONFIG_MULTIPLEXER)) {
259 /*
260 * Initialize the multiplexer controls to their default state.
261 * This must be done early as other drivers may unknowingly
262 * rely on it.
263 */
264 ret = dm_mux_init();
265 if (ret)
266 return ret;
267 }
268
dd0edcb2
SG
269 return 0;
270}
271
881c124a
SG
272static int initr_bootstage(void)
273{
881c124a
SG
274 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_R, "board_init_r");
275
276 return 0;
277}
278
6f6430d7
SG
279__weak int power_init_board(void)
280{
281 return 0;
282}
283
284static int initr_announce(void)
285{
a0ba279a 286 debug("Now running in RAM - U-Boot at: %08lx\n", gd->relocaddr);
6f6430d7
SG
287 return 0;
288}
289
61d7b1bb
AB
290#ifdef CONFIG_NEEDS_MANUAL_RELOC
291static int initr_manual_reloc_cmdtable(void)
292{
09140113
SG
293 fixup_cmdtable(ll_entry_start(struct cmd_tbl, cmd),
294 ll_entry_count(struct cmd_tbl, cmd));
61d7b1bb
AB
295 return 0;
296}
297#endif
298
3c10dc95
SG
299static int initr_binman(void)
300{
c03cb022
TH
301 int ret;
302
3c10dc95
SG
303 if (!CONFIG_IS_ENABLED(BINMAN_FDT))
304 return 0;
305
c03cb022
TH
306 ret = binman_init();
307 if (ret)
308 printf("binman_init failed:%d\n", ret);
309
310 return ret;
3c10dc95
SG
311}
312
e856bdcf 313#if defined(CONFIG_MTD_NOR_FLASH)
62d3a58d
PG
314__weak int is_flash_available(void)
315{
316 return 1;
317}
318
6f6430d7
SG
319static int initr_flash(void)
320{
c2240d4d 321 ulong flash_size = 0;
b75d8dc5 322 struct bd_info *bd = gd->bd;
6f6430d7 323
62d3a58d
PG
324 if (!is_flash_available())
325 return 0;
326
6f6430d7
SG
327 puts("Flash: ");
328
70879a92 329 if (board_flash_wp_on())
c2240d4d 330 printf("Uninitialized - Write Protect On\n");
70879a92 331 else
c2240d4d 332 flash_size = flash_init();
70879a92 333
6f6430d7
SG
334 print_size(flash_size, "");
335#ifdef CONFIG_SYS_FLASH_CHECKSUM
336 /*
92f84b67
MS
337 * Compute and print flash CRC if flashchecksum is set to 'y'
338 *
339 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
340 */
bfebc8c9 341 if (env_get_yesno("flashchecksum") == 1) {
92f84b67
MS
342 const uchar *flash_base = (const uchar *)CONFIG_SYS_FLASH_BASE;
343
6f6430d7 344 printf(" CRC: %08X", crc32(0,
92f84b67
MS
345 flash_base,
346 flash_size));
6f6430d7
SG
347 }
348#endif /* CONFIG_SYS_FLASH_CHECKSUM */
349 putc('\n');
350
c2240d4d
SG
351 /* update start of FLASH memory */
352#ifdef CONFIG_SYS_FLASH_BASE
353 bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
354#endif
355 /* size of FLASH memory (final value) */
356 bd->bi_flashsize = flash_size;
357
358#if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
359 /* Make a update of the Memctrl. */
360 update_flash_size(flash_size);
361#endif
362
c2240d4d
SG
363#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
364 /* flash mapped at end of memory map */
365 bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
366#elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
367 bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */
368#endif
369 return 0;
370}
371#endif
372
6f6430d7
SG
373#ifdef CONFIG_CMD_NAND
374/* go init the NAND */
2588ba14 375static int initr_nand(void)
6f6430d7
SG
376{
377 puts("NAND: ");
378 nand_init();
203db38a 379 printf("%lu MiB\n", nand_size() / 1024);
6f6430d7
SG
380 return 0;
381}
382#endif
383
384#if defined(CONFIG_CMD_ONENAND)
385/* go init the NAND */
2588ba14 386static int initr_onenand(void)
6f6430d7
SG
387{
388 puts("NAND: ");
389 onenand_init();
390 return 0;
391}
392#endif
393
4aa2ba3a 394#ifdef CONFIG_MMC
2588ba14 395static int initr_mmc(void)
6f6430d7
SG
396{
397 puts("MMC: ");
398 mmc_initialize(gd->bd);
399 return 0;
400}
401#endif
402
722bc5b5
AL
403#ifdef CONFIG_PVBLOCK
404static int initr_pvblock(void)
405{
406 puts("PVBLOCK: ");
407 pvblock_init();
408 return 0;
409}
410#endif
411
6f6430d7
SG
412/*
413 * Tell if it's OK to load the environment early in boot.
414 *
776babd7 415 * If CONFIG_OF_CONTROL is defined, we'll check with the FDT to see
6f6430d7
SG
416 * if this is OK (defaulting to saying it's OK).
417 *
418 * NOTE: Loading the environment early can be a bad idea if security is
419 * important, since no verification is done on the environment.
420 *
185f812c 421 * Return: 0 if environment should not be loaded, !=0 if it is ok to load
6f6430d7
SG
422 */
423static int should_load_env(void)
424{
9441f8cb 425 if (IS_ENABLED(CONFIG_OF_CONTROL))
7de8bd03 426 return ofnode_conf_read_int("load-environment", 1);
9441f8cb
OP
427
428 if (IS_ENABLED(CONFIG_DELAY_ENVIRONMENT))
429 return 0;
430
6f6430d7 431 return 1;
6f6430d7
SG
432}
433
434static int initr_env(void)
435{
436 /* initialize environment */
437 if (should_load_env())
438 env_relocate();
439 else
0ac7d722 440 env_set_default(NULL, 0);
9441f8cb 441
95fd9772
RV
442 env_import_fdt();
443
9441f8cb
OP
444 if (IS_ENABLED(CONFIG_OF_CONTROL))
445 env_set_hex("fdtcontroladdr",
446 (unsigned long)map_to_sysmem(gd->fdt_blob));
6f6430d7 447
12a3e1ad
DS
448 #if (CONFIG_IS_ENABLED(SAVE_PREV_BL_INITRAMFS_START_ADDR) || \
449 CONFIG_IS_ENABLED(SAVE_PREV_BL_FDT_ADDR))
450 save_prev_bl_data();
451 #endif
452
6f6430d7 453 /* Initialize from environment */
bb872dd9 454 image_load_addr = env_get_ulong("loadaddr", 16, image_load_addr);
c2240d4d 455
c2240d4d
SG
456 return 0;
457}
458
c722f0b0
AB
459#ifdef CONFIG_SYS_BOOTPARAMS_LEN
460static int initr_malloc_bootparams(void)
461{
462 gd->bd->bi_boot_params = (ulong)malloc(CONFIG_SYS_BOOTPARAMS_LEN);
463 if (!gd->bd->bi_boot_params) {
464 puts("WARNING: Cannot allocate space for boot parameters\n");
465 return -ENOMEM;
466 }
467 return 0;
468}
469#endif
470
6f6430d7
SG
471#ifdef CONFIG_CMD_NET
472static int initr_ethaddr(void)
473{
b75d8dc5 474 struct bd_info *bd = gd->bd;
c2240d4d
SG
475
476 /* kept around for legacy kernels only ... ignore the next section */
35affd7a 477 eth_env_get_enetaddr("ethaddr", bd->bi_enetaddr);
32d0b2df 478
c2240d4d
SG
479 return 0;
480}
481#endif /* CONFIG_CMD_NET */
482
2d8d190c 483#if defined(CONFIG_LED_STATUS)
c2240d4d
SG
484static int initr_status_led(void)
485{
2d8d190c
UM
486#if defined(CONFIG_LED_STATUS_BOOT)
487 status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_BLINKING);
13cfbe51
BN
488#else
489 status_led_init();
490#endif
c2240d4d
SG
491 return 0;
492}
493#endif
494
e8a016b5 495#if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI)
c2240d4d
SG
496static int initr_scsi(void)
497{
c2240d4d
SG
498 puts("SCSI: ");
499 scsi_init();
3804f5bb 500 puts("\n");
6f6430d7
SG
501
502 return 0;
503}
2c997e7a 504#endif
6f6430d7 505
6f6430d7
SG
506#ifdef CONFIG_CMD_NET
507static int initr_net(void)
508{
509 puts("Net: ");
d2eaec60 510 eth_initialize();
6f6430d7
SG
511#if defined(CONFIG_RESET_PHY_R)
512 debug("Reset Ethernet PHY\n");
513 reset_phy();
514#endif
515 return 0;
516}
517#endif
518
519#ifdef CONFIG_POST
520static int initr_post(void)
521{
522 post_run(NULL, POST_RAM | post_bootmode_get(0));
523 return 0;
524}
525#endif
526
ec15d5f6 527#if defined(CONFIG_IDE) && !defined(CONFIG_BLK)
c2240d4d
SG
528static int initr_ide(void)
529{
c2240d4d 530 puts("IDE: ");
c2240d4d
SG
531#if defined(CONFIG_START_IDE)
532 if (board_start_ide())
533 ide_init();
534#else
535 ide_init();
536#endif
537 return 0;
538}
539#endif
540
c5404b64 541#if defined(CONFIG_PRAM)
6f6430d7
SG
542/*
543 * Export available size of memory for Linux, taking into account the
544 * protected RAM at top of memory
545 */
546int initr_mem(void)
547{
548 ulong pram = 0;
549 char memsz[32];
550
bfebc8c9 551 pram = env_get_ulong("pram", 10, CONFIG_PRAM);
92f84b67 552 sprintf(memsz, "%ldk", (long int)((gd->ram_size / 1024) - pram));
382bee57 553 env_set("mem", memsz);
c2240d4d
SG
554
555 return 0;
556}
557#endif
558
ff66e7bb
SG
559static int dm_announce(void)
560{
561 int device_count;
562 int uclass_count;
563
564 if (IS_ENABLED(CONFIG_DM)) {
565 dm_get_stats(&device_count, &uclass_count);
566 printf("Core: %d devices, %d uclasses", device_count,
567 uclass_count);
568 if (CONFIG_IS_ENABLED(OF_REAL))
569 printf(", devicetree: %s", fdtdec_get_srcname());
570 printf("\n");
93233b07
SG
571 if (IS_ENABLED(CONFIG_OF_HAS_PRIOR_STAGE) &&
572 (gd->fdt_src == FDTSRC_SEPARATE ||
573 gd->fdt_src == FDTSRC_EMBED)) {
574 printf("Warning: Unexpected devicetree source (not from a prior stage)");
575 printf("Warning: U-Boot may not function properly\n");
576 }
ff66e7bb
SG
577 }
578
579 return 0;
580}
581
6f6430d7
SG
582static int run_main_loop(void)
583{
a733b06b
SG
584#ifdef CONFIG_SANDBOX
585 sandbox_main_loop_init();
586#endif
6f6430d7
SG
587 /* main_loop() can return to retry autoboot, if so just run it again */
588 for (;;)
589 main_loop();
590 return 0;
591}
592
593/*
47870afa 594 * We hope to remove most of the driver-related init and do it if/when
6f6430d7 595 * the driver is later used.
c2240d4d
SG
596 *
597 * TODO: perhaps reset the watchdog in the initcall function after each call?
6f6430d7 598 */
4acff452 599static init_fnc_t init_sequence_r[] = {
71c52dba 600 initr_trace,
6f6430d7 601 initr_reloc,
87a5d1b5 602 event_init,
c2240d4d 603 /* TODO: could x86/PPC have this also perhaps? */
4d4222d0 604#if defined(CONFIG_ARM) || defined(CONFIG_RISCV)
6f6430d7 605 initr_caches,
12eaf31c
YS
606 /* Note: For Freescale LS2 SoCs, new MMU table is created in DDR.
607 * A temporary mapping of IFC high region is since removed,
92f84b67 608 * so environmental variables in NOR flash is not available
12eaf31c
YS
609 * until board_init() is called below to remap IFC to high
610 * region.
611 */
9fb02491
SG
612#endif
613 initr_reloc_global_data,
fef3e25f
YS
614#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
615 initr_unlock_ram_in_cache,
616#endif
9fb02491
SG
617 initr_barrier,
618 initr_malloc,
af1bc0cf 619 log_init,
5ac44a55 620 initr_bootstage, /* Needs malloc() but has its own timer */
51c5a2c5
OP
621#if defined(CONFIG_CONSOLE_RECORD)
622 console_record_init,
623#endif
671fa63e 624#ifdef CONFIG_SYS_NONCACHED_MEMORY
42d0d422 625 noncached_init,
671fa63e 626#endif
3af86a4e 627 initr_of_live,
9fb02491
SG
628#ifdef CONFIG_DM
629 initr_dm,
630#endif
a43b598c 631#ifdef CONFIG_ADDR_MAP
1b212bb9 632 init_addr_map,
a43b598c 633#endif
17585e2d
PD
634#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV) || \
635 defined(CONFIG_SANDBOX)
6f6430d7 636 board_init, /* Setup chipselects */
c2240d4d
SG
637#endif
638 /*
639 * TODO: printing of the clock inforamtion of the board is now
640 * implemented as part of bdinfo command. Currently only support for
641 * davinci SOC's is added. Remove this check once all the board
642 * implement this.
643 */
644#ifdef CONFIG_CLOCKS
645 set_cpu_clk_info, /* Setup clock information */
5d00995c
AG
646#endif
647#ifdef CONFIG_EFI_LOADER
648 efi_memory_init,
6f6430d7 649#endif
3c10dc95 650 initr_binman,
fe08d39d
SG
651#ifdef CONFIG_FSP_VERSION2
652 arch_fsp_init_r,
653#endif
dd0edcb2 654 initr_dm_devices,
9fb02491 655 stdio_init_tables,
bf2fb81a 656 serial_initialize,
6f6430d7 657 initr_announce,
ff66e7bb 658 dm_announce,
6874cb72 659#if CONFIG_IS_ENABLED(WDT)
84b2416b
WG
660 initr_watchdog,
661#endif
c2240d4d 662 INIT_FUNC_WATCHDOG_RESET
276b6c94
OP
663#if defined(CONFIG_NEEDS_MANUAL_RELOC) && defined(CONFIG_BLOCK_CACHE)
664 blkcache_init,
665#endif
61d7b1bb
AB
666#ifdef CONFIG_NEEDS_MANUAL_RELOC
667 initr_manual_reloc_cmdtable,
668#endif
130845ba 669 arch_initr_trap,
c2240d4d
SG
670#if defined(CONFIG_BOARD_EARLY_INIT_R)
671 board_early_init_r,
672#endif
673 INIT_FUNC_WATCHDOG_RESET
6f6430d7 674#ifdef CONFIG_POST
7addd3c6 675 post_output_backlog,
6f6430d7 676#endif
c2240d4d 677 INIT_FUNC_WATCHDOG_RESET
b9f6d0f7 678#if defined(CONFIG_PCI_INIT_R) && defined(CONFIG_SYS_EARLY_PCI_INIT)
c2240d4d
SG
679 /*
680 * Do early PCI configuration _before_ the flash gets initialised,
92f84b67 681 * because PCU resources are crucial for flash access on some boards.
c2240d4d 682 */
b9f6d0f7 683 pci_init,
c2240d4d 684#endif
6f6430d7
SG
685#ifdef CONFIG_ARCH_EARLY_INIT_R
686 arch_early_init_r,
687#endif
688 power_init_board,
e856bdcf 689#ifdef CONFIG_MTD_NOR_FLASH
6f6430d7 690 initr_flash,
c2240d4d
SG
691#endif
692 INIT_FUNC_WATCHDOG_RESET
936478e7 693#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86)
c2240d4d
SG
694 /* initialize higher level parts of CPU like time base and timers */
695 cpu_init_r,
be274b99 696#endif
6f6430d7
SG
697#ifdef CONFIG_CMD_NAND
698 initr_nand,
699#endif
700#ifdef CONFIG_CMD_ONENAND
701 initr_onenand,
702#endif
4aa2ba3a 703#ifdef CONFIG_MMC
6f6430d7 704 initr_mmc,
48654416
OA
705#endif
706#ifdef CONFIG_XEN
eb2825b7 707 xen_init,
722bc5b5
AL
708#endif
709#ifdef CONFIG_PVBLOCK
710 initr_pvblock,
6f6430d7
SG
711#endif
712 initr_env,
c722f0b0
AB
713#ifdef CONFIG_SYS_BOOTPARAMS_LEN
714 initr_malloc_bootparams,
715#endif
c2240d4d 716 INIT_FUNC_WATCHDOG_RESET
fb504b2c 717 cpu_secondary_init_r,
d7d40f61 718#if defined(CONFIG_ID_EEPROM)
c2240d4d
SG
719 mac_read_from_eeprom,
720#endif
721 INIT_FUNC_WATCHDOG_RESET
b9f6d0f7 722#if defined(CONFIG_PCI_INIT_R) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
c2240d4d
SG
723 /*
724 * Do pci configuration
725 */
b9f6d0f7 726 pci_init,
c2240d4d 727#endif
9fb02491 728 stdio_add_devices,
01548580 729 jumptable_init,
6f6430d7 730#ifdef CONFIG_API
ce41e735 731 api_init,
6f6430d7
SG
732#endif
733 console_init_r, /* fully init console as a device */
734#ifdef CONFIG_DISPLAY_BOARDINFO_LATE
b0895384 735 console_announce_r,
0365ffcc 736 show_board_info,
6f6430d7
SG
737#endif
738#ifdef CONFIG_ARCH_MISC_INIT
739 arch_misc_init, /* miscellaneous arch-dependent init */
740#endif
741#ifdef CONFIG_MISC_INIT_R
742 misc_init_r, /* miscellaneous platform-dependent init */
c2240d4d
SG
743#endif
744 INIT_FUNC_WATCHDOG_RESET
745#ifdef CONFIG_CMD_KGDB
78fc0395 746 kgdb_init,
6f6430d7
SG
747#endif
748 interrupt_init,
daab59ac 749#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_M68K)
be274b99
SG
750 timer_init, /* initialize timer */
751#endif
2d8d190c 752#if defined(CONFIG_LED_STATUS)
c2240d4d
SG
753 initr_status_led,
754#endif
755 /* PPC has a udelay(20) here dating from 2002. Why? */
6f6430d7
SG
756#ifdef CONFIG_CMD_NET
757 initr_ethaddr,
758#endif
49b10cb4 759#if defined(CONFIG_GPIO_HOG)
5fc7cf8c
HS
760 gpio_hog_probe_all,
761#endif
6f6430d7
SG
762#ifdef CONFIG_BOARD_LATE_INIT
763 board_late_init,
764#endif
e8a016b5 765#if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI)
c2240d4d
SG
766 INIT_FUNC_WATCHDOG_RESET
767 initr_scsi,
768#endif
6f6430d7 769#ifdef CONFIG_BITBANGMII
c65abc70 770 bb_miiphy_init,
6f6430d7 771#endif
fd00c53f 772#ifdef CONFIG_PCI_ENDPOINT
c343e8c0 773 pci_ep_init,
fd00c53f 774#endif
6f6430d7 775#ifdef CONFIG_CMD_NET
c2240d4d 776 INIT_FUNC_WATCHDOG_RESET
6f6430d7
SG
777 initr_net,
778#endif
779#ifdef CONFIG_POST
780 initr_post,
c2240d4d 781#endif
ec15d5f6 782#if defined(CONFIG_IDE) && !defined(CONFIG_BLK)
c2240d4d
SG
783 initr_ide,
784#endif
785#ifdef CONFIG_LAST_STAGE_INIT
786 INIT_FUNC_WATCHDOG_RESET
787 /*
788 * Some parts can be only initialized if all others (like
789 * Interrupts) are up and running (i.e. the PC-style ISA
790 * keyboard).
791 */
792 last_stage_init,
793#endif
c5404b64 794#if defined(CONFIG_PRAM)
c2240d4d 795 initr_mem,
c57c9439
AT
796#endif
797#ifdef CONFIG_EFI_SETUP_EARLY
a57ad20d 798 efi_init_early,
6f6430d7
SG
799#endif
800 run_main_loop,
801};
802
803void board_init_r(gd_t *new_gd, ulong dest_addr)
804{
fb92308b
SG
805 /*
806 * Set up the new global data pointer. So far only x86 does this
807 * here.
808 * TODO([email protected]): Consider doing this for all archs, or
809 * dropping the new_gd parameter.
810 */
86bb4888
SG
811 if (CONFIG_IS_ENABLED(X86_64) && !IS_ENABLED(CONFIG_EFI_APP))
812 arch_setup_gd(new_gd);
fb92308b 813
7395398a
AB
814#ifdef CONFIG_NEEDS_MANUAL_RELOC
815 int i;
816#endif
817
47a602ea 818#if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
6f6430d7 819 gd = new_gd;
be274b99 820#endif
af1bc0cf 821 gd->flags &= ~GD_FLG_LOG_READY;
7395398a
AB
822
823#ifdef CONFIG_NEEDS_MANUAL_RELOC
824 for (i = 0; i < ARRAY_SIZE(init_sequence_r); i++)
825 init_sequence_r[i] += gd->reloc_off;
826#endif
827
6f6430d7
SG
828 if (initcall_run_list(init_sequence_r))
829 hang();
830
831 /* NOTREACHED - run_main_loop() does not return */
832 hang();
833}
This page took 0.557701 seconds and 4 git commands to generate.