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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
6f6430d7 SG |
2 | /* |
3 | * Copyright (c) 2011 The Chromium OS Authors. | |
4 | * (C) Copyright 2002-2006 | |
5 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
6 | * | |
7 | * (C) Copyright 2002 | |
8 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
9 | * Marius Groeger <[email protected]> | |
6f6430d7 SG |
10 | */ |
11 | ||
12 | #include <common.h> | |
12d738ae | 13 | #include <api.h> |
52f24238 | 14 | #include <bootstage.h> |
1eb69ae4 | 15 | #include <cpu_func.h> |
4e4bf944 | 16 | #include <display_options.h> |
a6f2aafe | 17 | #include <exports.h> |
17ead040 | 18 | #ifdef CONFIG_MTD_NOR_FLASH |
b79fdc76 | 19 | #include <flash.h> |
17ead040 | 20 | #endif |
db41d65a | 21 | #include <hang.h> |
8e8ccfe1 | 22 | #include <image.h> |
36bf446b | 23 | #include <irq_func.h> |
f7ae49fc | 24 | #include <log.h> |
5e6267af | 25 | #include <net.h> |
90526e9f | 26 | #include <asm/cache.h> |
401d1c4f | 27 | #include <asm/global_data.h> |
3db71108 | 28 | #include <u-boot/crc.h> |
3c10dc95 | 29 | #include <binman.h> |
cbb2df20 | 30 | #include <command.h> |
24b852a7 | 31 | #include <console.h> |
1ce60176 | 32 | #include <dm.h> |
3f989e7b | 33 | #include <env.h> |
f3998fdc | 34 | #include <env_internal.h> |
6f6430d7 | 35 | #include <fdtdec.h> |
c2240d4d | 36 | #include <ide.h> |
6b8d3cea | 37 | #include <init.h> |
6f6430d7 | 38 | #include <initcall.h> |
c2240d4d | 39 | #include <kgdb.h> |
c30b7adb | 40 | #include <irq_func.h> |
6f6430d7 | 41 | #include <malloc.h> |
0eb25b61 | 42 | #include <mapmem.h> |
c2240d4d | 43 | #include <miiphy.h> |
6f6430d7 | 44 | #include <mmc.h> |
90a979d7 | 45 | #include <mux.h> |
6f6430d7 | 46 | #include <nand.h> |
3af86a4e | 47 | #include <of_live.h> |
6f6430d7 | 48 | #include <onenand_uboot.h> |
722bc5b5 | 49 | #include <pvblock.h> |
c2240d4d | 50 | #include <scsi.h> |
6f6430d7 | 51 | #include <serial.h> |
c3e4430e | 52 | #include <status_led.h> |
6f6430d7 | 53 | #include <stdio_dev.h> |
1057e6cf | 54 | #include <timer.h> |
71c52dba | 55 | #include <trace.h> |
c2240d4d | 56 | #include <watchdog.h> |
48654416 | 57 | #include <xen.h> |
6f6430d7 | 58 | #include <asm/sections.h> |
1ce60176 | 59 | #include <dm/root.h> |
7de8bd03 | 60 | #include <dm/ofnode.h> |
c2240d4d | 61 | #include <linux/compiler.h> |
1ce60176 | 62 | #include <linux/err.h> |
50149ea3 | 63 | #include <efi_loader.h> |
06985289 | 64 | #include <wdt.h> |
fd765b0e | 65 | #include <asm-generic/gpio.h> |
c57c9439 | 66 | #include <efi_loader.h> |
13ae36cc | 67 | #include <relocate.h> |
6f6430d7 SG |
68 | |
69 | DECLARE_GLOBAL_DATA_PTR; | |
70 | ||
71 | ulong monitor_flash_len; | |
72 | ||
dd2a6cd0 | 73 | __weak int board_flash_wp_on(void) |
c2240d4d SG |
74 | { |
75 | /* | |
76 | * Most flashes can't be detected when write protection is enabled, | |
77 | * so provide a way to let U-Boot gracefully ignore write protected | |
78 | * devices. | |
79 | */ | |
80 | return 0; | |
81 | } | |
82 | ||
fb504b2c | 83 | __weak int cpu_secondary_init_r(void) |
c2240d4d | 84 | { |
c2240d4d SG |
85 | return 0; |
86 | } | |
6f6430d7 | 87 | |
71c52dba SG |
88 | static int initr_trace(void) |
89 | { | |
90 | #ifdef CONFIG_TRACE | |
91 | trace_init(gd->trace_buff, CONFIG_TRACE_BUFFER_SIZE); | |
92 | #endif | |
93 | ||
94 | return 0; | |
95 | } | |
96 | ||
6f6430d7 SG |
97 | static int initr_reloc(void) |
98 | { | |
c9356be3 SG |
99 | /* tell others: relocation done */ |
100 | gd->flags |= GD_FLG_RELOC | GD_FLG_FULL_MALLOC_INIT; | |
6f6430d7 SG |
101 | |
102 | return 0; | |
103 | } | |
104 | ||
4d4222d0 | 105 | #if defined(CONFIG_ARM) || defined(CONFIG_RISCV) |
6f6430d7 SG |
106 | /* |
107 | * Some of these functions are needed purely because the functions they | |
108 | * call return void. If we change them to return 0, these stubs can go away. | |
109 | */ | |
110 | static int initr_caches(void) | |
111 | { | |
112 | /* Enable caches */ | |
113 | enable_caches(); | |
114 | return 0; | |
115 | } | |
116 | #endif | |
117 | ||
c2240d4d SG |
118 | __weak int fixup_cpu(void) |
119 | { | |
120 | return 0; | |
121 | } | |
122 | ||
6f6430d7 SG |
123 | static int initr_reloc_global_data(void) |
124 | { | |
b60eff31 AA |
125 | #ifdef __ARM__ |
126 | monitor_flash_len = _end - __image_copy_start; | |
11232139 | 127 | #elif defined(CONFIG_RISCV) |
2e88bb28 | 128 | monitor_flash_len = (ulong)&_end - (ulong)&_start; |
5ff10aa7 | 129 | #elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2) |
a0ba279a | 130 | monitor_flash_len = (ulong)&__init_end - gd->relocaddr; |
6f6430d7 | 131 | #endif |
c2240d4d SG |
132 | #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) |
133 | /* | |
134 | * The gd->cpu pointer is set to an address in flash before relocation. | |
135 | * We need to update it to point to the same CPU entry in RAM. | |
136 | * TODO: why not just add gd->reloc_ofs? | |
137 | */ | |
a0ba279a | 138 | gd->arch.cpu += gd->relocaddr - CONFIG_SYS_MONITOR_BASE; |
c2240d4d SG |
139 | |
140 | /* | |
141 | * If we didn't know the cpu mask & # cores, we can save them of | |
142 | * now rather than 'computing' them constantly | |
143 | */ | |
144 | fixup_cpu(); | |
145 | #endif | |
8d8ee47e | 146 | #ifdef CONFIG_SYS_RELOC_GD_ENV_ADDR |
c2240d4d | 147 | /* |
6c6add60 SG |
148 | * Relocate the early env_addr pointer unless we know it is not inside |
149 | * the binary. Some systems need this and for the rest, it doesn't hurt. | |
c2240d4d | 150 | */ |
6c6add60 | 151 | gd->env_addr += gd->reloc_off; |
c2240d4d | 152 | #endif |
e9acb9ea SDPP |
153 | #ifdef CONFIG_OF_EMBED |
154 | /* | |
92f84b67 MS |
155 | * The fdt_blob needs to be moved to new relocation address |
156 | * incase of FDT blob is embedded with in image | |
157 | */ | |
e9acb9ea SDPP |
158 | gd->fdt_blob += gd->reloc_off; |
159 | #endif | |
50149ea3 | 160 | #ifdef CONFIG_EFI_LOADER |
e7ac009b HS |
161 | /* |
162 | * On the ARM architecture gd is mapped to a fixed register (r9 or x18). | |
163 | * As this register may be overwritten by an EFI payload we save it here | |
164 | * and restore it on every callback entered. | |
165 | */ | |
166 | efi_save_gd(); | |
167 | ||
50149ea3 AG |
168 | efi_runtime_relocate(gd->relocaddr, NULL); |
169 | #endif | |
e9acb9ea | 170 | |
c2240d4d | 171 | return 0; |
6f6430d7 SG |
172 | } |
173 | ||
130845ba | 174 | __weak int arch_initr_trap(void) |
c2240d4d | 175 | { |
c2240d4d SG |
176 | return 0; |
177 | } | |
c2240d4d | 178 | |
c2240d4d SG |
179 | #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) |
180 | static int initr_unlock_ram_in_cache(void) | |
181 | { | |
182 | unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */ | |
183 | return 0; | |
184 | } | |
185 | #endif | |
186 | ||
c2240d4d SG |
187 | static int initr_barrier(void) |
188 | { | |
189 | #ifdef CONFIG_PPC | |
190 | /* TODO: Can we not use dmb() macros for this? */ | |
191 | asm("sync ; isync"); | |
192 | #endif | |
193 | return 0; | |
194 | } | |
195 | ||
6f6430d7 SG |
196 | static int initr_malloc(void) |
197 | { | |
198 | ulong malloc_start; | |
199 | ||
f1896c45 | 200 | #if CONFIG_VAL(SYS_MALLOC_F_LEN) |
d59476b6 SG |
201 | debug("Pre-reloc malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr, |
202 | gd->malloc_ptr / 1024); | |
203 | #endif | |
6f6430d7 | 204 | /* The malloc area is immediately below the monitor copy in DRAM */ |
5e0404ff SW |
205 | /* |
206 | * This value MUST match the value of gd->start_addr_sp in board_f.c: | |
207 | * reserve_noncached(). | |
208 | */ | |
a0ba279a | 209 | malloc_start = gd->relocaddr - TOTAL_MALLOC_LEN; |
a733b06b SG |
210 | mem_malloc_init((ulong)map_sysmem(malloc_start, TOTAL_MALLOC_LEN), |
211 | TOTAL_MALLOC_LEN); | |
6f6430d7 SG |
212 | return 0; |
213 | } | |
214 | ||
3af86a4e SG |
215 | static int initr_of_live(void) |
216 | { | |
a652d9c7 SG |
217 | if (CONFIG_IS_ENABLED(OF_LIVE)) { |
218 | int ret; | |
a132f770 | 219 | |
a652d9c7 SG |
220 | bootstage_start(BOOTSTAGE_ID_ACCUM_OF_LIVE, "of_live"); |
221 | ret = of_live_build(gd->fdt_blob, | |
222 | (struct device_node **)gd_of_root_ptr()); | |
223 | bootstage_accum(BOOTSTAGE_ID_ACCUM_OF_LIVE); | |
224 | if (ret) | |
225 | return ret; | |
226 | } | |
a132f770 SG |
227 | |
228 | return 0; | |
3af86a4e | 229 | } |
3af86a4e | 230 | |
1ce60176 SG |
231 | #ifdef CONFIG_DM |
232 | static int initr_dm(void) | |
233 | { | |
1057e6cf SG |
234 | int ret; |
235 | ||
ab7cd627 SG |
236 | /* Save the pre-reloc driver model and start a new one */ |
237 | gd->dm_root_f = gd->dm_root; | |
238 | gd->dm_root = NULL; | |
d74d6b44 SG |
239 | #ifdef CONFIG_TIMER |
240 | gd->timer = NULL; | |
241 | #endif | |
b67eefdb | 242 | bootstage_start(BOOTSTAGE_ID_ACCUM_DM_R, "dm_r"); |
1057e6cf | 243 | ret = dm_init_and_scan(false); |
b67eefdb | 244 | bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_R); |
1057e6cf SG |
245 | if (ret) |
246 | return ret; | |
1057e6cf SG |
247 | |
248 | return 0; | |
1ce60176 SG |
249 | } |
250 | #endif | |
251 | ||
dd0edcb2 SG |
252 | static int initr_dm_devices(void) |
253 | { | |
254 | int ret; | |
255 | ||
256 | if (IS_ENABLED(CONFIG_TIMER_EARLY)) { | |
257 | ret = dm_timer_init(); | |
258 | if (ret) | |
259 | return ret; | |
260 | } | |
261 | ||
90a979d7 JJH |
262 | if (IS_ENABLED(CONFIG_MULTIPLEXER)) { |
263 | /* | |
264 | * Initialize the multiplexer controls to their default state. | |
265 | * This must be done early as other drivers may unknowingly | |
266 | * rely on it. | |
267 | */ | |
268 | ret = dm_mux_init(); | |
269 | if (ret) | |
270 | return ret; | |
271 | } | |
272 | ||
dd0edcb2 SG |
273 | return 0; |
274 | } | |
275 | ||
881c124a SG |
276 | static int initr_bootstage(void) |
277 | { | |
881c124a SG |
278 | bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_R, "board_init_r"); |
279 | ||
280 | return 0; | |
281 | } | |
282 | ||
6f6430d7 SG |
283 | __weak int power_init_board(void) |
284 | { | |
285 | return 0; | |
286 | } | |
287 | ||
288 | static int initr_announce(void) | |
289 | { | |
a0ba279a | 290 | debug("Now running in RAM - U-Boot at: %08lx\n", gd->relocaddr); |
6f6430d7 SG |
291 | return 0; |
292 | } | |
293 | ||
61d7b1bb AB |
294 | #ifdef CONFIG_NEEDS_MANUAL_RELOC |
295 | static int initr_manual_reloc_cmdtable(void) | |
296 | { | |
09140113 SG |
297 | fixup_cmdtable(ll_entry_start(struct cmd_tbl, cmd), |
298 | ll_entry_count(struct cmd_tbl, cmd)); | |
61d7b1bb AB |
299 | return 0; |
300 | } | |
301 | #endif | |
302 | ||
3c10dc95 SG |
303 | static int initr_binman(void) |
304 | { | |
c03cb022 TH |
305 | int ret; |
306 | ||
3c10dc95 SG |
307 | if (!CONFIG_IS_ENABLED(BINMAN_FDT)) |
308 | return 0; | |
309 | ||
c03cb022 TH |
310 | ret = binman_init(); |
311 | if (ret) | |
312 | printf("binman_init failed:%d\n", ret); | |
313 | ||
314 | return ret; | |
3c10dc95 SG |
315 | } |
316 | ||
e856bdcf | 317 | #if defined(CONFIG_MTD_NOR_FLASH) |
62d3a58d PG |
318 | __weak int is_flash_available(void) |
319 | { | |
320 | return 1; | |
321 | } | |
322 | ||
6f6430d7 SG |
323 | static int initr_flash(void) |
324 | { | |
c2240d4d | 325 | ulong flash_size = 0; |
b75d8dc5 | 326 | struct bd_info *bd = gd->bd; |
6f6430d7 | 327 | |
62d3a58d PG |
328 | if (!is_flash_available()) |
329 | return 0; | |
330 | ||
6f6430d7 SG |
331 | puts("Flash: "); |
332 | ||
70879a92 | 333 | if (board_flash_wp_on()) |
c2240d4d | 334 | printf("Uninitialized - Write Protect On\n"); |
70879a92 | 335 | else |
c2240d4d | 336 | flash_size = flash_init(); |
70879a92 | 337 | |
6f6430d7 SG |
338 | print_size(flash_size, ""); |
339 | #ifdef CONFIG_SYS_FLASH_CHECKSUM | |
340 | /* | |
92f84b67 MS |
341 | * Compute and print flash CRC if flashchecksum is set to 'y' |
342 | * | |
343 | * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX | |
344 | */ | |
bfebc8c9 | 345 | if (env_get_yesno("flashchecksum") == 1) { |
92f84b67 MS |
346 | const uchar *flash_base = (const uchar *)CONFIG_SYS_FLASH_BASE; |
347 | ||
6f6430d7 | 348 | printf(" CRC: %08X", crc32(0, |
92f84b67 MS |
349 | flash_base, |
350 | flash_size)); | |
6f6430d7 SG |
351 | } |
352 | #endif /* CONFIG_SYS_FLASH_CHECKSUM */ | |
353 | putc('\n'); | |
354 | ||
c2240d4d SG |
355 | /* update start of FLASH memory */ |
356 | #ifdef CONFIG_SYS_FLASH_BASE | |
357 | bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; | |
358 | #endif | |
359 | /* size of FLASH memory (final value) */ | |
360 | bd->bi_flashsize = flash_size; | |
361 | ||
362 | #if defined(CONFIG_SYS_UPDATE_FLASH_SIZE) | |
363 | /* Make a update of the Memctrl. */ | |
364 | update_flash_size(flash_size); | |
365 | #endif | |
366 | ||
c2240d4d SG |
367 | #if defined(CONFIG_OXC) || defined(CONFIG_RMU) |
368 | /* flash mapped at end of memory map */ | |
369 | bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size; | |
370 | #elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE | |
371 | bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */ | |
372 | #endif | |
373 | return 0; | |
374 | } | |
375 | #endif | |
376 | ||
6f6430d7 SG |
377 | #ifdef CONFIG_CMD_NAND |
378 | /* go init the NAND */ | |
2588ba14 | 379 | static int initr_nand(void) |
6f6430d7 SG |
380 | { |
381 | puts("NAND: "); | |
382 | nand_init(); | |
203db38a | 383 | printf("%lu MiB\n", nand_size() / 1024); |
6f6430d7 SG |
384 | return 0; |
385 | } | |
386 | #endif | |
387 | ||
388 | #if defined(CONFIG_CMD_ONENAND) | |
389 | /* go init the NAND */ | |
2588ba14 | 390 | static int initr_onenand(void) |
6f6430d7 SG |
391 | { |
392 | puts("NAND: "); | |
393 | onenand_init(); | |
394 | return 0; | |
395 | } | |
396 | #endif | |
397 | ||
4aa2ba3a | 398 | #ifdef CONFIG_MMC |
2588ba14 | 399 | static int initr_mmc(void) |
6f6430d7 SG |
400 | { |
401 | puts("MMC: "); | |
402 | mmc_initialize(gd->bd); | |
403 | return 0; | |
404 | } | |
405 | #endif | |
406 | ||
722bc5b5 AL |
407 | #ifdef CONFIG_PVBLOCK |
408 | static int initr_pvblock(void) | |
409 | { | |
410 | puts("PVBLOCK: "); | |
411 | pvblock_init(); | |
412 | return 0; | |
413 | } | |
414 | #endif | |
415 | ||
6f6430d7 SG |
416 | /* |
417 | * Tell if it's OK to load the environment early in boot. | |
418 | * | |
776babd7 | 419 | * If CONFIG_OF_CONTROL is defined, we'll check with the FDT to see |
6f6430d7 SG |
420 | * if this is OK (defaulting to saying it's OK). |
421 | * | |
422 | * NOTE: Loading the environment early can be a bad idea if security is | |
423 | * important, since no verification is done on the environment. | |
424 | * | |
185f812c | 425 | * Return: 0 if environment should not be loaded, !=0 if it is ok to load |
6f6430d7 SG |
426 | */ |
427 | static int should_load_env(void) | |
428 | { | |
9441f8cb | 429 | if (IS_ENABLED(CONFIG_OF_CONTROL)) |
7de8bd03 | 430 | return ofnode_conf_read_int("load-environment", 1); |
9441f8cb OP |
431 | |
432 | if (IS_ENABLED(CONFIG_DELAY_ENVIRONMENT)) | |
433 | return 0; | |
434 | ||
6f6430d7 | 435 | return 1; |
6f6430d7 SG |
436 | } |
437 | ||
438 | static int initr_env(void) | |
439 | { | |
440 | /* initialize environment */ | |
441 | if (should_load_env()) | |
442 | env_relocate(); | |
443 | else | |
0ac7d722 | 444 | env_set_default(NULL, 0); |
9441f8cb | 445 | |
95fd9772 RV |
446 | env_import_fdt(); |
447 | ||
9441f8cb OP |
448 | if (IS_ENABLED(CONFIG_OF_CONTROL)) |
449 | env_set_hex("fdtcontroladdr", | |
450 | (unsigned long)map_to_sysmem(gd->fdt_blob)); | |
6f6430d7 | 451 | |
12a3e1ad DS |
452 | #if (CONFIG_IS_ENABLED(SAVE_PREV_BL_INITRAMFS_START_ADDR) || \ |
453 | CONFIG_IS_ENABLED(SAVE_PREV_BL_FDT_ADDR)) | |
454 | save_prev_bl_data(); | |
455 | #endif | |
456 | ||
6f6430d7 | 457 | /* Initialize from environment */ |
bb872dd9 | 458 | image_load_addr = env_get_ulong("loadaddr", 16, image_load_addr); |
c2240d4d | 459 | |
c2240d4d SG |
460 | return 0; |
461 | } | |
462 | ||
167f699b | 463 | #ifdef CONFIG_SYS_MALLOC_BOOTPARAMS |
c722f0b0 AB |
464 | static int initr_malloc_bootparams(void) |
465 | { | |
466 | gd->bd->bi_boot_params = (ulong)malloc(CONFIG_SYS_BOOTPARAMS_LEN); | |
467 | if (!gd->bd->bi_boot_params) { | |
468 | puts("WARNING: Cannot allocate space for boot parameters\n"); | |
469 | return -ENOMEM; | |
470 | } | |
471 | return 0; | |
472 | } | |
473 | #endif | |
474 | ||
2d8d190c | 475 | #if defined(CONFIG_LED_STATUS) |
c2240d4d SG |
476 | static int initr_status_led(void) |
477 | { | |
2d8d190c UM |
478 | #if defined(CONFIG_LED_STATUS_BOOT) |
479 | status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_BLINKING); | |
13cfbe51 BN |
480 | #else |
481 | status_led_init(); | |
482 | #endif | |
c2240d4d SG |
483 | return 0; |
484 | } | |
485 | #endif | |
486 | ||
e8a016b5 | 487 | #if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI) |
c2240d4d SG |
488 | static int initr_scsi(void) |
489 | { | |
c2240d4d SG |
490 | puts("SCSI: "); |
491 | scsi_init(); | |
3804f5bb | 492 | puts("\n"); |
6f6430d7 SG |
493 | |
494 | return 0; | |
495 | } | |
2c997e7a | 496 | #endif |
6f6430d7 | 497 | |
6f6430d7 SG |
498 | #ifdef CONFIG_CMD_NET |
499 | static int initr_net(void) | |
500 | { | |
501 | puts("Net: "); | |
d2eaec60 | 502 | eth_initialize(); |
6f6430d7 SG |
503 | #if defined(CONFIG_RESET_PHY_R) |
504 | debug("Reset Ethernet PHY\n"); | |
505 | reset_phy(); | |
506 | #endif | |
507 | return 0; | |
508 | } | |
509 | #endif | |
510 | ||
511 | #ifdef CONFIG_POST | |
512 | static int initr_post(void) | |
513 | { | |
514 | post_run(NULL, POST_RAM | post_bootmode_get(0)); | |
515 | return 0; | |
516 | } | |
517 | #endif | |
518 | ||
ec15d5f6 | 519 | #if defined(CONFIG_IDE) && !defined(CONFIG_BLK) |
c2240d4d SG |
520 | static int initr_ide(void) |
521 | { | |
c2240d4d | 522 | puts("IDE: "); |
c2240d4d SG |
523 | #if defined(CONFIG_START_IDE) |
524 | if (board_start_ide()) | |
525 | ide_init(); | |
526 | #else | |
527 | ide_init(); | |
528 | #endif | |
529 | return 0; | |
530 | } | |
531 | #endif | |
532 | ||
c5404b64 | 533 | #if defined(CONFIG_PRAM) |
6f6430d7 SG |
534 | /* |
535 | * Export available size of memory for Linux, taking into account the | |
536 | * protected RAM at top of memory | |
537 | */ | |
538 | int initr_mem(void) | |
539 | { | |
540 | ulong pram = 0; | |
541 | char memsz[32]; | |
542 | ||
bfebc8c9 | 543 | pram = env_get_ulong("pram", 10, CONFIG_PRAM); |
92f84b67 | 544 | sprintf(memsz, "%ldk", (long int)((gd->ram_size / 1024) - pram)); |
382bee57 | 545 | env_set("mem", memsz); |
c2240d4d SG |
546 | |
547 | return 0; | |
548 | } | |
549 | #endif | |
550 | ||
ff66e7bb SG |
551 | static int dm_announce(void) |
552 | { | |
553 | int device_count; | |
554 | int uclass_count; | |
555 | ||
556 | if (IS_ENABLED(CONFIG_DM)) { | |
557 | dm_get_stats(&device_count, &uclass_count); | |
558 | printf("Core: %d devices, %d uclasses", device_count, | |
559 | uclass_count); | |
560 | if (CONFIG_IS_ENABLED(OF_REAL)) | |
561 | printf(", devicetree: %s", fdtdec_get_srcname()); | |
562 | printf("\n"); | |
93233b07 SG |
563 | if (IS_ENABLED(CONFIG_OF_HAS_PRIOR_STAGE) && |
564 | (gd->fdt_src == FDTSRC_SEPARATE || | |
565 | gd->fdt_src == FDTSRC_EMBED)) { | |
566 | printf("Warning: Unexpected devicetree source (not from a prior stage)"); | |
567 | printf("Warning: U-Boot may not function properly\n"); | |
568 | } | |
ff66e7bb SG |
569 | } |
570 | ||
571 | return 0; | |
572 | } | |
573 | ||
6f6430d7 SG |
574 | static int run_main_loop(void) |
575 | { | |
a733b06b SG |
576 | #ifdef CONFIG_SANDBOX |
577 | sandbox_main_loop_init(); | |
578 | #endif | |
6f6430d7 SG |
579 | /* main_loop() can return to retry autoboot, if so just run it again */ |
580 | for (;;) | |
581 | main_loop(); | |
582 | return 0; | |
583 | } | |
584 | ||
585 | /* | |
47870afa | 586 | * We hope to remove most of the driver-related init and do it if/when |
6f6430d7 | 587 | * the driver is later used. |
c2240d4d SG |
588 | * |
589 | * TODO: perhaps reset the watchdog in the initcall function after each call? | |
6f6430d7 | 590 | */ |
4acff452 | 591 | static init_fnc_t init_sequence_r[] = { |
71c52dba | 592 | initr_trace, |
6f6430d7 | 593 | initr_reloc, |
87a5d1b5 | 594 | event_init, |
c2240d4d | 595 | /* TODO: could x86/PPC have this also perhaps? */ |
4d4222d0 | 596 | #if defined(CONFIG_ARM) || defined(CONFIG_RISCV) |
6f6430d7 | 597 | initr_caches, |
12eaf31c YS |
598 | /* Note: For Freescale LS2 SoCs, new MMU table is created in DDR. |
599 | * A temporary mapping of IFC high region is since removed, | |
92f84b67 | 600 | * so environmental variables in NOR flash is not available |
12eaf31c YS |
601 | * until board_init() is called below to remap IFC to high |
602 | * region. | |
603 | */ | |
9fb02491 SG |
604 | #endif |
605 | initr_reloc_global_data, | |
cebc8161 OP |
606 | #if CONFIG_IS_ENABLED(NEEDS_MANUAL_RELOC) && CONFIG_IS_ENABLED(EVENT) |
607 | event_manual_reloc, | |
608 | #endif | |
fef3e25f YS |
609 | #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) |
610 | initr_unlock_ram_in_cache, | |
611 | #endif | |
9fb02491 SG |
612 | initr_barrier, |
613 | initr_malloc, | |
af1bc0cf | 614 | log_init, |
5ac44a55 | 615 | initr_bootstage, /* Needs malloc() but has its own timer */ |
51c5a2c5 OP |
616 | #if defined(CONFIG_CONSOLE_RECORD) |
617 | console_record_init, | |
618 | #endif | |
671fa63e | 619 | #ifdef CONFIG_SYS_NONCACHED_MEMORY |
42d0d422 | 620 | noncached_init, |
671fa63e | 621 | #endif |
3af86a4e | 622 | initr_of_live, |
9fb02491 SG |
623 | #ifdef CONFIG_DM |
624 | initr_dm, | |
625 | #endif | |
a43b598c | 626 | #ifdef CONFIG_ADDR_MAP |
1b212bb9 | 627 | init_addr_map, |
a43b598c | 628 | #endif |
11232139 | 629 | #if defined(CONFIG_ARM) || defined(CONFIG_RISCV) || defined(CONFIG_SANDBOX) |
6f6430d7 | 630 | board_init, /* Setup chipselects */ |
c2240d4d SG |
631 | #endif |
632 | /* | |
633 | * TODO: printing of the clock inforamtion of the board is now | |
634 | * implemented as part of bdinfo command. Currently only support for | |
635 | * davinci SOC's is added. Remove this check once all the board | |
636 | * implement this. | |
637 | */ | |
638 | #ifdef CONFIG_CLOCKS | |
639 | set_cpu_clk_info, /* Setup clock information */ | |
5d00995c AG |
640 | #endif |
641 | #ifdef CONFIG_EFI_LOADER | |
642 | efi_memory_init, | |
6f6430d7 | 643 | #endif |
3c10dc95 | 644 | initr_binman, |
fe08d39d SG |
645 | #ifdef CONFIG_FSP_VERSION2 |
646 | arch_fsp_init_r, | |
647 | #endif | |
dd0edcb2 | 648 | initr_dm_devices, |
9fb02491 | 649 | stdio_init_tables, |
bf2fb81a | 650 | serial_initialize, |
6f6430d7 | 651 | initr_announce, |
ff66e7bb | 652 | dm_announce, |
6874cb72 | 653 | #if CONFIG_IS_ENABLED(WDT) |
84b2416b WG |
654 | initr_watchdog, |
655 | #endif | |
c2240d4d | 656 | INIT_FUNC_WATCHDOG_RESET |
276b6c94 OP |
657 | #if defined(CONFIG_NEEDS_MANUAL_RELOC) && defined(CONFIG_BLOCK_CACHE) |
658 | blkcache_init, | |
659 | #endif | |
61d7b1bb AB |
660 | #ifdef CONFIG_NEEDS_MANUAL_RELOC |
661 | initr_manual_reloc_cmdtable, | |
662 | #endif | |
130845ba | 663 | arch_initr_trap, |
c2240d4d SG |
664 | #if defined(CONFIG_BOARD_EARLY_INIT_R) |
665 | board_early_init_r, | |
666 | #endif | |
667 | INIT_FUNC_WATCHDOG_RESET | |
6f6430d7 | 668 | #ifdef CONFIG_POST |
7addd3c6 | 669 | post_output_backlog, |
6f6430d7 | 670 | #endif |
c2240d4d | 671 | INIT_FUNC_WATCHDOG_RESET |
b9f6d0f7 | 672 | #if defined(CONFIG_PCI_INIT_R) && defined(CONFIG_SYS_EARLY_PCI_INIT) |
c2240d4d SG |
673 | /* |
674 | * Do early PCI configuration _before_ the flash gets initialised, | |
92f84b67 | 675 | * because PCU resources are crucial for flash access on some boards. |
c2240d4d | 676 | */ |
b9f6d0f7 | 677 | pci_init, |
c2240d4d | 678 | #endif |
6f6430d7 SG |
679 | #ifdef CONFIG_ARCH_EARLY_INIT_R |
680 | arch_early_init_r, | |
681 | #endif | |
682 | power_init_board, | |
e856bdcf | 683 | #ifdef CONFIG_MTD_NOR_FLASH |
6f6430d7 | 684 | initr_flash, |
c2240d4d SG |
685 | #endif |
686 | INIT_FUNC_WATCHDOG_RESET | |
936478e7 | 687 | #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86) |
c2240d4d SG |
688 | /* initialize higher level parts of CPU like time base and timers */ |
689 | cpu_init_r, | |
be274b99 | 690 | #endif |
5e847f77 HS |
691 | #ifdef CONFIG_EFI_SETUP_EARLY |
692 | efi_init_early, | |
693 | #endif | |
6f6430d7 SG |
694 | #ifdef CONFIG_CMD_NAND |
695 | initr_nand, | |
696 | #endif | |
697 | #ifdef CONFIG_CMD_ONENAND | |
698 | initr_onenand, | |
699 | #endif | |
4aa2ba3a | 700 | #ifdef CONFIG_MMC |
6f6430d7 | 701 | initr_mmc, |
48654416 OA |
702 | #endif |
703 | #ifdef CONFIG_XEN | |
eb2825b7 | 704 | xen_init, |
722bc5b5 AL |
705 | #endif |
706 | #ifdef CONFIG_PVBLOCK | |
707 | initr_pvblock, | |
6f6430d7 SG |
708 | #endif |
709 | initr_env, | |
167f699b | 710 | #ifdef CONFIG_SYS_MALLOC_BOOTPARAMS |
c722f0b0 AB |
711 | initr_malloc_bootparams, |
712 | #endif | |
c2240d4d | 713 | INIT_FUNC_WATCHDOG_RESET |
fb504b2c | 714 | cpu_secondary_init_r, |
d7d40f61 | 715 | #if defined(CONFIG_ID_EEPROM) |
c2240d4d SG |
716 | mac_read_from_eeprom, |
717 | #endif | |
718 | INIT_FUNC_WATCHDOG_RESET | |
b9f6d0f7 | 719 | #if defined(CONFIG_PCI_INIT_R) && !defined(CONFIG_SYS_EARLY_PCI_INIT) |
c2240d4d SG |
720 | /* |
721 | * Do pci configuration | |
722 | */ | |
b9f6d0f7 | 723 | pci_init, |
c2240d4d | 724 | #endif |
9fb02491 | 725 | stdio_add_devices, |
01548580 | 726 | jumptable_init, |
6f6430d7 | 727 | #ifdef CONFIG_API |
ce41e735 | 728 | api_init, |
6f6430d7 SG |
729 | #endif |
730 | console_init_r, /* fully init console as a device */ | |
731 | #ifdef CONFIG_DISPLAY_BOARDINFO_LATE | |
b0895384 | 732 | console_announce_r, |
0365ffcc | 733 | show_board_info, |
6f6430d7 SG |
734 | #endif |
735 | #ifdef CONFIG_ARCH_MISC_INIT | |
736 | arch_misc_init, /* miscellaneous arch-dependent init */ | |
737 | #endif | |
738 | #ifdef CONFIG_MISC_INIT_R | |
739 | misc_init_r, /* miscellaneous platform-dependent init */ | |
c2240d4d SG |
740 | #endif |
741 | INIT_FUNC_WATCHDOG_RESET | |
742 | #ifdef CONFIG_CMD_KGDB | |
78fc0395 | 743 | kgdb_init, |
6f6430d7 SG |
744 | #endif |
745 | interrupt_init, | |
daab59ac | 746 | #if defined(CONFIG_MICROBLAZE) || defined(CONFIG_M68K) |
be274b99 SG |
747 | timer_init, /* initialize timer */ |
748 | #endif | |
2d8d190c | 749 | #if defined(CONFIG_LED_STATUS) |
c2240d4d SG |
750 | initr_status_led, |
751 | #endif | |
752 | /* PPC has a udelay(20) here dating from 2002. Why? */ | |
49b10cb4 | 753 | #if defined(CONFIG_GPIO_HOG) |
5fc7cf8c HS |
754 | gpio_hog_probe_all, |
755 | #endif | |
6f6430d7 SG |
756 | #ifdef CONFIG_BOARD_LATE_INIT |
757 | board_late_init, | |
758 | #endif | |
e8a016b5 | 759 | #if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI) |
c2240d4d SG |
760 | INIT_FUNC_WATCHDOG_RESET |
761 | initr_scsi, | |
762 | #endif | |
6f6430d7 | 763 | #ifdef CONFIG_BITBANGMII |
c65abc70 | 764 | bb_miiphy_init, |
6f6430d7 | 765 | #endif |
fd00c53f | 766 | #ifdef CONFIG_PCI_ENDPOINT |
c343e8c0 | 767 | pci_ep_init, |
fd00c53f | 768 | #endif |
6f6430d7 | 769 | #ifdef CONFIG_CMD_NET |
c2240d4d | 770 | INIT_FUNC_WATCHDOG_RESET |
6f6430d7 SG |
771 | initr_net, |
772 | #endif | |
773 | #ifdef CONFIG_POST | |
774 | initr_post, | |
c2240d4d | 775 | #endif |
ec15d5f6 | 776 | #if defined(CONFIG_IDE) && !defined(CONFIG_BLK) |
c2240d4d SG |
777 | initr_ide, |
778 | #endif | |
779 | #ifdef CONFIG_LAST_STAGE_INIT | |
780 | INIT_FUNC_WATCHDOG_RESET | |
781 | /* | |
782 | * Some parts can be only initialized if all others (like | |
783 | * Interrupts) are up and running (i.e. the PC-style ISA | |
784 | * keyboard). | |
785 | */ | |
786 | last_stage_init, | |
787 | #endif | |
c5404b64 | 788 | #if defined(CONFIG_PRAM) |
c2240d4d | 789 | initr_mem, |
6f6430d7 SG |
790 | #endif |
791 | run_main_loop, | |
792 | }; | |
793 | ||
794 | void board_init_r(gd_t *new_gd, ulong dest_addr) | |
795 | { | |
fb92308b SG |
796 | /* |
797 | * Set up the new global data pointer. So far only x86 does this | |
798 | * here. | |
799 | * TODO([email protected]): Consider doing this for all archs, or | |
800 | * dropping the new_gd parameter. | |
801 | */ | |
86bb4888 SG |
802 | if (CONFIG_IS_ENABLED(X86_64) && !IS_ENABLED(CONFIG_EFI_APP)) |
803 | arch_setup_gd(new_gd); | |
fb92308b | 804 | |
47a602ea | 805 | #if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64) |
6f6430d7 | 806 | gd = new_gd; |
be274b99 | 807 | #endif |
af1bc0cf | 808 | gd->flags &= ~GD_FLG_LOG_READY; |
7395398a | 809 | |
13ae36cc OP |
810 | if (IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC)) { |
811 | for (int i = 0; i < ARRAY_SIZE(init_sequence_r); i++) | |
812 | MANUAL_RELOC(init_sequence_r[i]); | |
813 | } | |
7395398a | 814 | |
6f6430d7 SG |
815 | if (initcall_run_list(init_sequence_r)) |
816 | hang(); | |
817 | ||
818 | /* NOTREACHED - run_main_loop() does not return */ | |
819 | hang(); | |
820 | } |