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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
77f85581 | 2 | /* |
469146c0 JT |
3 | * Common SPI Interface: Controller-specific definitions |
4 | * | |
77f85581 WD |
5 | * (C) Copyright 2001 |
6 | * Gerald Van Baren, Custom IDEAS, [email protected]. | |
77f85581 WD |
7 | */ |
8 | ||
9 | #ifndef _SPI_H_ | |
10 | #define _SPI_H_ | |
11 | ||
d13f5b25 | 12 | #include <common.h> |
cd93d625 | 13 | #include <linux/bitops.h> |
d13f5b25 | 14 | |
38254f45 | 15 | /* SPI mode flags */ |
465c00d7 JT |
16 | #define SPI_CPHA BIT(0) /* clock phase */ |
17 | #define SPI_CPOL BIT(1) /* clock polarity */ | |
18 | #define SPI_MODE_0 (0|0) /* (original MicroWire) */ | |
19 | #define SPI_MODE_1 (0|SPI_CPHA) | |
20 | #define SPI_MODE_2 (SPI_CPOL|0) | |
21 | #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) | |
22 | #define SPI_CS_HIGH BIT(2) /* CS active high */ | |
23 | #define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */ | |
24 | #define SPI_3WIRE BIT(4) /* SI/SO signals shared */ | |
25 | #define SPI_LOOP BIT(5) /* loopback mode */ | |
26 | #define SPI_SLAVE BIT(6) /* slave mode */ | |
27 | #define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */ | |
29ee0262 | 28 | #define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ |
2b11a41c JT |
29 | #define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */ |
30 | #define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */ | |
08fe9c29 | 31 | #define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */ |
3ac48d0e JT |
32 | #define SPI_RX_DUAL BIT(12) /* receive with 2 wires */ |
33 | #define SPI_RX_QUAD BIT(13) /* receive with 4 wires */ | |
658df8bd VR |
34 | #define SPI_TX_OCTAL BIT(14) /* transmit with 8 wires */ |
35 | #define SPI_RX_OCTAL BIT(15) /* receive with 8 wires */ | |
4e09cc1e | 36 | |
bb786b84 | 37 | /* Header byte that marks the start of the message */ |
ce22b922 | 38 | #define SPI_PREAMBLE_END_BYTE 0xec |
bb786b84 | 39 | |
5d69df35 | 40 | #define SPI_DEFAULT_WORDLEN 8 |
5753d09b | 41 | |
d7af6a48 | 42 | #ifdef CONFIG_DM_SPI |
d0cff03e | 43 | /* TODO([email protected]): Remove this and use max_hz from struct spi_slave */ |
d7af6a48 SG |
44 | struct dm_spi_bus { |
45 | uint max_hz; | |
46 | }; | |
47 | ||
d0cff03e SG |
48 | /** |
49 | * struct dm_spi_platdata - platform data for all SPI slaves | |
50 | * | |
51 | * This describes a SPI slave, a child device of the SPI bus. To obtain this | |
52 | * struct from a spi_slave, use dev_get_parent_platdata(dev) or | |
53 | * dev_get_parent_platdata(slave->dev). | |
54 | * | |
55 | * This data is immuatable. Each time the device is probed, @max_hz and @mode | |
56 | * will be copied to struct spi_slave. | |
57 | * | |
58 | * @cs: Chip select number (0..n-1) | |
59 | * @max_hz: Maximum bus speed that this slave can tolerate | |
60 | * @mode: SPI mode to use for this device (see SPI mode flags) | |
61 | */ | |
62 | struct dm_spi_slave_platdata { | |
63 | unsigned int cs; | |
64 | uint max_hz; | |
65 | uint mode; | |
66 | }; | |
67 | ||
d7af6a48 SG |
68 | #endif /* CONFIG_DM_SPI */ |
69 | ||
b14ccfcf SG |
70 | /** |
71 | * enum spi_clock_phase - indicates the clock phase to use for SPI (CPHA) | |
72 | * | |
73 | * @SPI_CLOCK_PHASE_FIRST: Data sampled on the first phase | |
74 | * @SPI_CLOCK_PHASE_SECOND: Data sampled on the second phase | |
75 | */ | |
76 | enum spi_clock_phase { | |
77 | SPI_CLOCK_PHASE_FIRST, | |
78 | SPI_CLOCK_PHASE_SECOND, | |
79 | }; | |
80 | ||
81 | /** | |
82 | * enum spi_wire_mode - indicates the number of wires used for SPI | |
83 | * | |
84 | * @SPI_4_WIRE_MODE: Normal bidirectional mode with MOSI and MISO | |
85 | * @SPI_3_WIRE_MODE: Unidirectional version with a single data line SISO | |
86 | */ | |
87 | enum spi_wire_mode { | |
88 | SPI_4_WIRE_MODE, | |
89 | SPI_3_WIRE_MODE, | |
90 | }; | |
91 | ||
92 | /** | |
93 | * enum spi_polarity - indicates the polarity of the SPI bus (CPOL) | |
94 | * | |
95 | * @SPI_POLARITY_LOW: Clock is low in idle state | |
96 | * @SPI_POLARITY_HIGH: Clock is high in idle state | |
97 | */ | |
98 | enum spi_polarity { | |
99 | SPI_POLARITY_LOW, | |
100 | SPI_POLARITY_HIGH, | |
101 | }; | |
102 | ||
1b1bd9a7 | 103 | /** |
ce22b922 | 104 | * struct spi_slave - Representation of a SPI slave |
d255bb0e | 105 | * |
d7af6a48 | 106 | * For driver model this is the per-child data used by the SPI bus. It can |
bcbe3d15 | 107 | * be accessed using dev_get_parent_priv() on the slave device. The SPI uclass |
d0cff03e SG |
108 | * sets uip per_child_auto_alloc_size to sizeof(struct spi_slave), and the |
109 | * driver should not override it. Two platform data fields (max_hz and mode) | |
110 | * are copied into this structure to provide an initial value. This allows | |
111 | * them to be changed, since we should never change platform data in drivers. | |
d255bb0e | 112 | * |
d7af6a48 SG |
113 | * If not using driver model, drivers are expected to extend this with |
114 | * controller-specific data. | |
115 | * | |
116 | * @dev: SPI slave device | |
117 | * @max_hz: Maximum speed for this slave | |
60e2809a SG |
118 | * @speed: Current bus speed. This is 0 until the bus is first |
119 | * claimed. | |
d7af6a48 SG |
120 | * @bus: ID of the bus that the slave is attached to. For |
121 | * driver model this is the sequence number of the SPI | |
122 | * bus (bus->seq) so does not need to be stored | |
ce22b922 | 123 | * @cs: ID of the chip select connected to the slave. |
f5c3c033 | 124 | * @mode: SPI mode to use for this slave (see SPI mode flags) |
5753d09b | 125 | * @wordlen: Size of SPI word in number of bits |
8af74edc ÁFR |
126 | * @max_read_size: If non-zero, the maximum number of bytes which can |
127 | * be read at once. | |
ce22b922 | 128 | * @max_write_size: If non-zero, the maximum number of bytes which can |
6c94bd12 | 129 | * be written at once. |
ce22b922 | 130 | * @memory_map: Address of read-only SPI flash access. |
f77f4691 | 131 | * @flags: Indication of SPI flags. |
d255bb0e HS |
132 | */ |
133 | struct spi_slave { | |
d7af6a48 SG |
134 | #ifdef CONFIG_DM_SPI |
135 | struct udevice *dev; /* struct spi_slave is dev->parentdata */ | |
136 | uint max_hz; | |
60e2809a | 137 | uint speed; |
d7af6a48 | 138 | #else |
1b1bd9a7 JT |
139 | unsigned int bus; |
140 | unsigned int cs; | |
d0cff03e | 141 | #endif |
f5c3c033 | 142 | uint mode; |
5753d09b | 143 | unsigned int wordlen; |
8af74edc | 144 | unsigned int max_read_size; |
0c456cee | 145 | unsigned int max_write_size; |
004f15b6 | 146 | void *memory_map; |
c40f6003 | 147 | |
f77f4691 | 148 | u8 flags; |
29ee0262 JT |
149 | #define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */ |
150 | #define SPI_XFER_END BIT(1) /* Deassert CS after transfer */ | |
c40f6003 | 151 | #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) |
29ee0262 JT |
152 | #define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ |
153 | #define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ | |
d255bb0e | 154 | }; |
77f85581 | 155 | |
ba6c3ce9 SG |
156 | /** |
157 | * spi_do_alloc_slave - Allocate a new SPI slave (internal) | |
158 | * | |
159 | * Allocate and zero all fields in the spi slave, and set the bus/chip | |
160 | * select. Use the helper macro spi_alloc_slave() to call this. | |
161 | * | |
1b1bd9a7 JT |
162 | * @offset: Offset of struct spi_slave within slave structure. |
163 | * @size: Size of slave structure. | |
164 | * @bus: Bus ID of the slave chip. | |
165 | * @cs: Chip select ID of the slave chip on the specified bus. | |
ba6c3ce9 SG |
166 | */ |
167 | void *spi_do_alloc_slave(int offset, int size, unsigned int bus, | |
168 | unsigned int cs); | |
169 | ||
170 | /** | |
171 | * spi_alloc_slave - Allocate a new SPI slave | |
172 | * | |
173 | * Allocate and zero all fields in the spi slave, and set the bus/chip | |
174 | * select. | |
175 | * | |
1b1bd9a7 JT |
176 | * @_struct: Name of structure to allocate (e.g. struct tegra_spi). |
177 | * This structure must contain a member 'struct spi_slave *slave'. | |
178 | * @bus: Bus ID of the slave chip. | |
179 | * @cs: Chip select ID of the slave chip on the specified bus. | |
ba6c3ce9 SG |
180 | */ |
181 | #define spi_alloc_slave(_struct, bus, cs) \ | |
182 | spi_do_alloc_slave(offsetof(_struct, slave), \ | |
183 | sizeof(_struct), bus, cs) | |
184 | ||
185 | /** | |
186 | * spi_alloc_slave_base - Allocate a new SPI slave with no private data | |
187 | * | |
188 | * Allocate and zero all fields in the spi slave, and set the bus/chip | |
189 | * select. | |
190 | * | |
1b1bd9a7 JT |
191 | * @bus: Bus ID of the slave chip. |
192 | * @cs: Chip select ID of the slave chip on the specified bus. | |
ba6c3ce9 SG |
193 | */ |
194 | #define spi_alloc_slave_base(bus, cs) \ | |
195 | spi_do_alloc_slave(0, sizeof(struct spi_slave), bus, cs) | |
196 | ||
1b1bd9a7 | 197 | /** |
d255bb0e HS |
198 | * Set up communications parameters for a SPI slave. |
199 | * | |
200 | * This must be called once for each slave. Note that this function | |
201 | * usually doesn't touch any actual hardware, it only initializes the | |
202 | * contents of spi_slave so that the hardware can be easily | |
203 | * initialized later. | |
204 | * | |
1b1bd9a7 JT |
205 | * @bus: Bus ID of the slave chip. |
206 | * @cs: Chip select ID of the slave chip on the specified bus. | |
207 | * @max_hz: Maximum SCK rate in Hz. | |
208 | * @mode: Clock polarity, clock phase and other parameters. | |
d255bb0e HS |
209 | * |
210 | * Returns: A spi_slave reference that can be used in subsequent SPI | |
211 | * calls, or NULL if one or more of the parameters are not supported. | |
212 | */ | |
213 | struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, | |
214 | unsigned int max_hz, unsigned int mode); | |
215 | ||
1b1bd9a7 | 216 | /** |
d255bb0e HS |
217 | * Free any memory associated with a SPI slave. |
218 | * | |
1b1bd9a7 | 219 | * @slave: The SPI slave |
d255bb0e HS |
220 | */ |
221 | void spi_free_slave(struct spi_slave *slave); | |
222 | ||
1b1bd9a7 | 223 | /** |
d255bb0e HS |
224 | * Claim the bus and prepare it for communication with a given slave. |
225 | * | |
226 | * This must be called before doing any transfers with a SPI slave. It | |
227 | * will enable and initialize any SPI hardware as necessary, and make | |
228 | * sure that the SCK line is in the correct idle state. It is not | |
229 | * allowed to claim the same bus for several slaves without releasing | |
230 | * the bus in between. | |
231 | * | |
1b1bd9a7 | 232 | * @slave: The SPI slave |
d255bb0e HS |
233 | * |
234 | * Returns: 0 if the bus was claimed successfully, or a negative value | |
235 | * if it wasn't. | |
236 | */ | |
237 | int spi_claim_bus(struct spi_slave *slave); | |
238 | ||
1b1bd9a7 | 239 | /** |
d255bb0e HS |
240 | * Release the SPI bus |
241 | * | |
242 | * This must be called once for every call to spi_claim_bus() after | |
243 | * all transfers have finished. It may disable any SPI hardware as | |
244 | * appropriate. | |
245 | * | |
1b1bd9a7 | 246 | * @slave: The SPI slave |
d255bb0e HS |
247 | */ |
248 | void spi_release_bus(struct spi_slave *slave); | |
77f85581 | 249 | |
5753d09b NK |
250 | /** |
251 | * Set the word length for SPI transactions | |
252 | * | |
253 | * Set the word length (number of bits per word) for SPI transactions. | |
254 | * | |
255 | * @slave: The SPI slave | |
256 | * @wordlen: The number of bits in a word | |
257 | * | |
258 | * Returns: 0 on success, -1 on failure. | |
259 | */ | |
260 | int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen); | |
261 | ||
1b1bd9a7 | 262 | /** |
ccdabd89 | 263 | * SPI transfer (optional if mem_ops is used) |
77f85581 WD |
264 | * |
265 | * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks | |
266 | * "bitlen" bits in the SPI MISO port. That's just the way SPI works. | |
267 | * | |
268 | * The source of the outgoing bits is the "dout" parameter and the | |
269 | * destination of the input bits is the "din" parameter. Note that "dout" | |
270 | * and "din" can point to the same memory location, in which case the | |
271 | * input data overwrites the output data (since both are buffered by | |
272 | * temporary variables, this is OK). | |
273 | * | |
77f85581 | 274 | * spi_xfer() interface: |
1b1bd9a7 JT |
275 | * @slave: The SPI slave which will be sending/receiving the data. |
276 | * @bitlen: How many bits to write and read. | |
277 | * @dout: Pointer to a string of bits to send out. The bits are | |
d255bb0e | 278 | * held in a byte array and are sent MSB first. |
1b1bd9a7 JT |
279 | * @din: Pointer to a string of bits that will be filled in. |
280 | * @flags: A bitwise combination of SPI_XFER_* flags. | |
77f85581 | 281 | * |
1b1bd9a7 | 282 | * Returns: 0 on success, not 0 on failure |
77f85581 | 283 | */ |
d255bb0e HS |
284 | int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, |
285 | void *din, unsigned long flags); | |
286 | ||
8473b321 JT |
287 | /** |
288 | * spi_write_then_read - SPI synchronous write followed by read | |
289 | * | |
290 | * This performs a half duplex transaction in which the first transaction | |
291 | * is to send the opcode and if the length of buf is non-zero then it start | |
292 | * the second transaction as tx or rx based on the need from respective slave. | |
293 | * | |
294 | * @slave: The SPI slave device with which opcode/data will be exchanged | |
295 | * @opcode: opcode used for specific transfer | |
296 | * @n_opcode: size of opcode, in bytes | |
297 | * @txbuf: buffer into which data to be written | |
298 | * @rxbuf: buffer into which data will be read | |
299 | * @n_buf: size of buf (whether it's [tx|rx]buf), in bytes | |
300 | * | |
301 | * Returns: 0 on success, not 0 on failure | |
302 | */ | |
303 | int spi_write_then_read(struct spi_slave *slave, const u8 *opcode, | |
304 | size_t n_opcode, const u8 *txbuf, u8 *rxbuf, | |
305 | size_t n_buf); | |
306 | ||
146bad96 TR |
307 | /* Copy memory mapped data */ |
308 | void spi_flash_copy_mmap(void *data, void *offset, size_t len); | |
309 | ||
1b1bd9a7 | 310 | /** |
d255bb0e HS |
311 | * Determine if a SPI chipselect is valid. |
312 | * This function is provided by the board if the low-level SPI driver | |
313 | * needs it to determine if a given chipselect is actually valid. | |
314 | * | |
315 | * Returns: 1 if bus:cs identifies a valid chip on this board, 0 | |
316 | * otherwise. | |
317 | */ | |
d7af6a48 | 318 | int spi_cs_is_valid(unsigned int bus, unsigned int cs); |
d255bb0e | 319 | |
d7af6a48 | 320 | #ifndef CONFIG_DM_SPI |
1b1bd9a7 | 321 | /** |
d255bb0e HS |
322 | * Activate a SPI chipselect. |
323 | * This function is provided by the board code when using a driver | |
324 | * that can't control its chipselects automatically (e.g. | |
325 | * common/soft_spi.c). When called, it should activate the chip select | |
326 | * to the device identified by "slave". | |
327 | */ | |
328 | void spi_cs_activate(struct spi_slave *slave); | |
329 | ||
1b1bd9a7 | 330 | /** |
d255bb0e HS |
331 | * Deactivate a SPI chipselect. |
332 | * This function is provided by the board code when using a driver | |
333 | * that can't control its chipselects automatically (e.g. | |
334 | * common/soft_spi.c). When called, it should deactivate the chip | |
335 | * select to the device identified by "slave". | |
336 | */ | |
337 | void spi_cs_deactivate(struct spi_slave *slave); | |
338 | ||
1b1bd9a7 | 339 | /** |
fa1423e7 TC |
340 | * Set transfer speed. |
341 | * This sets a new speed to be applied for next spi_xfer(). | |
1b1bd9a7 JT |
342 | * @slave: The SPI slave |
343 | * @hz: The transfer speed | |
fa1423e7 TC |
344 | */ |
345 | void spi_set_speed(struct spi_slave *slave, uint hz); | |
d7af6a48 | 346 | #endif |
fa1423e7 | 347 | |
1b1bd9a7 | 348 | /** |
d255bb0e | 349 | * Write 8 bits, then read 8 bits. |
1b1bd9a7 JT |
350 | * @slave: The SPI slave we're communicating with |
351 | * @byte: Byte to be written | |
d255bb0e HS |
352 | * |
353 | * Returns: The value that was read, or a negative value on error. | |
354 | * | |
355 | * TODO: This function probably shouldn't be inlined. | |
356 | */ | |
357 | static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte) | |
358 | { | |
359 | unsigned char dout[2]; | |
360 | unsigned char din[2]; | |
361 | int ret; | |
362 | ||
363 | dout[0] = byte; | |
364 | dout[1] = 0; | |
38254f45 | 365 | |
d255bb0e HS |
366 | ret = spi_xfer(slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); |
367 | return ret < 0 ? ret : din[1]; | |
368 | } | |
77f85581 | 369 | |
d7af6a48 SG |
370 | #ifdef CONFIG_DM_SPI |
371 | ||
372 | /** | |
373 | * struct spi_cs_info - Information about a bus chip select | |
374 | * | |
375 | * @dev: Connected device, or NULL if none | |
376 | */ | |
377 | struct spi_cs_info { | |
378 | struct udevice *dev; | |
379 | }; | |
380 | ||
381 | /** | |
382 | * struct struct dm_spi_ops - Driver model SPI operations | |
383 | * | |
384 | * The uclass interface is implemented by all SPI devices which use | |
385 | * driver model. | |
386 | */ | |
387 | struct dm_spi_ops { | |
388 | /** | |
389 | * Claim the bus and prepare it for communication. | |
390 | * | |
391 | * The device provided is the slave device. It's parent controller | |
392 | * will be used to provide the communication. | |
393 | * | |
394 | * This must be called before doing any transfers with a SPI slave. It | |
395 | * will enable and initialize any SPI hardware as necessary, and make | |
396 | * sure that the SCK line is in the correct idle state. It is not | |
397 | * allowed to claim the same bus for several slaves without releasing | |
398 | * the bus in between. | |
399 | * | |
9694b724 | 400 | * @dev: The SPI slave |
d7af6a48 SG |
401 | * |
402 | * Returns: 0 if the bus was claimed successfully, or a negative value | |
403 | * if it wasn't. | |
404 | */ | |
9694b724 | 405 | int (*claim_bus)(struct udevice *dev); |
d7af6a48 SG |
406 | |
407 | /** | |
408 | * Release the SPI bus | |
409 | * | |
410 | * This must be called once for every call to spi_claim_bus() after | |
411 | * all transfers have finished. It may disable any SPI hardware as | |
412 | * appropriate. | |
413 | * | |
9694b724 | 414 | * @dev: The SPI slave |
d7af6a48 | 415 | */ |
9694b724 | 416 | int (*release_bus)(struct udevice *dev); |
d7af6a48 SG |
417 | |
418 | /** | |
419 | * Set the word length for SPI transactions | |
420 | * | |
421 | * Set the word length (number of bits per word) for SPI transactions. | |
422 | * | |
423 | * @bus: The SPI slave | |
424 | * @wordlen: The number of bits in a word | |
425 | * | |
426 | * Returns: 0 on success, -ve on failure. | |
427 | */ | |
9694b724 | 428 | int (*set_wordlen)(struct udevice *dev, unsigned int wordlen); |
d7af6a48 SG |
429 | |
430 | /** | |
431 | * SPI transfer | |
432 | * | |
433 | * This writes "bitlen" bits out the SPI MOSI port and simultaneously | |
434 | * clocks "bitlen" bits in the SPI MISO port. That's just the way SPI | |
435 | * works. | |
436 | * | |
437 | * The source of the outgoing bits is the "dout" parameter and the | |
438 | * destination of the input bits is the "din" parameter. Note that | |
439 | * "dout" and "din" can point to the same memory location, in which | |
440 | * case the input data overwrites the output data (since both are | |
441 | * buffered by temporary variables, this is OK). | |
442 | * | |
443 | * spi_xfer() interface: | |
444 | * @dev: The slave device to communicate with | |
445 | * @bitlen: How many bits to write and read. | |
446 | * @dout: Pointer to a string of bits to send out. The bits are | |
447 | * held in a byte array and are sent MSB first. | |
448 | * @din: Pointer to a string of bits that will be filled in. | |
449 | * @flags: A bitwise combination of SPI_XFER_* flags. | |
450 | * | |
451 | * Returns: 0 on success, not -1 on failure | |
452 | */ | |
453 | int (*xfer)(struct udevice *dev, unsigned int bitlen, const void *dout, | |
454 | void *din, unsigned long flags); | |
455 | ||
d13f5b25 BB |
456 | /** |
457 | * Optimized handlers for SPI memory-like operations. | |
458 | * | |
459 | * Optimized/dedicated operations for interactions with SPI memory. This | |
460 | * field is optional and should only be implemented if the controller | |
461 | * has native support for memory like operations. | |
462 | */ | |
463 | const struct spi_controller_mem_ops *mem_ops; | |
464 | ||
d7af6a48 SG |
465 | /** |
466 | * Set transfer speed. | |
467 | * This sets a new speed to be applied for next spi_xfer(). | |
468 | * @bus: The SPI bus | |
469 | * @hz: The transfer speed | |
470 | * @return 0 if OK, -ve on error | |
471 | */ | |
472 | int (*set_speed)(struct udevice *bus, uint hz); | |
473 | ||
474 | /** | |
475 | * Set the SPI mode/flags | |
476 | * | |
477 | * It is unclear if we want to set speed and mode together instead | |
478 | * of separately. | |
479 | * | |
480 | * @bus: The SPI bus | |
481 | * @mode: Requested SPI mode (SPI_... flags) | |
482 | * @return 0 if OK, -ve on error | |
483 | */ | |
484 | int (*set_mode)(struct udevice *bus, uint mode); | |
485 | ||
486 | /** | |
487 | * Get information on a chip select | |
488 | * | |
489 | * This is only called when the SPI uclass does not know about a | |
490 | * chip select, i.e. it has no attached device. It gives the driver | |
491 | * a chance to allow activity on that chip select even so. | |
492 | * | |
493 | * @bus: The SPI bus | |
494 | * @cs: The chip select (0..n-1) | |
495 | * @info: Returns information about the chip select, if valid. | |
496 | * On entry info->dev is NULL | |
4b060003 | 497 | * @return 0 if OK (and @info is set up), -EINVAL if the chip select |
d7af6a48 SG |
498 | * is invalid, other -ve value on error |
499 | */ | |
500 | int (*cs_info)(struct udevice *bus, uint cs, struct spi_cs_info *info); | |
c53b318e SG |
501 | |
502 | /** | |
503 | * get_mmap() - Get memory-mapped SPI | |
504 | * | |
505 | * @dev: The SPI flash slave device | |
506 | * @map_basep: Returns base memory address for mapped SPI | |
507 | * @map_sizep: Returns size of mapped SPI | |
508 | * @offsetp: Returns start offset of SPI flash where the map works | |
509 | * correctly (offsets before this are not visible) | |
510 | * @return 0 if OK, -EFAULT if memory mapping is not available | |
511 | */ | |
512 | int (*get_mmap)(struct udevice *dev, ulong *map_basep, | |
513 | uint *map_sizep, uint *offsetp); | |
d7af6a48 SG |
514 | }; |
515 | ||
c60e1f25 SG |
516 | struct dm_spi_emul_ops { |
517 | /** | |
518 | * SPI transfer | |
519 | * | |
520 | * This writes "bitlen" bits out the SPI MOSI port and simultaneously | |
521 | * clocks "bitlen" bits in the SPI MISO port. That's just the way SPI | |
522 | * works. Here the device is a slave. | |
523 | * | |
524 | * The source of the outgoing bits is the "dout" parameter and the | |
525 | * destination of the input bits is the "din" parameter. Note that | |
526 | * "dout" and "din" can point to the same memory location, in which | |
527 | * case the input data overwrites the output data (since both are | |
528 | * buffered by temporary variables, this is OK). | |
529 | * | |
530 | * spi_xfer() interface: | |
531 | * @slave: The SPI slave which will be sending/receiving the data. | |
532 | * @bitlen: How many bits to write and read. | |
533 | * @dout: Pointer to a string of bits sent to the device. The | |
534 | * bits are held in a byte array and are sent MSB first. | |
535 | * @din: Pointer to a string of bits that will be sent back to | |
536 | * the master. | |
537 | * @flags: A bitwise combination of SPI_XFER_* flags. | |
538 | * | |
539 | * Returns: 0 on success, not -1 on failure | |
540 | */ | |
541 | int (*xfer)(struct udevice *slave, unsigned int bitlen, | |
542 | const void *dout, void *din, unsigned long flags); | |
543 | }; | |
544 | ||
d7af6a48 SG |
545 | /** |
546 | * spi_find_bus_and_cs() - Find bus and slave devices by number | |
547 | * | |
548 | * Given a bus number and chip select, this finds the corresponding bus | |
549 | * device and slave device. Neither device is activated by this function, | |
550 | * although they may have been activated previously. | |
551 | * | |
552 | * @busnum: SPI bus number | |
553 | * @cs: Chip select to look for | |
554 | * @busp: Returns bus device | |
555 | * @devp: Return slave device | |
556 | * @return 0 if found, -ENODEV on error | |
557 | */ | |
558 | int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp, | |
559 | struct udevice **devp); | |
560 | ||
561 | /** | |
562 | * spi_get_bus_and_cs() - Find and activate bus and slave devices by number | |
563 | * | |
564 | * Given a bus number and chip select, this finds the corresponding bus | |
565 | * device and slave device. | |
566 | * | |
567 | * If no such slave exists, and drv_name is not NULL, then a new slave device | |
b0cc1b84 | 568 | * is automatically bound on this chip select with requested speed and mode. |
d7af6a48 | 569 | * |
b0cc1b84 PD |
570 | * Ths new slave device is probed ready for use with the speed and mode |
571 | * from platdata when available or the requested values. | |
d7af6a48 SG |
572 | * |
573 | * @busnum: SPI bus number | |
574 | * @cs: Chip select to look for | |
b0cc1b84 PD |
575 | * @speed: SPI speed to use for this slave when not available in platdata |
576 | * @mode: SPI mode to use for this slave when not available in platdata | |
d7af6a48 SG |
577 | * @drv_name: Name of driver to attach to this chip select |
578 | * @dev_name: Name of the new device thus created | |
579 | * @busp: Returns bus device | |
580 | * @devp: Return slave device | |
581 | * @return 0 if found, -ve on error | |
582 | */ | |
583 | int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode, | |
584 | const char *drv_name, const char *dev_name, | |
585 | struct udevice **busp, struct spi_slave **devp); | |
586 | ||
587 | /** | |
588 | * spi_chip_select() - Get the chip select for a slave | |
589 | * | |
590 | * @return the chip select this slave is attached to | |
591 | */ | |
592 | int spi_chip_select(struct udevice *slave); | |
593 | ||
ff56bba2 SG |
594 | /** |
595 | * spi_find_chip_select() - Find the slave attached to chip select | |
596 | * | |
597 | * @bus: SPI bus to search | |
598 | * @cs: Chip select to look for | |
599 | * @devp: Returns the slave device if found | |
7bacce52 BM |
600 | * @return 0 if found, -EINVAL if cs is invalid, -ENODEV if no device attached, |
601 | * other -ve value on error | |
ff56bba2 SG |
602 | */ |
603 | int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp); | |
604 | ||
d7af6a48 | 605 | /** |
d0cff03e | 606 | * spi_slave_ofdata_to_platdata() - decode standard SPI platform data |
d7af6a48 | 607 | * |
d0cff03e | 608 | * This decodes the speed and mode for a slave from a device tree node |
d7af6a48 SG |
609 | * |
610 | * @blob: Device tree blob | |
611 | * @node: Node offset to read from | |
d0cff03e | 612 | * @plat: Place to put the decoded information |
d7af6a48 | 613 | */ |
279e26f5 | 614 | int spi_slave_ofdata_to_platdata(struct udevice *dev, |
d0cff03e | 615 | struct dm_spi_slave_platdata *plat); |
d7af6a48 SG |
616 | |
617 | /** | |
618 | * spi_cs_info() - Check information on a chip select | |
619 | * | |
620 | * This checks a particular chip select on a bus to see if it has a device | |
621 | * attached, or is even valid. | |
622 | * | |
623 | * @bus: The SPI bus | |
624 | * @cs: The chip select (0..n-1) | |
625 | * @info: Returns information about the chip select, if valid | |
626 | * @return 0 if OK (and @info is set up), -ENODEV if the chip select | |
627 | * is invalid, other -ve value on error | |
628 | */ | |
629 | int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info); | |
630 | ||
631 | struct sandbox_state; | |
c60e1f25 SG |
632 | |
633 | /** | |
634 | * sandbox_spi_get_emul() - get an emulator for a SPI slave | |
635 | * | |
636 | * This provides a way to attach an emulated SPI device to a particular SPI | |
637 | * slave, so that xfer() operations on the slave will be handled by the | |
638 | * emulator. If a emulator already exists on that chip select it is returned. | |
639 | * Otherwise one is created. | |
640 | * | |
641 | * @state: Sandbox state | |
642 | * @bus: SPI bus requesting the emulator | |
643 | * @slave: SPI slave device requesting the emulator | |
644 | * @emuip: Returns pointer to emulator | |
645 | * @return 0 if OK, -ve on error | |
646 | */ | |
d7af6a48 SG |
647 | int sandbox_spi_get_emul(struct sandbox_state *state, |
648 | struct udevice *bus, struct udevice *slave, | |
649 | struct udevice **emulp); | |
650 | ||
7a3eff4c PF |
651 | /** |
652 | * Claim the bus and prepare it for communication with a given slave. | |
653 | * | |
654 | * This must be called before doing any transfers with a SPI slave. It | |
655 | * will enable and initialize any SPI hardware as necessary, and make | |
656 | * sure that the SCK line is in the correct idle state. It is not | |
657 | * allowed to claim the same bus for several slaves without releasing | |
658 | * the bus in between. | |
659 | * | |
660 | * @dev: The SPI slave device | |
661 | * | |
662 | * Returns: 0 if the bus was claimed successfully, or a negative value | |
663 | * if it wasn't. | |
664 | */ | |
665 | int dm_spi_claim_bus(struct udevice *dev); | |
666 | ||
667 | /** | |
668 | * Release the SPI bus | |
669 | * | |
670 | * This must be called once for every call to dm_spi_claim_bus() after | |
671 | * all transfers have finished. It may disable any SPI hardware as | |
672 | * appropriate. | |
673 | * | |
674 | * @slave: The SPI slave device | |
675 | */ | |
676 | void dm_spi_release_bus(struct udevice *dev); | |
677 | ||
678 | /** | |
679 | * SPI transfer | |
680 | * | |
681 | * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks | |
682 | * "bitlen" bits in the SPI MISO port. That's just the way SPI works. | |
683 | * | |
684 | * The source of the outgoing bits is the "dout" parameter and the | |
685 | * destination of the input bits is the "din" parameter. Note that "dout" | |
686 | * and "din" can point to the same memory location, in which case the | |
687 | * input data overwrites the output data (since both are buffered by | |
688 | * temporary variables, this is OK). | |
689 | * | |
690 | * dm_spi_xfer() interface: | |
691 | * @dev: The SPI slave device which will be sending/receiving the data. | |
692 | * @bitlen: How many bits to write and read. | |
693 | * @dout: Pointer to a string of bits to send out. The bits are | |
694 | * held in a byte array and are sent MSB first. | |
695 | * @din: Pointer to a string of bits that will be filled in. | |
696 | * @flags: A bitwise combination of SPI_XFER_* flags. | |
697 | * | |
698 | * Returns: 0 on success, not 0 on failure | |
699 | */ | |
700 | int dm_spi_xfer(struct udevice *dev, unsigned int bitlen, | |
701 | const void *dout, void *din, unsigned long flags); | |
702 | ||
c53b318e SG |
703 | /** |
704 | * spi_get_mmap() - Get memory-mapped SPI | |
705 | * | |
706 | * @dev: SPI slave device to check | |
707 | * @map_basep: Returns base memory address for mapped SPI | |
708 | * @map_sizep: Returns size of mapped SPI | |
709 | * @offsetp: Returns start offset of SPI flash where the map works | |
710 | * correctly (offsets before this are not visible) | |
711 | * @return 0 if OK, -ENOSYS if no operation, -EFAULT if memory mapping is not | |
712 | * available | |
713 | */ | |
714 | int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep, | |
715 | uint *offsetp); | |
716 | ||
bc5701e1 | 717 | /* Access the operations for a SPI device */ |
d7af6a48 | 718 | #define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops) |
c60e1f25 | 719 | #define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops) |
d7af6a48 SG |
720 | #endif /* CONFIG_DM_SPI */ |
721 | ||
77f85581 | 722 | #endif /* _SPI_H_ */ |