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spi: cadence-qspi: Add direct mode support
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83d290c5 1/* SPDX-License-Identifier: GPL-2.0+ */
77f85581 2/*
469146c0
JT
3 * Common SPI Interface: Controller-specific definitions
4 *
77f85581
WD
5 * (C) Copyright 2001
6 * Gerald Van Baren, Custom IDEAS, [email protected].
77f85581
WD
7 */
8
9#ifndef _SPI_H_
10#define _SPI_H_
11
d13f5b25
BB
12#include <common.h>
13
38254f45 14/* SPI mode flags */
465c00d7
JT
15#define SPI_CPHA BIT(0) /* clock phase */
16#define SPI_CPOL BIT(1) /* clock polarity */
17#define SPI_MODE_0 (0|0) /* (original MicroWire) */
18#define SPI_MODE_1 (0|SPI_CPHA)
19#define SPI_MODE_2 (SPI_CPOL|0)
20#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
21#define SPI_CS_HIGH BIT(2) /* CS active high */
22#define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */
23#define SPI_3WIRE BIT(4) /* SI/SO signals shared */
24#define SPI_LOOP BIT(5) /* loopback mode */
25#define SPI_SLAVE BIT(6) /* slave mode */
26#define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */
29ee0262 27#define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */
2b11a41c
JT
28#define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */
29#define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */
08fe9c29 30#define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */
3ac48d0e
JT
31#define SPI_RX_DUAL BIT(12) /* receive with 2 wires */
32#define SPI_RX_QUAD BIT(13) /* receive with 4 wires */
4e09cc1e 33
bb786b84 34/* Header byte that marks the start of the message */
ce22b922 35#define SPI_PREAMBLE_END_BYTE 0xec
bb786b84 36
5d69df35 37#define SPI_DEFAULT_WORDLEN 8
5753d09b 38
d7af6a48 39#ifdef CONFIG_DM_SPI
d0cff03e 40/* TODO([email protected]): Remove this and use max_hz from struct spi_slave */
d7af6a48
SG
41struct dm_spi_bus {
42 uint max_hz;
43};
44
d0cff03e
SG
45/**
46 * struct dm_spi_platdata - platform data for all SPI slaves
47 *
48 * This describes a SPI slave, a child device of the SPI bus. To obtain this
49 * struct from a spi_slave, use dev_get_parent_platdata(dev) or
50 * dev_get_parent_platdata(slave->dev).
51 *
52 * This data is immuatable. Each time the device is probed, @max_hz and @mode
53 * will be copied to struct spi_slave.
54 *
55 * @cs: Chip select number (0..n-1)
56 * @max_hz: Maximum bus speed that this slave can tolerate
57 * @mode: SPI mode to use for this device (see SPI mode flags)
58 */
59struct dm_spi_slave_platdata {
60 unsigned int cs;
61 uint max_hz;
62 uint mode;
63};
64
d7af6a48
SG
65#endif /* CONFIG_DM_SPI */
66
1b1bd9a7 67/**
ce22b922 68 * struct spi_slave - Representation of a SPI slave
d255bb0e 69 *
d7af6a48 70 * For driver model this is the per-child data used by the SPI bus. It can
bcbe3d15 71 * be accessed using dev_get_parent_priv() on the slave device. The SPI uclass
d0cff03e
SG
72 * sets uip per_child_auto_alloc_size to sizeof(struct spi_slave), and the
73 * driver should not override it. Two platform data fields (max_hz and mode)
74 * are copied into this structure to provide an initial value. This allows
75 * them to be changed, since we should never change platform data in drivers.
d255bb0e 76 *
d7af6a48
SG
77 * If not using driver model, drivers are expected to extend this with
78 * controller-specific data.
79 *
80 * @dev: SPI slave device
81 * @max_hz: Maximum speed for this slave
60e2809a
SG
82 * @speed: Current bus speed. This is 0 until the bus is first
83 * claimed.
d7af6a48
SG
84 * @bus: ID of the bus that the slave is attached to. For
85 * driver model this is the sequence number of the SPI
86 * bus (bus->seq) so does not need to be stored
ce22b922 87 * @cs: ID of the chip select connected to the slave.
f5c3c033 88 * @mode: SPI mode to use for this slave (see SPI mode flags)
5753d09b 89 * @wordlen: Size of SPI word in number of bits
8af74edc
ÁFR
90 * @max_read_size: If non-zero, the maximum number of bytes which can
91 * be read at once.
ce22b922 92 * @max_write_size: If non-zero, the maximum number of bytes which can
6c94bd12 93 * be written at once.
ce22b922 94 * @memory_map: Address of read-only SPI flash access.
f77f4691 95 * @flags: Indication of SPI flags.
d255bb0e
HS
96 */
97struct spi_slave {
d7af6a48
SG
98#ifdef CONFIG_DM_SPI
99 struct udevice *dev; /* struct spi_slave is dev->parentdata */
100 uint max_hz;
60e2809a 101 uint speed;
d7af6a48 102#else
1b1bd9a7
JT
103 unsigned int bus;
104 unsigned int cs;
d0cff03e 105#endif
f5c3c033 106 uint mode;
5753d09b 107 unsigned int wordlen;
8af74edc 108 unsigned int max_read_size;
0c456cee 109 unsigned int max_write_size;
004f15b6 110 void *memory_map;
c40f6003 111
f77f4691 112 u8 flags;
29ee0262
JT
113#define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */
114#define SPI_XFER_END BIT(1) /* Deassert CS after transfer */
c40f6003 115#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
29ee0262
JT
116#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */
117#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */
d255bb0e 118};
77f85581 119
ba6c3ce9
SG
120/**
121 * spi_do_alloc_slave - Allocate a new SPI slave (internal)
122 *
123 * Allocate and zero all fields in the spi slave, and set the bus/chip
124 * select. Use the helper macro spi_alloc_slave() to call this.
125 *
1b1bd9a7
JT
126 * @offset: Offset of struct spi_slave within slave structure.
127 * @size: Size of slave structure.
128 * @bus: Bus ID of the slave chip.
129 * @cs: Chip select ID of the slave chip on the specified bus.
ba6c3ce9
SG
130 */
131void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
132 unsigned int cs);
133
134/**
135 * spi_alloc_slave - Allocate a new SPI slave
136 *
137 * Allocate and zero all fields in the spi slave, and set the bus/chip
138 * select.
139 *
1b1bd9a7
JT
140 * @_struct: Name of structure to allocate (e.g. struct tegra_spi).
141 * This structure must contain a member 'struct spi_slave *slave'.
142 * @bus: Bus ID of the slave chip.
143 * @cs: Chip select ID of the slave chip on the specified bus.
ba6c3ce9
SG
144 */
145#define spi_alloc_slave(_struct, bus, cs) \
146 spi_do_alloc_slave(offsetof(_struct, slave), \
147 sizeof(_struct), bus, cs)
148
149/**
150 * spi_alloc_slave_base - Allocate a new SPI slave with no private data
151 *
152 * Allocate and zero all fields in the spi slave, and set the bus/chip
153 * select.
154 *
1b1bd9a7
JT
155 * @bus: Bus ID of the slave chip.
156 * @cs: Chip select ID of the slave chip on the specified bus.
ba6c3ce9
SG
157 */
158#define spi_alloc_slave_base(bus, cs) \
159 spi_do_alloc_slave(0, sizeof(struct spi_slave), bus, cs)
160
1b1bd9a7 161/**
d255bb0e
HS
162 * Set up communications parameters for a SPI slave.
163 *
164 * This must be called once for each slave. Note that this function
165 * usually doesn't touch any actual hardware, it only initializes the
166 * contents of spi_slave so that the hardware can be easily
167 * initialized later.
168 *
1b1bd9a7
JT
169 * @bus: Bus ID of the slave chip.
170 * @cs: Chip select ID of the slave chip on the specified bus.
171 * @max_hz: Maximum SCK rate in Hz.
172 * @mode: Clock polarity, clock phase and other parameters.
d255bb0e
HS
173 *
174 * Returns: A spi_slave reference that can be used in subsequent SPI
175 * calls, or NULL if one or more of the parameters are not supported.
176 */
177struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
178 unsigned int max_hz, unsigned int mode);
179
1b1bd9a7 180/**
d255bb0e
HS
181 * Free any memory associated with a SPI slave.
182 *
1b1bd9a7 183 * @slave: The SPI slave
d255bb0e
HS
184 */
185void spi_free_slave(struct spi_slave *slave);
186
1b1bd9a7 187/**
d255bb0e
HS
188 * Claim the bus and prepare it for communication with a given slave.
189 *
190 * This must be called before doing any transfers with a SPI slave. It
191 * will enable and initialize any SPI hardware as necessary, and make
192 * sure that the SCK line is in the correct idle state. It is not
193 * allowed to claim the same bus for several slaves without releasing
194 * the bus in between.
195 *
1b1bd9a7 196 * @slave: The SPI slave
d255bb0e
HS
197 *
198 * Returns: 0 if the bus was claimed successfully, or a negative value
199 * if it wasn't.
200 */
201int spi_claim_bus(struct spi_slave *slave);
202
1b1bd9a7 203/**
d255bb0e
HS
204 * Release the SPI bus
205 *
206 * This must be called once for every call to spi_claim_bus() after
207 * all transfers have finished. It may disable any SPI hardware as
208 * appropriate.
209 *
1b1bd9a7 210 * @slave: The SPI slave
d255bb0e
HS
211 */
212void spi_release_bus(struct spi_slave *slave);
77f85581 213
5753d09b
NK
214/**
215 * Set the word length for SPI transactions
216 *
217 * Set the word length (number of bits per word) for SPI transactions.
218 *
219 * @slave: The SPI slave
220 * @wordlen: The number of bits in a word
221 *
222 * Returns: 0 on success, -1 on failure.
223 */
224int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen);
225
1b1bd9a7 226/**
ccdabd89 227 * SPI transfer (optional if mem_ops is used)
77f85581
WD
228 *
229 * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
230 * "bitlen" bits in the SPI MISO port. That's just the way SPI works.
231 *
232 * The source of the outgoing bits is the "dout" parameter and the
233 * destination of the input bits is the "din" parameter. Note that "dout"
234 * and "din" can point to the same memory location, in which case the
235 * input data overwrites the output data (since both are buffered by
236 * temporary variables, this is OK).
237 *
77f85581 238 * spi_xfer() interface:
1b1bd9a7
JT
239 * @slave: The SPI slave which will be sending/receiving the data.
240 * @bitlen: How many bits to write and read.
241 * @dout: Pointer to a string of bits to send out. The bits are
d255bb0e 242 * held in a byte array and are sent MSB first.
1b1bd9a7
JT
243 * @din: Pointer to a string of bits that will be filled in.
244 * @flags: A bitwise combination of SPI_XFER_* flags.
77f85581 245 *
1b1bd9a7 246 * Returns: 0 on success, not 0 on failure
77f85581 247 */
d255bb0e
HS
248int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
249 void *din, unsigned long flags);
250
8473b321
JT
251/**
252 * spi_write_then_read - SPI synchronous write followed by read
253 *
254 * This performs a half duplex transaction in which the first transaction
255 * is to send the opcode and if the length of buf is non-zero then it start
256 * the second transaction as tx or rx based on the need from respective slave.
257 *
258 * @slave: The SPI slave device with which opcode/data will be exchanged
259 * @opcode: opcode used for specific transfer
260 * @n_opcode: size of opcode, in bytes
261 * @txbuf: buffer into which data to be written
262 * @rxbuf: buffer into which data will be read
263 * @n_buf: size of buf (whether it's [tx|rx]buf), in bytes
264 *
265 * Returns: 0 on success, not 0 on failure
266 */
267int spi_write_then_read(struct spi_slave *slave, const u8 *opcode,
268 size_t n_opcode, const u8 *txbuf, u8 *rxbuf,
269 size_t n_buf);
270
146bad96
TR
271/* Copy memory mapped data */
272void spi_flash_copy_mmap(void *data, void *offset, size_t len);
273
1b1bd9a7 274/**
d255bb0e
HS
275 * Determine if a SPI chipselect is valid.
276 * This function is provided by the board if the low-level SPI driver
277 * needs it to determine if a given chipselect is actually valid.
278 *
279 * Returns: 1 if bus:cs identifies a valid chip on this board, 0
280 * otherwise.
281 */
d7af6a48 282int spi_cs_is_valid(unsigned int bus, unsigned int cs);
d255bb0e 283
d7af6a48 284#ifndef CONFIG_DM_SPI
1b1bd9a7 285/**
d255bb0e
HS
286 * Activate a SPI chipselect.
287 * This function is provided by the board code when using a driver
288 * that can't control its chipselects automatically (e.g.
289 * common/soft_spi.c). When called, it should activate the chip select
290 * to the device identified by "slave".
291 */
292void spi_cs_activate(struct spi_slave *slave);
293
1b1bd9a7 294/**
d255bb0e
HS
295 * Deactivate a SPI chipselect.
296 * This function is provided by the board code when using a driver
297 * that can't control its chipselects automatically (e.g.
298 * common/soft_spi.c). When called, it should deactivate the chip
299 * select to the device identified by "slave".
300 */
301void spi_cs_deactivate(struct spi_slave *slave);
302
1b1bd9a7 303/**
fa1423e7
TC
304 * Set transfer speed.
305 * This sets a new speed to be applied for next spi_xfer().
1b1bd9a7
JT
306 * @slave: The SPI slave
307 * @hz: The transfer speed
fa1423e7
TC
308 */
309void spi_set_speed(struct spi_slave *slave, uint hz);
d7af6a48 310#endif
fa1423e7 311
1b1bd9a7 312/**
d255bb0e 313 * Write 8 bits, then read 8 bits.
1b1bd9a7
JT
314 * @slave: The SPI slave we're communicating with
315 * @byte: Byte to be written
d255bb0e
HS
316 *
317 * Returns: The value that was read, or a negative value on error.
318 *
319 * TODO: This function probably shouldn't be inlined.
320 */
321static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)
322{
323 unsigned char dout[2];
324 unsigned char din[2];
325 int ret;
326
327 dout[0] = byte;
328 dout[1] = 0;
38254f45 329
d255bb0e
HS
330 ret = spi_xfer(slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
331 return ret < 0 ? ret : din[1];
332}
77f85581 333
d7af6a48
SG
334#ifdef CONFIG_DM_SPI
335
336/**
337 * struct spi_cs_info - Information about a bus chip select
338 *
339 * @dev: Connected device, or NULL if none
340 */
341struct spi_cs_info {
342 struct udevice *dev;
343};
344
345/**
346 * struct struct dm_spi_ops - Driver model SPI operations
347 *
348 * The uclass interface is implemented by all SPI devices which use
349 * driver model.
350 */
351struct dm_spi_ops {
352 /**
353 * Claim the bus and prepare it for communication.
354 *
355 * The device provided is the slave device. It's parent controller
356 * will be used to provide the communication.
357 *
358 * This must be called before doing any transfers with a SPI slave. It
359 * will enable and initialize any SPI hardware as necessary, and make
360 * sure that the SCK line is in the correct idle state. It is not
361 * allowed to claim the same bus for several slaves without releasing
362 * the bus in between.
363 *
9694b724 364 * @dev: The SPI slave
d7af6a48
SG
365 *
366 * Returns: 0 if the bus was claimed successfully, or a negative value
367 * if it wasn't.
368 */
9694b724 369 int (*claim_bus)(struct udevice *dev);
d7af6a48
SG
370
371 /**
372 * Release the SPI bus
373 *
374 * This must be called once for every call to spi_claim_bus() after
375 * all transfers have finished. It may disable any SPI hardware as
376 * appropriate.
377 *
9694b724 378 * @dev: The SPI slave
d7af6a48 379 */
9694b724 380 int (*release_bus)(struct udevice *dev);
d7af6a48
SG
381
382 /**
383 * Set the word length for SPI transactions
384 *
385 * Set the word length (number of bits per word) for SPI transactions.
386 *
387 * @bus: The SPI slave
388 * @wordlen: The number of bits in a word
389 *
390 * Returns: 0 on success, -ve on failure.
391 */
9694b724 392 int (*set_wordlen)(struct udevice *dev, unsigned int wordlen);
d7af6a48
SG
393
394 /**
395 * SPI transfer
396 *
397 * This writes "bitlen" bits out the SPI MOSI port and simultaneously
398 * clocks "bitlen" bits in the SPI MISO port. That's just the way SPI
399 * works.
400 *
401 * The source of the outgoing bits is the "dout" parameter and the
402 * destination of the input bits is the "din" parameter. Note that
403 * "dout" and "din" can point to the same memory location, in which
404 * case the input data overwrites the output data (since both are
405 * buffered by temporary variables, this is OK).
406 *
407 * spi_xfer() interface:
408 * @dev: The slave device to communicate with
409 * @bitlen: How many bits to write and read.
410 * @dout: Pointer to a string of bits to send out. The bits are
411 * held in a byte array and are sent MSB first.
412 * @din: Pointer to a string of bits that will be filled in.
413 * @flags: A bitwise combination of SPI_XFER_* flags.
414 *
415 * Returns: 0 on success, not -1 on failure
416 */
417 int (*xfer)(struct udevice *dev, unsigned int bitlen, const void *dout,
418 void *din, unsigned long flags);
419
d13f5b25
BB
420 /**
421 * Optimized handlers for SPI memory-like operations.
422 *
423 * Optimized/dedicated operations for interactions with SPI memory. This
424 * field is optional and should only be implemented if the controller
425 * has native support for memory like operations.
426 */
427 const struct spi_controller_mem_ops *mem_ops;
428
d7af6a48
SG
429 /**
430 * Set transfer speed.
431 * This sets a new speed to be applied for next spi_xfer().
432 * @bus: The SPI bus
433 * @hz: The transfer speed
434 * @return 0 if OK, -ve on error
435 */
436 int (*set_speed)(struct udevice *bus, uint hz);
437
438 /**
439 * Set the SPI mode/flags
440 *
441 * It is unclear if we want to set speed and mode together instead
442 * of separately.
443 *
444 * @bus: The SPI bus
445 * @mode: Requested SPI mode (SPI_... flags)
446 * @return 0 if OK, -ve on error
447 */
448 int (*set_mode)(struct udevice *bus, uint mode);
449
450 /**
451 * Get information on a chip select
452 *
453 * This is only called when the SPI uclass does not know about a
454 * chip select, i.e. it has no attached device. It gives the driver
455 * a chance to allow activity on that chip select even so.
456 *
457 * @bus: The SPI bus
458 * @cs: The chip select (0..n-1)
459 * @info: Returns information about the chip select, if valid.
460 * On entry info->dev is NULL
4b060003 461 * @return 0 if OK (and @info is set up), -EINVAL if the chip select
d7af6a48
SG
462 * is invalid, other -ve value on error
463 */
464 int (*cs_info)(struct udevice *bus, uint cs, struct spi_cs_info *info);
c53b318e
SG
465
466 /**
467 * get_mmap() - Get memory-mapped SPI
468 *
469 * @dev: The SPI flash slave device
470 * @map_basep: Returns base memory address for mapped SPI
471 * @map_sizep: Returns size of mapped SPI
472 * @offsetp: Returns start offset of SPI flash where the map works
473 * correctly (offsets before this are not visible)
474 * @return 0 if OK, -EFAULT if memory mapping is not available
475 */
476 int (*get_mmap)(struct udevice *dev, ulong *map_basep,
477 uint *map_sizep, uint *offsetp);
d7af6a48
SG
478};
479
c60e1f25
SG
480struct dm_spi_emul_ops {
481 /**
482 * SPI transfer
483 *
484 * This writes "bitlen" bits out the SPI MOSI port and simultaneously
485 * clocks "bitlen" bits in the SPI MISO port. That's just the way SPI
486 * works. Here the device is a slave.
487 *
488 * The source of the outgoing bits is the "dout" parameter and the
489 * destination of the input bits is the "din" parameter. Note that
490 * "dout" and "din" can point to the same memory location, in which
491 * case the input data overwrites the output data (since both are
492 * buffered by temporary variables, this is OK).
493 *
494 * spi_xfer() interface:
495 * @slave: The SPI slave which will be sending/receiving the data.
496 * @bitlen: How many bits to write and read.
497 * @dout: Pointer to a string of bits sent to the device. The
498 * bits are held in a byte array and are sent MSB first.
499 * @din: Pointer to a string of bits that will be sent back to
500 * the master.
501 * @flags: A bitwise combination of SPI_XFER_* flags.
502 *
503 * Returns: 0 on success, not -1 on failure
504 */
505 int (*xfer)(struct udevice *slave, unsigned int bitlen,
506 const void *dout, void *din, unsigned long flags);
507};
508
d7af6a48
SG
509/**
510 * spi_find_bus_and_cs() - Find bus and slave devices by number
511 *
512 * Given a bus number and chip select, this finds the corresponding bus
513 * device and slave device. Neither device is activated by this function,
514 * although they may have been activated previously.
515 *
516 * @busnum: SPI bus number
517 * @cs: Chip select to look for
518 * @busp: Returns bus device
519 * @devp: Return slave device
520 * @return 0 if found, -ENODEV on error
521 */
522int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,
523 struct udevice **devp);
524
525/**
526 * spi_get_bus_and_cs() - Find and activate bus and slave devices by number
527 *
528 * Given a bus number and chip select, this finds the corresponding bus
529 * device and slave device.
530 *
531 * If no such slave exists, and drv_name is not NULL, then a new slave device
b0cc1b84 532 * is automatically bound on this chip select with requested speed and mode.
d7af6a48 533 *
b0cc1b84
PD
534 * Ths new slave device is probed ready for use with the speed and mode
535 * from platdata when available or the requested values.
d7af6a48
SG
536 *
537 * @busnum: SPI bus number
538 * @cs: Chip select to look for
b0cc1b84
PD
539 * @speed: SPI speed to use for this slave when not available in platdata
540 * @mode: SPI mode to use for this slave when not available in platdata
d7af6a48
SG
541 * @drv_name: Name of driver to attach to this chip select
542 * @dev_name: Name of the new device thus created
543 * @busp: Returns bus device
544 * @devp: Return slave device
545 * @return 0 if found, -ve on error
546 */
547int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
548 const char *drv_name, const char *dev_name,
549 struct udevice **busp, struct spi_slave **devp);
550
551/**
552 * spi_chip_select() - Get the chip select for a slave
553 *
554 * @return the chip select this slave is attached to
555 */
556int spi_chip_select(struct udevice *slave);
557
ff56bba2
SG
558/**
559 * spi_find_chip_select() - Find the slave attached to chip select
560 *
561 * @bus: SPI bus to search
562 * @cs: Chip select to look for
563 * @devp: Returns the slave device if found
7bacce52
BM
564 * @return 0 if found, -EINVAL if cs is invalid, -ENODEV if no device attached,
565 * other -ve value on error
ff56bba2
SG
566 */
567int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp);
568
d7af6a48 569/**
d0cff03e 570 * spi_slave_ofdata_to_platdata() - decode standard SPI platform data
d7af6a48 571 *
d0cff03e 572 * This decodes the speed and mode for a slave from a device tree node
d7af6a48
SG
573 *
574 * @blob: Device tree blob
575 * @node: Node offset to read from
d0cff03e 576 * @plat: Place to put the decoded information
d7af6a48 577 */
279e26f5 578int spi_slave_ofdata_to_platdata(struct udevice *dev,
d0cff03e 579 struct dm_spi_slave_platdata *plat);
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580
581/**
582 * spi_cs_info() - Check information on a chip select
583 *
584 * This checks a particular chip select on a bus to see if it has a device
585 * attached, or is even valid.
586 *
587 * @bus: The SPI bus
588 * @cs: The chip select (0..n-1)
589 * @info: Returns information about the chip select, if valid
590 * @return 0 if OK (and @info is set up), -ENODEV if the chip select
591 * is invalid, other -ve value on error
592 */
593int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info);
594
595struct sandbox_state;
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596
597/**
598 * sandbox_spi_get_emul() - get an emulator for a SPI slave
599 *
600 * This provides a way to attach an emulated SPI device to a particular SPI
601 * slave, so that xfer() operations on the slave will be handled by the
602 * emulator. If a emulator already exists on that chip select it is returned.
603 * Otherwise one is created.
604 *
605 * @state: Sandbox state
606 * @bus: SPI bus requesting the emulator
607 * @slave: SPI slave device requesting the emulator
608 * @emuip: Returns pointer to emulator
609 * @return 0 if OK, -ve on error
610 */
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611int sandbox_spi_get_emul(struct sandbox_state *state,
612 struct udevice *bus, struct udevice *slave,
613 struct udevice **emulp);
614
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615/**
616 * Claim the bus and prepare it for communication with a given slave.
617 *
618 * This must be called before doing any transfers with a SPI slave. It
619 * will enable and initialize any SPI hardware as necessary, and make
620 * sure that the SCK line is in the correct idle state. It is not
621 * allowed to claim the same bus for several slaves without releasing
622 * the bus in between.
623 *
624 * @dev: The SPI slave device
625 *
626 * Returns: 0 if the bus was claimed successfully, or a negative value
627 * if it wasn't.
628 */
629int dm_spi_claim_bus(struct udevice *dev);
630
631/**
632 * Release the SPI bus
633 *
634 * This must be called once for every call to dm_spi_claim_bus() after
635 * all transfers have finished. It may disable any SPI hardware as
636 * appropriate.
637 *
638 * @slave: The SPI slave device
639 */
640void dm_spi_release_bus(struct udevice *dev);
641
642/**
643 * SPI transfer
644 *
645 * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
646 * "bitlen" bits in the SPI MISO port. That's just the way SPI works.
647 *
648 * The source of the outgoing bits is the "dout" parameter and the
649 * destination of the input bits is the "din" parameter. Note that "dout"
650 * and "din" can point to the same memory location, in which case the
651 * input data overwrites the output data (since both are buffered by
652 * temporary variables, this is OK).
653 *
654 * dm_spi_xfer() interface:
655 * @dev: The SPI slave device which will be sending/receiving the data.
656 * @bitlen: How many bits to write and read.
657 * @dout: Pointer to a string of bits to send out. The bits are
658 * held in a byte array and are sent MSB first.
659 * @din: Pointer to a string of bits that will be filled in.
660 * @flags: A bitwise combination of SPI_XFER_* flags.
661 *
662 * Returns: 0 on success, not 0 on failure
663 */
664int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
665 const void *dout, void *din, unsigned long flags);
666
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667/**
668 * spi_get_mmap() - Get memory-mapped SPI
669 *
670 * @dev: SPI slave device to check
671 * @map_basep: Returns base memory address for mapped SPI
672 * @map_sizep: Returns size of mapped SPI
673 * @offsetp: Returns start offset of SPI flash where the map works
674 * correctly (offsets before this are not visible)
675 * @return 0 if OK, -ENOSYS if no operation, -EFAULT if memory mapping is not
676 * available
677 */
678int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
679 uint *offsetp);
680
bc5701e1 681/* Access the operations for a SPI device */
d7af6a48 682#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops)
c60e1f25 683#define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops)
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684#endif /* CONFIG_DM_SPI */
685
77f85581 686#endif /* _SPI_H_ */
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