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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
77f85581 | 2 | /* |
469146c0 JT |
3 | * Common SPI Interface: Controller-specific definitions |
4 | * | |
77f85581 WD |
5 | * (C) Copyright 2001 |
6 | * Gerald Van Baren, Custom IDEAS, [email protected]. | |
77f85581 WD |
7 | */ |
8 | ||
9 | #ifndef _SPI_H_ | |
10 | #define _SPI_H_ | |
11 | ||
d13f5b25 BB |
12 | #include <common.h> |
13 | ||
38254f45 | 14 | /* SPI mode flags */ |
465c00d7 JT |
15 | #define SPI_CPHA BIT(0) /* clock phase */ |
16 | #define SPI_CPOL BIT(1) /* clock polarity */ | |
17 | #define SPI_MODE_0 (0|0) /* (original MicroWire) */ | |
18 | #define SPI_MODE_1 (0|SPI_CPHA) | |
19 | #define SPI_MODE_2 (SPI_CPOL|0) | |
20 | #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) | |
21 | #define SPI_CS_HIGH BIT(2) /* CS active high */ | |
22 | #define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */ | |
23 | #define SPI_3WIRE BIT(4) /* SI/SO signals shared */ | |
24 | #define SPI_LOOP BIT(5) /* loopback mode */ | |
25 | #define SPI_SLAVE BIT(6) /* slave mode */ | |
26 | #define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */ | |
29ee0262 | 27 | #define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ |
2b11a41c JT |
28 | #define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */ |
29 | #define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */ | |
08fe9c29 | 30 | #define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */ |
3ac48d0e JT |
31 | #define SPI_RX_DUAL BIT(12) /* receive with 2 wires */ |
32 | #define SPI_RX_QUAD BIT(13) /* receive with 4 wires */ | |
4e09cc1e | 33 | |
bb786b84 | 34 | /* Header byte that marks the start of the message */ |
ce22b922 | 35 | #define SPI_PREAMBLE_END_BYTE 0xec |
bb786b84 | 36 | |
5d69df35 | 37 | #define SPI_DEFAULT_WORDLEN 8 |
5753d09b | 38 | |
d7af6a48 | 39 | #ifdef CONFIG_DM_SPI |
d0cff03e | 40 | /* TODO([email protected]): Remove this and use max_hz from struct spi_slave */ |
d7af6a48 SG |
41 | struct dm_spi_bus { |
42 | uint max_hz; | |
43 | }; | |
44 | ||
d0cff03e SG |
45 | /** |
46 | * struct dm_spi_platdata - platform data for all SPI slaves | |
47 | * | |
48 | * This describes a SPI slave, a child device of the SPI bus. To obtain this | |
49 | * struct from a spi_slave, use dev_get_parent_platdata(dev) or | |
50 | * dev_get_parent_platdata(slave->dev). | |
51 | * | |
52 | * This data is immuatable. Each time the device is probed, @max_hz and @mode | |
53 | * will be copied to struct spi_slave. | |
54 | * | |
55 | * @cs: Chip select number (0..n-1) | |
56 | * @max_hz: Maximum bus speed that this slave can tolerate | |
57 | * @mode: SPI mode to use for this device (see SPI mode flags) | |
58 | */ | |
59 | struct dm_spi_slave_platdata { | |
60 | unsigned int cs; | |
61 | uint max_hz; | |
62 | uint mode; | |
63 | }; | |
64 | ||
d7af6a48 SG |
65 | #endif /* CONFIG_DM_SPI */ |
66 | ||
1b1bd9a7 | 67 | /** |
ce22b922 | 68 | * struct spi_slave - Representation of a SPI slave |
d255bb0e | 69 | * |
d7af6a48 | 70 | * For driver model this is the per-child data used by the SPI bus. It can |
bcbe3d15 | 71 | * be accessed using dev_get_parent_priv() on the slave device. The SPI uclass |
d0cff03e SG |
72 | * sets uip per_child_auto_alloc_size to sizeof(struct spi_slave), and the |
73 | * driver should not override it. Two platform data fields (max_hz and mode) | |
74 | * are copied into this structure to provide an initial value. This allows | |
75 | * them to be changed, since we should never change platform data in drivers. | |
d255bb0e | 76 | * |
d7af6a48 SG |
77 | * If not using driver model, drivers are expected to extend this with |
78 | * controller-specific data. | |
79 | * | |
80 | * @dev: SPI slave device | |
81 | * @max_hz: Maximum speed for this slave | |
60e2809a SG |
82 | * @speed: Current bus speed. This is 0 until the bus is first |
83 | * claimed. | |
d7af6a48 SG |
84 | * @bus: ID of the bus that the slave is attached to. For |
85 | * driver model this is the sequence number of the SPI | |
86 | * bus (bus->seq) so does not need to be stored | |
ce22b922 | 87 | * @cs: ID of the chip select connected to the slave. |
f5c3c033 | 88 | * @mode: SPI mode to use for this slave (see SPI mode flags) |
5753d09b | 89 | * @wordlen: Size of SPI word in number of bits |
8af74edc ÁFR |
90 | * @max_read_size: If non-zero, the maximum number of bytes which can |
91 | * be read at once. | |
ce22b922 | 92 | * @max_write_size: If non-zero, the maximum number of bytes which can |
6c94bd12 | 93 | * be written at once. |
ce22b922 | 94 | * @memory_map: Address of read-only SPI flash access. |
f77f4691 | 95 | * @flags: Indication of SPI flags. |
d255bb0e HS |
96 | */ |
97 | struct spi_slave { | |
d7af6a48 SG |
98 | #ifdef CONFIG_DM_SPI |
99 | struct udevice *dev; /* struct spi_slave is dev->parentdata */ | |
100 | uint max_hz; | |
60e2809a | 101 | uint speed; |
d7af6a48 | 102 | #else |
1b1bd9a7 JT |
103 | unsigned int bus; |
104 | unsigned int cs; | |
d0cff03e | 105 | #endif |
f5c3c033 | 106 | uint mode; |
5753d09b | 107 | unsigned int wordlen; |
8af74edc | 108 | unsigned int max_read_size; |
0c456cee | 109 | unsigned int max_write_size; |
004f15b6 | 110 | void *memory_map; |
c40f6003 | 111 | |
f77f4691 | 112 | u8 flags; |
29ee0262 JT |
113 | #define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */ |
114 | #define SPI_XFER_END BIT(1) /* Deassert CS after transfer */ | |
c40f6003 | 115 | #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) |
29ee0262 JT |
116 | #define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ |
117 | #define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ | |
d255bb0e | 118 | }; |
77f85581 | 119 | |
ba6c3ce9 SG |
120 | /** |
121 | * spi_do_alloc_slave - Allocate a new SPI slave (internal) | |
122 | * | |
123 | * Allocate and zero all fields in the spi slave, and set the bus/chip | |
124 | * select. Use the helper macro spi_alloc_slave() to call this. | |
125 | * | |
1b1bd9a7 JT |
126 | * @offset: Offset of struct spi_slave within slave structure. |
127 | * @size: Size of slave structure. | |
128 | * @bus: Bus ID of the slave chip. | |
129 | * @cs: Chip select ID of the slave chip on the specified bus. | |
ba6c3ce9 SG |
130 | */ |
131 | void *spi_do_alloc_slave(int offset, int size, unsigned int bus, | |
132 | unsigned int cs); | |
133 | ||
134 | /** | |
135 | * spi_alloc_slave - Allocate a new SPI slave | |
136 | * | |
137 | * Allocate and zero all fields in the spi slave, and set the bus/chip | |
138 | * select. | |
139 | * | |
1b1bd9a7 JT |
140 | * @_struct: Name of structure to allocate (e.g. struct tegra_spi). |
141 | * This structure must contain a member 'struct spi_slave *slave'. | |
142 | * @bus: Bus ID of the slave chip. | |
143 | * @cs: Chip select ID of the slave chip on the specified bus. | |
ba6c3ce9 SG |
144 | */ |
145 | #define spi_alloc_slave(_struct, bus, cs) \ | |
146 | spi_do_alloc_slave(offsetof(_struct, slave), \ | |
147 | sizeof(_struct), bus, cs) | |
148 | ||
149 | /** | |
150 | * spi_alloc_slave_base - Allocate a new SPI slave with no private data | |
151 | * | |
152 | * Allocate and zero all fields in the spi slave, and set the bus/chip | |
153 | * select. | |
154 | * | |
1b1bd9a7 JT |
155 | * @bus: Bus ID of the slave chip. |
156 | * @cs: Chip select ID of the slave chip on the specified bus. | |
ba6c3ce9 SG |
157 | */ |
158 | #define spi_alloc_slave_base(bus, cs) \ | |
159 | spi_do_alloc_slave(0, sizeof(struct spi_slave), bus, cs) | |
160 | ||
1b1bd9a7 | 161 | /** |
d255bb0e HS |
162 | * Set up communications parameters for a SPI slave. |
163 | * | |
164 | * This must be called once for each slave. Note that this function | |
165 | * usually doesn't touch any actual hardware, it only initializes the | |
166 | * contents of spi_slave so that the hardware can be easily | |
167 | * initialized later. | |
168 | * | |
1b1bd9a7 JT |
169 | * @bus: Bus ID of the slave chip. |
170 | * @cs: Chip select ID of the slave chip on the specified bus. | |
171 | * @max_hz: Maximum SCK rate in Hz. | |
172 | * @mode: Clock polarity, clock phase and other parameters. | |
d255bb0e HS |
173 | * |
174 | * Returns: A spi_slave reference that can be used in subsequent SPI | |
175 | * calls, or NULL if one or more of the parameters are not supported. | |
176 | */ | |
177 | struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, | |
178 | unsigned int max_hz, unsigned int mode); | |
179 | ||
1b1bd9a7 | 180 | /** |
d255bb0e HS |
181 | * Free any memory associated with a SPI slave. |
182 | * | |
1b1bd9a7 | 183 | * @slave: The SPI slave |
d255bb0e HS |
184 | */ |
185 | void spi_free_slave(struct spi_slave *slave); | |
186 | ||
1b1bd9a7 | 187 | /** |
d255bb0e HS |
188 | * Claim the bus and prepare it for communication with a given slave. |
189 | * | |
190 | * This must be called before doing any transfers with a SPI slave. It | |
191 | * will enable and initialize any SPI hardware as necessary, and make | |
192 | * sure that the SCK line is in the correct idle state. It is not | |
193 | * allowed to claim the same bus for several slaves without releasing | |
194 | * the bus in between. | |
195 | * | |
1b1bd9a7 | 196 | * @slave: The SPI slave |
d255bb0e HS |
197 | * |
198 | * Returns: 0 if the bus was claimed successfully, or a negative value | |
199 | * if it wasn't. | |
200 | */ | |
201 | int spi_claim_bus(struct spi_slave *slave); | |
202 | ||
1b1bd9a7 | 203 | /** |
d255bb0e HS |
204 | * Release the SPI bus |
205 | * | |
206 | * This must be called once for every call to spi_claim_bus() after | |
207 | * all transfers have finished. It may disable any SPI hardware as | |
208 | * appropriate. | |
209 | * | |
1b1bd9a7 | 210 | * @slave: The SPI slave |
d255bb0e HS |
211 | */ |
212 | void spi_release_bus(struct spi_slave *slave); | |
77f85581 | 213 | |
5753d09b NK |
214 | /** |
215 | * Set the word length for SPI transactions | |
216 | * | |
217 | * Set the word length (number of bits per word) for SPI transactions. | |
218 | * | |
219 | * @slave: The SPI slave | |
220 | * @wordlen: The number of bits in a word | |
221 | * | |
222 | * Returns: 0 on success, -1 on failure. | |
223 | */ | |
224 | int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen); | |
225 | ||
1b1bd9a7 | 226 | /** |
77f85581 WD |
227 | * SPI transfer |
228 | * | |
229 | * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks | |
230 | * "bitlen" bits in the SPI MISO port. That's just the way SPI works. | |
231 | * | |
232 | * The source of the outgoing bits is the "dout" parameter and the | |
233 | * destination of the input bits is the "din" parameter. Note that "dout" | |
234 | * and "din" can point to the same memory location, in which case the | |
235 | * input data overwrites the output data (since both are buffered by | |
236 | * temporary variables, this is OK). | |
237 | * | |
77f85581 | 238 | * spi_xfer() interface: |
1b1bd9a7 JT |
239 | * @slave: The SPI slave which will be sending/receiving the data. |
240 | * @bitlen: How many bits to write and read. | |
241 | * @dout: Pointer to a string of bits to send out. The bits are | |
d255bb0e | 242 | * held in a byte array and are sent MSB first. |
1b1bd9a7 JT |
243 | * @din: Pointer to a string of bits that will be filled in. |
244 | * @flags: A bitwise combination of SPI_XFER_* flags. | |
77f85581 | 245 | * |
1b1bd9a7 | 246 | * Returns: 0 on success, not 0 on failure |
77f85581 | 247 | */ |
d255bb0e HS |
248 | int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, |
249 | void *din, unsigned long flags); | |
250 | ||
146bad96 TR |
251 | /* Copy memory mapped data */ |
252 | void spi_flash_copy_mmap(void *data, void *offset, size_t len); | |
253 | ||
1b1bd9a7 | 254 | /** |
d255bb0e HS |
255 | * Determine if a SPI chipselect is valid. |
256 | * This function is provided by the board if the low-level SPI driver | |
257 | * needs it to determine if a given chipselect is actually valid. | |
258 | * | |
259 | * Returns: 1 if bus:cs identifies a valid chip on this board, 0 | |
260 | * otherwise. | |
261 | */ | |
d7af6a48 | 262 | int spi_cs_is_valid(unsigned int bus, unsigned int cs); |
d255bb0e | 263 | |
d7af6a48 | 264 | #ifndef CONFIG_DM_SPI |
1b1bd9a7 | 265 | /** |
d255bb0e HS |
266 | * Activate a SPI chipselect. |
267 | * This function is provided by the board code when using a driver | |
268 | * that can't control its chipselects automatically (e.g. | |
269 | * common/soft_spi.c). When called, it should activate the chip select | |
270 | * to the device identified by "slave". | |
271 | */ | |
272 | void spi_cs_activate(struct spi_slave *slave); | |
273 | ||
1b1bd9a7 | 274 | /** |
d255bb0e HS |
275 | * Deactivate a SPI chipselect. |
276 | * This function is provided by the board code when using a driver | |
277 | * that can't control its chipselects automatically (e.g. | |
278 | * common/soft_spi.c). When called, it should deactivate the chip | |
279 | * select to the device identified by "slave". | |
280 | */ | |
281 | void spi_cs_deactivate(struct spi_slave *slave); | |
282 | ||
1b1bd9a7 | 283 | /** |
fa1423e7 TC |
284 | * Set transfer speed. |
285 | * This sets a new speed to be applied for next spi_xfer(). | |
1b1bd9a7 JT |
286 | * @slave: The SPI slave |
287 | * @hz: The transfer speed | |
fa1423e7 TC |
288 | */ |
289 | void spi_set_speed(struct spi_slave *slave, uint hz); | |
d7af6a48 | 290 | #endif |
fa1423e7 | 291 | |
1b1bd9a7 | 292 | /** |
d255bb0e | 293 | * Write 8 bits, then read 8 bits. |
1b1bd9a7 JT |
294 | * @slave: The SPI slave we're communicating with |
295 | * @byte: Byte to be written | |
d255bb0e HS |
296 | * |
297 | * Returns: The value that was read, or a negative value on error. | |
298 | * | |
299 | * TODO: This function probably shouldn't be inlined. | |
300 | */ | |
301 | static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte) | |
302 | { | |
303 | unsigned char dout[2]; | |
304 | unsigned char din[2]; | |
305 | int ret; | |
306 | ||
307 | dout[0] = byte; | |
308 | dout[1] = 0; | |
38254f45 | 309 | |
d255bb0e HS |
310 | ret = spi_xfer(slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); |
311 | return ret < 0 ? ret : din[1]; | |
312 | } | |
77f85581 | 313 | |
d7af6a48 SG |
314 | #ifdef CONFIG_DM_SPI |
315 | ||
316 | /** | |
317 | * struct spi_cs_info - Information about a bus chip select | |
318 | * | |
319 | * @dev: Connected device, or NULL if none | |
320 | */ | |
321 | struct spi_cs_info { | |
322 | struct udevice *dev; | |
323 | }; | |
324 | ||
325 | /** | |
326 | * struct struct dm_spi_ops - Driver model SPI operations | |
327 | * | |
328 | * The uclass interface is implemented by all SPI devices which use | |
329 | * driver model. | |
330 | */ | |
331 | struct dm_spi_ops { | |
332 | /** | |
333 | * Claim the bus and prepare it for communication. | |
334 | * | |
335 | * The device provided is the slave device. It's parent controller | |
336 | * will be used to provide the communication. | |
337 | * | |
338 | * This must be called before doing any transfers with a SPI slave. It | |
339 | * will enable and initialize any SPI hardware as necessary, and make | |
340 | * sure that the SCK line is in the correct idle state. It is not | |
341 | * allowed to claim the same bus for several slaves without releasing | |
342 | * the bus in between. | |
343 | * | |
9694b724 | 344 | * @dev: The SPI slave |
d7af6a48 SG |
345 | * |
346 | * Returns: 0 if the bus was claimed successfully, or a negative value | |
347 | * if it wasn't. | |
348 | */ | |
9694b724 | 349 | int (*claim_bus)(struct udevice *dev); |
d7af6a48 SG |
350 | |
351 | /** | |
352 | * Release the SPI bus | |
353 | * | |
354 | * This must be called once for every call to spi_claim_bus() after | |
355 | * all transfers have finished. It may disable any SPI hardware as | |
356 | * appropriate. | |
357 | * | |
9694b724 | 358 | * @dev: The SPI slave |
d7af6a48 | 359 | */ |
9694b724 | 360 | int (*release_bus)(struct udevice *dev); |
d7af6a48 SG |
361 | |
362 | /** | |
363 | * Set the word length for SPI transactions | |
364 | * | |
365 | * Set the word length (number of bits per word) for SPI transactions. | |
366 | * | |
367 | * @bus: The SPI slave | |
368 | * @wordlen: The number of bits in a word | |
369 | * | |
370 | * Returns: 0 on success, -ve on failure. | |
371 | */ | |
9694b724 | 372 | int (*set_wordlen)(struct udevice *dev, unsigned int wordlen); |
d7af6a48 SG |
373 | |
374 | /** | |
375 | * SPI transfer | |
376 | * | |
377 | * This writes "bitlen" bits out the SPI MOSI port and simultaneously | |
378 | * clocks "bitlen" bits in the SPI MISO port. That's just the way SPI | |
379 | * works. | |
380 | * | |
381 | * The source of the outgoing bits is the "dout" parameter and the | |
382 | * destination of the input bits is the "din" parameter. Note that | |
383 | * "dout" and "din" can point to the same memory location, in which | |
384 | * case the input data overwrites the output data (since both are | |
385 | * buffered by temporary variables, this is OK). | |
386 | * | |
387 | * spi_xfer() interface: | |
388 | * @dev: The slave device to communicate with | |
389 | * @bitlen: How many bits to write and read. | |
390 | * @dout: Pointer to a string of bits to send out. The bits are | |
391 | * held in a byte array and are sent MSB first. | |
392 | * @din: Pointer to a string of bits that will be filled in. | |
393 | * @flags: A bitwise combination of SPI_XFER_* flags. | |
394 | * | |
395 | * Returns: 0 on success, not -1 on failure | |
396 | */ | |
397 | int (*xfer)(struct udevice *dev, unsigned int bitlen, const void *dout, | |
398 | void *din, unsigned long flags); | |
399 | ||
d13f5b25 BB |
400 | /** |
401 | * Optimized handlers for SPI memory-like operations. | |
402 | * | |
403 | * Optimized/dedicated operations for interactions with SPI memory. This | |
404 | * field is optional and should only be implemented if the controller | |
405 | * has native support for memory like operations. | |
406 | */ | |
407 | const struct spi_controller_mem_ops *mem_ops; | |
408 | ||
d7af6a48 SG |
409 | /** |
410 | * Set transfer speed. | |
411 | * This sets a new speed to be applied for next spi_xfer(). | |
412 | * @bus: The SPI bus | |
413 | * @hz: The transfer speed | |
414 | * @return 0 if OK, -ve on error | |
415 | */ | |
416 | int (*set_speed)(struct udevice *bus, uint hz); | |
417 | ||
418 | /** | |
419 | * Set the SPI mode/flags | |
420 | * | |
421 | * It is unclear if we want to set speed and mode together instead | |
422 | * of separately. | |
423 | * | |
424 | * @bus: The SPI bus | |
425 | * @mode: Requested SPI mode (SPI_... flags) | |
426 | * @return 0 if OK, -ve on error | |
427 | */ | |
428 | int (*set_mode)(struct udevice *bus, uint mode); | |
429 | ||
430 | /** | |
431 | * Get information on a chip select | |
432 | * | |
433 | * This is only called when the SPI uclass does not know about a | |
434 | * chip select, i.e. it has no attached device. It gives the driver | |
435 | * a chance to allow activity on that chip select even so. | |
436 | * | |
437 | * @bus: The SPI bus | |
438 | * @cs: The chip select (0..n-1) | |
439 | * @info: Returns information about the chip select, if valid. | |
440 | * On entry info->dev is NULL | |
441 | * @return 0 if OK (and @info is set up), -ENODEV if the chip select | |
442 | * is invalid, other -ve value on error | |
443 | */ | |
444 | int (*cs_info)(struct udevice *bus, uint cs, struct spi_cs_info *info); | |
445 | }; | |
446 | ||
c60e1f25 SG |
447 | struct dm_spi_emul_ops { |
448 | /** | |
449 | * SPI transfer | |
450 | * | |
451 | * This writes "bitlen" bits out the SPI MOSI port and simultaneously | |
452 | * clocks "bitlen" bits in the SPI MISO port. That's just the way SPI | |
453 | * works. Here the device is a slave. | |
454 | * | |
455 | * The source of the outgoing bits is the "dout" parameter and the | |
456 | * destination of the input bits is the "din" parameter. Note that | |
457 | * "dout" and "din" can point to the same memory location, in which | |
458 | * case the input data overwrites the output data (since both are | |
459 | * buffered by temporary variables, this is OK). | |
460 | * | |
461 | * spi_xfer() interface: | |
462 | * @slave: The SPI slave which will be sending/receiving the data. | |
463 | * @bitlen: How many bits to write and read. | |
464 | * @dout: Pointer to a string of bits sent to the device. The | |
465 | * bits are held in a byte array and are sent MSB first. | |
466 | * @din: Pointer to a string of bits that will be sent back to | |
467 | * the master. | |
468 | * @flags: A bitwise combination of SPI_XFER_* flags. | |
469 | * | |
470 | * Returns: 0 on success, not -1 on failure | |
471 | */ | |
472 | int (*xfer)(struct udevice *slave, unsigned int bitlen, | |
473 | const void *dout, void *din, unsigned long flags); | |
474 | }; | |
475 | ||
d7af6a48 SG |
476 | /** |
477 | * spi_find_bus_and_cs() - Find bus and slave devices by number | |
478 | * | |
479 | * Given a bus number and chip select, this finds the corresponding bus | |
480 | * device and slave device. Neither device is activated by this function, | |
481 | * although they may have been activated previously. | |
482 | * | |
483 | * @busnum: SPI bus number | |
484 | * @cs: Chip select to look for | |
485 | * @busp: Returns bus device | |
486 | * @devp: Return slave device | |
487 | * @return 0 if found, -ENODEV on error | |
488 | */ | |
489 | int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp, | |
490 | struct udevice **devp); | |
491 | ||
492 | /** | |
493 | * spi_get_bus_and_cs() - Find and activate bus and slave devices by number | |
494 | * | |
495 | * Given a bus number and chip select, this finds the corresponding bus | |
496 | * device and slave device. | |
497 | * | |
498 | * If no such slave exists, and drv_name is not NULL, then a new slave device | |
499 | * is automatically bound on this chip select. | |
500 | * | |
501 | * Ths new slave device is probed ready for use with the given speed and mode. | |
502 | * | |
503 | * @busnum: SPI bus number | |
504 | * @cs: Chip select to look for | |
505 | * @speed: SPI speed to use for this slave | |
506 | * @mode: SPI mode to use for this slave | |
507 | * @drv_name: Name of driver to attach to this chip select | |
508 | * @dev_name: Name of the new device thus created | |
509 | * @busp: Returns bus device | |
510 | * @devp: Return slave device | |
511 | * @return 0 if found, -ve on error | |
512 | */ | |
513 | int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode, | |
514 | const char *drv_name, const char *dev_name, | |
515 | struct udevice **busp, struct spi_slave **devp); | |
516 | ||
517 | /** | |
518 | * spi_chip_select() - Get the chip select for a slave | |
519 | * | |
520 | * @return the chip select this slave is attached to | |
521 | */ | |
522 | int spi_chip_select(struct udevice *slave); | |
523 | ||
ff56bba2 SG |
524 | /** |
525 | * spi_find_chip_select() - Find the slave attached to chip select | |
526 | * | |
527 | * @bus: SPI bus to search | |
528 | * @cs: Chip select to look for | |
529 | * @devp: Returns the slave device if found | |
530 | * @return 0 if found, -ENODEV on error | |
531 | */ | |
532 | int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp); | |
533 | ||
d7af6a48 | 534 | /** |
d0cff03e | 535 | * spi_slave_ofdata_to_platdata() - decode standard SPI platform data |
d7af6a48 | 536 | * |
d0cff03e | 537 | * This decodes the speed and mode for a slave from a device tree node |
d7af6a48 SG |
538 | * |
539 | * @blob: Device tree blob | |
540 | * @node: Node offset to read from | |
d0cff03e | 541 | * @plat: Place to put the decoded information |
d7af6a48 | 542 | */ |
279e26f5 | 543 | int spi_slave_ofdata_to_platdata(struct udevice *dev, |
d0cff03e | 544 | struct dm_spi_slave_platdata *plat); |
d7af6a48 SG |
545 | |
546 | /** | |
547 | * spi_cs_info() - Check information on a chip select | |
548 | * | |
549 | * This checks a particular chip select on a bus to see if it has a device | |
550 | * attached, or is even valid. | |
551 | * | |
552 | * @bus: The SPI bus | |
553 | * @cs: The chip select (0..n-1) | |
554 | * @info: Returns information about the chip select, if valid | |
555 | * @return 0 if OK (and @info is set up), -ENODEV if the chip select | |
556 | * is invalid, other -ve value on error | |
557 | */ | |
558 | int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info); | |
559 | ||
560 | struct sandbox_state; | |
c60e1f25 SG |
561 | |
562 | /** | |
563 | * sandbox_spi_get_emul() - get an emulator for a SPI slave | |
564 | * | |
565 | * This provides a way to attach an emulated SPI device to a particular SPI | |
566 | * slave, so that xfer() operations on the slave will be handled by the | |
567 | * emulator. If a emulator already exists on that chip select it is returned. | |
568 | * Otherwise one is created. | |
569 | * | |
570 | * @state: Sandbox state | |
571 | * @bus: SPI bus requesting the emulator | |
572 | * @slave: SPI slave device requesting the emulator | |
573 | * @emuip: Returns pointer to emulator | |
574 | * @return 0 if OK, -ve on error | |
575 | */ | |
d7af6a48 SG |
576 | int sandbox_spi_get_emul(struct sandbox_state *state, |
577 | struct udevice *bus, struct udevice *slave, | |
578 | struct udevice **emulp); | |
579 | ||
7a3eff4c PF |
580 | /** |
581 | * Claim the bus and prepare it for communication with a given slave. | |
582 | * | |
583 | * This must be called before doing any transfers with a SPI slave. It | |
584 | * will enable and initialize any SPI hardware as necessary, and make | |
585 | * sure that the SCK line is in the correct idle state. It is not | |
586 | * allowed to claim the same bus for several slaves without releasing | |
587 | * the bus in between. | |
588 | * | |
589 | * @dev: The SPI slave device | |
590 | * | |
591 | * Returns: 0 if the bus was claimed successfully, or a negative value | |
592 | * if it wasn't. | |
593 | */ | |
594 | int dm_spi_claim_bus(struct udevice *dev); | |
595 | ||
596 | /** | |
597 | * Release the SPI bus | |
598 | * | |
599 | * This must be called once for every call to dm_spi_claim_bus() after | |
600 | * all transfers have finished. It may disable any SPI hardware as | |
601 | * appropriate. | |
602 | * | |
603 | * @slave: The SPI slave device | |
604 | */ | |
605 | void dm_spi_release_bus(struct udevice *dev); | |
606 | ||
607 | /** | |
608 | * SPI transfer | |
609 | * | |
610 | * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks | |
611 | * "bitlen" bits in the SPI MISO port. That's just the way SPI works. | |
612 | * | |
613 | * The source of the outgoing bits is the "dout" parameter and the | |
614 | * destination of the input bits is the "din" parameter. Note that "dout" | |
615 | * and "din" can point to the same memory location, in which case the | |
616 | * input data overwrites the output data (since both are buffered by | |
617 | * temporary variables, this is OK). | |
618 | * | |
619 | * dm_spi_xfer() interface: | |
620 | * @dev: The SPI slave device which will be sending/receiving the data. | |
621 | * @bitlen: How many bits to write and read. | |
622 | * @dout: Pointer to a string of bits to send out. The bits are | |
623 | * held in a byte array and are sent MSB first. | |
624 | * @din: Pointer to a string of bits that will be filled in. | |
625 | * @flags: A bitwise combination of SPI_XFER_* flags. | |
626 | * | |
627 | * Returns: 0 on success, not 0 on failure | |
628 | */ | |
629 | int dm_spi_xfer(struct udevice *dev, unsigned int bitlen, | |
630 | const void *dout, void *din, unsigned long flags); | |
631 | ||
bc5701e1 | 632 | /* Access the operations for a SPI device */ |
d7af6a48 | 633 | #define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops) |
c60e1f25 | 634 | #define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops) |
d7af6a48 SG |
635 | #endif /* CONFIG_DM_SPI */ |
636 | ||
77f85581 | 637 | #endif /* _SPI_H_ */ |