[J-u-boot.git] / include / phy.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright 2011 Freescale Semiconductor, Inc.
 *	Andy Fleming <[email protected]>
 *
 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
 */

#ifndef _PHY_H
#define _PHY_H

#include <asm-generic/gpio.h>
#include <log.h>
#include <phy_interface.h>
#include <dm/ofnode.h>
#include <dm/read.h>
#include <linux/errno.h>
#include <linux/list.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/mdio.h>

struct udevice;

#define PHY_FIXED_ID		0xa5a55a5a
#define PHY_NCSI_ID            0xbeefcafe

/*
 * There is no actual id for this.
 * This is just a dummy id for gmii2rgmmi converter.
 */
#define PHY_GMII2RGMII_ID	0x5a5a5a5a

#define PHY_MAX_ADDR 32

#define PHY_FLAG_BROKEN_RESET	(1 << 0) /* soft reset not supported */

#define PHY_DEFAULT_FEATURES	(SUPPORTED_Autoneg | \
				 SUPPORTED_TP | \
				 SUPPORTED_MII)

#define PHY_10BT_FEATURES	(SUPPORTED_10baseT_Half | \
				 SUPPORTED_10baseT_Full)

#define PHY_100BT_FEATURES	(SUPPORTED_100baseT_Half | \
				 SUPPORTED_100baseT_Full)

#define PHY_1000BT_FEATURES	(SUPPORTED_1000baseT_Half | \
				 SUPPORTED_1000baseT_Full)

#define PHY_BASIC_FEATURES	(PHY_10BT_FEATURES | \
				 PHY_100BT_FEATURES | \
				 PHY_DEFAULT_FEATURES)

#define PHY_GBIT_FEATURES	(PHY_BASIC_FEATURES | \
				 PHY_1000BT_FEATURES)

#define PHY_10G_FEATURES	(PHY_GBIT_FEATURES | \
				SUPPORTED_10000baseT_Full)

#ifndef PHY_ANEG_TIMEOUT
#define PHY_ANEG_TIMEOUT	4000
#endif


struct phy_device;

#define MDIO_NAME_LEN 32

struct mii_dev {
	struct list_head link;
	char name[MDIO_NAME_LEN];
	void *priv;
	int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
	int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
			u16 val);
	int (*reset)(struct mii_dev *bus);
	struct phy_device *phymap[PHY_MAX_ADDR];
	u32 phy_mask;
	/** @reset_delay_us: Bus GPIO reset pulse width in microseconds */
	int reset_delay_us;
	/** @reset_post_delay_us: Bus GPIO reset deassert delay in microseconds */
	int reset_post_delay_us;
	/** @reset_gpiod: Bus Reset GPIO descriptor pointer */
	struct gpio_desc reset_gpiod;
};

/* struct phy_driver: a structure which defines PHY behavior
 *
 * uid will contain a number which represents the PHY.  During
 * startup, the driver will poll the PHY to find out what its
 * UID--as defined by registers 2 and 3--is.  The 32-bit result
 * gotten from the PHY will be masked to
 * discard any bits which may change based on revision numbers
 * unimportant to functionality
 *
 */
struct phy_driver {
	char *name;
	unsigned int uid;
	unsigned int mask;
	unsigned int mmds;

	u32 features;

	/* Called to do any driver startup necessities */
	/* Will be called during phy_connect */
	int (*probe)(struct phy_device *phydev);

	/* Called to configure the PHY, and modify the controller
	 * based on the results.  Should be called after phy_connect */
	int (*config)(struct phy_device *phydev);

	/* Called when starting up the controller */
	int (*startup)(struct phy_device *phydev);

	/* Called when bringing down the controller */
	int (*shutdown)(struct phy_device *phydev);

	int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
	int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
			u16 val);

	/* Phy specific driver override for reading a MMD register */
	int (*read_mmd)(struct phy_device *phydev, int devad, int reg);

	/* Phy specific driver override for writing a MMD register */
	int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
			 u16 val);

	/* driver private data */
	ulong data;
};

struct phy_device {
	/* Information about the PHY type */
	/* And management functions */
	struct mii_dev *bus;
	struct phy_driver *drv;
	void *priv;

	struct udevice *dev;
	ofnode node;

	/* forced speed & duplex (no autoneg)
	 * partner speed & duplex & pause (autoneg)
	 */
	int speed;
	int duplex;

	/* The most recently read link state */
	int link;
	int port;
	phy_interface_t interface;

	u32 advertising;
	u32 supported;
	u32 mmds;

	int autoneg;
	int addr;
	int pause;
	int asym_pause;
	u32 phy_id;
	bool is_c45;
	u32 flags;
};

struct fixed_link {
	int phy_id;
	int duplex;
	int link_speed;
	int pause;
	int asym_pause;
};

/**
 * phy_reset() - Resets the specified PHY
 * Issues a reset of the PHY and waits for it to complete
 *
 * @phydev:	PHY to reset
 * @return: 0 if OK, -ve on error
 */
int phy_reset(struct phy_device *phydev);

/**
 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
 * The function checks the PHY addresses flagged in phy_mask and returns a
 * phy_device pointer if it detects a PHY.
 * This function should only be called if just one PHY is expected to be present
 * in the set of addresses flagged in phy_mask.  If multiple PHYs are present,
 * it is undefined which of these PHYs is returned.
 *
 * @bus:	MII/MDIO bus to scan
 * @phy_mask:	bitmap of PYH addresses to scan
 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask);

#ifdef CONFIG_PHY_FIXED

/**
 * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
 * @node: OF node for the container of the fixed-link node
 *
 * Description: Creates a struct phy_device based on a fixed-link of_node
 * description. Can be used without phy_connect by drivers which do not expose
 * a UCLASS_ETH udevice.
 */
struct phy_device *fixed_phy_create(ofnode node);

#else

static inline struct phy_device *fixed_phy_create(ofnode node)
{
	return NULL;
}

#endif

/**
 * phy_connect() - Creates a PHY device for the Ethernet interface
 * Creates a PHY device for the PHY at the given address, if one doesn't exist
 * already, and associates it with the Ethernet device.
 * The function may be called with addr <= 0, in this case addr value is ignored
 * and the bus is scanned to detect a PHY.  Scanning should only be used if only
 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
 * which PHY is returned.
 *
 * @bus:	MII/MDIO bus that hosts the PHY
 * @addr:	PHY address on MDIO bus
 * @dev:	Ethernet device to associate to the PHY
 * @interface:	type of MAC-PHY interface
 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_connect(struct mii_dev *bus, int addr,
				struct udevice *dev,
				phy_interface_t interface);
/**
 * phy_device_create() - Create a PHY device
 *
 * @bus:		MII/MDIO bus that hosts the PHY
 * @addr:		PHY address on MDIO bus
 * @phy_id:		where to store the ID retrieved
 * @is_c45:		Device Identifiers if is_c45
 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
				     u32 phy_id, bool is_c45);

/**
 * phy_connect_phy_id() - Connect to phy device by reading PHY id
 *			  from phy node.
 *
 * @bus:		MII/MDIO bus that hosts the PHY
 * @dev:		Ethernet device to associate to the PHY
 * @return:		pointer to phy_device if a PHY is found,
 *			or NULL otherwise
 */
struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
				      int phyaddr);

static inline ofnode phy_get_ofnode(struct phy_device *phydev)
{
	if (ofnode_valid(phydev->node))
		return phydev->node;
	else
		return dev_ofnode(phydev->dev);
}

/**
 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
 *                             condition is met or a timeout occurs
 *
 * @phydev: The phy_device struct
 * @devaddr: The MMD to read from
 * @regnum: The register on the MMD to read
 * @val: Variable to read the register into
 * @cond: Break condition (usually involving @val)
 * @sleep_us: Maximum time to sleep between reads in us (0
 *            tight-loops).  Should be less than ~20ms since usleep_range
 *            is used (see Documentation/timers/timers-howto.rst).
 * @timeout_us: Timeout in us, 0 means never timeout
 * @sleep_before_read: if it is true, sleep @sleep_us before read.
 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
 * case, the last read value at @args is stored in @val. Must not
 * be called from atomic context if sleep_us or timeout_us are used.
 */
#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
				  sleep_us, timeout_us, sleep_before_read) \
({ \
	int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
				  sleep_us, timeout_us, \
				  phydev, devaddr, regnum); \
	if (val <  0) \
		__ret = val; \
	if (__ret) \
		dev_err(phydev->dev, "%s failed: %d\n", __func__, __ret); \
	__ret; \
})

int phy_read(struct phy_device *phydev, int devad, int regnum);
int phy_write(struct phy_device *phydev, int devad, int regnum, u16 val);
void phy_mmd_start_indirect(struct phy_device *phydev, int devad, int regnum);
int phy_read_mmd(struct phy_device *phydev, int devad, int regnum);
int phy_write_mmd(struct phy_device *phydev, int devad, int regnum, u16 val);
int phy_set_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
			   u16 mask, u16 set);
int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
		   u16 mask, u16 set);

int phy_startup(struct phy_device *phydev);
int phy_config(struct phy_device *phydev);
int phy_shutdown(struct phy_device *phydev);
int phy_set_supported(struct phy_device *phydev, u32 max_speed);
int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
	       u16 set);
int genphy_config_aneg(struct phy_device *phydev);
int genphy_restart_aneg(struct phy_device *phydev);
int genphy_update_link(struct phy_device *phydev);
int genphy_parse_link(struct phy_device *phydev);
int genphy_config(struct phy_device *phydev);
int genphy_startup(struct phy_device *phydev);
int genphy_shutdown(struct phy_device *phydev);
int gen10g_config(struct phy_device *phydev);
int gen10g_startup(struct phy_device *phydev);
int gen10g_shutdown(struct phy_device *phydev);
int gen10g_discover_mmds(struct phy_device *phydev);

/**
 * U_BOOT_PHY_DRIVER() - Declare a new U-Boot driver
 * @__name: name of the driver
 */
#define U_BOOT_PHY_DRIVER(__name)					\
	ll_entry_declare(struct phy_driver, __name, phy_driver)

int board_phy_config(struct phy_device *phydev);
int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);

/**
 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
 * is RGMII (all variants)
 * @phydev: the phy_device struct
 * @return: true if MII bus is RGMII or false if it is not
 */
static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
{
	switch (phydev->interface) {
	case PHY_INTERFACE_MODE_RGMII:
	case PHY_INTERFACE_MODE_RGMII_ID:
	case PHY_INTERFACE_MODE_RGMII_RXID:
	case PHY_INTERFACE_MODE_RGMII_TXID:
		return 1;
	default:
		return 0;
	}
}

bool phy_interface_is_ncsi(void);

/* PHY UIDs for various PHYs that are referenced in external code */
#define PHY_UID_CS4340		0x13e51002
#define PHY_UID_CS4223		0x03e57003
#define PHY_UID_TN2020		0x00a19410
#define PHY_UID_IN112525_S03	0x02107440

#endif
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
5f184715 AF	2	/*
5f184715 AF	3	* Copyright 2011 Freescale Semiconductor, Inc.
b21f87a3	4	* Andy Fleming <[email protected]>
5f184715	5	*
5f184715 AF	6	* This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
	7	*/
	8
	9	#ifndef _PHY_H
	10	#define _PHY_H
	11
a0e02c66	12	#include <asm-generic/gpio.h>
2a64ada7 SG	13	#include <log.h>
	14	#include <phy_interface.h>
	15	#include <dm/ofnode.h>
	16	#include <dm/read.h>
f2176515	17	#include <linux/errno.h>
5f184715 AF	18	#include <linux/list.h>
	19	#include <linux/mii.h>
	20	#include <linux/ethtool.h>
	21	#include <linux/mdio.h>
2a64ada7 SG	22
2a64ada7 SG	23	struct udevice;
5f184715	24
db40c1aa	25	#define PHY_FIXED_ID 0xa5a55a5a
f641a8ac SMJ	26	#define PHY_NCSI_ID 0xbeefcafe
f641a8ac SMJ	27
f41e588c SDPP	28	/*
	29	* There is no actual id for this.
	30	* This is just a dummy id for gmii2rgmmi converter.
	31	*/
	32	#define PHY_GMII2RGMII_ID 0x5a5a5a5a
db40c1aa	33
5f184715 AF	34	#define PHY_MAX_ADDR 32
5f184715 AF	35
ddcd1f30 SX	36	#define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
ddcd1f30 SX	37
4dae610b	38	#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg \| \
5f184715 AF	39	SUPPORTED_TP \| \
	40	SUPPORTED_MII)
	41
4dae610b FF	42	#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half \| \
	43	SUPPORTED_10baseT_Full)
	44
	45	#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half \| \
	46	SUPPORTED_100baseT_Full)
	47
	48	#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half \| \
5f184715 AF	49	SUPPORTED_1000baseT_Full)
5f184715 AF	50
4dae610b FF	51	#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES \| \
	52	PHY_100BT_FEATURES \| \
	53	PHY_DEFAULT_FEATURES)
	54
	55	#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES \| \
	56	PHY_1000BT_FEATURES)
	57
5f184715 AF	58	#define PHY_10G_FEATURES (PHY_GBIT_FEATURES \| \
	59	SUPPORTED_10000baseT_Full)
	60
4fb3f0c8	61	#ifndef PHY_ANEG_TIMEOUT
5f184715	62	#define PHY_ANEG_TIMEOUT 4000
4fb3f0c8	63	#endif
5f184715 AF	64
5f184715 AF	65
5f184715 AF	66	struct phy_device;
	67
	68	#define MDIO_NAME_LEN 32
	69
	70	struct mii_dev {
	71	struct list_head link;
	72	char name[MDIO_NAME_LEN];
	73	void *priv;
	74	int (read)(struct mii_dev bus, int addr, int devad, int reg);
	75	int (write)(struct mii_dev bus, int addr, int devad, int reg,
	76	u16 val);
	77	int (reset)(struct mii_dev bus);
	78	struct phy_device *phymap[PHY_MAX_ADDR];
	79	u32 phy_mask;
a0e02c66 RQ	80	/** @reset_delay_us: Bus GPIO reset pulse width in microseconds */
	81	int reset_delay_us;
	82	/** @reset_post_delay_us: Bus GPIO reset deassert delay in microseconds */
	83	int reset_post_delay_us;
	84	/** @reset_gpiod: Bus Reset GPIO descriptor pointer */
	85	struct gpio_desc reset_gpiod;
5f184715 AF	86	};
	87
	88	/* struct phy_driver: a structure which defines PHY behavior
	89	*
	90	* uid will contain a number which represents the PHY. During
	91	* startup, the driver will poll the PHY to find out what its
	92	* UID--as defined by registers 2 and 3--is. The 32-bit result
	93	* gotten from the PHY will be masked to
	94	* discard any bits which may change based on revision numbers
	95	* unimportant to functionality
	96	*
	97	*/
	98	struct phy_driver {
	99	char *name;
	100	unsigned int uid;
	101	unsigned int mask;
	102	unsigned int mmds;
	103
	104	u32 features;
	105
	106	/* Called to do any driver startup necessities */
	107	/* Will be called during phy_connect */
	108	int (probe)(struct phy_device phydev);
	109
	110	/* Called to configure the PHY, and modify the controller
	111	* based on the results. Should be called after phy_connect */
	112	int (config)(struct phy_device phydev);
	113
	114	/* Called when starting up the controller */
	115	int (startup)(struct phy_device phydev);
	116
	117	/* Called when bringing down the controller */
	118	int (shutdown)(struct phy_device phydev);
	119
b71841b9 SB	120	int (readext)(struct phy_device phydev, int addr, int devad, int reg);
	121	int (writeext)(struct phy_device phydev, int addr, int devad, int reg,
	122	u16 val);
4f6746dc CC	123
	124	/* Phy specific driver override for reading a MMD register */
	125	int (read_mmd)(struct phy_device phydev, int devad, int reg);
	126
	127	/* Phy specific driver override for writing a MMD register */
	128	int (write_mmd)(struct phy_device phydev, int devad, int reg,
	129	u16 val);
	130
d718b697 AM	131	/* driver private data */
d718b697 AM	132	ulong data;
5f184715 AF	133	};
	134
	135	struct phy_device {
	136	/* Information about the PHY type */
	137	/* And management functions */
	138	struct mii_dev *bus;
	139	struct phy_driver *drv;
	140	void *priv;
	141
c74c8e66	142	struct udevice *dev;
eef0b8a9	143	ofnode node;
5f184715 AF	144
	145	/* forced speed & duplex (no autoneg)
	146	* partner speed & duplex & pause (autoneg)
	147	*/
	148	int speed;
	149	int duplex;
	150
	151	/* The most recently read link state */
	152	int link;
	153	int port;
	154	phy_interface_t interface;
	155
	156	u32 advertising;
	157	u32 supported;
	158	u32 mmds;
	159
	160	int autoneg;
	161	int addr;
	162	int pause;
	163	int asym_pause;
	164	u32 phy_id;
b3eabd82	165	bool is_c45;
5f184715 AF	166	u32 flags;
	167	};
	168
f55a776c SX	169	struct fixed_link {
	170	int phy_id;
	171	int duplex;
	172	int link_speed;
	173	int pause;
	174	int asym_pause;
	175	};
	176
c38ac289 AM	177	/**
c38ac289 AM	178	* phy_reset() - Resets the specified PHY
c38ac289 AM	179	* Issues a reset of the PHY and waits for it to complete
	180	*
	181	* @phydev: PHY to reset
ea756fb8	182	* @return: 0 if OK, -ve on error
c38ac289	183	*/
5f184715	184	int phy_reset(struct phy_device *phydev);
c38ac289 AM	185
	186	/**
	187	* phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
c38ac289 AM	188	* The function checks the PHY addresses flagged in phy_mask and returns a
	189	* phy_device pointer if it detects a PHY.
	190	* This function should only be called if just one PHY is expected to be present
	191	* in the set of addresses flagged in phy_mask. If multiple PHYs are present,
	192	* it is undefined which of these PHYs is returned.
	193	*
	194	* @bus: MII/MDIO bus to scan
	195	* @phy_mask: bitmap of PYH addresses to scan
ea756fb8	196	* @return: pointer to phy_device if a PHY is found, or NULL otherwise
c38ac289	197	*/
e24b58f5	198	struct phy_device phy_find_by_mask(struct mii_dev bus, unsigned phy_mask);
c38ac289	199
d0781c95 VO	200	#ifdef CONFIG_PHY_FIXED
	201
	202	/**
	203	* fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
	204	* @node: OF node for the container of the fixed-link node
	205	*
	206	* Description: Creates a struct phy_device based on a fixed-link of_node
	207	* description. Can be used without phy_connect by drivers which do not expose
	208	* a UCLASS_ETH udevice.
	209	*/
	210	struct phy_device *fixed_phy_create(ofnode node);
	211
	212	#else
	213
	214	static inline struct phy_device *fixed_phy_create(ofnode node)
	215	{
	216	return NULL;
	217	}
	218
	219	#endif
	220
c38ac289 AM	221	/**
c38ac289 AM	222	* phy_connect() - Creates a PHY device for the Ethernet interface
c38ac289 AM	223	* Creates a PHY device for the PHY at the given address, if one doesn't exist
	224	* already, and associates it with the Ethernet device.
	225	* The function may be called with addr <= 0, in this case addr value is ignored
	226	* and the bus is scanned to detect a PHY. Scanning should only be used if only
	227	* one PHY is expected to be present on the MDIO bus, otherwise it is undefined
	228	* which PHY is returned.
	229	*
	230	* @bus: MII/MDIO bus that hosts the PHY
	231	* @addr: PHY address on MDIO bus
	232	* @dev: Ethernet device to associate to the PHY
	233	* @interface: type of MAC-PHY interface
ea756fb8	234	* @return: pointer to phy_device if a PHY is found, or NULL otherwise
c38ac289	235	*/
c74c8e66 SG	236	struct phy_device phy_connect(struct mii_dev bus, int addr,
	237	struct udevice *dev,
	238	phy_interface_t interface);
3249116d MS	239	/**
	240	* phy_device_create() - Create a PHY device
	241	*
	242	* @bus: MII/MDIO bus that hosts the PHY
	243	* @addr: PHY address on MDIO bus
	244	* @phy_id: where to store the ID retrieved
	245	* @is_c45: Device Identifiers if is_c45
3249116d MS	246	* @return: pointer to phy_device if a PHY is found, or NULL otherwise
	247	*/
	248	struct phy_device phy_device_create(struct mii_dev bus, int addr,
e24b58f5	249	u32 phy_id, bool is_c45);
c38ac289	250
a744a284 MS	251	/**
	252	* phy_connect_phy_id() - Connect to phy device by reading PHY id
	253	* from phy node.
	254	*
	255	* @bus: MII/MDIO bus that hosts the PHY
	256	* @dev: Ethernet device to associate to the PHY
a744a284 MS	257	* @return: pointer to phy_device if a PHY is found,
	258	* or NULL otherwise
	259	*/
	260	struct phy_device phy_connect_phy_id(struct mii_dev bus, struct udevice *dev,
7f418ea5	261	int phyaddr);
a744a284	262
eef0b8a9 GS	263	static inline ofnode phy_get_ofnode(struct phy_device *phydev)
	264	{
	265	if (ofnode_valid(phydev->node))
	266	return phydev->node;
	267	else
	268	return dev_ofnode(phydev->dev);
	269	}
65f2266e	270
1f614d52 MV	271	/**
	272	* phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
	273	* condition is met or a timeout occurs
	274	*
	275	* @phydev: The phy_device struct
	276	* @devaddr: The MMD to read from
	277	* @regnum: The register on the MMD to read
	278	* @val: Variable to read the register into
	279	* @cond: Break condition (usually involving @val)
	280	* @sleep_us: Maximum time to sleep between reads in us (0
	281	* tight-loops). Should be less than ~20ms since usleep_range
	282	* is used (see Documentation/timers/timers-howto.rst).
	283	* @timeout_us: Timeout in us, 0 means never timeout
	284	* @sleep_before_read: if it is true, sleep @sleep_us before read.
	285	* Returns 0 on success and -ETIMEDOUT upon a timeout. In either
	286	* case, the last read value at @args is stored in @val. Must not
	287	* be called from atomic context if sleep_us or timeout_us are used.
	288	*/
	289	#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
	290	sleep_us, timeout_us, sleep_before_read) \
	291	({ \
	292	int __ret = read_poll_timeout(phy_read_mmd, val, (cond) \|\| val < 0, \
	293	sleep_us, timeout_us, \
	294	phydev, devaddr, regnum); \
	295	if (val < 0) \
	296	__ret = val; \
	297	if (__ret) \
	298	dev_err(phydev->dev, "%s failed: %d\n", __func__, __ret); \
	299	__ret; \
	300	})
	301
65f2266e RF	302	int phy_read(struct phy_device *phydev, int devad, int regnum);
	303	int phy_write(struct phy_device *phydev, int devad, int regnum, u16 val);
	304	void phy_mmd_start_indirect(struct phy_device *phydev, int devad, int regnum);
	305	int phy_read_mmd(struct phy_device *phydev, int devad, int regnum);
	306	int phy_write_mmd(struct phy_device *phydev, int devad, int regnum, u16 val);
	307	int phy_set_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
	308	int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
87b75028 MV	309	int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
	310	u16 mask, u16 set);
	311	int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
	312	u16 mask, u16 set);
65f2266e	313
5f184715 AF	314	int phy_startup(struct phy_device *phydev);
	315	int phy_config(struct phy_device *phydev);
	316	int phy_shutdown(struct phy_device *phydev);
b18acb0a	317	int phy_set_supported(struct phy_device *phydev, u32 max_speed);
087baf80 AA	318	int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
087baf80 AA	319	u16 set);
5f184715	320	int genphy_config_aneg(struct phy_device *phydev);
8682aba7	321	int genphy_restart_aneg(struct phy_device *phydev);
5f184715	322	int genphy_update_link(struct phy_device *phydev);
e2043f5c	323	int genphy_parse_link(struct phy_device *phydev);
5f184715 AF	324	int genphy_config(struct phy_device *phydev);
	325	int genphy_startup(struct phy_device *phydev);
	326	int genphy_shutdown(struct phy_device *phydev);
	327	int gen10g_config(struct phy_device *phydev);
	328	int gen10g_startup(struct phy_device *phydev);
	329	int gen10g_shutdown(struct phy_device *phydev);
	330	int gen10g_discover_mmds(struct phy_device *phydev);
	331
7940a93e MV	332	/**
	333	* U_BOOT_PHY_DRIVER() - Declare a new U-Boot driver
	334	* @__name: name of the driver
	335	*/
	336	#define U_BOOT_PHY_DRIVER(__name) \
	337	ll_entry_declare(struct phy_driver, __name, phy_driver)
	338
2fb63964	339	int board_phy_config(struct phy_device *phydev);
5707d5ff	340	int get_phy_id(struct mii_dev bus, int addr, int devad, u32 phy_id);
2fb63964	341
3ab72fe8 DM	342	/**
	343	* phy_interface_is_rgmii - Convenience function for testing if a PHY interface
	344	* is RGMII (all variants)
	345	* @phydev: the phy_device struct
ea756fb8	346	* @return: true if MII bus is RGMII or false if it is not
3ab72fe8 DM	347	*/
	348	static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
	349	{
09005c2f NM	350	switch (phydev->interface) {
	351	case PHY_INTERFACE_MODE_RGMII:
	352	case PHY_INTERFACE_MODE_RGMII_ID:
	353	case PHY_INTERFACE_MODE_RGMII_RXID:
	354	case PHY_INTERFACE_MODE_RGMII_TXID:
	355	return 1;
	356	default:
	357	return 0;
	358	}
3ab72fe8 DM	359	}
3ab72fe8 DM	360
09bd3d0b SMJ	361	bool phy_interface_is_ncsi(void);
09bd3d0b SMJ	362
a836626c	363	/* PHY UIDs for various PHYs that are referenced in external code */
0cf207ec WD	364	#define PHY_UID_CS4340 0x13e51002
0cf207ec WD	365	#define PHY_UID_CS4223 0x03e57003
1ddcf5ed PJ	366	#define PHY_UID_TN2020 0x00a19410
1ddcf5ed PJ	367	#define PHY_UID_IN112525_S03 0x02107440
a836626c	368
5f184715	369	#endif