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Commit | Line | Data |
---|---|---|
7dcc2f7e SG |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * Devicetree file for running sandbox tests | |
4 | * | |
5 | * This includes lots of extra devices used by various tests. | |
6 | * | |
7 | * Note that SPL use the main sandbox.dts file | |
8 | */ | |
9 | ||
2e7d35d2 SG |
10 | /dts-v1/; |
11 | ||
2c0f782e PD |
12 | #include <dt-bindings/gpio/gpio.h> |
13 | #include <dt-bindings/gpio/sandbox-gpio.h> | |
289d0ead | 14 | #include <dt-bindings/input/input.h> |
7f0f1806 | 15 | #include <dt-bindings/pinctrl/sandbox-pinmux.h> |
739592cc | 16 | #include <dt-bindings/mux/mux.h> |
2c0f782e | 17 | |
2e7d35d2 SG |
18 | / { |
19 | model = "sandbox"; | |
20 | compatible = "sandbox"; | |
21 | #address-cells = <1>; | |
0503e820 | 22 | #size-cells = <1>; |
2e7d35d2 | 23 | |
00606d7e SG |
24 | aliases { |
25 | console = &uart0; | |
82a3c9ef MW |
26 | ethernet0 = "/eth@10002000"; |
27 | ethernet2 = &swp_0; | |
28 | ethernet3 = ð_3; | |
29 | ethernet4 = &dsa_eth0; | |
30 | ethernet5 = ð_5; | |
bedb182e SA |
31 | ethernet6 = "/eth@10004000"; |
32 | ethernet7 = &swp_1; | |
33 | ethernet8 = &phy_eth0; | |
5d9a88f4 SG |
34 | gpio1 = &gpio_a; |
35 | gpio2 = &gpio_b; | |
ff52665d | 36 | gpio3 = &gpio_c; |
9cc36a2b | 37 | i2c0 = "/i2c@0"; |
e48eeb9e SG |
38 | mmc0 = "/mmc0"; |
39 | mmc1 = "/mmc1"; | |
77bec9e3 SG |
40 | mmc2 = "/mmc2"; |
41 | mmc3 = "/mmc3"; | |
dee4d752 BM |
42 | pci0 = &pci0; |
43 | pci1 = &pci1; | |
3ed214ac | 44 | pci2 = &pci2; |
be1a6e94 MW |
45 | remoteproc0 = &rproc_1; |
46 | remoteproc1 = &rproc_2; | |
52d3bc5d SG |
47 | rtc0 = &rtc_0; |
48 | rtc1 = &rtc_1; | |
171e991d | 49 | spi0 = "/spi@0"; |
f64000c3 | 50 | testfdt6 = "/e-test"; |
9cc36a2b SG |
51 | testbus3 = "/some-bus"; |
52 | testfdt0 = "/some-bus/c-test@0"; | |
981426e3 | 53 | testfdt12 = "/some-bus/c-test@1"; |
9cc36a2b SG |
54 | testfdt3 = "/b-test"; |
55 | testfdt5 = "/some-bus/c-test@5"; | |
56 | testfdt8 = "/a-test"; | |
93f44e8a | 57 | testfdtm1 = &testfdtm1; |
507cef3d ER |
58 | fdt-dummy0 = "/translation-test@8000/dev@0,0"; |
59 | fdt-dummy1 = "/translation-test@8000/dev@1,100"; | |
60 | fdt-dummy2 = "/translation-test@8000/dev@2,200"; | |
61 | fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42"; | |
e00cb223 SG |
62 | usb0 = &usb_0; |
63 | usb1 = &usb_1; | |
64 | usb2 = &usb_2; | |
957983e0 | 65 | axi0 = &axi; |
4eea5318 | 66 | osd0 = "/osd"; |
00606d7e SG |
67 | }; |
68 | ||
8de9896a | 69 | binman: binman { |
059df562 PR |
70 | }; |
71 | ||
8c72842a | 72 | config { |
7de8bd03 SG |
73 | testing-bool; |
74 | testing-int = <123>; | |
75 | testing-str = "testing"; | |
8c72842a RV |
76 | environment { |
77 | from_fdt = "yes"; | |
78 | fdt_env_path = ""; | |
79 | }; | |
80 | }; | |
81 | ||
fb1451be | 82 | bootstd { |
8c103c33 | 83 | bootph-verify; |
fb1451be SG |
84 | compatible = "u-boot,boot-std"; |
85 | ||
86 | filename-prefixes = "/", "/boot/"; | |
87 | bootdev-order = "mmc2", "mmc1"; | |
88 | ||
79f66351 SG |
89 | extlinux { |
90 | compatible = "u-boot,extlinux"; | |
fb1451be SG |
91 | }; |
92 | ||
93 | efi { | |
94 | compatible = "u-boot,distro-efi"; | |
95 | }; | |
a56f663f | 96 | |
d985f1db SG |
97 | theme { |
98 | font-size = <30>; | |
7230fdb3 SG |
99 | menu-inset = <3>; |
100 | menuitem-gap-y = <1>; | |
d985f1db SG |
101 | }; |
102 | ||
77bec9e3 SG |
103 | /* |
104 | * This is used for the VBE OS-request tests. A FAT filesystem | |
105 | * created in a partition with the VBE information appearing | |
106 | * before the parititon starts | |
107 | */ | |
a56f663f | 108 | firmware0 { |
8c103c33 | 109 | bootph-verify; |
a56f663f SG |
110 | compatible = "fwupd,vbe-simple"; |
111 | storage = "mmc1"; | |
112 | skip-offset = <0x200>; | |
113 | area-start = <0x400>; | |
114 | area-size = <0x1000>; | |
115 | state-offset = <0x400>; | |
116 | state-size = <0x40>; | |
117 | version-offset = <0x800>; | |
118 | version-size = <0x100>; | |
119 | }; | |
77bec9e3 SG |
120 | |
121 | /* | |
122 | * This is used for the VBE VPL tests. The MMC device holds the | |
123 | * binman image.bin file. The test progresses through each phase | |
124 | * of U-Boot, loading each in turn from MMC. | |
125 | * | |
126 | * Note that the test enables this node (and mmc3) before | |
127 | * running U-Boot | |
128 | */ | |
129 | firmware1 { | |
8c103c33 | 130 | bootph-verify; |
77bec9e3 SG |
131 | status = "disabled"; |
132 | compatible = "fwupd,vbe-simple"; | |
133 | storage = "mmc3"; | |
74b75aa6 | 134 | skip-offset = <0x800000>; |
77bec9e3 SG |
135 | area-start = <0>; |
136 | area-size = <0xe00000>; | |
137 | state-offset = <0xdffc00>; | |
138 | state-size = <0x40>; | |
139 | version-offset = <0xdffe00>; | |
140 | version-size = <0x100>; | |
141 | }; | |
fb1451be SG |
142 | }; |
143 | ||
82cafee1 SG |
144 | cedit: cedit { |
145 | }; | |
146 | ||
0518e7a2 AS |
147 | fuzzing-engine { |
148 | compatible = "sandbox,fuzzing-engine"; | |
149 | }; | |
150 | ||
f9db2f16 NH |
151 | reboot-mode0 { |
152 | compatible = "reboot-mode-gpio"; | |
153 | gpios = <&gpio_c 0 GPIO_ACTIVE_HIGH>, <&gpio_c 1 GPIO_ACTIVE_HIGH>; | |
154 | u-boot,env-variable = "bootstatus"; | |
155 | mode-test = <0x01>; | |
156 | mode-download = <0x03>; | |
157 | }; | |
158 | ||
c74675bd NH |
159 | reboot_mode1: reboot-mode@14 { |
160 | compatible = "reboot-mode-rtc"; | |
161 | rtc = <&rtc_0>; | |
162 | reg = <0x30 4>; | |
163 | u-boot,env-variable = "bootstatus"; | |
164 | big-endian; | |
165 | mode-test = <0x21969147>; | |
166 | mode-download = <0x51939147>; | |
167 | }; | |
168 | ||
ce6d99a0 SG |
169 | audio: audio-codec { |
170 | compatible = "sandbox,audio-codec"; | |
171 | #sound-dai-cells = <1>; | |
172 | }; | |
173 | ||
a6c6f0f0 PR |
174 | buttons { |
175 | compatible = "gpio-keys"; | |
176 | ||
39916bb4 | 177 | btn1 { |
a6c6f0f0 | 178 | gpios = <&gpio_a 3 0>; |
39916bb4 | 179 | label = "button1"; |
ea6fdc13 | 180 | linux,code = <BTN_1>; |
a6c6f0f0 PR |
181 | }; |
182 | ||
39916bb4 | 183 | btn2 { |
a6c6f0f0 | 184 | gpios = <&gpio_a 4 0>; |
39916bb4 | 185 | label = "button2"; |
ea6fdc13 | 186 | linux,code = <BTN_2>; |
a6c6f0f0 PR |
187 | }; |
188 | }; | |
189 | ||
289d0ead MS |
190 | buttons2 { |
191 | compatible = "adc-keys"; | |
192 | io-channels = <&adc 3>; | |
193 | keyup-threshold-microvolt = <3000000>; | |
194 | ||
195 | button-up { | |
196 | label = "button3"; | |
197 | linux,code = <KEY_F3>; | |
198 | press-threshold-microvolt = <1500000>; | |
199 | }; | |
200 | ||
201 | button-down { | |
202 | label = "button4"; | |
203 | linux,code = <KEY_F4>; | |
204 | press-threshold-microvolt = <1000000>; | |
205 | }; | |
206 | ||
207 | button-enter { | |
208 | label = "button5"; | |
209 | linux,code = <KEY_F5>; | |
210 | press-threshold-microvolt = <500000>; | |
211 | }; | |
212 | }; | |
213 | ||
e96fa6c9 | 214 | cros_ec: cros-ec { |
e6c5c94a SG |
215 | reg = <0 0>; |
216 | compatible = "google,cros-ec-sandbox"; | |
217 | ||
218 | /* | |
219 | * This describes the flash memory within the EC. Note | |
220 | * that the STM32L flash erases to 0, not 0xff. | |
221 | */ | |
222 | flash { | |
223 | image-pos = <0x08000000>; | |
224 | size = <0x20000>; | |
225 | erase-value = <0>; | |
226 | ||
227 | /* Information for sandbox */ | |
228 | ro { | |
229 | image-pos = <0>; | |
230 | size = <0xf000>; | |
231 | }; | |
232 | wp-ro { | |
233 | image-pos = <0xf000>; | |
234 | size = <0x1000>; | |
ff5fa7d6 SG |
235 | used = <0x884>; |
236 | compress = "lz4"; | |
237 | uncomp-size = <0xcf8>; | |
238 | hash { | |
239 | algo = "sha256"; | |
240 | value = [00 01 02 03 04 05 06 07 | |
241 | 08 09 0a 0b 0c 0d 0e 0f | |
242 | 10 11 12 13 14 15 16 17 | |
243 | 18 19 1a 1b 1c 1d 1e 1f]; | |
244 | }; | |
e6c5c94a SG |
245 | }; |
246 | rw { | |
247 | image-pos = <0x10000>; | |
248 | size = <0x10000>; | |
249 | }; | |
250 | }; | |
e712245d ANY |
251 | |
252 | cros_ec_pwm: cros-ec-pwm { | |
253 | compatible = "google,cros-ec-pwm"; | |
254 | #pwm-cells = <1>; | |
255 | }; | |
256 | ||
e6c5c94a SG |
257 | }; |
258 | ||
23f965a4 YF |
259 | dsi_host: dsi_host { |
260 | compatible = "sandbox,dsi-host"; | |
261 | }; | |
262 | ||
2e7d35d2 | 263 | a-test { |
0503e820 | 264 | reg = <0 1>; |
2e7d35d2 | 265 | compatible = "denx,u-boot-fdt-test"; |
eb9ef5fe | 266 | ping-expect = <0>; |
2e7d35d2 | 267 | ping-add = <0>; |
8c103c33 | 268 | bootph-all; |
2c0f782e PD |
269 | test-gpios = <&gpio_a 1>, <&gpio_a 4>, |
270 | <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>, | |
3669e0e7 | 271 | <0>, <&gpio_a 12>; |
2c0f782e PD |
272 | test2-gpios = <&gpio_a 1>, <&gpio_a 4>, |
273 | <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>, | |
274 | <&gpio_b 7 GPIO_IN 3 2 1>, | |
275 | <&gpio_b 8 GPIO_OUT 3 2 1>, | |
276 | <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>; | |
ff52665d PD |
277 | test3-gpios = |
278 | <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>, | |
279 | <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>, | |
280 | <&gpio_c 2 GPIO_OUT>, | |
281 | <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>, | |
282 | <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>, | |
9bf87e25 NA |
283 | <&gpio_c 5 GPIO_IN>, |
284 | <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>, | |
285 | <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>; | |
88e6a60e JJH |
286 | test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>; |
287 | test5-gpios = <&gpio_a 19>; | |
288 | ||
fb933d07 | 289 | bool-value; |
b471bdc4 SH |
290 | int8-value = /bits/ 8 <0x12>; |
291 | int16-value = /bits/ 16 <0x1234>; | |
a1b17e4f SG |
292 | int-value = <1234>; |
293 | uint-value = <(-1234)>; | |
70573c6c | 294 | int64-value = /bits/ 64 <0x1111222233334444>; |
4bb7075c | 295 | int-array = <5678 9123 4567>; |
06679000 | 296 | str-value = "test string"; |
02554355 | 297 | interrupts-extended = <&irq 3 0>; |
fefac0b0 | 298 | acpi,name = "GHIJ"; |
cc72f3e0 | 299 | phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>; |
739592cc JJH |
300 | |
301 | mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>, | |
302 | <&muxcontroller0 2>, <&muxcontroller0 3>, | |
303 | <&muxcontroller1>; | |
304 | mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4"; | |
305 | mux-syscon = <&syscon3>; | |
15daa486 DB |
306 | display-timings { |
307 | timing0: 240x320 { | |
308 | clock-frequency = <6500000>; | |
309 | hactive = <240>; | |
310 | vactive = <320>; | |
311 | hfront-porch = <6>; | |
312 | hback-porch = <7>; | |
313 | hsync-len = <1>; | |
314 | vback-porch = <5>; | |
315 | vfront-porch = <8>; | |
316 | vsync-len = <2>; | |
317 | hsync-active = <1>; | |
318 | vsync-active = <0>; | |
319 | de-active = <1>; | |
320 | pixelclk-active = <1>; | |
321 | interlaced; | |
322 | doublescan; | |
323 | doubleclk; | |
324 | }; | |
325 | timing1: 480x800 { | |
326 | clock-frequency = <9000000>; | |
327 | hactive = <480>; | |
328 | vactive = <800>; | |
329 | hfront-porch = <10>; | |
330 | hback-porch = <59>; | |
331 | hsync-len = <12>; | |
332 | vback-porch = <15>; | |
333 | vfront-porch = <17>; | |
334 | vsync-len = <16>; | |
335 | hsync-active = <0>; | |
336 | vsync-active = <1>; | |
337 | de-active = <0>; | |
338 | pixelclk-active = <0>; | |
339 | }; | |
340 | timing2: 800x480 { | |
341 | clock-frequency = <33500000>; | |
342 | hactive = <800>; | |
343 | vactive = <480>; | |
344 | hback-porch = <89>; | |
345 | hfront-porch = <164>; | |
346 | vback-porch = <23>; | |
347 | vfront-porch = <10>; | |
348 | hsync-len = <11>; | |
349 | vsync-len = <13>; | |
350 | }; | |
351 | }; | |
cd88058d | 352 | panel-timing { |
2f3d6a42 NJ |
353 | clock-frequency = <6500000>; |
354 | hactive = <240>; | |
355 | vactive = <320>; | |
356 | hfront-porch = <6>; | |
357 | hback-porch = <7>; | |
358 | hsync-len = <1>; | |
359 | vback-porch = <5>; | |
360 | vfront-porch = <8>; | |
361 | vsync-len = <2>; | |
362 | hsync-active = <1>; | |
363 | vsync-active = <0>; | |
364 | de-active = <1>; | |
365 | pixelclk-active = <1>; | |
366 | interlaced; | |
367 | doublescan; | |
368 | doubleclk; | |
369 | }; | |
2e7d35d2 SG |
370 | }; |
371 | ||
372 | junk { | |
0503e820 | 373 | reg = <1 1>; |
2e7d35d2 SG |
374 | compatible = "not,compatible"; |
375 | }; | |
376 | ||
377 | no-compatible { | |
0503e820 | 378 | reg = <2 1>; |
2e7d35d2 SG |
379 | }; |
380 | ||
5d9a88f4 SG |
381 | backlight: backlight { |
382 | compatible = "pwm-backlight"; | |
383 | enable-gpios = <&gpio_a 1>; | |
384 | power-supply = <&ldo_1>; | |
385 | pwms = <&pwm 0 1000>; | |
386 | default-brightness-level = <5>; | |
387 | brightness-levels = <0 16 32 64 128 170 202 234 255>; | |
388 | }; | |
389 | ||
49c752c9 | 390 | bind-test { |
1f0d5885 | 391 | compatible = "simple-bus"; |
49c752c9 JJH |
392 | bind-test-child1 { |
393 | compatible = "sandbox,phy"; | |
394 | #phy-cells = <1>; | |
395 | }; | |
396 | ||
397 | bind-test-child2 { | |
398 | compatible = "simple-bus"; | |
399 | }; | |
400 | }; | |
401 | ||
2e7d35d2 | 402 | b-test { |
0503e820 | 403 | reg = <3 1>; |
2e7d35d2 | 404 | compatible = "denx,u-boot-fdt-test"; |
eb9ef5fe | 405 | ping-expect = <3>; |
2e7d35d2 | 406 | ping-add = <3>; |
739592cc JJH |
407 | |
408 | mux-controls = <&muxcontroller0 0>; | |
409 | mux-control-names = "mux0"; | |
2e7d35d2 SG |
410 | }; |
411 | ||
86322f59 JJH |
412 | phy_provider0: gen_phy@0 { |
413 | compatible = "sandbox,phy"; | |
414 | #phy-cells = <1>; | |
415 | }; | |
416 | ||
417 | phy_provider1: gen_phy@1 { | |
418 | compatible = "sandbox,phy"; | |
419 | #phy-cells = <0>; | |
420 | broken; | |
421 | }; | |
422 | ||
00c82acf CY |
423 | phy_provider2: gen_phy@2 { |
424 | compatible = "sandbox,phy"; | |
425 | #phy-cells = <0>; | |
426 | }; | |
427 | ||
86322f59 JJH |
428 | gen_phy_user: gen_phy_user { |
429 | compatible = "simple-bus"; | |
430 | phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>; | |
431 | phy-names = "phy1", "phy2", "phy3"; | |
432 | }; | |
433 | ||
00c82acf CY |
434 | gen_phy_user1: gen_phy_user1 { |
435 | compatible = "simple-bus"; | |
436 | phys = <&phy_provider0 0>, <&phy_provider2>; | |
437 | phy-names = "phy1", "phy2"; | |
438 | }; | |
439 | ||
2e7d35d2 SG |
440 | some-bus { |
441 | #address-cells = <1>; | |
442 | #size-cells = <0>; | |
1ca7e206 | 443 | compatible = "denx,u-boot-test-bus"; |
0503e820 | 444 | reg = <3 1>; |
eb9ef5fe | 445 | ping-expect = <4>; |
2e7d35d2 | 446 | ping-add = <4>; |
1ca7e206 | 447 | c-test@5 { |
2e7d35d2 SG |
448 | compatible = "denx,u-boot-fdt-test"; |
449 | reg = <5>; | |
1ca7e206 | 450 | ping-expect = <5>; |
2e7d35d2 SG |
451 | ping-add = <5>; |
452 | }; | |
1ca7e206 SG |
453 | c-test@0 { |
454 | compatible = "denx,u-boot-fdt-test"; | |
455 | reg = <0>; | |
456 | ping-expect = <6>; | |
457 | ping-add = <6>; | |
458 | }; | |
459 | c-test@1 { | |
460 | compatible = "denx,u-boot-fdt-test"; | |
461 | reg = <1>; | |
462 | ping-expect = <7>; | |
463 | ping-add = <7>; | |
464 | }; | |
2e7d35d2 SG |
465 | }; |
466 | ||
467 | d-test { | |
0503e820 | 468 | reg = <3 1>; |
5a66a8ff SG |
469 | ping-expect = <6>; |
470 | ping-add = <6>; | |
471 | compatible = "google,another-fdt-test"; | |
472 | }; | |
473 | ||
474 | e-test { | |
0503e820 | 475 | reg = <3 1>; |
eb9ef5fe | 476 | ping-expect = <6>; |
2e7d35d2 SG |
477 | ping-add = <6>; |
478 | compatible = "google,another-fdt-test"; | |
479 | }; | |
480 | ||
9cc36a2b SG |
481 | f-test { |
482 | compatible = "denx,u-boot-fdt-test"; | |
483 | }; | |
484 | ||
485 | g-test { | |
486 | compatible = "denx,u-boot-fdt-test"; | |
487 | }; | |
488 | ||
2786cd74 BM |
489 | h-test { |
490 | compatible = "denx,u-boot-fdt-test1"; | |
491 | }; | |
492 | ||
bf6ad916 CY |
493 | i-test { |
494 | compatible = "mediatek,u-boot-fdt-test"; | |
495 | #address-cells = <1>; | |
496 | #size-cells = <0>; | |
497 | ||
498 | subnode@0 { | |
499 | reg = <0>; | |
500 | }; | |
501 | ||
502 | subnode@1 { | |
503 | reg = <1>; | |
504 | }; | |
505 | ||
506 | subnode@2 { | |
507 | reg = <2>; | |
508 | }; | |
509 | }; | |
510 | ||
dc12ebbb SG |
511 | devres-test { |
512 | compatible = "denx,u-boot-devres-test"; | |
513 | }; | |
514 | ||
88e6a60e JJH |
515 | another-test { |
516 | reg = <0 2>; | |
517 | compatible = "denx,u-boot-fdt-test"; | |
518 | test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>; | |
519 | test5-gpios = <&gpio_a 19>; | |
520 | }; | |
521 | ||
283628c4 NSJ |
522 | mmio-bus@0 { |
523 | #address-cells = <1>; | |
524 | #size-cells = <1>; | |
525 | compatible = "denx,u-boot-test-bus"; | |
526 | dma-ranges = <0x10000000 0x00000000 0x00040000>; | |
527 | ||
528 | subnode@0 { | |
529 | compatible = "denx,u-boot-fdt-test"; | |
530 | }; | |
531 | }; | |
532 | ||
533 | mmio-bus@1 { | |
534 | #address-cells = <1>; | |
535 | #size-cells = <1>; | |
536 | compatible = "denx,u-boot-test-bus"; | |
e8801876 NSJ |
537 | |
538 | subnode@0 { | |
539 | compatible = "denx,u-boot-fdt-test"; | |
540 | }; | |
283628c4 NSJ |
541 | }; |
542 | ||
0f7b111f | 543 | acpi_test1: acpi-test { |
f50cc952 | 544 | compatible = "denx,u-boot-acpi-test"; |
b5183172 | 545 | acpi-ssdt-test-data = "ab"; |
01694589 | 546 | acpi-dsdt-test-data = "hi"; |
1361a53c SG |
547 | child { |
548 | compatible = "denx,u-boot-acpi-test"; | |
549 | }; | |
f50cc952 SG |
550 | }; |
551 | ||
0f7b111f | 552 | acpi_test2: acpi-test2 { |
93f7f827 | 553 | compatible = "denx,u-boot-acpi-test"; |
b5183172 | 554 | acpi-ssdt-test-data = "cd"; |
01694589 | 555 | acpi-dsdt-test-data = "jk"; |
93f7f827 SG |
556 | }; |
557 | ||
ee87a097 PC |
558 | clocks { |
559 | clk_fixed: clk-fixed { | |
560 | compatible = "fixed-clock"; | |
561 | #clock-cells = <0>; | |
562 | clock-frequency = <1234>; | |
563 | }; | |
b630d57d AP |
564 | |
565 | clk_fixed_factor: clk-fixed-factor { | |
566 | compatible = "fixed-factor-clock"; | |
567 | #clock-cells = <0>; | |
568 | clock-div = <3>; | |
569 | clock-mult = <2>; | |
570 | clocks = <&clk_fixed>; | |
571 | }; | |
4ab8e783 LM |
572 | |
573 | osc { | |
574 | compatible = "fixed-clock"; | |
575 | #clock-cells = <0>; | |
576 | clock-frequency = <20000000>; | |
577 | }; | |
135aa950 SW |
578 | }; |
579 | ||
580 | clk_sandbox: clk-sbox { | |
6a1c7cef | 581 | compatible = "sandbox,clk"; |
135aa950 | 582 | #clock-cells = <1>; |
9a52be12 JJH |
583 | assigned-clocks = <&clk_sandbox 3>; |
584 | assigned-clock-rates = <321>; | |
135aa950 SW |
585 | }; |
586 | ||
587 | clk-test { | |
588 | compatible = "sandbox,clk-test"; | |
589 | clocks = <&clk_fixed>, | |
590 | <&clk_sandbox 1>, | |
dd2e0ce2 JJH |
591 | <&clk_sandbox 0>, |
592 | <&clk_sandbox 3>, | |
593 | <&clk_sandbox 2>; | |
594 | clock-names = "fixed", "i2c", "spi", "uart2", "uart1"; | |
6a1c7cef SG |
595 | }; |
596 | ||
87e460c3 LM |
597 | ccf: clk-ccf { |
598 | compatible = "sandbox,clk-ccf"; | |
599 | }; | |
600 | ||
42b7f421 SG |
601 | efi-media { |
602 | compatible = "sandbox,efi-media"; | |
603 | }; | |
604 | ||
171e991d SG |
605 | eth@10002000 { |
606 | compatible = "sandbox,eth"; | |
607 | reg = <0x10002000 0x1000>; | |
171e991d SG |
608 | }; |
609 | ||
610 | eth_5: eth@10003000 { | |
611 | compatible = "sandbox,eth"; | |
612 | reg = <0x10003000 0x1000>; | |
3f51ba92 SA |
613 | nvmem-cells = <ð5_addr>; |
614 | nvmem-cell-names = "mac-address"; | |
171e991d SG |
615 | }; |
616 | ||
71d7971f BM |
617 | eth_3: sbe5 { |
618 | compatible = "sandbox,eth"; | |
619 | reg = <0x10005000 0x1000>; | |
472caa69 SA |
620 | nvmem-cells = <ð3_addr>; |
621 | nvmem-cell-names = "mac-address"; | |
71d7971f BM |
622 | }; |
623 | ||
171e991d SG |
624 | eth@10004000 { |
625 | compatible = "sandbox,eth"; | |
626 | reg = <0x10004000 0x1000>; | |
171e991d SG |
627 | }; |
628 | ||
f3dd213e MB |
629 | phy_eth0: phy-test-eth { |
630 | compatible = "sandbox,eth"; | |
631 | reg = <0x10007000 0x1000>; | |
e844e5d9 | 632 | mac-address = [ 02 00 11 22 33 49 ]; |
f3dd213e | 633 | phy-handle = <ðphy1>; |
123ca114 | 634 | phy-mode = "2500base-x"; |
f3dd213e MB |
635 | }; |
636 | ||
ff98da06 CM |
637 | dsa_eth0: dsa-test-eth { |
638 | compatible = "sandbox,eth"; | |
639 | reg = <0x10006000 0x1000>; | |
d3f72878 SA |
640 | nvmem-cells = <ð4_addr>; |
641 | nvmem-cell-names = "mac-address"; | |
ff98da06 CM |
642 | }; |
643 | ||
644 | dsa-test { | |
645 | compatible = "sandbox,dsa"; | |
646 | ||
647 | ports { | |
648 | #address-cells = <1>; | |
649 | #size-cells = <0>; | |
650 | swp_0: port@0 { | |
651 | reg = <0>; | |
652 | label = "lan0"; | |
653 | phy-mode = "rgmii-rxid"; | |
654 | ||
655 | fixed-link { | |
656 | speed = <100>; | |
657 | full-duplex; | |
658 | }; | |
659 | }; | |
660 | ||
661 | swp_1: port@1 { | |
662 | reg = <1>; | |
663 | label = "lan1"; | |
664 | phy-mode = "rgmii-txid"; | |
534c69b0 | 665 | fixed-link = <0 1 100 0 0>; |
ff98da06 CM |
666 | }; |
667 | ||
668 | port@2 { | |
669 | reg = <2>; | |
670 | ethernet = <&dsa_eth0>; | |
671 | ||
672 | fixed-link { | |
673 | speed = <1000>; | |
674 | full-duplex; | |
675 | }; | |
676 | }; | |
677 | }; | |
678 | }; | |
679 | ||
31b8217e RV |
680 | firmware { |
681 | sandbox_firmware: sandbox-firmware { | |
682 | compatible = "sandbox,firmware"; | |
683 | }; | |
358599ef | 684 | |
41d62e2f | 685 | scmi { |
358599ef EC |
686 | compatible = "sandbox,scmi-agent"; |
687 | #address-cells = <1>; | |
688 | #size-cells = <0>; | |
87d4f277 | 689 | |
41d62e2f EC |
690 | protocol@10 { |
691 | reg = <0x10>; | |
692 | }; | |
693 | ||
694 | clk_scmi: protocol@14 { | |
87d4f277 EC |
695 | reg = <0x14>; |
696 | #clock-cells = <1>; | |
697 | }; | |
c0dd177a | 698 | |
41d62e2f | 699 | reset_scmi: protocol@16 { |
c0dd177a EC |
700 | reg = <0x16>; |
701 | #reset-cells = <1>; | |
702 | }; | |
0124218b EC |
703 | |
704 | protocol@17 { | |
705 | reg = <0x17>; | |
706 | ||
707 | regulators { | |
708 | #address-cells = <1>; | |
709 | #size-cells = <0>; | |
710 | ||
41d62e2f | 711 | regul0_scmi: reg@0 { |
0124218b EC |
712 | reg = <0>; |
713 | regulator-name = "sandbox-voltd0"; | |
714 | regulator-min-microvolt = <1100000>; | |
715 | regulator-max-microvolt = <3300000>; | |
716 | }; | |
41d62e2f | 717 | regul1_scmi: reg@1 { |
0124218b EC |
718 | reg = <0x1>; |
719 | regulator-name = "sandbox-voltd1"; | |
720 | regulator-min-microvolt = <1800000>; | |
721 | }; | |
722 | }; | |
723 | }; | |
358599ef | 724 | }; |
31b8217e RV |
725 | }; |
726 | ||
1323d08b AD |
727 | fpga { |
728 | compatible = "sandbox,fpga"; | |
729 | }; | |
730 | ||
e5301bac PD |
731 | pinctrl-gpio { |
732 | compatible = "sandbox,pinctrl-gpio"; | |
733 | ||
734 | gpio_a: base-gpios { | |
735 | compatible = "sandbox,gpio"; | |
736 | gpio-controller; | |
737 | #gpio-cells = <1>; | |
738 | gpio-bank-name = "a"; | |
739 | sandbox,gpio-count = <20>; | |
9ba84329 HS |
740 | hog_input_active_low { |
741 | gpio-hog; | |
742 | input; | |
037a56d6 | 743 | gpios = <10 GPIO_ACTIVE_LOW>; |
9ba84329 HS |
744 | }; |
745 | hog_input_active_high { | |
746 | gpio-hog; | |
747 | input; | |
037a56d6 | 748 | gpios = <11 GPIO_ACTIVE_HIGH>; |
9ba84329 HS |
749 | }; |
750 | hog_output_low { | |
751 | gpio-hog; | |
752 | output-low; | |
037a56d6 | 753 | gpios = <12 GPIO_ACTIVE_HIGH>; |
9ba84329 HS |
754 | }; |
755 | hog_output_high { | |
756 | gpio-hog; | |
757 | output-high; | |
037a56d6 | 758 | gpios = <13 GPIO_ACTIVE_HIGH>; |
9ba84329 | 759 | }; |
e5301bac | 760 | }; |
2e7d35d2 | 761 | |
e5301bac PD |
762 | gpio_b: extra-gpios { |
763 | compatible = "sandbox,gpio"; | |
764 | gpio-controller; | |
765 | #gpio-cells = <5>; | |
766 | gpio-bank-name = "b"; | |
767 | sandbox,gpio-count = <10>; | |
768 | }; | |
0ae0cb7b | 769 | |
e5301bac PD |
770 | gpio_c: pinmux-gpios { |
771 | compatible = "sandbox,gpio"; | |
772 | gpio-controller; | |
773 | #gpio-cells = <2>; | |
774 | gpio-bank-name = "c"; | |
775 | sandbox,gpio-count = <10>; | |
776 | }; | |
ff52665d PD |
777 | }; |
778 | ||
ecc2ed55 SG |
779 | i2c@0 { |
780 | #address-cells = <1>; | |
781 | #size-cells = <0>; | |
0503e820 | 782 | reg = <0 1>; |
ecc2ed55 SG |
783 | compatible = "sandbox,i2c"; |
784 | clock-frequency = <100000>; | |
5532262d DB |
785 | pinctrl-names = "default"; |
786 | pinctrl-0 = <&pinmux_i2c0_pins>; | |
787 | ||
ecc2ed55 | 788 | eeprom@2c { |
472caa69 SA |
789 | #address-cells = <1>; |
790 | #size-cells = <1>; | |
ecc2ed55 SG |
791 | reg = <0x2c>; |
792 | compatible = "i2c-eeprom"; | |
031a650e | 793 | sandbox,emul = <&emul_eeprom>; |
f692b479 MS |
794 | partitions { |
795 | compatible = "fixed-partitions"; | |
796 | #address-cells = <1>; | |
797 | #size-cells = <1>; | |
798 | bootcount_i2c: bootcount@10 { | |
799 | reg = <10 2>; | |
800 | }; | |
801 | }; | |
472caa69 SA |
802 | |
803 | eth3_addr: mac-address@24 { | |
804 | reg = <24 6>; | |
805 | }; | |
ecc2ed55 | 806 | }; |
9038cd53 | 807 | |
52d3bc5d | 808 | rtc_0: rtc@43 { |
d3f72878 SA |
809 | #address-cells = <1>; |
810 | #size-cells = <1>; | |
52d3bc5d SG |
811 | reg = <0x43>; |
812 | compatible = "sandbox-rtc"; | |
031a650e | 813 | sandbox,emul = <&emul0>; |
d3f72878 SA |
814 | |
815 | eth4_addr: mac-address@40 { | |
816 | reg = <0x40 6>; | |
817 | }; | |
52d3bc5d SG |
818 | }; |
819 | ||
820 | rtc_1: rtc@61 { | |
821 | reg = <0x61>; | |
822 | compatible = "sandbox-rtc"; | |
031a650e SG |
823 | sandbox,emul = <&emul1>; |
824 | }; | |
825 | ||
826 | i2c_emul: emul { | |
827 | reg = <0xff>; | |
828 | compatible = "sandbox,i2c-emul-parent"; | |
829 | emul_eeprom: emul-eeprom { | |
830 | compatible = "sandbox,i2c-eeprom"; | |
831 | sandbox,filename = "i2c.bin"; | |
832 | sandbox,size = <256>; | |
833 | }; | |
834 | emul0: emul0 { | |
c4085d73 | 835 | compatible = "sandbox,i2c-rtc-emul"; |
031a650e SG |
836 | }; |
837 | emul1: emull { | |
c4085d73 | 838 | compatible = "sandbox,i2c-rtc-emul"; |
52d3bc5d SG |
839 | }; |
840 | }; | |
841 | ||
9038cd53 PM |
842 | sandbox_pmic: sandbox_pmic { |
843 | reg = <0x40>; | |
031a650e | 844 | sandbox,emul = <&emul_pmic0>; |
9038cd53 | 845 | }; |
686df498 LM |
846 | |
847 | mc34708: pmic@41 { | |
848 | reg = <0x41>; | |
031a650e | 849 | sandbox,emul = <&emul_pmic1>; |
686df498 | 850 | }; |
ecc2ed55 SG |
851 | }; |
852 | ||
6f2d59cb PT |
853 | bootcount@0 { |
854 | compatible = "u-boot,bootcount-rtc"; | |
855 | rtc = <&rtc_1>; | |
856 | offset = <0x13>; | |
857 | }; | |
858 | ||
f692b479 MS |
859 | bootcount { |
860 | compatible = "u-boot,bootcount-i2c-eeprom"; | |
861 | i2c-eeprom = <&bootcount_i2c>; | |
862 | }; | |
863 | ||
c50b21b7 NH |
864 | bootcount_4@0 { |
865 | compatible = "u-boot,bootcount-syscon"; | |
866 | syscon = <&syscon0>; | |
867 | reg = <0x0 0x04>, <0x0 0x04>; | |
868 | reg-names = "syscon_reg", "offset"; | |
869 | }; | |
870 | ||
871 | bootcount_2@0 { | |
872 | compatible = "u-boot,bootcount-syscon"; | |
873 | syscon = <&syscon0>; | |
874 | reg = <0x0 0x04>, <0x0 0x02> ; | |
875 | reg-names = "syscon_reg", "offset"; | |
876 | }; | |
877 | ||
289d0ead | 878 | adc: adc@0 { |
08d6300a | 879 | compatible = "sandbox,adc"; |
289d0ead | 880 | #io-channel-cells = <1>; |
08d6300a PM |
881 | vdd-supply = <&buck2>; |
882 | vss-microvolts = <0>; | |
883 | }; | |
884 | ||
fb574624 MK |
885 | iommu: iommu@0 { |
886 | compatible = "sandbox,iommu"; | |
887 | #iommu-cells = <0>; | |
888 | }; | |
889 | ||
02554355 | 890 | irq: irq { |
fbb0efdd | 891 | compatible = "sandbox,irq"; |
02554355 SG |
892 | interrupt-controller; |
893 | #interrupt-cells = <2>; | |
fbb0efdd SG |
894 | }; |
895 | ||
3c97c4fb | 896 | lcd { |
8c103c33 | 897 | bootph-all; |
3c97c4fb | 898 | compatible = "sandbox,lcd-sdl"; |
5532262d DB |
899 | pinctrl-names = "default"; |
900 | pinctrl-0 = <&pinmux_lcd_pins>; | |
3c97c4fb SG |
901 | xres = <1366>; |
902 | yres = <768>; | |
903 | }; | |
904 | ||
3c43fba3 SG |
905 | leds { |
906 | compatible = "gpio-leds"; | |
907 | ||
908 | iracibble { | |
909 | gpios = <&gpio_a 1 0>; | |
910 | label = "sandbox:red"; | |
911 | }; | |
912 | ||
913 | martinet { | |
914 | gpios = <&gpio_a 2 0>; | |
915 | label = "sandbox:green"; | |
916 | }; | |
274fb461 PB |
917 | |
918 | default_on { | |
919 | gpios = <&gpio_a 5 0>; | |
920 | label = "sandbox:default_on"; | |
921 | default-state = "on"; | |
922 | }; | |
923 | ||
924 | default_off { | |
925 | gpios = <&gpio_a 6 0>; | |
3e41c7b2 | 926 | /* label intentionally omitted */ |
274fb461 PB |
927 | default-state = "off"; |
928 | }; | |
3c43fba3 SG |
929 | }; |
930 | ||
1fc45d64 | 931 | wdt-gpio-toggle { |
a9346b93 RV |
932 | gpios = <&gpio_a 7 0>; |
933 | compatible = "linux,wdt-gpio"; | |
4171c574 | 934 | hw_margin_ms = <100>; |
1fc45d64 PD |
935 | hw_algo = "toggle"; |
936 | always-running; | |
937 | }; | |
938 | ||
939 | wdt-gpio-level { | |
940 | gpios = <&gpio_a 7 0>; | |
941 | compatible = "linux,wdt-gpio"; | |
942 | hw_margin_ms = <100>; | |
943 | hw_algo = "level"; | |
a9346b93 RV |
944 | always-running; |
945 | }; | |
946 | ||
8961b524 SW |
947 | mbox: mbox { |
948 | compatible = "sandbox,mbox"; | |
949 | #mbox-cells = <1>; | |
950 | }; | |
951 | ||
952 | mbox-test { | |
953 | compatible = "sandbox,mbox-test"; | |
954 | mboxes = <&mbox 100>, <&mbox 1>; | |
955 | mbox-names = "other", "test"; | |
956 | }; | |
957 | ||
073e6d65 | 958 | cpus { |
8ae8da10 HS |
959 | #address-cells = <1>; |
960 | #size-cells = <0>; | |
7616e368 | 961 | timebase-frequency = <2000000>; |
8ae8da10 HS |
962 | cpu1: cpu@1 { |
963 | device_type = "cpu"; | |
964 | reg = <0x1>; | |
7616e368 | 965 | timebase-frequency = <3000000>; |
073e6d65 | 966 | compatible = "sandbox,cpu_sandbox"; |
8c103c33 | 967 | bootph-all; |
073e6d65 | 968 | }; |
fa44b533 | 969 | |
8ae8da10 HS |
970 | cpu2: cpu@2 { |
971 | device_type = "cpu"; | |
972 | reg = <0x2>; | |
073e6d65 | 973 | compatible = "sandbox,cpu_sandbox"; |
8c103c33 | 974 | bootph-all; |
073e6d65 | 975 | }; |
fa44b533 | 976 | |
8ae8da10 HS |
977 | cpu3: cpu@3 { |
978 | device_type = "cpu"; | |
979 | reg = <0x3>; | |
073e6d65 | 980 | compatible = "sandbox,cpu_sandbox"; |
8c103c33 | 981 | bootph-all; |
073e6d65 | 982 | }; |
fa44b533 MS |
983 | }; |
984 | ||
21e3c219 DG |
985 | chipid: chipid { |
986 | compatible = "sandbox,soc"; | |
987 | }; | |
988 | ||
e96fa6c9 SG |
989 | i2s: i2s { |
990 | compatible = "sandbox,i2s"; | |
991 | #sound-dai-cells = <1>; | |
ecc7973d | 992 | sandbox,silent; /* Don't emit sounds while testing */ |
e96fa6c9 SG |
993 | }; |
994 | ||
07e33711 JJH |
995 | nop-test_0 { |
996 | compatible = "sandbox,nop_sandbox1"; | |
997 | nop-test_1 { | |
998 | compatible = "sandbox,nop_sandbox2"; | |
999 | bind = "True"; | |
1000 | }; | |
1001 | nop-test_2 { | |
1002 | compatible = "sandbox,nop_sandbox2"; | |
1003 | bind = "False"; | |
1004 | }; | |
1005 | }; | |
1006 | ||
2c120375 RQ |
1007 | memory-controller { |
1008 | compatible = "sandbox,memory"; | |
1009 | }; | |
1010 | ||
004e67c2 | 1011 | misc-test { |
3f51ba92 SA |
1012 | #address-cells = <1>; |
1013 | #size-cells = <1>; | |
004e67c2 | 1014 | compatible = "sandbox,misc_sandbox"; |
3f51ba92 SA |
1015 | |
1016 | eth5_addr: mac-address@10 { | |
1017 | reg = <0x10 6>; | |
1018 | }; | |
004e67c2 MS |
1019 | }; |
1020 | ||
e48eeb9e SG |
1021 | mmc2 { |
1022 | compatible = "sandbox,mmc"; | |
6b165ab2 | 1023 | non-removable; |
e48eeb9e SG |
1024 | }; |
1025 | ||
fb1451be | 1026 | /* This is used for the bootdev tests */ |
e48eeb9e SG |
1027 | mmc1 { |
1028 | compatible = "sandbox,mmc"; | |
fb1451be | 1029 | filename = "mmc1.img"; |
e48eeb9e SG |
1030 | }; |
1031 | ||
fb1451be | 1032 | /* This is used for the fastboot tests */ |
873cf8ac | 1033 | mmc0: mmc0 { |
8e6cc461 SG |
1034 | compatible = "sandbox,mmc"; |
1035 | }; | |
1036 | ||
77bec9e3 SG |
1037 | /* This is used for VBE VPL tests */ |
1038 | mmc3 { | |
1039 | status = "disabled"; | |
1040 | compatible = "sandbox,mmc"; | |
1041 | filename = "image.bin"; | |
1042 | non-removable; | |
1043 | }; | |
1044 | ||
d985f1db SG |
1045 | /* This is used for bootstd bootmenu tests */ |
1046 | mmc4 { | |
1047 | status = "disabled"; | |
1048 | compatible = "sandbox,mmc"; | |
1049 | filename = "mmc4.img"; | |
1050 | }; | |
1051 | ||
b45c833c SG |
1052 | pch { |
1053 | compatible = "sandbox,pch"; | |
1054 | }; | |
1055 | ||
42c64d1b | 1056 | pci0: pci@0 { |
d3b7ff14 SG |
1057 | compatible = "sandbox,pci"; |
1058 | device_type = "pci"; | |
42c64d1b | 1059 | bus-range = <0x00 0xff>; |
d3b7ff14 SG |
1060 | #address-cells = <3>; |
1061 | #size-cells = <2>; | |
b0e2c23d | 1062 | ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000 |
d3b7ff14 | 1063 | 0x01000000 0 0x20000000 0x20000000 0 0x2000>; |
08386da0 MK |
1064 | iommu-map = <0x0010 &iommu 0 1>; |
1065 | iommu-map-mask = <0xfffffff8>; | |
2db7f2b7 BM |
1066 | pci@0,0 { |
1067 | compatible = "pci-generic"; | |
1068 | reg = <0x0000 0 0 0 0>; | |
9b69ba4a | 1069 | sandbox,emul = <&swap_case_emul0_0>; |
2db7f2b7 | 1070 | }; |
21ebbafd AM |
1071 | pci@1,0 { |
1072 | compatible = "pci-generic"; | |
33c215af SG |
1073 | /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */ |
1074 | reg = <0x02000814 0 0 0 0 | |
1075 | 0x01000810 0 0 0 0>; | |
9b69ba4a | 1076 | sandbox,emul = <&swap_case_emul0_1>; |
21ebbafd | 1077 | }; |
3e17ffbb SG |
1078 | p2sb-pci@2,0 { |
1079 | compatible = "sandbox,p2sb"; | |
1080 | reg = <0x02001010 0 0 0 0>; | |
1081 | sandbox,emul = <&p2sb_emul>; | |
1082 | ||
1083 | adder { | |
1084 | intel,p2sb-port-id = <3>; | |
1085 | compatible = "sandbox,adder"; | |
1086 | }; | |
1087 | }; | |
3b65ee34 SG |
1088 | pci@1e,0 { |
1089 | compatible = "sandbox,pmc"; | |
1090 | reg = <0xf000 0 0 0 0>; | |
1091 | sandbox,emul = <&pmc_emul1e>; | |
1092 | acpi-base = <0x400>; | |
1093 | gpe0-dwx-mask = <0xf>; | |
1094 | gpe0-dwx-shift-base = <4>; | |
1095 | gpe0-dw = <6 7 9>; | |
1096 | gpe0-sts = <0x20>; | |
1097 | gpe0-en = <0x30>; | |
1098 | }; | |
d3b7ff14 SG |
1099 | pci@1f,0 { |
1100 | compatible = "pci-generic"; | |
33c215af SG |
1101 | /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */ |
1102 | reg = <0x0100f810 0 0 0 0>; | |
9b69ba4a SG |
1103 | sandbox,emul = <&swap_case_emul0_1f>; |
1104 | }; | |
1105 | }; | |
1106 | ||
1107 | pci-emul0 { | |
1108 | compatible = "sandbox,pci-emul-parent"; | |
1109 | swap_case_emul0_0: emul0@0,0 { | |
1110 | compatible = "sandbox,swap-case"; | |
1111 | }; | |
1112 | swap_case_emul0_1: emul0@1,0 { | |
1113 | compatible = "sandbox,swap-case"; | |
1114 | use-ea; | |
1115 | }; | |
1116 | swap_case_emul0_1f: emul0@1f,0 { | |
1117 | compatible = "sandbox,swap-case"; | |
d3b7ff14 | 1118 | }; |
3e17ffbb SG |
1119 | p2sb_emul: emul@2,0 { |
1120 | compatible = "sandbox,p2sb-emul"; | |
1121 | }; | |
3b65ee34 SG |
1122 | pmc_emul1e: emul@1e,0 { |
1123 | compatible = "sandbox,pmc-emul"; | |
1124 | }; | |
d3b7ff14 SG |
1125 | }; |
1126 | ||
42c64d1b | 1127 | pci1: pci@1 { |
dee4d752 BM |
1128 | compatible = "sandbox,pci"; |
1129 | device_type = "pci"; | |
42c64d1b | 1130 | bus-range = <0x00 0xff>; |
dee4d752 BM |
1131 | #address-cells = <3>; |
1132 | #size-cells = <2>; | |
4cf56ec0 | 1133 | ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0 |
55e6adbd | 1134 | 0x02000000 0 0x31000000 0x3e000000 0 0x2000 // MEM1 |
4cf56ec0 | 1135 | 0x01000000 0 0x40000000 0x40000000 0 0x2000>; |
490d13a5 | 1136 | sandbox,dev-info = <0x08 0x00 0x1234 0x5678 |
b59349a0 MV |
1137 | 0x0c 0x00 0x1234 0x5678 |
1138 | 0x10 0x00 0x1234 0x5678>; | |
1139 | pci@10,0 { | |
1140 | reg = <0x8000 0 0 0 0>; | |
1141 | }; | |
dee4d752 BM |
1142 | }; |
1143 | ||
42c64d1b | 1144 | pci2: pci@2 { |
3ed214ac BM |
1145 | compatible = "sandbox,pci"; |
1146 | device_type = "pci"; | |
42c64d1b | 1147 | bus-range = <0x00 0xff>; |
3ed214ac BM |
1148 | #address-cells = <3>; |
1149 | #size-cells = <2>; | |
1150 | ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000 | |
1151 | 0x01000000 0 0x60000000 0x60000000 0 0x2000>; | |
1152 | sandbox,dev-info = <0x08 0x00 0x1234 0x5678>; | |
1153 | pci@1f,0 { | |
1154 | compatible = "pci-generic"; | |
1155 | reg = <0xf800 0 0 0 0>; | |
9b69ba4a SG |
1156 | sandbox,emul = <&swap_case_emul2_1f>; |
1157 | }; | |
1158 | }; | |
1159 | ||
1160 | pci-emul2 { | |
1161 | compatible = "sandbox,pci-emul-parent"; | |
1162 | swap_case_emul2_1f: emul2@1f,0 { | |
1163 | compatible = "sandbox,swap-case"; | |
3ed214ac BM |
1164 | }; |
1165 | }; | |
1166 | ||
bb413337 RF |
1167 | pci_ep: pci_ep { |
1168 | compatible = "sandbox,pci_ep"; | |
1169 | }; | |
1170 | ||
98561572 SG |
1171 | probing { |
1172 | compatible = "simple-bus"; | |
1173 | test1 { | |
1174 | compatible = "denx,u-boot-probe-test"; | |
1175 | }; | |
1176 | ||
1177 | test2 { | |
1178 | compatible = "denx,u-boot-probe-test"; | |
1179 | }; | |
1180 | ||
1181 | test3 { | |
1182 | compatible = "denx,u-boot-probe-test"; | |
1183 | }; | |
1184 | ||
1185 | test4 { | |
1186 | compatible = "denx,u-boot-probe-test"; | |
6c3af1f2 JJH |
1187 | first-syscon = <&syscon0>; |
1188 | second-sys-ctrl = <&another_system_controller>; | |
a442e61e | 1189 | third-syscon = <&syscon2>; |
98561572 SG |
1190 | }; |
1191 | }; | |
1192 | ||
61f5ddcb SW |
1193 | pwrdom: power-domain { |
1194 | compatible = "sandbox,power-domain"; | |
1195 | #power-domain-cells = <1>; | |
1196 | }; | |
1197 | ||
1198 | power-domain-test { | |
1199 | compatible = "sandbox,power-domain-test"; | |
1200 | power-domains = <&pwrdom 2>; | |
1201 | }; | |
1202 | ||
5d9a88f4 | 1203 | pwm: pwm { |
43b41566 | 1204 | compatible = "sandbox,pwm"; |
5d9a88f4 | 1205 | #pwm-cells = <2>; |
5532262d DB |
1206 | pinctrl-names = "default"; |
1207 | pinctrl-0 = <&pinmux_pwm_pins>; | |
43b41566 SG |
1208 | }; |
1209 | ||
1210 | pwm2 { | |
1211 | compatible = "sandbox,pwm"; | |
5d9a88f4 | 1212 | #pwm-cells = <2>; |
43b41566 SG |
1213 | }; |
1214 | ||
64ce0cad SG |
1215 | ram { |
1216 | compatible = "sandbox,ram"; | |
1217 | }; | |
1218 | ||
5010d98f SG |
1219 | reset@0 { |
1220 | compatible = "sandbox,warm-reset"; | |
8c103c33 | 1221 | bootph-some-ram; |
5010d98f SG |
1222 | }; |
1223 | ||
1224 | reset@1 { | |
1225 | compatible = "sandbox,reset"; | |
8c103c33 | 1226 | bootph-some-ram; |
5010d98f SG |
1227 | }; |
1228 | ||
4581b717 SW |
1229 | resetc: reset-ctl { |
1230 | compatible = "sandbox,reset-ctl"; | |
1231 | #reset-cells = <1>; | |
1232 | }; | |
1233 | ||
1234 | reset-ctl-test { | |
1235 | compatible = "sandbox,reset-ctl-test"; | |
bdfe6907 NA |
1236 | resets = <&resetc 100>, <&resetc 2>, <&resetc 20>, <&resetc 40>; |
1237 | reset-names = "other", "test", "test2", "test3"; | |
4581b717 SW |
1238 | }; |
1239 | ||
ff0dada9 SG |
1240 | rng { |
1241 | compatible = "sandbox,sandbox-rng"; | |
1242 | }; | |
1243 | ||
5215940f NM |
1244 | rproc_1: rproc@1 { |
1245 | compatible = "sandbox,test-processor"; | |
1246 | remoteproc-name = "remoteproc-test-dev1"; | |
1247 | }; | |
1248 | ||
1249 | rproc_2: rproc@2 { | |
1250 | compatible = "sandbox,test-processor"; | |
1251 | internal-memory-mapped; | |
1252 | remoteproc-name = "remoteproc-test-dev2"; | |
1253 | }; | |
1254 | ||
5d9a88f4 SG |
1255 | panel { |
1256 | compatible = "simple-panel"; | |
1257 | backlight = <&backlight 0 100>; | |
1258 | }; | |
1259 | ||
22c80d56 SG |
1260 | scsi { |
1261 | compatible = "sandbox,scsi"; | |
1262 | sandbox,filepath = "scsi.img"; | |
1263 | }; | |
1264 | ||
7fd7e2cf RF |
1265 | smem@0 { |
1266 | compatible = "sandbox,smem"; | |
1267 | }; | |
1268 | ||
d4901898 SG |
1269 | sound { |
1270 | compatible = "sandbox,sound"; | |
1271 | cpu { | |
1272 | sound-dai = <&i2s 0>; | |
1273 | }; | |
1274 | ||
1275 | codec { | |
1276 | sound-dai = <&audio 0>; | |
1277 | }; | |
1278 | }; | |
1279 | ||
0ae0cb7b SG |
1280 | spi@0 { |
1281 | #address-cells = <1>; | |
1282 | #size-cells = <0>; | |
0503e820 | 1283 | reg = <0 1>; |
0ae0cb7b | 1284 | compatible = "sandbox,spi"; |
1dc53ce7 | 1285 | cs-gpios = <0>, <0>, <&gpio_a 0>; |
5532262d DB |
1286 | pinctrl-names = "default"; |
1287 | pinctrl-0 = <&pinmux_spi0_pins>; | |
1288 | ||
0ae0cb7b SG |
1289 | spi.bin@0 { |
1290 | reg = <0>; | |
ffd4c7c2 | 1291 | compatible = "spansion,m25p16", "jedec,spi-nor"; |
0ae0cb7b SG |
1292 | spi-max-frequency = <40000000>; |
1293 | sandbox,filename = "spi.bin"; | |
1294 | }; | |
1dc53ce7 OP |
1295 | spi.bin@1 { |
1296 | reg = <1>; | |
1297 | compatible = "spansion,m25p16", "jedec,spi-nor"; | |
1298 | spi-max-frequency = <50000000>; | |
1299 | sandbox,filename = "spi.bin"; | |
1300 | spi-cpol; | |
1301 | spi-cpha; | |
1302 | }; | |
0ae0cb7b SG |
1303 | }; |
1304 | ||
6c3af1f2 | 1305 | syscon0: syscon@0 { |
04035fd3 | 1306 | compatible = "sandbox,syscon0"; |
82744c20 | 1307 | reg = <0x10 16>; |
04035fd3 SG |
1308 | }; |
1309 | ||
6c3af1f2 | 1310 | another_system_controller: syscon@1 { |
04035fd3 | 1311 | compatible = "sandbox,syscon1"; |
0503e820 SG |
1312 | reg = <0x20 5 |
1313 | 0x28 6 | |
1314 | 0x30 7 | |
1315 | 0x38 8>; | |
04035fd3 SG |
1316 | }; |
1317 | ||
a442e61e | 1318 | syscon2: syscon@2 { |
99552c34 MY |
1319 | compatible = "simple-mfd", "syscon"; |
1320 | reg = <0x40 5 | |
1321 | 0x48 6 | |
1322 | 0x50 7 | |
1323 | 0x58 8>; | |
1324 | }; | |
1325 | ||
739592cc JJH |
1326 | syscon3: syscon@3 { |
1327 | compatible = "simple-mfd", "syscon"; | |
1328 | reg = <0x000100 0x10>; | |
1329 | ||
1330 | muxcontroller0: a-mux-controller { | |
1331 | compatible = "mmio-mux"; | |
1332 | #mux-control-cells = <1>; | |
1333 | ||
1334 | mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */ | |
1335 | <0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */ | |
1336 | <0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */ | |
1337 | idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>; | |
1338 | u-boot,mux-autoprobe; | |
1339 | }; | |
1340 | }; | |
1341 | ||
1342 | muxcontroller1: emul-mux-controller { | |
1343 | compatible = "mux-emul"; | |
1344 | #mux-control-cells = <0>; | |
1345 | u-boot,mux-autoprobe; | |
1346 | idle-state = <0xabcd>; | |
1347 | }; | |
1348 | ||
93f44e8a SG |
1349 | testfdtm0 { |
1350 | compatible = "denx,u-boot-fdtm-test"; | |
1351 | }; | |
1352 | ||
1353 | testfdtm1: testfdtm1 { | |
1354 | compatible = "denx,u-boot-fdtm-test"; | |
1355 | }; | |
1356 | ||
1357 | testfdtm2 { | |
1358 | compatible = "denx,u-boot-fdtm-test"; | |
1359 | }; | |
1360 | ||
7616e368 | 1361 | timer@0 { |
e7cc8d11 TC |
1362 | compatible = "sandbox,timer"; |
1363 | clock-frequency = <1000000>; | |
1364 | }; | |
1365 | ||
7616e368 SA |
1366 | timer@1 { |
1367 | compatible = "sandbox,timer"; | |
1368 | sandbox,timebase-frequency-fallback; | |
1369 | }; | |
1370 | ||
b91ad16a MR |
1371 | tpm2 { |
1372 | compatible = "sandbox,tpm2"; | |
1373 | }; | |
1374 | ||
4fef6571 SG |
1375 | tpm { |
1376 | compatible = "google,sandbox-tpm"; | |
1377 | }; | |
1378 | ||
171e991d SG |
1379 | uart0: serial { |
1380 | compatible = "sandbox,serial"; | |
8c103c33 | 1381 | bootph-all; |
5532262d DB |
1382 | pinctrl-names = "default"; |
1383 | pinctrl-0 = <&pinmux_uart0_pins>; | |
bfacad7d JH |
1384 | }; |
1385 | ||
e00cb223 SG |
1386 | usb_0: usb@0 { |
1387 | compatible = "sandbox,usb"; | |
1388 | status = "disabled"; | |
1389 | hub { | |
1390 | compatible = "sandbox,usb-hub"; | |
1391 | #address-cells = <1>; | |
1392 | #size-cells = <0>; | |
1393 | flash-stick { | |
1394 | reg = <0>; | |
1395 | compatible = "sandbox,usb-flash"; | |
1396 | }; | |
1397 | }; | |
1398 | }; | |
1399 | ||
1400 | usb_1: usb@1 { | |
1401 | compatible = "sandbox,usb"; | |
fb574624 | 1402 | iommus = <&iommu>; |
e00cb223 SG |
1403 | hub { |
1404 | compatible = "usb-hub"; | |
1405 | usb,device-class = <9>; | |
c03b7612 MW |
1406 | #address-cells = <1>; |
1407 | #size-cells = <0>; | |
e00cb223 SG |
1408 | hub-emul { |
1409 | compatible = "sandbox,usb-hub"; | |
1410 | #address-cells = <1>; | |
1411 | #size-cells = <0>; | |
431cbd6d | 1412 | flash-stick@0 { |
e00cb223 SG |
1413 | reg = <0>; |
1414 | compatible = "sandbox,usb-flash"; | |
1415 | sandbox,filepath = "testflash.bin"; | |
1416 | }; | |
1417 | ||
431cbd6d SG |
1418 | flash-stick@1 { |
1419 | reg = <1>; | |
1420 | compatible = "sandbox,usb-flash"; | |
1421 | sandbox,filepath = "testflash1.bin"; | |
1422 | }; | |
1423 | ||
1424 | flash-stick@2 { | |
1425 | reg = <2>; | |
1426 | compatible = "sandbox,usb-flash"; | |
1427 | sandbox,filepath = "testflash2.bin"; | |
1428 | }; | |
1429 | ||
bff1a71e SG |
1430 | keyb@3 { |
1431 | reg = <3>; | |
1432 | compatible = "sandbox,usb-keyb"; | |
1433 | }; | |
1434 | ||
e00cb223 | 1435 | }; |
c03b7612 MW |
1436 | |
1437 | usbstor@1 { | |
1438 | reg = <1>; | |
1439 | }; | |
1440 | usbstor@3 { | |
1441 | reg = <3>; | |
1442 | }; | |
e00cb223 SG |
1443 | }; |
1444 | }; | |
1445 | ||
1446 | usb_2: usb@2 { | |
1447 | compatible = "sandbox,usb"; | |
1448 | status = "disabled"; | |
1449 | }; | |
1450 | ||
d33776e4 MK |
1451 | spmi: spmi@0 { |
1452 | compatible = "sandbox,spmi"; | |
1453 | #address-cells = <0x1>; | |
1454 | #size-cells = <0x1>; | |
a605b0f7 | 1455 | ranges; |
d33776e4 MK |
1456 | pm8916@0 { |
1457 | compatible = "qcom,spmi-pmic"; | |
1458 | reg = <0x0 0x1>; | |
1459 | #address-cells = <0x1>; | |
1460 | #size-cells = <0x1>; | |
a605b0f7 | 1461 | ranges; |
d33776e4 MK |
1462 | |
1463 | spmi_gpios: gpios@c000 { | |
1464 | compatible = "qcom,pm8916-gpio"; | |
1465 | reg = <0xc000 0x400>; | |
1466 | gpio-controller; | |
1467 | gpio-count = <4>; | |
1468 | #gpio-cells = <2>; | |
1469 | gpio-bank-name="spmi"; | |
1470 | }; | |
1471 | }; | |
1472 | }; | |
0753bc2d | 1473 | |
1474 | wdt0: wdt@0 { | |
1475 | compatible = "sandbox,wdt"; | |
4171c574 | 1476 | hw_margin_ms = <200>; |
0753bc2d | 1477 | }; |
f2006808 | 1478 | |
957983e0 MS |
1479 | axi: axi@0 { |
1480 | compatible = "sandbox,axi"; | |
1481 | #address-cells = <0x1>; | |
1482 | #size-cells = <0x1>; | |
1483 | store@0 { | |
1484 | compatible = "sandbox,sandbox_store"; | |
1485 | reg = <0x0 0x400>; | |
1486 | }; | |
1487 | }; | |
1488 | ||
f2006808 | 1489 | chosen { |
7e87816c SG |
1490 | #address-cells = <1>; |
1491 | #size-cells = <1>; | |
14ca9f7f SG |
1492 | setting = "sunrise ohoka"; |
1493 | other-node = "/some-bus/c-test@5"; | |
bd933bfd | 1494 | int-values = <0x1937 72993>; |
0f7b111f | 1495 | u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>; |
f2006808 RC |
1496 | chosen-test { |
1497 | compatible = "denx,u-boot-fdt-test"; | |
1498 | reg = <9 1>; | |
1499 | }; | |
1500 | }; | |
e8d52918 MS |
1501 | |
1502 | translation-test@8000 { | |
1503 | compatible = "simple-bus"; | |
1504 | reg = <0x8000 0x4000>; | |
1505 | ||
1506 | #address-cells = <0x2>; | |
1507 | #size-cells = <0x1>; | |
1508 | ||
1509 | ranges = <0 0x0 0x8000 0x1000 | |
1510 | 1 0x100 0x9000 0x1000 | |
1511 | 2 0x200 0xA000 0x1000 | |
1512 | 3 0x300 0xB000 0x1000 | |
1513 | >; | |
1514 | ||
641067fb FD |
1515 | dma-ranges = <0 0x000 0x10000000 0x1000 |
1516 | 1 0x100 0x20000000 0x1000 | |
1517 | >; | |
1518 | ||
e8d52918 MS |
1519 | dev@0,0 { |
1520 | compatible = "denx,u-boot-fdt-dummy"; | |
1521 | reg = <0 0x0 0x1000>; | |
79598820 | 1522 | reg-names = "sandbox-dummy-0"; |
e8d52918 MS |
1523 | }; |
1524 | ||
1525 | dev@1,100 { | |
1526 | compatible = "denx,u-boot-fdt-dummy"; | |
1527 | reg = <1 0x100 0x1000>; | |
1528 | ||
1529 | }; | |
1530 | ||
1531 | dev@2,200 { | |
1532 | compatible = "denx,u-boot-fdt-dummy"; | |
1533 | reg = <2 0x200 0x1000>; | |
1534 | }; | |
1535 | ||
1536 | ||
1537 | noxlatebus@3,300 { | |
1538 | compatible = "simple-bus"; | |
1539 | reg = <3 0x300 0x1000>; | |
1540 | ||
1541 | #address-cells = <0x1>; | |
1542 | #size-cells = <0x0>; | |
1543 | ||
1544 | dev@42 { | |
1545 | compatible = "denx,u-boot-fdt-dummy"; | |
1546 | reg = <0x42>; | |
1547 | }; | |
1548 | }; | |
1549 | }; | |
4eea5318 | 1550 | |
298ffdd5 DS |
1551 | ofnode-foreach { |
1552 | compatible = "foreach"; | |
1553 | ||
1554 | first { | |
1555 | prop1 = <1>; | |
1556 | prop2 = <2>; | |
1557 | }; | |
1558 | ||
1559 | second { | |
1560 | prop1 = <1>; | |
1561 | prop2 = <2>; | |
1562 | }; | |
1563 | }; | |
1564 | ||
4eea5318 MS |
1565 | osd { |
1566 | compatible = "sandbox,sandbox_osd"; | |
1567 | }; | |
d24c1d0f | 1568 | |
fa830ae1 JW |
1569 | sandbox_tee { |
1570 | compatible = "sandbox,tee"; | |
1571 | }; | |
4f89d494 BM |
1572 | |
1573 | sandbox_virtio1 { | |
1574 | compatible = "sandbox,virtio1"; | |
00fc8cad | 1575 | virtio-type = <4>; /* rng */ |
4f89d494 BM |
1576 | }; |
1577 | ||
1578 | sandbox_virtio2 { | |
1579 | compatible = "sandbox,virtio2"; | |
1580 | }; | |
f41a824b | 1581 | |
00fc8cad SG |
1582 | sandbox-virtio-blk { |
1583 | compatible = "sandbox,virtio1"; | |
1584 | virtio-type = <2>; /* block */ | |
1585 | }; | |
1586 | ||
87d4f277 EC |
1587 | sandbox_scmi { |
1588 | compatible = "sandbox,scmi-devices"; | |
10d3e5d2 | 1589 | clocks = <&clk_scmi 2>, <&clk_scmi 0>; |
41d62e2f EC |
1590 | resets = <&reset_scmi 3>; |
1591 | regul0-supply = <®ul0_scmi>; | |
1592 | regul1-supply = <®ul1_scmi>; | |
87d4f277 EC |
1593 | }; |
1594 | ||
f41a824b PC |
1595 | pinctrl { |
1596 | compatible = "sandbox,pinctrl"; | |
d15c05b5 | 1597 | |
7f0f1806 SA |
1598 | pinctrl-names = "default", "alternate"; |
1599 | pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>; | |
1600 | pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>; | |
d15c05b5 | 1601 | |
7f0f1806 | 1602 | pinctrl_gpios: gpios { |
d15c05b5 | 1603 | gpio0 { |
7f0f1806 SA |
1604 | pins = "P5"; |
1605 | function = "GPIO"; | |
d15c05b5 PD |
1606 | bias-pull-up; |
1607 | input-disable; | |
1608 | }; | |
1609 | gpio1 { | |
7f0f1806 SA |
1610 | pins = "P6"; |
1611 | function = "GPIO"; | |
d15c05b5 PD |
1612 | output-high; |
1613 | drive-open-drain; | |
1614 | }; | |
1615 | gpio2 { | |
7f0f1806 | 1616 | pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>; |
d15c05b5 PD |
1617 | bias-pull-down; |
1618 | input-enable; | |
1619 | }; | |
1620 | gpio3 { | |
7f0f1806 | 1621 | pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>; |
d15c05b5 PD |
1622 | bias-disable; |
1623 | }; | |
1624 | }; | |
7f0f1806 SA |
1625 | |
1626 | pinctrl_i2c: i2c { | |
1627 | groups { | |
1628 | groups = "I2C_UART"; | |
1629 | function = "I2C"; | |
1630 | }; | |
1631 | ||
1632 | pins { | |
1633 | pins = "P0", "P1"; | |
1634 | drive-open-drain; | |
1635 | }; | |
1636 | }; | |
1637 | ||
1638 | pinctrl_i2s: i2s { | |
1639 | groups = "SPI_I2S"; | |
1640 | function = "I2S"; | |
1641 | }; | |
1642 | ||
1643 | pinctrl_spi: spi { | |
1644 | groups = "SPI_I2S"; | |
1645 | function = "SPI"; | |
1646 | ||
1647 | cs { | |
1648 | pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>, | |
1649 | <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>; | |
1650 | }; | |
1651 | }; | |
f41a824b | 1652 | }; |
7f84fc67 | 1653 | |
5532262d DB |
1654 | pinctrl-single-no-width { |
1655 | compatible = "pinctrl-single"; | |
1656 | reg = <0x0000 0x238>; | |
1657 | #pinctrl-cells = <1>; | |
1658 | pinctrl-single,function-mask = <0x7f>; | |
1659 | }; | |
1660 | ||
1661 | pinctrl-single-pins { | |
1662 | compatible = "pinctrl-single"; | |
1663 | reg = <0x0000 0x238>; | |
1664 | #pinctrl-cells = <1>; | |
1665 | pinctrl-single,register-width = <32>; | |
1666 | pinctrl-single,function-mask = <0x7f>; | |
1667 | ||
1668 | pinmux_pwm_pins: pinmux_pwm_pins { | |
1669 | pinctrl-single,pins = < 0x48 0x06 >; | |
1670 | }; | |
1671 | ||
1672 | pinmux_spi0_pins: pinmux_spi0_pins { | |
1673 | pinctrl-single,pins = < | |
1674 | 0x190 0x0c | |
1675 | 0x194 0x0c | |
1676 | 0x198 0x23 | |
1677 | 0x19c 0x0c | |
1678 | >; | |
1679 | }; | |
1680 | ||
1681 | pinmux_uart0_pins: pinmux_uart0_pins { | |
1682 | pinctrl-single,pins = < | |
1683 | 0x70 0x30 | |
1684 | 0x74 0x00 | |
1685 | >; | |
1686 | }; | |
1687 | }; | |
1688 | ||
1689 | pinctrl-single-bits { | |
1690 | compatible = "pinctrl-single"; | |
1691 | reg = <0x0000 0x50>; | |
1692 | #pinctrl-cells = <2>; | |
1693 | pinctrl-single,bit-per-mux; | |
1694 | pinctrl-single,register-width = <32>; | |
1695 | pinctrl-single,function-mask = <0xf>; | |
1696 | ||
1697 | pinmux_i2c0_pins: pinmux_i2c0_pins { | |
1698 | pinctrl-single,bits = < | |
1699 | 0x10 0x00002200 0x0000ff00 | |
1700 | >; | |
1701 | }; | |
1702 | ||
1703 | pinmux_lcd_pins: pinmux_lcd_pins { | |
1704 | pinctrl-single,bits = < | |
1705 | 0x40 0x22222200 0xffffff00 | |
1706 | 0x44 0x22222222 0xffffffff | |
1707 | 0x48 0x00000022 0x000000ff | |
1708 | 0x48 0x02000000 0x0f000000 | |
1709 | 0x4c 0x02000022 0x0f0000ff | |
1710 | >; | |
1711 | }; | |
1712 | }; | |
1713 | ||
7f84fc67 BG |
1714 | hwspinlock@0 { |
1715 | compatible = "sandbox,hwspinlock"; | |
1716 | }; | |
b3309918 GS |
1717 | |
1718 | dma: dma { | |
1719 | compatible = "sandbox,dma"; | |
1720 | #dma-cells = <1>; | |
1721 | ||
1722 | dmas = <&dma 0>, <&dma 1>, <&dma 2>; | |
1723 | dma-names = "m2m", "tx0", "rx0"; | |
1724 | }; | |
ec9594a5 | 1725 | |
c3d9f3f8 AM |
1726 | /* |
1727 | * keep mdio-mux ahead of mdio so that the mux is removed first at the | |
1728 | * end of the test. If parent mdio is removed first, clean-up of the | |
1729 | * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio | |
1730 | * active at the end of the test. That it turn doesn't allow the mdio | |
1731 | * class to be destroyed, triggering an error. | |
1732 | */ | |
1733 | mdio-mux-test { | |
1734 | compatible = "sandbox,mdio-mux"; | |
1735 | #address-cells = <1>; | |
1736 | #size-cells = <0>; | |
1737 | mdio-parent-bus = <&mdio>; | |
1738 | ||
1739 | mdio-ch-test@0 { | |
1740 | reg = <0>; | |
1741 | }; | |
1742 | mdio-ch-test@1 { | |
1743 | reg = <1>; | |
1744 | }; | |
1745 | }; | |
1746 | ||
1747 | mdio: mdio-test { | |
ec9594a5 | 1748 | compatible = "sandbox,mdio"; |
f3dd213e MB |
1749 | #address-cells = <1>; |
1750 | #size-cells = <0>; | |
1751 | ||
1752 | ethphy1: ethernet-phy@1 { | |
1753 | reg = <1>; | |
1754 | }; | |
ec9594a5 | 1755 | }; |
4a3390f1 SA |
1756 | |
1757 | pm-bus-test { | |
1758 | compatible = "simple-pm-bus"; | |
1759 | clocks = <&clk_sandbox 4>; | |
1760 | power-domains = <&pwrdom 1>; | |
1761 | }; | |
038b13ee SA |
1762 | |
1763 | resetc2: syscon-reset { | |
1764 | compatible = "syscon-reset"; | |
1765 | #reset-cells = <1>; | |
1766 | regmap = <&syscon0>; | |
1767 | offset = <1>; | |
1768 | mask = <0x27FFFFFF>; | |
1769 | assert-high = <0>; | |
1770 | }; | |
1771 | ||
1772 | syscon-reset-test { | |
1773 | compatible = "sandbox,misc_sandbox"; | |
1774 | resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>; | |
1775 | reset-names = "valid", "no_mask", "out_of_range"; | |
1776 | }; | |
0ced26a4 | 1777 | |
3a8ee3df SG |
1778 | sysinfo { |
1779 | compatible = "sandbox,sysinfo-sandbox"; | |
1780 | }; | |
1781 | ||
1cbfed8d SA |
1782 | sysinfo-gpio { |
1783 | compatible = "gpio-sysinfo"; | |
1784 | gpios = <&gpio_a 15>, <&gpio_a 16>, <&gpio_a 17>; | |
1785 | revisions = <19>, <5>; | |
1786 | names = "rev_a", "foo"; | |
1787 | }; | |
1788 | ||
0ced26a4 JJH |
1789 | some_regmapped-bus { |
1790 | #address-cells = <0x1>; | |
1791 | #size-cells = <0x1>; | |
1792 | ||
1793 | ranges = <0x0 0x0 0x10>; | |
1794 | compatible = "simple-bus"; | |
1795 | ||
1796 | regmap-test_0 { | |
1797 | reg = <0 0x10>; | |
1798 | compatible = "sandbox,regmap_test"; | |
1799 | }; | |
1800 | }; | |
1fad2cb8 RM |
1801 | |
1802 | thermal { | |
1803 | compatible = "sandbox,thermal"; | |
1804 | }; | |
873cf8ac SG |
1805 | |
1806 | fwu-mdata { | |
1807 | compatible = "u-boot,fwu-mdata-gpt"; | |
1808 | fwu-mdata-store = <&mmc0>; | |
1809 | }; | |
cc89b7cf AEK |
1810 | |
1811 | nvmxip-qspi1@08000000 { | |
1812 | compatible = "nvmxip,qspi"; | |
1813 | reg = <0x08000000 0x00200000>; | |
1814 | lba_shift = <9>; | |
1815 | lba = <4096>; | |
1816 | }; | |
1817 | ||
1818 | nvmxip-qspi2@08200000 { | |
1819 | compatible = "nvmxip,qspi"; | |
1820 | reg = <0x08200000 0x00100000>; | |
1821 | lba_shift = <9>; | |
1822 | lba = <2048>; | |
1823 | }; | |
8b215e10 SR |
1824 | |
1825 | extcon { | |
1826 | compatible = "sandbox,extcon"; | |
1827 | }; | |
2e7d35d2 | 1828 | }; |
9038cd53 PM |
1829 | |
1830 | #include "sandbox_pmic.dtsi" | |
4a2a78ca | 1831 | #include "cros-ec-keyboard.dtsi" |
8de9896a SG |
1832 | |
1833 | #ifdef CONFIG_SANDBOX_VPL | |
1834 | #include "sandbox_vpl.dtsi" | |
1835 | #endif | |
82cafee1 SG |
1836 | |
1837 | #include "cedit.dtsi" |