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sandbox: phy: add driver_data for bind test cmd
[u-boot.git] / arch / sandbox / dts / test.dts
CommitLineData
2e7d35d2
SG
1/dts-v1/;
2
2c0f782e
PD
3#include <dt-bindings/gpio/gpio.h>
4#include <dt-bindings/gpio/sandbox-gpio.h>
5
2e7d35d2
SG
6/ {
7 model = "sandbox";
8 compatible = "sandbox";
9 #address-cells = <1>;
0503e820 10 #size-cells = <1>;
2e7d35d2 11
00606d7e
SG
12 aliases {
13 console = &uart0;
171e991d 14 eth0 = "/eth@10002000";
71d7971f 15 eth3 = &eth_3;
171e991d 16 eth5 = &eth_5;
5d9a88f4
SG
17 gpio1 = &gpio_a;
18 gpio2 = &gpio_b;
ff52665d 19 gpio3 = &gpio_c;
9cc36a2b 20 i2c0 = "/i2c@0";
e48eeb9e
SG
21 mmc0 = "/mmc0";
22 mmc1 = "/mmc1";
dee4d752
BM
23 pci0 = &pci0;
24 pci1 = &pci1;
3ed214ac 25 pci2 = &pci2;
be1a6e94
MW
26 remoteproc0 = &rproc_1;
27 remoteproc1 = &rproc_2;
52d3bc5d
SG
28 rtc0 = &rtc_0;
29 rtc1 = &rtc_1;
171e991d 30 spi0 = "/spi@0";
f64000c3 31 testfdt6 = "/e-test";
9cc36a2b
SG
32 testbus3 = "/some-bus";
33 testfdt0 = "/some-bus/c-test@0";
34 testfdt1 = "/some-bus/c-test@1";
35 testfdt3 = "/b-test";
36 testfdt5 = "/some-bus/c-test@5";
37 testfdt8 = "/a-test";
507cef3d
ER
38 fdt-dummy0 = "/translation-test@8000/dev@0,0";
39 fdt-dummy1 = "/translation-test@8000/dev@1,100";
40 fdt-dummy2 = "/translation-test@8000/dev@2,200";
41 fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
e00cb223
SG
42 usb0 = &usb_0;
43 usb1 = &usb_1;
44 usb2 = &usb_2;
957983e0 45 axi0 = &axi;
4eea5318 46 osd0 = "/osd";
00606d7e
SG
47 };
48
ce6d99a0
SG
49 audio: audio-codec {
50 compatible = "sandbox,audio-codec";
51 #sound-dai-cells = <1>;
52 };
53
a6c6f0f0
PR
54 buttons {
55 compatible = "gpio-keys";
56
57 summer {
58 gpios = <&gpio_a 3 0>;
59 label = "summer";
60 };
61
62 christmas {
63 gpios = <&gpio_a 4 0>;
64 label = "christmas";
65 };
66 };
67
e96fa6c9 68 cros_ec: cros-ec {
e6c5c94a
SG
69 reg = <0 0>;
70 compatible = "google,cros-ec-sandbox";
71
72 /*
73 * This describes the flash memory within the EC. Note
74 * that the STM32L flash erases to 0, not 0xff.
75 */
76 flash {
77 image-pos = <0x08000000>;
78 size = <0x20000>;
79 erase-value = <0>;
80
81 /* Information for sandbox */
82 ro {
83 image-pos = <0>;
84 size = <0xf000>;
85 };
86 wp-ro {
87 image-pos = <0xf000>;
88 size = <0x1000>;
89 };
90 rw {
91 image-pos = <0x10000>;
92 size = <0x10000>;
93 };
94 };
95 };
96
23f965a4
YF
97 dsi_host: dsi_host {
98 compatible = "sandbox,dsi-host";
99 };
100
2e7d35d2 101 a-test {
0503e820 102 reg = <0 1>;
2e7d35d2 103 compatible = "denx,u-boot-fdt-test";
eb9ef5fe 104 ping-expect = <0>;
2e7d35d2 105 ping-add = <0>;
00606d7e 106 u-boot,dm-pre-reloc;
2c0f782e
PD
107 test-gpios = <&gpio_a 1>, <&gpio_a 4>,
108 <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>,
3669e0e7 109 <0>, <&gpio_a 12>;
2c0f782e
PD
110 test2-gpios = <&gpio_a 1>, <&gpio_a 4>,
111 <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>,
112 <&gpio_b 7 GPIO_IN 3 2 1>,
113 <&gpio_b 8 GPIO_OUT 3 2 1>,
114 <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>;
ff52665d
PD
115 test3-gpios =
116 <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>,
117 <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>,
118 <&gpio_c 2 GPIO_OUT>,
119 <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>,
120 <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>,
9bf87e25
NA
121 <&gpio_c 5 GPIO_IN>,
122 <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>,
123 <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>;
a1b17e4f
SG
124 int-value = <1234>;
125 uint-value = <(-1234)>;
70573c6c 126 int64-value = /bits/ 64 <0x1111222233334444>;
4bb7075c 127 int-array = <5678 9123 4567>;
06679000 128 str-value = "test string";
02554355 129 interrupts-extended = <&irq 3 0>;
fefac0b0 130 acpi,name = "GHIJ";
2e7d35d2
SG
131 };
132
133 junk {
0503e820 134 reg = <1 1>;
2e7d35d2
SG
135 compatible = "not,compatible";
136 };
137
138 no-compatible {
0503e820 139 reg = <2 1>;
2e7d35d2
SG
140 };
141
5d9a88f4
SG
142 backlight: backlight {
143 compatible = "pwm-backlight";
144 enable-gpios = <&gpio_a 1>;
145 power-supply = <&ldo_1>;
146 pwms = <&pwm 0 1000>;
147 default-brightness-level = <5>;
148 brightness-levels = <0 16 32 64 128 170 202 234 255>;
149 };
150
49c752c9
JJH
151 bind-test {
152 bind-test-child1 {
153 compatible = "sandbox,phy";
154 #phy-cells = <1>;
155 };
156
157 bind-test-child2 {
158 compatible = "simple-bus";
159 };
160 };
161
2e7d35d2 162 b-test {
0503e820 163 reg = <3 1>;
2e7d35d2 164 compatible = "denx,u-boot-fdt-test";
eb9ef5fe 165 ping-expect = <3>;
2e7d35d2
SG
166 ping-add = <3>;
167 };
168
86322f59
JJH
169 phy_provider0: gen_phy@0 {
170 compatible = "sandbox,phy";
171 #phy-cells = <1>;
172 };
173
174 phy_provider1: gen_phy@1 {
175 compatible = "sandbox,phy";
176 #phy-cells = <0>;
177 broken;
178 };
179
00c82acf
CY
180 phy_provider2: gen_phy@2 {
181 compatible = "sandbox,phy";
182 #phy-cells = <0>;
183 };
184
86322f59
JJH
185 gen_phy_user: gen_phy_user {
186 compatible = "simple-bus";
187 phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
188 phy-names = "phy1", "phy2", "phy3";
189 };
190
00c82acf
CY
191 gen_phy_user1: gen_phy_user1 {
192 compatible = "simple-bus";
193 phys = <&phy_provider0 0>, <&phy_provider2>;
194 phy-names = "phy1", "phy2";
195 };
196
2e7d35d2
SG
197 some-bus {
198 #address-cells = <1>;
199 #size-cells = <0>;
1ca7e206 200 compatible = "denx,u-boot-test-bus";
0503e820 201 reg = <3 1>;
eb9ef5fe 202 ping-expect = <4>;
2e7d35d2 203 ping-add = <4>;
1ca7e206 204 c-test@5 {
2e7d35d2
SG
205 compatible = "denx,u-boot-fdt-test";
206 reg = <5>;
1ca7e206 207 ping-expect = <5>;
2e7d35d2
SG
208 ping-add = <5>;
209 };
1ca7e206
SG
210 c-test@0 {
211 compatible = "denx,u-boot-fdt-test";
212 reg = <0>;
213 ping-expect = <6>;
214 ping-add = <6>;
215 };
216 c-test@1 {
217 compatible = "denx,u-boot-fdt-test";
218 reg = <1>;
219 ping-expect = <7>;
220 ping-add = <7>;
221 };
2e7d35d2
SG
222 };
223
224 d-test {
0503e820 225 reg = <3 1>;
5a66a8ff
SG
226 ping-expect = <6>;
227 ping-add = <6>;
228 compatible = "google,another-fdt-test";
229 };
230
231 e-test {
0503e820 232 reg = <3 1>;
eb9ef5fe 233 ping-expect = <6>;
2e7d35d2
SG
234 ping-add = <6>;
235 compatible = "google,another-fdt-test";
236 };
237
9cc36a2b
SG
238 f-test {
239 compatible = "denx,u-boot-fdt-test";
240 };
241
242 g-test {
243 compatible = "denx,u-boot-fdt-test";
244 };
245
2786cd74
BM
246 h-test {
247 compatible = "denx,u-boot-fdt-test1";
248 };
249
bf6ad916
CY
250 i-test {
251 compatible = "mediatek,u-boot-fdt-test";
252 #address-cells = <1>;
253 #size-cells = <0>;
254
255 subnode@0 {
256 reg = <0>;
257 };
258
259 subnode@1 {
260 reg = <1>;
261 };
262
263 subnode@2 {
264 reg = <2>;
265 };
266 };
267
dc12ebbb
SG
268 devres-test {
269 compatible = "denx,u-boot-devres-test";
270 };
271
0f7b111f 272 acpi_test1: acpi-test {
f50cc952 273 compatible = "denx,u-boot-acpi-test";
b5183172 274 acpi-ssdt-test-data = "ab";
01694589 275 acpi-dsdt-test-data = "hi";
1361a53c
SG
276 child {
277 compatible = "denx,u-boot-acpi-test";
278 };
f50cc952
SG
279 };
280
0f7b111f 281 acpi_test2: acpi-test2 {
93f7f827 282 compatible = "denx,u-boot-acpi-test";
b5183172 283 acpi-ssdt-test-data = "cd";
01694589 284 acpi-dsdt-test-data = "jk";
93f7f827
SG
285 };
286
ee87a097
PC
287 clocks {
288 clk_fixed: clk-fixed {
289 compatible = "fixed-clock";
290 #clock-cells = <0>;
291 clock-frequency = <1234>;
292 };
b630d57d
AP
293
294 clk_fixed_factor: clk-fixed-factor {
295 compatible = "fixed-factor-clock";
296 #clock-cells = <0>;
297 clock-div = <3>;
298 clock-mult = <2>;
299 clocks = <&clk_fixed>;
300 };
4ab8e783
LM
301
302 osc {
303 compatible = "fixed-clock";
304 #clock-cells = <0>;
305 clock-frequency = <20000000>;
306 };
135aa950
SW
307 };
308
309 clk_sandbox: clk-sbox {
6a1c7cef 310 compatible = "sandbox,clk";
135aa950 311 #clock-cells = <1>;
9a52be12
JJH
312 assigned-clocks = <&clk_sandbox 3>;
313 assigned-clock-rates = <321>;
135aa950
SW
314 };
315
316 clk-test {
317 compatible = "sandbox,clk-test";
318 clocks = <&clk_fixed>,
319 <&clk_sandbox 1>,
dd2e0ce2
JJH
320 <&clk_sandbox 0>,
321 <&clk_sandbox 3>,
322 <&clk_sandbox 2>;
323 clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
6a1c7cef
SG
324 };
325
87e460c3
LM
326 ccf: clk-ccf {
327 compatible = "sandbox,clk-ccf";
328 };
329
171e991d
SG
330 eth@10002000 {
331 compatible = "sandbox,eth";
332 reg = <0x10002000 0x1000>;
c6fa51a4 333 fake-host-hwaddr = [00 00 66 44 22 00];
171e991d
SG
334 };
335
336 eth_5: eth@10003000 {
337 compatible = "sandbox,eth";
338 reg = <0x10003000 0x1000>;
c6fa51a4 339 fake-host-hwaddr = [00 00 66 44 22 11];
171e991d
SG
340 };
341
71d7971f
BM
342 eth_3: sbe5 {
343 compatible = "sandbox,eth";
344 reg = <0x10005000 0x1000>;
c6fa51a4 345 fake-host-hwaddr = [00 00 66 44 22 33];
71d7971f
BM
346 };
347
171e991d
SG
348 eth@10004000 {
349 compatible = "sandbox,eth";
350 reg = <0x10004000 0x1000>;
c6fa51a4 351 fake-host-hwaddr = [00 00 66 44 22 22];
171e991d
SG
352 };
353
31b8217e
RV
354 firmware {
355 sandbox_firmware: sandbox-firmware {
356 compatible = "sandbox,firmware";
357 };
358 };
359
e5301bac
PD
360 pinctrl-gpio {
361 compatible = "sandbox,pinctrl-gpio";
362
363 gpio_a: base-gpios {
364 compatible = "sandbox,gpio";
365 gpio-controller;
366 #gpio-cells = <1>;
367 gpio-bank-name = "a";
368 sandbox,gpio-count = <20>;
9ba84329
HS
369 hog_input_active_low {
370 gpio-hog;
371 input;
037a56d6 372 gpios = <10 GPIO_ACTIVE_LOW>;
9ba84329
HS
373 };
374 hog_input_active_high {
375 gpio-hog;
376 input;
037a56d6 377 gpios = <11 GPIO_ACTIVE_HIGH>;
9ba84329
HS
378 };
379 hog_output_low {
380 gpio-hog;
381 output-low;
037a56d6 382 gpios = <12 GPIO_ACTIVE_HIGH>;
9ba84329
HS
383 };
384 hog_output_high {
385 gpio-hog;
386 output-high;
037a56d6 387 gpios = <13 GPIO_ACTIVE_HIGH>;
9ba84329 388 };
e5301bac 389 };
2e7d35d2 390
e5301bac
PD
391 gpio_b: extra-gpios {
392 compatible = "sandbox,gpio";
393 gpio-controller;
394 #gpio-cells = <5>;
395 gpio-bank-name = "b";
396 sandbox,gpio-count = <10>;
397 };
0ae0cb7b 398
e5301bac
PD
399 gpio_c: pinmux-gpios {
400 compatible = "sandbox,gpio";
401 gpio-controller;
402 #gpio-cells = <2>;
403 gpio-bank-name = "c";
404 sandbox,gpio-count = <10>;
405 };
ff52665d
PD
406 };
407
ecc2ed55
SG
408 i2c@0 {
409 #address-cells = <1>;
410 #size-cells = <0>;
0503e820 411 reg = <0 1>;
ecc2ed55
SG
412 compatible = "sandbox,i2c";
413 clock-frequency = <100000>;
414 eeprom@2c {
415 reg = <0x2c>;
416 compatible = "i2c-eeprom";
031a650e 417 sandbox,emul = <&emul_eeprom>;
f692b479
MS
418 partitions {
419 compatible = "fixed-partitions";
420 #address-cells = <1>;
421 #size-cells = <1>;
422 bootcount_i2c: bootcount@10 {
423 reg = <10 2>;
424 };
425 };
ecc2ed55 426 };
9038cd53 427
52d3bc5d
SG
428 rtc_0: rtc@43 {
429 reg = <0x43>;
430 compatible = "sandbox-rtc";
031a650e 431 sandbox,emul = <&emul0>;
52d3bc5d
SG
432 };
433
434 rtc_1: rtc@61 {
435 reg = <0x61>;
436 compatible = "sandbox-rtc";
031a650e
SG
437 sandbox,emul = <&emul1>;
438 };
439
440 i2c_emul: emul {
441 reg = <0xff>;
442 compatible = "sandbox,i2c-emul-parent";
443 emul_eeprom: emul-eeprom {
444 compatible = "sandbox,i2c-eeprom";
445 sandbox,filename = "i2c.bin";
446 sandbox,size = <256>;
447 };
448 emul0: emul0 {
449 compatible = "sandbox,i2c-rtc";
450 };
451 emul1: emull {
52d3bc5d
SG
452 compatible = "sandbox,i2c-rtc";
453 };
454 };
455
9038cd53
PM
456 sandbox_pmic: sandbox_pmic {
457 reg = <0x40>;
031a650e 458 sandbox,emul = <&emul_pmic0>;
9038cd53 459 };
686df498
LM
460
461 mc34708: pmic@41 {
462 reg = <0x41>;
031a650e 463 sandbox,emul = <&emul_pmic1>;
686df498 464 };
ecc2ed55
SG
465 };
466
6f2d59cb
PT
467 bootcount@0 {
468 compatible = "u-boot,bootcount-rtc";
469 rtc = <&rtc_1>;
470 offset = <0x13>;
471 };
472
f692b479
MS
473 bootcount {
474 compatible = "u-boot,bootcount-i2c-eeprom";
475 i2c-eeprom = <&bootcount_i2c>;
476 };
477
08d6300a
PM
478 adc@0 {
479 compatible = "sandbox,adc";
480 vdd-supply = <&buck2>;
481 vss-microvolts = <0>;
482 };
483
02554355 484 irq: irq {
fbb0efdd 485 compatible = "sandbox,irq";
02554355
SG
486 interrupt-controller;
487 #interrupt-cells = <2>;
fbb0efdd
SG
488 };
489
3c97c4fb
SG
490 lcd {
491 u-boot,dm-pre-reloc;
492 compatible = "sandbox,lcd-sdl";
493 xres = <1366>;
494 yres = <768>;
495 };
496
3c43fba3
SG
497 leds {
498 compatible = "gpio-leds";
499
500 iracibble {
501 gpios = <&gpio_a 1 0>;
502 label = "sandbox:red";
503 };
504
505 martinet {
506 gpios = <&gpio_a 2 0>;
507 label = "sandbox:green";
508 };
274fb461
PB
509
510 default_on {
511 gpios = <&gpio_a 5 0>;
512 label = "sandbox:default_on";
513 default-state = "on";
514 };
515
516 default_off {
517 gpios = <&gpio_a 6 0>;
518 label = "sandbox:default_off";
519 default-state = "off";
520 };
3c43fba3
SG
521 };
522
8961b524
SW
523 mbox: mbox {
524 compatible = "sandbox,mbox";
525 #mbox-cells = <1>;
526 };
527
528 mbox-test {
529 compatible = "sandbox,mbox-test";
530 mboxes = <&mbox 100>, <&mbox 1>;
531 mbox-names = "other", "test";
532 };
533
073e6d65
AT
534 cpus {
535 cpu-test1 {
536 compatible = "sandbox,cpu_sandbox";
537 u-boot,dm-pre-reloc;
538 };
fa44b533 539
073e6d65
AT
540 cpu-test2 {
541 compatible = "sandbox,cpu_sandbox";
542 u-boot,dm-pre-reloc;
543 };
fa44b533 544
073e6d65
AT
545 cpu-test3 {
546 compatible = "sandbox,cpu_sandbox";
547 u-boot,dm-pre-reloc;
548 };
fa44b533
MS
549 };
550
21e3c219
DG
551 chipid: chipid {
552 compatible = "sandbox,soc";
553 };
554
e96fa6c9
SG
555 i2s: i2s {
556 compatible = "sandbox,i2s";
557 #sound-dai-cells = <1>;
ecc7973d 558 sandbox,silent; /* Don't emit sounds while testing */
e96fa6c9
SG
559 };
560
07e33711
JJH
561 nop-test_0 {
562 compatible = "sandbox,nop_sandbox1";
563 nop-test_1 {
564 compatible = "sandbox,nop_sandbox2";
565 bind = "True";
566 };
567 nop-test_2 {
568 compatible = "sandbox,nop_sandbox2";
569 bind = "False";
570 };
571 };
572
004e67c2
MS
573 misc-test {
574 compatible = "sandbox,misc_sandbox";
575 };
576
e48eeb9e
SG
577 mmc2 {
578 compatible = "sandbox,mmc";
579 };
580
581 mmc1 {
582 compatible = "sandbox,mmc";
583 };
584
585 mmc0 {
8e6cc461
SG
586 compatible = "sandbox,mmc";
587 };
588
b45c833c
SG
589 pch {
590 compatible = "sandbox,pch";
591 };
592
42c64d1b 593 pci0: pci@0 {
d3b7ff14
SG
594 compatible = "sandbox,pci";
595 device_type = "pci";
42c64d1b 596 bus-range = <0x00 0xff>;
d3b7ff14
SG
597 #address-cells = <3>;
598 #size-cells = <2>;
b0e2c23d 599 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000
d3b7ff14 600 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
2db7f2b7
BM
601 pci@0,0 {
602 compatible = "pci-generic";
603 reg = <0x0000 0 0 0 0>;
9b69ba4a 604 sandbox,emul = <&swap_case_emul0_0>;
2db7f2b7 605 };
21ebbafd
AM
606 pci@1,0 {
607 compatible = "pci-generic";
33c215af
SG
608 /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
609 reg = <0x02000814 0 0 0 0
610 0x01000810 0 0 0 0>;
9b69ba4a 611 sandbox,emul = <&swap_case_emul0_1>;
21ebbafd 612 };
3e17ffbb
SG
613 p2sb-pci@2,0 {
614 compatible = "sandbox,p2sb";
615 reg = <0x02001010 0 0 0 0>;
616 sandbox,emul = <&p2sb_emul>;
617
618 adder {
619 intel,p2sb-port-id = <3>;
620 compatible = "sandbox,adder";
621 };
622 };
3b65ee34
SG
623 pci@1e,0 {
624 compatible = "sandbox,pmc";
625 reg = <0xf000 0 0 0 0>;
626 sandbox,emul = <&pmc_emul1e>;
627 acpi-base = <0x400>;
628 gpe0-dwx-mask = <0xf>;
629 gpe0-dwx-shift-base = <4>;
630 gpe0-dw = <6 7 9>;
631 gpe0-sts = <0x20>;
632 gpe0-en = <0x30>;
633 };
d3b7ff14
SG
634 pci@1f,0 {
635 compatible = "pci-generic";
33c215af
SG
636 /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
637 reg = <0x0100f810 0 0 0 0>;
9b69ba4a
SG
638 sandbox,emul = <&swap_case_emul0_1f>;
639 };
640 };
641
642 pci-emul0 {
643 compatible = "sandbox,pci-emul-parent";
644 swap_case_emul0_0: emul0@0,0 {
645 compatible = "sandbox,swap-case";
646 };
647 swap_case_emul0_1: emul0@1,0 {
648 compatible = "sandbox,swap-case";
649 use-ea;
650 };
651 swap_case_emul0_1f: emul0@1f,0 {
652 compatible = "sandbox,swap-case";
d3b7ff14 653 };
3e17ffbb
SG
654 p2sb_emul: emul@2,0 {
655 compatible = "sandbox,p2sb-emul";
656 };
3b65ee34
SG
657 pmc_emul1e: emul@1e,0 {
658 compatible = "sandbox,pmc-emul";
659 };
d3b7ff14
SG
660 };
661
42c64d1b 662 pci1: pci@1 {
dee4d752
BM
663 compatible = "sandbox,pci";
664 device_type = "pci";
42c64d1b 665 bus-range = <0x00 0xff>;
dee4d752
BM
666 #address-cells = <3>;
667 #size-cells = <2>;
668 ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000
669 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
490d13a5 670 sandbox,dev-info = <0x08 0x00 0x1234 0x5678
b59349a0
MV
671 0x0c 0x00 0x1234 0x5678
672 0x10 0x00 0x1234 0x5678>;
673 pci@10,0 {
674 reg = <0x8000 0 0 0 0>;
675 };
dee4d752
BM
676 };
677
42c64d1b 678 pci2: pci@2 {
3ed214ac
BM
679 compatible = "sandbox,pci";
680 device_type = "pci";
42c64d1b 681 bus-range = <0x00 0xff>;
3ed214ac
BM
682 #address-cells = <3>;
683 #size-cells = <2>;
684 ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
685 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
686 sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
687 pci@1f,0 {
688 compatible = "pci-generic";
689 reg = <0xf800 0 0 0 0>;
9b69ba4a
SG
690 sandbox,emul = <&swap_case_emul2_1f>;
691 };
692 };
693
694 pci-emul2 {
695 compatible = "sandbox,pci-emul-parent";
696 swap_case_emul2_1f: emul2@1f,0 {
697 compatible = "sandbox,swap-case";
3ed214ac
BM
698 };
699 };
700
bb413337
RF
701 pci_ep: pci_ep {
702 compatible = "sandbox,pci_ep";
703 };
704
98561572
SG
705 probing {
706 compatible = "simple-bus";
707 test1 {
708 compatible = "denx,u-boot-probe-test";
709 };
710
711 test2 {
712 compatible = "denx,u-boot-probe-test";
713 };
714
715 test3 {
716 compatible = "denx,u-boot-probe-test";
717 };
718
719 test4 {
720 compatible = "denx,u-boot-probe-test";
6c3af1f2
JJH
721 first-syscon = <&syscon0>;
722 second-sys-ctrl = <&another_system_controller>;
a442e61e 723 third-syscon = <&syscon2>;
98561572
SG
724 };
725 };
726
61f5ddcb
SW
727 pwrdom: power-domain {
728 compatible = "sandbox,power-domain";
729 #power-domain-cells = <1>;
730 };
731
732 power-domain-test {
733 compatible = "sandbox,power-domain-test";
734 power-domains = <&pwrdom 2>;
735 };
736
5d9a88f4 737 pwm: pwm {
43b41566 738 compatible = "sandbox,pwm";
5d9a88f4 739 #pwm-cells = <2>;
43b41566
SG
740 };
741
742 pwm2 {
743 compatible = "sandbox,pwm";
5d9a88f4 744 #pwm-cells = <2>;
43b41566
SG
745 };
746
64ce0cad
SG
747 ram {
748 compatible = "sandbox,ram";
749 };
750
5010d98f
SG
751 reset@0 {
752 compatible = "sandbox,warm-reset";
753 };
754
755 reset@1 {
756 compatible = "sandbox,reset";
757 };
758
4581b717
SW
759 resetc: reset-ctl {
760 compatible = "sandbox,reset-ctl";
761 #reset-cells = <1>;
762 };
763
764 reset-ctl-test {
765 compatible = "sandbox,reset-ctl-test";
766 resets = <&resetc 100>, <&resetc 2>;
767 reset-names = "other", "test";
768 };
769
ff0dada9
SG
770 rng {
771 compatible = "sandbox,sandbox-rng";
772 };
773
5215940f
NM
774 rproc_1: rproc@1 {
775 compatible = "sandbox,test-processor";
776 remoteproc-name = "remoteproc-test-dev1";
777 };
778
779 rproc_2: rproc@2 {
780 compatible = "sandbox,test-processor";
781 internal-memory-mapped;
782 remoteproc-name = "remoteproc-test-dev2";
783 };
784
5d9a88f4
SG
785 panel {
786 compatible = "simple-panel";
787 backlight = <&backlight 0 100>;
788 };
789
7fd7e2cf
RF
790 smem@0 {
791 compatible = "sandbox,smem";
792 };
793
d4901898
SG
794 sound {
795 compatible = "sandbox,sound";
796 cpu {
797 sound-dai = <&i2s 0>;
798 };
799
800 codec {
801 sound-dai = <&audio 0>;
802 };
803 };
804
0ae0cb7b
SG
805 spi@0 {
806 #address-cells = <1>;
807 #size-cells = <0>;
0503e820 808 reg = <0 1>;
0ae0cb7b
SG
809 compatible = "sandbox,spi";
810 cs-gpios = <0>, <&gpio_a 0>;
811 spi.bin@0 {
812 reg = <0>;
ffd4c7c2 813 compatible = "spansion,m25p16", "jedec,spi-nor";
0ae0cb7b
SG
814 spi-max-frequency = <40000000>;
815 sandbox,filename = "spi.bin";
816 };
817 };
818
6c3af1f2 819 syscon0: syscon@0 {
04035fd3 820 compatible = "sandbox,syscon0";
82744c20 821 reg = <0x10 16>;
04035fd3
SG
822 };
823
6c3af1f2 824 another_system_controller: syscon@1 {
04035fd3 825 compatible = "sandbox,syscon1";
0503e820
SG
826 reg = <0x20 5
827 0x28 6
828 0x30 7
829 0x38 8>;
04035fd3
SG
830 };
831
a442e61e 832 syscon2: syscon@2 {
99552c34
MY
833 compatible = "simple-mfd", "syscon";
834 reg = <0x40 5
835 0x48 6
836 0x50 7
837 0x58 8>;
838 };
839
e7cc8d11
TC
840 timer {
841 compatible = "sandbox,timer";
842 clock-frequency = <1000000>;
843 };
844
b91ad16a
MR
845 tpm2 {
846 compatible = "sandbox,tpm2";
847 };
848
171e991d
SG
849 uart0: serial {
850 compatible = "sandbox,serial";
851 u-boot,dm-pre-reloc;
bfacad7d
JH
852 };
853
e00cb223
SG
854 usb_0: usb@0 {
855 compatible = "sandbox,usb";
856 status = "disabled";
857 hub {
858 compatible = "sandbox,usb-hub";
859 #address-cells = <1>;
860 #size-cells = <0>;
861 flash-stick {
862 reg = <0>;
863 compatible = "sandbox,usb-flash";
864 };
865 };
866 };
867
868 usb_1: usb@1 {
869 compatible = "sandbox,usb";
870 hub {
871 compatible = "usb-hub";
872 usb,device-class = <9>;
c03b7612
MW
873 #address-cells = <1>;
874 #size-cells = <0>;
e00cb223
SG
875 hub-emul {
876 compatible = "sandbox,usb-hub";
877 #address-cells = <1>;
878 #size-cells = <0>;
431cbd6d 879 flash-stick@0 {
e00cb223
SG
880 reg = <0>;
881 compatible = "sandbox,usb-flash";
882 sandbox,filepath = "testflash.bin";
883 };
884
431cbd6d
SG
885 flash-stick@1 {
886 reg = <1>;
887 compatible = "sandbox,usb-flash";
888 sandbox,filepath = "testflash1.bin";
889 };
890
891 flash-stick@2 {
892 reg = <2>;
893 compatible = "sandbox,usb-flash";
894 sandbox,filepath = "testflash2.bin";
895 };
896
bff1a71e
SG
897 keyb@3 {
898 reg = <3>;
899 compatible = "sandbox,usb-keyb";
900 };
901
e00cb223 902 };
c03b7612
MW
903
904 usbstor@1 {
905 reg = <1>;
906 };
907 usbstor@3 {
908 reg = <3>;
909 };
e00cb223
SG
910 };
911 };
912
913 usb_2: usb@2 {
914 compatible = "sandbox,usb";
915 status = "disabled";
916 };
917
d33776e4
MK
918 spmi: spmi@0 {
919 compatible = "sandbox,spmi";
920 #address-cells = <0x1>;
921 #size-cells = <0x1>;
a605b0f7 922 ranges;
d33776e4
MK
923 pm8916@0 {
924 compatible = "qcom,spmi-pmic";
925 reg = <0x0 0x1>;
926 #address-cells = <0x1>;
927 #size-cells = <0x1>;
a605b0f7 928 ranges;
d33776e4
MK
929
930 spmi_gpios: gpios@c000 {
931 compatible = "qcom,pm8916-gpio";
932 reg = <0xc000 0x400>;
933 gpio-controller;
934 gpio-count = <4>;
935 #gpio-cells = <2>;
936 gpio-bank-name="spmi";
937 };
938 };
939 };
0753bc2d 940
941 wdt0: wdt@0 {
942 compatible = "sandbox,wdt";
943 };
f2006808 944
957983e0
MS
945 axi: axi@0 {
946 compatible = "sandbox,axi";
947 #address-cells = <0x1>;
948 #size-cells = <0x1>;
949 store@0 {
950 compatible = "sandbox,sandbox_store";
951 reg = <0x0 0x400>;
952 };
953 };
954
f2006808 955 chosen {
7e87816c
SG
956 #address-cells = <1>;
957 #size-cells = <1>;
14ca9f7f
SG
958 setting = "sunrise ohoka";
959 other-node = "/some-bus/c-test@5";
bd933bfd 960 int-values = <0x1937 72993>;
0f7b111f 961 u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>;
f2006808
RC
962 chosen-test {
963 compatible = "denx,u-boot-fdt-test";
964 reg = <9 1>;
965 };
966 };
e8d52918
MS
967
968 translation-test@8000 {
969 compatible = "simple-bus";
970 reg = <0x8000 0x4000>;
971
972 #address-cells = <0x2>;
973 #size-cells = <0x1>;
974
975 ranges = <0 0x0 0x8000 0x1000
976 1 0x100 0x9000 0x1000
977 2 0x200 0xA000 0x1000
978 3 0x300 0xB000 0x1000
979 >;
980
641067fb
FD
981 dma-ranges = <0 0x000 0x10000000 0x1000
982 1 0x100 0x20000000 0x1000
983 >;
984
e8d52918
MS
985 dev@0,0 {
986 compatible = "denx,u-boot-fdt-dummy";
987 reg = <0 0x0 0x1000>;
79598820 988 reg-names = "sandbox-dummy-0";
e8d52918
MS
989 };
990
991 dev@1,100 {
992 compatible = "denx,u-boot-fdt-dummy";
993 reg = <1 0x100 0x1000>;
994
995 };
996
997 dev@2,200 {
998 compatible = "denx,u-boot-fdt-dummy";
999 reg = <2 0x200 0x1000>;
1000 };
1001
1002
1003 noxlatebus@3,300 {
1004 compatible = "simple-bus";
1005 reg = <3 0x300 0x1000>;
1006
1007 #address-cells = <0x1>;
1008 #size-cells = <0x0>;
1009
1010 dev@42 {
1011 compatible = "denx,u-boot-fdt-dummy";
1012 reg = <0x42>;
1013 };
1014 };
1015 };
4eea5318
MS
1016
1017 osd {
1018 compatible = "sandbox,sandbox_osd";
1019 };
d24c1d0f 1020
e6fd0181
MS
1021 board {
1022 compatible = "sandbox,board_sandbox";
1023 };
fa830ae1
JW
1024
1025 sandbox_tee {
1026 compatible = "sandbox,tee";
1027 };
4f89d494
BM
1028
1029 sandbox_virtio1 {
1030 compatible = "sandbox,virtio1";
1031 };
1032
1033 sandbox_virtio2 {
1034 compatible = "sandbox,virtio2";
1035 };
f41a824b
PC
1036
1037 pinctrl {
1038 compatible = "sandbox,pinctrl";
d15c05b5
PD
1039
1040 pinctrl-names = "default";
1041 pinctrl-0 = <&gpios>;
1042
1043 gpios: gpios {
1044 gpio0 {
1045 pins = "GPIO0";
1046 bias-pull-up;
1047 input-disable;
1048 };
1049 gpio1 {
1050 pins = "GPIO1";
1051 output-high;
1052 drive-open-drain;
1053 };
1054 gpio2 {
1055 pins = "GPIO2";
1056 bias-pull-down;
1057 input-enable;
1058 };
1059 gpio3 {
1060 pins = "GPIO3";
1061 bias-disable;
1062 };
1063 };
f41a824b 1064 };
7f84fc67
BG
1065
1066 hwspinlock@0 {
1067 compatible = "sandbox,hwspinlock";
1068 };
b3309918
GS
1069
1070 dma: dma {
1071 compatible = "sandbox,dma";
1072 #dma-cells = <1>;
1073
1074 dmas = <&dma 0>, <&dma 1>, <&dma 2>;
1075 dma-names = "m2m", "tx0", "rx0";
1076 };
ec9594a5 1077
c3d9f3f8
AM
1078 /*
1079 * keep mdio-mux ahead of mdio so that the mux is removed first at the
1080 * end of the test. If parent mdio is removed first, clean-up of the
1081 * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio
1082 * active at the end of the test. That it turn doesn't allow the mdio
1083 * class to be destroyed, triggering an error.
1084 */
1085 mdio-mux-test {
1086 compatible = "sandbox,mdio-mux";
1087 #address-cells = <1>;
1088 #size-cells = <0>;
1089 mdio-parent-bus = <&mdio>;
1090
1091 mdio-ch-test@0 {
1092 reg = <0>;
1093 };
1094 mdio-ch-test@1 {
1095 reg = <1>;
1096 };
1097 };
1098
1099 mdio: mdio-test {
ec9594a5
AM
1100 compatible = "sandbox,mdio";
1101 };
4a3390f1
SA
1102
1103 pm-bus-test {
1104 compatible = "simple-pm-bus";
1105 clocks = <&clk_sandbox 4>;
1106 power-domains = <&pwrdom 1>;
1107 };
038b13ee
SA
1108
1109 resetc2: syscon-reset {
1110 compatible = "syscon-reset";
1111 #reset-cells = <1>;
1112 regmap = <&syscon0>;
1113 offset = <1>;
1114 mask = <0x27FFFFFF>;
1115 assert-high = <0>;
1116 };
1117
1118 syscon-reset-test {
1119 compatible = "sandbox,misc_sandbox";
1120 resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>;
1121 reset-names = "valid", "no_mask", "out_of_range";
1122 };
2e7d35d2 1123};
9038cd53
PM
1124
1125#include "sandbox_pmic.dtsi"
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