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Commit | Line | Data |
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7dcc2f7e SG |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * Devicetree file for running sandbox tests | |
4 | * | |
5 | * This includes lots of extra devices used by various tests. | |
6 | * | |
7 | * Note that SPL use the main sandbox.dts file | |
8 | */ | |
9 | ||
2e7d35d2 SG |
10 | /dts-v1/; |
11 | ||
2c0f782e PD |
12 | #include <dt-bindings/gpio/gpio.h> |
13 | #include <dt-bindings/gpio/sandbox-gpio.h> | |
289d0ead | 14 | #include <dt-bindings/input/input.h> |
7f0f1806 | 15 | #include <dt-bindings/pinctrl/sandbox-pinmux.h> |
739592cc | 16 | #include <dt-bindings/mux/mux.h> |
2c0f782e | 17 | |
2e7d35d2 SG |
18 | / { |
19 | model = "sandbox"; | |
20 | compatible = "sandbox"; | |
21 | #address-cells = <1>; | |
0503e820 | 22 | #size-cells = <1>; |
2e7d35d2 | 23 | |
00606d7e SG |
24 | aliases { |
25 | console = &uart0; | |
82a3c9ef MW |
26 | ethernet0 = "/eth@10002000"; |
27 | ethernet2 = &swp_0; | |
28 | ethernet3 = ð_3; | |
29 | ethernet4 = &dsa_eth0; | |
30 | ethernet5 = ð_5; | |
5d9a88f4 SG |
31 | gpio1 = &gpio_a; |
32 | gpio2 = &gpio_b; | |
ff52665d | 33 | gpio3 = &gpio_c; |
9cc36a2b | 34 | i2c0 = "/i2c@0"; |
e48eeb9e SG |
35 | mmc0 = "/mmc0"; |
36 | mmc1 = "/mmc1"; | |
dee4d752 BM |
37 | pci0 = &pci0; |
38 | pci1 = &pci1; | |
3ed214ac | 39 | pci2 = &pci2; |
be1a6e94 MW |
40 | remoteproc0 = &rproc_1; |
41 | remoteproc1 = &rproc_2; | |
52d3bc5d SG |
42 | rtc0 = &rtc_0; |
43 | rtc1 = &rtc_1; | |
171e991d | 44 | spi0 = "/spi@0"; |
f64000c3 | 45 | testfdt6 = "/e-test"; |
9cc36a2b SG |
46 | testbus3 = "/some-bus"; |
47 | testfdt0 = "/some-bus/c-test@0"; | |
981426e3 | 48 | testfdt12 = "/some-bus/c-test@1"; |
9cc36a2b SG |
49 | testfdt3 = "/b-test"; |
50 | testfdt5 = "/some-bus/c-test@5"; | |
51 | testfdt8 = "/a-test"; | |
93f44e8a | 52 | testfdtm1 = &testfdtm1; |
507cef3d ER |
53 | fdt-dummy0 = "/translation-test@8000/dev@0,0"; |
54 | fdt-dummy1 = "/translation-test@8000/dev@1,100"; | |
55 | fdt-dummy2 = "/translation-test@8000/dev@2,200"; | |
56 | fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42"; | |
e00cb223 SG |
57 | usb0 = &usb_0; |
58 | usb1 = &usb_1; | |
59 | usb2 = &usb_2; | |
957983e0 | 60 | axi0 = &axi; |
4eea5318 | 61 | osd0 = "/osd"; |
00606d7e SG |
62 | }; |
63 | ||
059df562 PR |
64 | binman { |
65 | }; | |
66 | ||
8c72842a | 67 | config { |
7de8bd03 SG |
68 | testing-bool; |
69 | testing-int = <123>; | |
70 | testing-str = "testing"; | |
8c72842a RV |
71 | environment { |
72 | from_fdt = "yes"; | |
73 | fdt_env_path = ""; | |
74 | }; | |
75 | }; | |
76 | ||
f9db2f16 NH |
77 | reboot-mode0 { |
78 | compatible = "reboot-mode-gpio"; | |
79 | gpios = <&gpio_c 0 GPIO_ACTIVE_HIGH>, <&gpio_c 1 GPIO_ACTIVE_HIGH>; | |
80 | u-boot,env-variable = "bootstatus"; | |
81 | mode-test = <0x01>; | |
82 | mode-download = <0x03>; | |
83 | }; | |
84 | ||
c74675bd NH |
85 | reboot_mode1: reboot-mode@14 { |
86 | compatible = "reboot-mode-rtc"; | |
87 | rtc = <&rtc_0>; | |
88 | reg = <0x30 4>; | |
89 | u-boot,env-variable = "bootstatus"; | |
90 | big-endian; | |
91 | mode-test = <0x21969147>; | |
92 | mode-download = <0x51939147>; | |
93 | }; | |
94 | ||
ce6d99a0 SG |
95 | audio: audio-codec { |
96 | compatible = "sandbox,audio-codec"; | |
97 | #sound-dai-cells = <1>; | |
98 | }; | |
99 | ||
a6c6f0f0 PR |
100 | buttons { |
101 | compatible = "gpio-keys"; | |
102 | ||
39916bb4 | 103 | btn1 { |
a6c6f0f0 | 104 | gpios = <&gpio_a 3 0>; |
39916bb4 | 105 | label = "button1"; |
a6c6f0f0 PR |
106 | }; |
107 | ||
39916bb4 | 108 | btn2 { |
a6c6f0f0 | 109 | gpios = <&gpio_a 4 0>; |
39916bb4 | 110 | label = "button2"; |
a6c6f0f0 PR |
111 | }; |
112 | }; | |
113 | ||
289d0ead MS |
114 | buttons2 { |
115 | compatible = "adc-keys"; | |
116 | io-channels = <&adc 3>; | |
117 | keyup-threshold-microvolt = <3000000>; | |
118 | ||
119 | button-up { | |
120 | label = "button3"; | |
121 | linux,code = <KEY_F3>; | |
122 | press-threshold-microvolt = <1500000>; | |
123 | }; | |
124 | ||
125 | button-down { | |
126 | label = "button4"; | |
127 | linux,code = <KEY_F4>; | |
128 | press-threshold-microvolt = <1000000>; | |
129 | }; | |
130 | ||
131 | button-enter { | |
132 | label = "button5"; | |
133 | linux,code = <KEY_F5>; | |
134 | press-threshold-microvolt = <500000>; | |
135 | }; | |
136 | }; | |
137 | ||
e96fa6c9 | 138 | cros_ec: cros-ec { |
e6c5c94a SG |
139 | reg = <0 0>; |
140 | compatible = "google,cros-ec-sandbox"; | |
141 | ||
142 | /* | |
143 | * This describes the flash memory within the EC. Note | |
144 | * that the STM32L flash erases to 0, not 0xff. | |
145 | */ | |
146 | flash { | |
147 | image-pos = <0x08000000>; | |
148 | size = <0x20000>; | |
149 | erase-value = <0>; | |
150 | ||
151 | /* Information for sandbox */ | |
152 | ro { | |
153 | image-pos = <0>; | |
154 | size = <0xf000>; | |
155 | }; | |
156 | wp-ro { | |
157 | image-pos = <0xf000>; | |
158 | size = <0x1000>; | |
ff5fa7d6 SG |
159 | used = <0x884>; |
160 | compress = "lz4"; | |
161 | uncomp-size = <0xcf8>; | |
162 | hash { | |
163 | algo = "sha256"; | |
164 | value = [00 01 02 03 04 05 06 07 | |
165 | 08 09 0a 0b 0c 0d 0e 0f | |
166 | 10 11 12 13 14 15 16 17 | |
167 | 18 19 1a 1b 1c 1d 1e 1f]; | |
168 | }; | |
e6c5c94a SG |
169 | }; |
170 | rw { | |
171 | image-pos = <0x10000>; | |
172 | size = <0x10000>; | |
173 | }; | |
174 | }; | |
e712245d ANY |
175 | |
176 | cros_ec_pwm: cros-ec-pwm { | |
177 | compatible = "google,cros-ec-pwm"; | |
178 | #pwm-cells = <1>; | |
179 | }; | |
180 | ||
e6c5c94a SG |
181 | }; |
182 | ||
23f965a4 YF |
183 | dsi_host: dsi_host { |
184 | compatible = "sandbox,dsi-host"; | |
185 | }; | |
186 | ||
2e7d35d2 | 187 | a-test { |
0503e820 | 188 | reg = <0 1>; |
2e7d35d2 | 189 | compatible = "denx,u-boot-fdt-test"; |
eb9ef5fe | 190 | ping-expect = <0>; |
2e7d35d2 | 191 | ping-add = <0>; |
00606d7e | 192 | u-boot,dm-pre-reloc; |
2c0f782e PD |
193 | test-gpios = <&gpio_a 1>, <&gpio_a 4>, |
194 | <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>, | |
3669e0e7 | 195 | <0>, <&gpio_a 12>; |
2c0f782e PD |
196 | test2-gpios = <&gpio_a 1>, <&gpio_a 4>, |
197 | <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>, | |
198 | <&gpio_b 7 GPIO_IN 3 2 1>, | |
199 | <&gpio_b 8 GPIO_OUT 3 2 1>, | |
200 | <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>; | |
ff52665d PD |
201 | test3-gpios = |
202 | <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>, | |
203 | <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>, | |
204 | <&gpio_c 2 GPIO_OUT>, | |
205 | <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>, | |
206 | <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>, | |
9bf87e25 NA |
207 | <&gpio_c 5 GPIO_IN>, |
208 | <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>, | |
209 | <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>; | |
88e6a60e JJH |
210 | test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>; |
211 | test5-gpios = <&gpio_a 19>; | |
212 | ||
fb933d07 | 213 | bool-value; |
a1b17e4f SG |
214 | int-value = <1234>; |
215 | uint-value = <(-1234)>; | |
70573c6c | 216 | int64-value = /bits/ 64 <0x1111222233334444>; |
4bb7075c | 217 | int-array = <5678 9123 4567>; |
06679000 | 218 | str-value = "test string"; |
02554355 | 219 | interrupts-extended = <&irq 3 0>; |
fefac0b0 | 220 | acpi,name = "GHIJ"; |
cc72f3e0 | 221 | phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>; |
739592cc JJH |
222 | |
223 | mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>, | |
224 | <&muxcontroller0 2>, <&muxcontroller0 3>, | |
225 | <&muxcontroller1>; | |
226 | mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4"; | |
227 | mux-syscon = <&syscon3>; | |
15daa486 DB |
228 | display-timings { |
229 | timing0: 240x320 { | |
230 | clock-frequency = <6500000>; | |
231 | hactive = <240>; | |
232 | vactive = <320>; | |
233 | hfront-porch = <6>; | |
234 | hback-porch = <7>; | |
235 | hsync-len = <1>; | |
236 | vback-porch = <5>; | |
237 | vfront-porch = <8>; | |
238 | vsync-len = <2>; | |
239 | hsync-active = <1>; | |
240 | vsync-active = <0>; | |
241 | de-active = <1>; | |
242 | pixelclk-active = <1>; | |
243 | interlaced; | |
244 | doublescan; | |
245 | doubleclk; | |
246 | }; | |
247 | timing1: 480x800 { | |
248 | clock-frequency = <9000000>; | |
249 | hactive = <480>; | |
250 | vactive = <800>; | |
251 | hfront-porch = <10>; | |
252 | hback-porch = <59>; | |
253 | hsync-len = <12>; | |
254 | vback-porch = <15>; | |
255 | vfront-porch = <17>; | |
256 | vsync-len = <16>; | |
257 | hsync-active = <0>; | |
258 | vsync-active = <1>; | |
259 | de-active = <0>; | |
260 | pixelclk-active = <0>; | |
261 | }; | |
262 | timing2: 800x480 { | |
263 | clock-frequency = <33500000>; | |
264 | hactive = <800>; | |
265 | vactive = <480>; | |
266 | hback-porch = <89>; | |
267 | hfront-porch = <164>; | |
268 | vback-porch = <23>; | |
269 | vfront-porch = <10>; | |
270 | hsync-len = <11>; | |
271 | vsync-len = <13>; | |
272 | }; | |
273 | }; | |
2e7d35d2 SG |
274 | }; |
275 | ||
276 | junk { | |
0503e820 | 277 | reg = <1 1>; |
2e7d35d2 SG |
278 | compatible = "not,compatible"; |
279 | }; | |
280 | ||
281 | no-compatible { | |
0503e820 | 282 | reg = <2 1>; |
2e7d35d2 SG |
283 | }; |
284 | ||
5d9a88f4 SG |
285 | backlight: backlight { |
286 | compatible = "pwm-backlight"; | |
287 | enable-gpios = <&gpio_a 1>; | |
288 | power-supply = <&ldo_1>; | |
289 | pwms = <&pwm 0 1000>; | |
290 | default-brightness-level = <5>; | |
291 | brightness-levels = <0 16 32 64 128 170 202 234 255>; | |
292 | }; | |
293 | ||
49c752c9 | 294 | bind-test { |
1f0d5885 | 295 | compatible = "simple-bus"; |
49c752c9 JJH |
296 | bind-test-child1 { |
297 | compatible = "sandbox,phy"; | |
298 | #phy-cells = <1>; | |
299 | }; | |
300 | ||
301 | bind-test-child2 { | |
302 | compatible = "simple-bus"; | |
303 | }; | |
304 | }; | |
305 | ||
2e7d35d2 | 306 | b-test { |
0503e820 | 307 | reg = <3 1>; |
2e7d35d2 | 308 | compatible = "denx,u-boot-fdt-test"; |
eb9ef5fe | 309 | ping-expect = <3>; |
2e7d35d2 | 310 | ping-add = <3>; |
739592cc JJH |
311 | |
312 | mux-controls = <&muxcontroller0 0>; | |
313 | mux-control-names = "mux0"; | |
2e7d35d2 SG |
314 | }; |
315 | ||
86322f59 JJH |
316 | phy_provider0: gen_phy@0 { |
317 | compatible = "sandbox,phy"; | |
318 | #phy-cells = <1>; | |
319 | }; | |
320 | ||
321 | phy_provider1: gen_phy@1 { | |
322 | compatible = "sandbox,phy"; | |
323 | #phy-cells = <0>; | |
324 | broken; | |
325 | }; | |
326 | ||
00c82acf CY |
327 | phy_provider2: gen_phy@2 { |
328 | compatible = "sandbox,phy"; | |
329 | #phy-cells = <0>; | |
330 | }; | |
331 | ||
86322f59 JJH |
332 | gen_phy_user: gen_phy_user { |
333 | compatible = "simple-bus"; | |
334 | phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>; | |
335 | phy-names = "phy1", "phy2", "phy3"; | |
336 | }; | |
337 | ||
00c82acf CY |
338 | gen_phy_user1: gen_phy_user1 { |
339 | compatible = "simple-bus"; | |
340 | phys = <&phy_provider0 0>, <&phy_provider2>; | |
341 | phy-names = "phy1", "phy2"; | |
342 | }; | |
343 | ||
2e7d35d2 SG |
344 | some-bus { |
345 | #address-cells = <1>; | |
346 | #size-cells = <0>; | |
1ca7e206 | 347 | compatible = "denx,u-boot-test-bus"; |
0503e820 | 348 | reg = <3 1>; |
eb9ef5fe | 349 | ping-expect = <4>; |
2e7d35d2 | 350 | ping-add = <4>; |
1ca7e206 | 351 | c-test@5 { |
2e7d35d2 SG |
352 | compatible = "denx,u-boot-fdt-test"; |
353 | reg = <5>; | |
1ca7e206 | 354 | ping-expect = <5>; |
2e7d35d2 SG |
355 | ping-add = <5>; |
356 | }; | |
1ca7e206 SG |
357 | c-test@0 { |
358 | compatible = "denx,u-boot-fdt-test"; | |
359 | reg = <0>; | |
360 | ping-expect = <6>; | |
361 | ping-add = <6>; | |
362 | }; | |
363 | c-test@1 { | |
364 | compatible = "denx,u-boot-fdt-test"; | |
365 | reg = <1>; | |
366 | ping-expect = <7>; | |
367 | ping-add = <7>; | |
368 | }; | |
2e7d35d2 SG |
369 | }; |
370 | ||
371 | d-test { | |
0503e820 | 372 | reg = <3 1>; |
5a66a8ff SG |
373 | ping-expect = <6>; |
374 | ping-add = <6>; | |
375 | compatible = "google,another-fdt-test"; | |
376 | }; | |
377 | ||
378 | e-test { | |
0503e820 | 379 | reg = <3 1>; |
eb9ef5fe | 380 | ping-expect = <6>; |
2e7d35d2 SG |
381 | ping-add = <6>; |
382 | compatible = "google,another-fdt-test"; | |
383 | }; | |
384 | ||
9cc36a2b SG |
385 | f-test { |
386 | compatible = "denx,u-boot-fdt-test"; | |
387 | }; | |
388 | ||
389 | g-test { | |
390 | compatible = "denx,u-boot-fdt-test"; | |
391 | }; | |
392 | ||
2786cd74 BM |
393 | h-test { |
394 | compatible = "denx,u-boot-fdt-test1"; | |
395 | }; | |
396 | ||
bf6ad916 CY |
397 | i-test { |
398 | compatible = "mediatek,u-boot-fdt-test"; | |
399 | #address-cells = <1>; | |
400 | #size-cells = <0>; | |
401 | ||
402 | subnode@0 { | |
403 | reg = <0>; | |
404 | }; | |
405 | ||
406 | subnode@1 { | |
407 | reg = <1>; | |
408 | }; | |
409 | ||
410 | subnode@2 { | |
411 | reg = <2>; | |
412 | }; | |
413 | }; | |
414 | ||
dc12ebbb SG |
415 | devres-test { |
416 | compatible = "denx,u-boot-devres-test"; | |
417 | }; | |
418 | ||
88e6a60e JJH |
419 | another-test { |
420 | reg = <0 2>; | |
421 | compatible = "denx,u-boot-fdt-test"; | |
422 | test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>; | |
423 | test5-gpios = <&gpio_a 19>; | |
424 | }; | |
425 | ||
283628c4 NSJ |
426 | mmio-bus@0 { |
427 | #address-cells = <1>; | |
428 | #size-cells = <1>; | |
429 | compatible = "denx,u-boot-test-bus"; | |
430 | dma-ranges = <0x10000000 0x00000000 0x00040000>; | |
431 | ||
432 | subnode@0 { | |
433 | compatible = "denx,u-boot-fdt-test"; | |
434 | }; | |
435 | }; | |
436 | ||
437 | mmio-bus@1 { | |
438 | #address-cells = <1>; | |
439 | #size-cells = <1>; | |
440 | compatible = "denx,u-boot-test-bus"; | |
e8801876 NSJ |
441 | |
442 | subnode@0 { | |
443 | compatible = "denx,u-boot-fdt-test"; | |
444 | }; | |
283628c4 NSJ |
445 | }; |
446 | ||
0f7b111f | 447 | acpi_test1: acpi-test { |
f50cc952 | 448 | compatible = "denx,u-boot-acpi-test"; |
b5183172 | 449 | acpi-ssdt-test-data = "ab"; |
01694589 | 450 | acpi-dsdt-test-data = "hi"; |
1361a53c SG |
451 | child { |
452 | compatible = "denx,u-boot-acpi-test"; | |
453 | }; | |
f50cc952 SG |
454 | }; |
455 | ||
0f7b111f | 456 | acpi_test2: acpi-test2 { |
93f7f827 | 457 | compatible = "denx,u-boot-acpi-test"; |
b5183172 | 458 | acpi-ssdt-test-data = "cd"; |
01694589 | 459 | acpi-dsdt-test-data = "jk"; |
93f7f827 SG |
460 | }; |
461 | ||
ee87a097 PC |
462 | clocks { |
463 | clk_fixed: clk-fixed { | |
464 | compatible = "fixed-clock"; | |
465 | #clock-cells = <0>; | |
466 | clock-frequency = <1234>; | |
467 | }; | |
b630d57d AP |
468 | |
469 | clk_fixed_factor: clk-fixed-factor { | |
470 | compatible = "fixed-factor-clock"; | |
471 | #clock-cells = <0>; | |
472 | clock-div = <3>; | |
473 | clock-mult = <2>; | |
474 | clocks = <&clk_fixed>; | |
475 | }; | |
4ab8e783 LM |
476 | |
477 | osc { | |
478 | compatible = "fixed-clock"; | |
479 | #clock-cells = <0>; | |
480 | clock-frequency = <20000000>; | |
481 | }; | |
135aa950 SW |
482 | }; |
483 | ||
484 | clk_sandbox: clk-sbox { | |
6a1c7cef | 485 | compatible = "sandbox,clk"; |
135aa950 | 486 | #clock-cells = <1>; |
9a52be12 JJH |
487 | assigned-clocks = <&clk_sandbox 3>; |
488 | assigned-clock-rates = <321>; | |
135aa950 SW |
489 | }; |
490 | ||
491 | clk-test { | |
492 | compatible = "sandbox,clk-test"; | |
493 | clocks = <&clk_fixed>, | |
494 | <&clk_sandbox 1>, | |
dd2e0ce2 JJH |
495 | <&clk_sandbox 0>, |
496 | <&clk_sandbox 3>, | |
497 | <&clk_sandbox 2>; | |
498 | clock-names = "fixed", "i2c", "spi", "uart2", "uart1"; | |
6a1c7cef SG |
499 | }; |
500 | ||
87e460c3 LM |
501 | ccf: clk-ccf { |
502 | compatible = "sandbox,clk-ccf"; | |
503 | }; | |
504 | ||
42b7f421 SG |
505 | efi-media { |
506 | compatible = "sandbox,efi-media"; | |
507 | }; | |
508 | ||
171e991d SG |
509 | eth@10002000 { |
510 | compatible = "sandbox,eth"; | |
511 | reg = <0x10002000 0x1000>; | |
c6fa51a4 | 512 | fake-host-hwaddr = [00 00 66 44 22 00]; |
171e991d SG |
513 | }; |
514 | ||
515 | eth_5: eth@10003000 { | |
516 | compatible = "sandbox,eth"; | |
517 | reg = <0x10003000 0x1000>; | |
c6fa51a4 | 518 | fake-host-hwaddr = [00 00 66 44 22 11]; |
171e991d SG |
519 | }; |
520 | ||
71d7971f BM |
521 | eth_3: sbe5 { |
522 | compatible = "sandbox,eth"; | |
523 | reg = <0x10005000 0x1000>; | |
c6fa51a4 | 524 | fake-host-hwaddr = [00 00 66 44 22 33]; |
71d7971f BM |
525 | }; |
526 | ||
171e991d SG |
527 | eth@10004000 { |
528 | compatible = "sandbox,eth"; | |
529 | reg = <0x10004000 0x1000>; | |
c6fa51a4 | 530 | fake-host-hwaddr = [00 00 66 44 22 22]; |
171e991d SG |
531 | }; |
532 | ||
ff98da06 CM |
533 | dsa_eth0: dsa-test-eth { |
534 | compatible = "sandbox,eth"; | |
535 | reg = <0x10006000 0x1000>; | |
536 | fake-host-hwaddr = [00 00 66 44 22 66]; | |
537 | }; | |
538 | ||
539 | dsa-test { | |
540 | compatible = "sandbox,dsa"; | |
541 | ||
542 | ports { | |
543 | #address-cells = <1>; | |
544 | #size-cells = <0>; | |
545 | swp_0: port@0 { | |
546 | reg = <0>; | |
547 | label = "lan0"; | |
548 | phy-mode = "rgmii-rxid"; | |
549 | ||
550 | fixed-link { | |
551 | speed = <100>; | |
552 | full-duplex; | |
553 | }; | |
554 | }; | |
555 | ||
556 | swp_1: port@1 { | |
557 | reg = <1>; | |
558 | label = "lan1"; | |
559 | phy-mode = "rgmii-txid"; | |
534c69b0 | 560 | fixed-link = <0 1 100 0 0>; |
ff98da06 CM |
561 | }; |
562 | ||
563 | port@2 { | |
564 | reg = <2>; | |
565 | ethernet = <&dsa_eth0>; | |
566 | ||
567 | fixed-link { | |
568 | speed = <1000>; | |
569 | full-duplex; | |
570 | }; | |
571 | }; | |
572 | }; | |
573 | }; | |
574 | ||
31b8217e RV |
575 | firmware { |
576 | sandbox_firmware: sandbox-firmware { | |
577 | compatible = "sandbox,firmware"; | |
578 | }; | |
358599ef | 579 | |
41d62e2f | 580 | scmi { |
358599ef EC |
581 | compatible = "sandbox,scmi-agent"; |
582 | #address-cells = <1>; | |
583 | #size-cells = <0>; | |
87d4f277 | 584 | |
41d62e2f EC |
585 | protocol@10 { |
586 | reg = <0x10>; | |
587 | }; | |
588 | ||
589 | clk_scmi: protocol@14 { | |
87d4f277 EC |
590 | reg = <0x14>; |
591 | #clock-cells = <1>; | |
592 | }; | |
c0dd177a | 593 | |
41d62e2f | 594 | reset_scmi: protocol@16 { |
c0dd177a EC |
595 | reg = <0x16>; |
596 | #reset-cells = <1>; | |
597 | }; | |
0124218b EC |
598 | |
599 | protocol@17 { | |
600 | reg = <0x17>; | |
601 | ||
602 | regulators { | |
603 | #address-cells = <1>; | |
604 | #size-cells = <0>; | |
605 | ||
41d62e2f | 606 | regul0_scmi: reg@0 { |
0124218b EC |
607 | reg = <0>; |
608 | regulator-name = "sandbox-voltd0"; | |
609 | regulator-min-microvolt = <1100000>; | |
610 | regulator-max-microvolt = <3300000>; | |
611 | }; | |
41d62e2f | 612 | regul1_scmi: reg@1 { |
0124218b EC |
613 | reg = <0x1>; |
614 | regulator-name = "sandbox-voltd1"; | |
615 | regulator-min-microvolt = <1800000>; | |
616 | }; | |
617 | }; | |
618 | }; | |
358599ef | 619 | }; |
31b8217e RV |
620 | }; |
621 | ||
e5301bac PD |
622 | pinctrl-gpio { |
623 | compatible = "sandbox,pinctrl-gpio"; | |
624 | ||
625 | gpio_a: base-gpios { | |
626 | compatible = "sandbox,gpio"; | |
627 | gpio-controller; | |
628 | #gpio-cells = <1>; | |
629 | gpio-bank-name = "a"; | |
630 | sandbox,gpio-count = <20>; | |
9ba84329 HS |
631 | hog_input_active_low { |
632 | gpio-hog; | |
633 | input; | |
037a56d6 | 634 | gpios = <10 GPIO_ACTIVE_LOW>; |
9ba84329 HS |
635 | }; |
636 | hog_input_active_high { | |
637 | gpio-hog; | |
638 | input; | |
037a56d6 | 639 | gpios = <11 GPIO_ACTIVE_HIGH>; |
9ba84329 HS |
640 | }; |
641 | hog_output_low { | |
642 | gpio-hog; | |
643 | output-low; | |
037a56d6 | 644 | gpios = <12 GPIO_ACTIVE_HIGH>; |
9ba84329 HS |
645 | }; |
646 | hog_output_high { | |
647 | gpio-hog; | |
648 | output-high; | |
037a56d6 | 649 | gpios = <13 GPIO_ACTIVE_HIGH>; |
9ba84329 | 650 | }; |
e5301bac | 651 | }; |
2e7d35d2 | 652 | |
e5301bac PD |
653 | gpio_b: extra-gpios { |
654 | compatible = "sandbox,gpio"; | |
655 | gpio-controller; | |
656 | #gpio-cells = <5>; | |
657 | gpio-bank-name = "b"; | |
658 | sandbox,gpio-count = <10>; | |
659 | }; | |
0ae0cb7b | 660 | |
e5301bac PD |
661 | gpio_c: pinmux-gpios { |
662 | compatible = "sandbox,gpio"; | |
663 | gpio-controller; | |
664 | #gpio-cells = <2>; | |
665 | gpio-bank-name = "c"; | |
666 | sandbox,gpio-count = <10>; | |
667 | }; | |
ff52665d PD |
668 | }; |
669 | ||
ecc2ed55 SG |
670 | i2c@0 { |
671 | #address-cells = <1>; | |
672 | #size-cells = <0>; | |
0503e820 | 673 | reg = <0 1>; |
ecc2ed55 SG |
674 | compatible = "sandbox,i2c"; |
675 | clock-frequency = <100000>; | |
5532262d DB |
676 | pinctrl-names = "default"; |
677 | pinctrl-0 = <&pinmux_i2c0_pins>; | |
678 | ||
ecc2ed55 SG |
679 | eeprom@2c { |
680 | reg = <0x2c>; | |
681 | compatible = "i2c-eeprom"; | |
031a650e | 682 | sandbox,emul = <&emul_eeprom>; |
f692b479 MS |
683 | partitions { |
684 | compatible = "fixed-partitions"; | |
685 | #address-cells = <1>; | |
686 | #size-cells = <1>; | |
687 | bootcount_i2c: bootcount@10 { | |
688 | reg = <10 2>; | |
689 | }; | |
690 | }; | |
ecc2ed55 | 691 | }; |
9038cd53 | 692 | |
52d3bc5d SG |
693 | rtc_0: rtc@43 { |
694 | reg = <0x43>; | |
695 | compatible = "sandbox-rtc"; | |
031a650e | 696 | sandbox,emul = <&emul0>; |
52d3bc5d SG |
697 | }; |
698 | ||
699 | rtc_1: rtc@61 { | |
700 | reg = <0x61>; | |
701 | compatible = "sandbox-rtc"; | |
031a650e SG |
702 | sandbox,emul = <&emul1>; |
703 | }; | |
704 | ||
705 | i2c_emul: emul { | |
706 | reg = <0xff>; | |
707 | compatible = "sandbox,i2c-emul-parent"; | |
708 | emul_eeprom: emul-eeprom { | |
709 | compatible = "sandbox,i2c-eeprom"; | |
710 | sandbox,filename = "i2c.bin"; | |
711 | sandbox,size = <256>; | |
712 | }; | |
713 | emul0: emul0 { | |
c4085d73 | 714 | compatible = "sandbox,i2c-rtc-emul"; |
031a650e SG |
715 | }; |
716 | emul1: emull { | |
c4085d73 | 717 | compatible = "sandbox,i2c-rtc-emul"; |
52d3bc5d SG |
718 | }; |
719 | }; | |
720 | ||
9038cd53 PM |
721 | sandbox_pmic: sandbox_pmic { |
722 | reg = <0x40>; | |
031a650e | 723 | sandbox,emul = <&emul_pmic0>; |
9038cd53 | 724 | }; |
686df498 LM |
725 | |
726 | mc34708: pmic@41 { | |
727 | reg = <0x41>; | |
031a650e | 728 | sandbox,emul = <&emul_pmic1>; |
686df498 | 729 | }; |
ecc2ed55 SG |
730 | }; |
731 | ||
6f2d59cb PT |
732 | bootcount@0 { |
733 | compatible = "u-boot,bootcount-rtc"; | |
734 | rtc = <&rtc_1>; | |
735 | offset = <0x13>; | |
736 | }; | |
737 | ||
f692b479 MS |
738 | bootcount { |
739 | compatible = "u-boot,bootcount-i2c-eeprom"; | |
740 | i2c-eeprom = <&bootcount_i2c>; | |
741 | }; | |
742 | ||
c50b21b7 NH |
743 | bootcount_4@0 { |
744 | compatible = "u-boot,bootcount-syscon"; | |
745 | syscon = <&syscon0>; | |
746 | reg = <0x0 0x04>, <0x0 0x04>; | |
747 | reg-names = "syscon_reg", "offset"; | |
748 | }; | |
749 | ||
750 | bootcount_2@0 { | |
751 | compatible = "u-boot,bootcount-syscon"; | |
752 | syscon = <&syscon0>; | |
753 | reg = <0x0 0x04>, <0x0 0x02> ; | |
754 | reg-names = "syscon_reg", "offset"; | |
755 | }; | |
756 | ||
289d0ead | 757 | adc: adc@0 { |
08d6300a | 758 | compatible = "sandbox,adc"; |
289d0ead | 759 | #io-channel-cells = <1>; |
08d6300a PM |
760 | vdd-supply = <&buck2>; |
761 | vss-microvolts = <0>; | |
762 | }; | |
763 | ||
fb574624 MK |
764 | iommu: iommu@0 { |
765 | compatible = "sandbox,iommu"; | |
766 | #iommu-cells = <0>; | |
767 | }; | |
768 | ||
02554355 | 769 | irq: irq { |
fbb0efdd | 770 | compatible = "sandbox,irq"; |
02554355 SG |
771 | interrupt-controller; |
772 | #interrupt-cells = <2>; | |
fbb0efdd SG |
773 | }; |
774 | ||
3c97c4fb SG |
775 | lcd { |
776 | u-boot,dm-pre-reloc; | |
777 | compatible = "sandbox,lcd-sdl"; | |
5532262d DB |
778 | pinctrl-names = "default"; |
779 | pinctrl-0 = <&pinmux_lcd_pins>; | |
3c97c4fb SG |
780 | xres = <1366>; |
781 | yres = <768>; | |
782 | }; | |
783 | ||
3c43fba3 SG |
784 | leds { |
785 | compatible = "gpio-leds"; | |
786 | ||
787 | iracibble { | |
788 | gpios = <&gpio_a 1 0>; | |
789 | label = "sandbox:red"; | |
790 | }; | |
791 | ||
792 | martinet { | |
793 | gpios = <&gpio_a 2 0>; | |
794 | label = "sandbox:green"; | |
795 | }; | |
274fb461 PB |
796 | |
797 | default_on { | |
798 | gpios = <&gpio_a 5 0>; | |
799 | label = "sandbox:default_on"; | |
800 | default-state = "on"; | |
801 | }; | |
802 | ||
803 | default_off { | |
804 | gpios = <&gpio_a 6 0>; | |
3e41c7b2 | 805 | /* label intentionally omitted */ |
274fb461 PB |
806 | default-state = "off"; |
807 | }; | |
3c43fba3 SG |
808 | }; |
809 | ||
a9346b93 RV |
810 | gpio-wdt { |
811 | gpios = <&gpio_a 7 0>; | |
812 | compatible = "linux,wdt-gpio"; | |
4171c574 | 813 | hw_margin_ms = <100>; |
a9346b93 RV |
814 | always-running; |
815 | }; | |
816 | ||
8961b524 SW |
817 | mbox: mbox { |
818 | compatible = "sandbox,mbox"; | |
819 | #mbox-cells = <1>; | |
820 | }; | |
821 | ||
822 | mbox-test { | |
823 | compatible = "sandbox,mbox-test"; | |
824 | mboxes = <&mbox 100>, <&mbox 1>; | |
825 | mbox-names = "other", "test"; | |
826 | }; | |
827 | ||
073e6d65 | 828 | cpus { |
8ae8da10 HS |
829 | #address-cells = <1>; |
830 | #size-cells = <0>; | |
7616e368 | 831 | timebase-frequency = <2000000>; |
8ae8da10 HS |
832 | cpu1: cpu@1 { |
833 | device_type = "cpu"; | |
834 | reg = <0x1>; | |
7616e368 | 835 | timebase-frequency = <3000000>; |
073e6d65 AT |
836 | compatible = "sandbox,cpu_sandbox"; |
837 | u-boot,dm-pre-reloc; | |
838 | }; | |
fa44b533 | 839 | |
8ae8da10 HS |
840 | cpu2: cpu@2 { |
841 | device_type = "cpu"; | |
842 | reg = <0x2>; | |
073e6d65 AT |
843 | compatible = "sandbox,cpu_sandbox"; |
844 | u-boot,dm-pre-reloc; | |
845 | }; | |
fa44b533 | 846 | |
8ae8da10 HS |
847 | cpu3: cpu@3 { |
848 | device_type = "cpu"; | |
849 | reg = <0x3>; | |
073e6d65 AT |
850 | compatible = "sandbox,cpu_sandbox"; |
851 | u-boot,dm-pre-reloc; | |
852 | }; | |
fa44b533 MS |
853 | }; |
854 | ||
21e3c219 DG |
855 | chipid: chipid { |
856 | compatible = "sandbox,soc"; | |
857 | }; | |
858 | ||
e96fa6c9 SG |
859 | i2s: i2s { |
860 | compatible = "sandbox,i2s"; | |
861 | #sound-dai-cells = <1>; | |
ecc7973d | 862 | sandbox,silent; /* Don't emit sounds while testing */ |
e96fa6c9 SG |
863 | }; |
864 | ||
07e33711 JJH |
865 | nop-test_0 { |
866 | compatible = "sandbox,nop_sandbox1"; | |
867 | nop-test_1 { | |
868 | compatible = "sandbox,nop_sandbox2"; | |
869 | bind = "True"; | |
870 | }; | |
871 | nop-test_2 { | |
872 | compatible = "sandbox,nop_sandbox2"; | |
873 | bind = "False"; | |
874 | }; | |
875 | }; | |
876 | ||
004e67c2 MS |
877 | misc-test { |
878 | compatible = "sandbox,misc_sandbox"; | |
879 | }; | |
880 | ||
e48eeb9e SG |
881 | mmc2 { |
882 | compatible = "sandbox,mmc"; | |
6b165ab2 | 883 | non-removable; |
e48eeb9e SG |
884 | }; |
885 | ||
886 | mmc1 { | |
887 | compatible = "sandbox,mmc"; | |
888 | }; | |
889 | ||
890 | mmc0 { | |
8e6cc461 SG |
891 | compatible = "sandbox,mmc"; |
892 | }; | |
893 | ||
b45c833c SG |
894 | pch { |
895 | compatible = "sandbox,pch"; | |
896 | }; | |
897 | ||
42c64d1b | 898 | pci0: pci@0 { |
d3b7ff14 SG |
899 | compatible = "sandbox,pci"; |
900 | device_type = "pci"; | |
42c64d1b | 901 | bus-range = <0x00 0xff>; |
d3b7ff14 SG |
902 | #address-cells = <3>; |
903 | #size-cells = <2>; | |
b0e2c23d | 904 | ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000 |
d3b7ff14 | 905 | 0x01000000 0 0x20000000 0x20000000 0 0x2000>; |
2db7f2b7 BM |
906 | pci@0,0 { |
907 | compatible = "pci-generic"; | |
908 | reg = <0x0000 0 0 0 0>; | |
9b69ba4a | 909 | sandbox,emul = <&swap_case_emul0_0>; |
2db7f2b7 | 910 | }; |
21ebbafd AM |
911 | pci@1,0 { |
912 | compatible = "pci-generic"; | |
33c215af SG |
913 | /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */ |
914 | reg = <0x02000814 0 0 0 0 | |
915 | 0x01000810 0 0 0 0>; | |
9b69ba4a | 916 | sandbox,emul = <&swap_case_emul0_1>; |
21ebbafd | 917 | }; |
3e17ffbb SG |
918 | p2sb-pci@2,0 { |
919 | compatible = "sandbox,p2sb"; | |
920 | reg = <0x02001010 0 0 0 0>; | |
921 | sandbox,emul = <&p2sb_emul>; | |
922 | ||
923 | adder { | |
924 | intel,p2sb-port-id = <3>; | |
925 | compatible = "sandbox,adder"; | |
926 | }; | |
927 | }; | |
3b65ee34 SG |
928 | pci@1e,0 { |
929 | compatible = "sandbox,pmc"; | |
930 | reg = <0xf000 0 0 0 0>; | |
931 | sandbox,emul = <&pmc_emul1e>; | |
932 | acpi-base = <0x400>; | |
933 | gpe0-dwx-mask = <0xf>; | |
934 | gpe0-dwx-shift-base = <4>; | |
935 | gpe0-dw = <6 7 9>; | |
936 | gpe0-sts = <0x20>; | |
937 | gpe0-en = <0x30>; | |
938 | }; | |
d3b7ff14 SG |
939 | pci@1f,0 { |
940 | compatible = "pci-generic"; | |
33c215af SG |
941 | /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */ |
942 | reg = <0x0100f810 0 0 0 0>; | |
9b69ba4a SG |
943 | sandbox,emul = <&swap_case_emul0_1f>; |
944 | }; | |
945 | }; | |
946 | ||
947 | pci-emul0 { | |
948 | compatible = "sandbox,pci-emul-parent"; | |
949 | swap_case_emul0_0: emul0@0,0 { | |
950 | compatible = "sandbox,swap-case"; | |
951 | }; | |
952 | swap_case_emul0_1: emul0@1,0 { | |
953 | compatible = "sandbox,swap-case"; | |
954 | use-ea; | |
955 | }; | |
956 | swap_case_emul0_1f: emul0@1f,0 { | |
957 | compatible = "sandbox,swap-case"; | |
d3b7ff14 | 958 | }; |
3e17ffbb SG |
959 | p2sb_emul: emul@2,0 { |
960 | compatible = "sandbox,p2sb-emul"; | |
961 | }; | |
3b65ee34 SG |
962 | pmc_emul1e: emul@1e,0 { |
963 | compatible = "sandbox,pmc-emul"; | |
964 | }; | |
d3b7ff14 SG |
965 | }; |
966 | ||
42c64d1b | 967 | pci1: pci@1 { |
dee4d752 BM |
968 | compatible = "sandbox,pci"; |
969 | device_type = "pci"; | |
42c64d1b | 970 | bus-range = <0x00 0xff>; |
dee4d752 BM |
971 | #address-cells = <3>; |
972 | #size-cells = <2>; | |
4cf56ec0 SG |
973 | ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0 |
974 | 0x02000000 0 0x31000000 0x31000000 0 0x2000 // MEM1 | |
975 | 0x01000000 0 0x40000000 0x40000000 0 0x2000>; | |
490d13a5 | 976 | sandbox,dev-info = <0x08 0x00 0x1234 0x5678 |
b59349a0 MV |
977 | 0x0c 0x00 0x1234 0x5678 |
978 | 0x10 0x00 0x1234 0x5678>; | |
979 | pci@10,0 { | |
980 | reg = <0x8000 0 0 0 0>; | |
981 | }; | |
dee4d752 BM |
982 | }; |
983 | ||
42c64d1b | 984 | pci2: pci@2 { |
3ed214ac BM |
985 | compatible = "sandbox,pci"; |
986 | device_type = "pci"; | |
42c64d1b | 987 | bus-range = <0x00 0xff>; |
3ed214ac BM |
988 | #address-cells = <3>; |
989 | #size-cells = <2>; | |
990 | ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000 | |
991 | 0x01000000 0 0x60000000 0x60000000 0 0x2000>; | |
992 | sandbox,dev-info = <0x08 0x00 0x1234 0x5678>; | |
993 | pci@1f,0 { | |
994 | compatible = "pci-generic"; | |
995 | reg = <0xf800 0 0 0 0>; | |
9b69ba4a SG |
996 | sandbox,emul = <&swap_case_emul2_1f>; |
997 | }; | |
998 | }; | |
999 | ||
1000 | pci-emul2 { | |
1001 | compatible = "sandbox,pci-emul-parent"; | |
1002 | swap_case_emul2_1f: emul2@1f,0 { | |
1003 | compatible = "sandbox,swap-case"; | |
3ed214ac BM |
1004 | }; |
1005 | }; | |
1006 | ||
bb413337 RF |
1007 | pci_ep: pci_ep { |
1008 | compatible = "sandbox,pci_ep"; | |
1009 | }; | |
1010 | ||
98561572 SG |
1011 | probing { |
1012 | compatible = "simple-bus"; | |
1013 | test1 { | |
1014 | compatible = "denx,u-boot-probe-test"; | |
1015 | }; | |
1016 | ||
1017 | test2 { | |
1018 | compatible = "denx,u-boot-probe-test"; | |
1019 | }; | |
1020 | ||
1021 | test3 { | |
1022 | compatible = "denx,u-boot-probe-test"; | |
1023 | }; | |
1024 | ||
1025 | test4 { | |
1026 | compatible = "denx,u-boot-probe-test"; | |
6c3af1f2 JJH |
1027 | first-syscon = <&syscon0>; |
1028 | second-sys-ctrl = <&another_system_controller>; | |
a442e61e | 1029 | third-syscon = <&syscon2>; |
98561572 SG |
1030 | }; |
1031 | }; | |
1032 | ||
61f5ddcb SW |
1033 | pwrdom: power-domain { |
1034 | compatible = "sandbox,power-domain"; | |
1035 | #power-domain-cells = <1>; | |
1036 | }; | |
1037 | ||
1038 | power-domain-test { | |
1039 | compatible = "sandbox,power-domain-test"; | |
1040 | power-domains = <&pwrdom 2>; | |
1041 | }; | |
1042 | ||
5d9a88f4 | 1043 | pwm: pwm { |
43b41566 | 1044 | compatible = "sandbox,pwm"; |
5d9a88f4 | 1045 | #pwm-cells = <2>; |
5532262d DB |
1046 | pinctrl-names = "default"; |
1047 | pinctrl-0 = <&pinmux_pwm_pins>; | |
43b41566 SG |
1048 | }; |
1049 | ||
1050 | pwm2 { | |
1051 | compatible = "sandbox,pwm"; | |
5d9a88f4 | 1052 | #pwm-cells = <2>; |
43b41566 SG |
1053 | }; |
1054 | ||
64ce0cad SG |
1055 | ram { |
1056 | compatible = "sandbox,ram"; | |
1057 | }; | |
1058 | ||
5010d98f SG |
1059 | reset@0 { |
1060 | compatible = "sandbox,warm-reset"; | |
1061 | }; | |
1062 | ||
1063 | reset@1 { | |
1064 | compatible = "sandbox,reset"; | |
1065 | }; | |
1066 | ||
4581b717 SW |
1067 | resetc: reset-ctl { |
1068 | compatible = "sandbox,reset-ctl"; | |
1069 | #reset-cells = <1>; | |
1070 | }; | |
1071 | ||
1072 | reset-ctl-test { | |
1073 | compatible = "sandbox,reset-ctl-test"; | |
bdfe6907 NA |
1074 | resets = <&resetc 100>, <&resetc 2>, <&resetc 20>, <&resetc 40>; |
1075 | reset-names = "other", "test", "test2", "test3"; | |
4581b717 SW |
1076 | }; |
1077 | ||
ff0dada9 SG |
1078 | rng { |
1079 | compatible = "sandbox,sandbox-rng"; | |
1080 | }; | |
1081 | ||
5215940f NM |
1082 | rproc_1: rproc@1 { |
1083 | compatible = "sandbox,test-processor"; | |
1084 | remoteproc-name = "remoteproc-test-dev1"; | |
1085 | }; | |
1086 | ||
1087 | rproc_2: rproc@2 { | |
1088 | compatible = "sandbox,test-processor"; | |
1089 | internal-memory-mapped; | |
1090 | remoteproc-name = "remoteproc-test-dev2"; | |
1091 | }; | |
1092 | ||
5d9a88f4 SG |
1093 | panel { |
1094 | compatible = "simple-panel"; | |
1095 | backlight = <&backlight 0 100>; | |
1096 | }; | |
1097 | ||
7fd7e2cf RF |
1098 | smem@0 { |
1099 | compatible = "sandbox,smem"; | |
1100 | }; | |
1101 | ||
d4901898 SG |
1102 | sound { |
1103 | compatible = "sandbox,sound"; | |
1104 | cpu { | |
1105 | sound-dai = <&i2s 0>; | |
1106 | }; | |
1107 | ||
1108 | codec { | |
1109 | sound-dai = <&audio 0>; | |
1110 | }; | |
1111 | }; | |
1112 | ||
0ae0cb7b SG |
1113 | spi@0 { |
1114 | #address-cells = <1>; | |
1115 | #size-cells = <0>; | |
0503e820 | 1116 | reg = <0 1>; |
0ae0cb7b | 1117 | compatible = "sandbox,spi"; |
1dc53ce7 | 1118 | cs-gpios = <0>, <0>, <&gpio_a 0>; |
5532262d DB |
1119 | pinctrl-names = "default"; |
1120 | pinctrl-0 = <&pinmux_spi0_pins>; | |
1121 | ||
0ae0cb7b SG |
1122 | spi.bin@0 { |
1123 | reg = <0>; | |
ffd4c7c2 | 1124 | compatible = "spansion,m25p16", "jedec,spi-nor"; |
0ae0cb7b SG |
1125 | spi-max-frequency = <40000000>; |
1126 | sandbox,filename = "spi.bin"; | |
1127 | }; | |
1dc53ce7 OP |
1128 | spi.bin@1 { |
1129 | reg = <1>; | |
1130 | compatible = "spansion,m25p16", "jedec,spi-nor"; | |
1131 | spi-max-frequency = <50000000>; | |
1132 | sandbox,filename = "spi.bin"; | |
1133 | spi-cpol; | |
1134 | spi-cpha; | |
1135 | }; | |
0ae0cb7b SG |
1136 | }; |
1137 | ||
6c3af1f2 | 1138 | syscon0: syscon@0 { |
04035fd3 | 1139 | compatible = "sandbox,syscon0"; |
82744c20 | 1140 | reg = <0x10 16>; |
04035fd3 SG |
1141 | }; |
1142 | ||
6c3af1f2 | 1143 | another_system_controller: syscon@1 { |
04035fd3 | 1144 | compatible = "sandbox,syscon1"; |
0503e820 SG |
1145 | reg = <0x20 5 |
1146 | 0x28 6 | |
1147 | 0x30 7 | |
1148 | 0x38 8>; | |
04035fd3 SG |
1149 | }; |
1150 | ||
a442e61e | 1151 | syscon2: syscon@2 { |
99552c34 MY |
1152 | compatible = "simple-mfd", "syscon"; |
1153 | reg = <0x40 5 | |
1154 | 0x48 6 | |
1155 | 0x50 7 | |
1156 | 0x58 8>; | |
1157 | }; | |
1158 | ||
739592cc JJH |
1159 | syscon3: syscon@3 { |
1160 | compatible = "simple-mfd", "syscon"; | |
1161 | reg = <0x000100 0x10>; | |
1162 | ||
1163 | muxcontroller0: a-mux-controller { | |
1164 | compatible = "mmio-mux"; | |
1165 | #mux-control-cells = <1>; | |
1166 | ||
1167 | mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */ | |
1168 | <0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */ | |
1169 | <0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */ | |
1170 | idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>; | |
1171 | u-boot,mux-autoprobe; | |
1172 | }; | |
1173 | }; | |
1174 | ||
1175 | muxcontroller1: emul-mux-controller { | |
1176 | compatible = "mux-emul"; | |
1177 | #mux-control-cells = <0>; | |
1178 | u-boot,mux-autoprobe; | |
1179 | idle-state = <0xabcd>; | |
1180 | }; | |
1181 | ||
93f44e8a SG |
1182 | testfdtm0 { |
1183 | compatible = "denx,u-boot-fdtm-test"; | |
1184 | }; | |
1185 | ||
1186 | testfdtm1: testfdtm1 { | |
1187 | compatible = "denx,u-boot-fdtm-test"; | |
1188 | }; | |
1189 | ||
1190 | testfdtm2 { | |
1191 | compatible = "denx,u-boot-fdtm-test"; | |
1192 | }; | |
1193 | ||
7616e368 | 1194 | timer@0 { |
e7cc8d11 TC |
1195 | compatible = "sandbox,timer"; |
1196 | clock-frequency = <1000000>; | |
1197 | }; | |
1198 | ||
7616e368 SA |
1199 | timer@1 { |
1200 | compatible = "sandbox,timer"; | |
1201 | sandbox,timebase-frequency-fallback; | |
1202 | }; | |
1203 | ||
b91ad16a MR |
1204 | tpm2 { |
1205 | compatible = "sandbox,tpm2"; | |
1206 | }; | |
1207 | ||
171e991d SG |
1208 | uart0: serial { |
1209 | compatible = "sandbox,serial"; | |
1210 | u-boot,dm-pre-reloc; | |
5532262d DB |
1211 | pinctrl-names = "default"; |
1212 | pinctrl-0 = <&pinmux_uart0_pins>; | |
bfacad7d JH |
1213 | }; |
1214 | ||
e00cb223 SG |
1215 | usb_0: usb@0 { |
1216 | compatible = "sandbox,usb"; | |
1217 | status = "disabled"; | |
1218 | hub { | |
1219 | compatible = "sandbox,usb-hub"; | |
1220 | #address-cells = <1>; | |
1221 | #size-cells = <0>; | |
1222 | flash-stick { | |
1223 | reg = <0>; | |
1224 | compatible = "sandbox,usb-flash"; | |
1225 | }; | |
1226 | }; | |
1227 | }; | |
1228 | ||
1229 | usb_1: usb@1 { | |
1230 | compatible = "sandbox,usb"; | |
fb574624 | 1231 | iommus = <&iommu>; |
e00cb223 SG |
1232 | hub { |
1233 | compatible = "usb-hub"; | |
1234 | usb,device-class = <9>; | |
c03b7612 MW |
1235 | #address-cells = <1>; |
1236 | #size-cells = <0>; | |
e00cb223 SG |
1237 | hub-emul { |
1238 | compatible = "sandbox,usb-hub"; | |
1239 | #address-cells = <1>; | |
1240 | #size-cells = <0>; | |
431cbd6d | 1241 | flash-stick@0 { |
e00cb223 SG |
1242 | reg = <0>; |
1243 | compatible = "sandbox,usb-flash"; | |
1244 | sandbox,filepath = "testflash.bin"; | |
1245 | }; | |
1246 | ||
431cbd6d SG |
1247 | flash-stick@1 { |
1248 | reg = <1>; | |
1249 | compatible = "sandbox,usb-flash"; | |
1250 | sandbox,filepath = "testflash1.bin"; | |
1251 | }; | |
1252 | ||
1253 | flash-stick@2 { | |
1254 | reg = <2>; | |
1255 | compatible = "sandbox,usb-flash"; | |
1256 | sandbox,filepath = "testflash2.bin"; | |
1257 | }; | |
1258 | ||
bff1a71e SG |
1259 | keyb@3 { |
1260 | reg = <3>; | |
1261 | compatible = "sandbox,usb-keyb"; | |
1262 | }; | |
1263 | ||
e00cb223 | 1264 | }; |
c03b7612 MW |
1265 | |
1266 | usbstor@1 { | |
1267 | reg = <1>; | |
1268 | }; | |
1269 | usbstor@3 { | |
1270 | reg = <3>; | |
1271 | }; | |
e00cb223 SG |
1272 | }; |
1273 | }; | |
1274 | ||
1275 | usb_2: usb@2 { | |
1276 | compatible = "sandbox,usb"; | |
1277 | status = "disabled"; | |
1278 | }; | |
1279 | ||
d33776e4 MK |
1280 | spmi: spmi@0 { |
1281 | compatible = "sandbox,spmi"; | |
1282 | #address-cells = <0x1>; | |
1283 | #size-cells = <0x1>; | |
a605b0f7 | 1284 | ranges; |
d33776e4 MK |
1285 | pm8916@0 { |
1286 | compatible = "qcom,spmi-pmic"; | |
1287 | reg = <0x0 0x1>; | |
1288 | #address-cells = <0x1>; | |
1289 | #size-cells = <0x1>; | |
a605b0f7 | 1290 | ranges; |
d33776e4 MK |
1291 | |
1292 | spmi_gpios: gpios@c000 { | |
1293 | compatible = "qcom,pm8916-gpio"; | |
1294 | reg = <0xc000 0x400>; | |
1295 | gpio-controller; | |
1296 | gpio-count = <4>; | |
1297 | #gpio-cells = <2>; | |
1298 | gpio-bank-name="spmi"; | |
1299 | }; | |
1300 | }; | |
1301 | }; | |
0753bc2d | 1302 | |
1303 | wdt0: wdt@0 { | |
1304 | compatible = "sandbox,wdt"; | |
4171c574 | 1305 | hw_margin_ms = <200>; |
0753bc2d | 1306 | }; |
f2006808 | 1307 | |
957983e0 MS |
1308 | axi: axi@0 { |
1309 | compatible = "sandbox,axi"; | |
1310 | #address-cells = <0x1>; | |
1311 | #size-cells = <0x1>; | |
1312 | store@0 { | |
1313 | compatible = "sandbox,sandbox_store"; | |
1314 | reg = <0x0 0x400>; | |
1315 | }; | |
1316 | }; | |
1317 | ||
f2006808 | 1318 | chosen { |
7e87816c SG |
1319 | #address-cells = <1>; |
1320 | #size-cells = <1>; | |
14ca9f7f SG |
1321 | setting = "sunrise ohoka"; |
1322 | other-node = "/some-bus/c-test@5"; | |
bd933bfd | 1323 | int-values = <0x1937 72993>; |
0f7b111f | 1324 | u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>; |
f2006808 RC |
1325 | chosen-test { |
1326 | compatible = "denx,u-boot-fdt-test"; | |
1327 | reg = <9 1>; | |
1328 | }; | |
1329 | }; | |
e8d52918 MS |
1330 | |
1331 | translation-test@8000 { | |
1332 | compatible = "simple-bus"; | |
1333 | reg = <0x8000 0x4000>; | |
1334 | ||
1335 | #address-cells = <0x2>; | |
1336 | #size-cells = <0x1>; | |
1337 | ||
1338 | ranges = <0 0x0 0x8000 0x1000 | |
1339 | 1 0x100 0x9000 0x1000 | |
1340 | 2 0x200 0xA000 0x1000 | |
1341 | 3 0x300 0xB000 0x1000 | |
1342 | >; | |
1343 | ||
641067fb FD |
1344 | dma-ranges = <0 0x000 0x10000000 0x1000 |
1345 | 1 0x100 0x20000000 0x1000 | |
1346 | >; | |
1347 | ||
e8d52918 MS |
1348 | dev@0,0 { |
1349 | compatible = "denx,u-boot-fdt-dummy"; | |
1350 | reg = <0 0x0 0x1000>; | |
79598820 | 1351 | reg-names = "sandbox-dummy-0"; |
e8d52918 MS |
1352 | }; |
1353 | ||
1354 | dev@1,100 { | |
1355 | compatible = "denx,u-boot-fdt-dummy"; | |
1356 | reg = <1 0x100 0x1000>; | |
1357 | ||
1358 | }; | |
1359 | ||
1360 | dev@2,200 { | |
1361 | compatible = "denx,u-boot-fdt-dummy"; | |
1362 | reg = <2 0x200 0x1000>; | |
1363 | }; | |
1364 | ||
1365 | ||
1366 | noxlatebus@3,300 { | |
1367 | compatible = "simple-bus"; | |
1368 | reg = <3 0x300 0x1000>; | |
1369 | ||
1370 | #address-cells = <0x1>; | |
1371 | #size-cells = <0x0>; | |
1372 | ||
1373 | dev@42 { | |
1374 | compatible = "denx,u-boot-fdt-dummy"; | |
1375 | reg = <0x42>; | |
1376 | }; | |
1377 | }; | |
1378 | }; | |
4eea5318 MS |
1379 | |
1380 | osd { | |
1381 | compatible = "sandbox,sandbox_osd"; | |
1382 | }; | |
d24c1d0f | 1383 | |
fa830ae1 JW |
1384 | sandbox_tee { |
1385 | compatible = "sandbox,tee"; | |
1386 | }; | |
4f89d494 BM |
1387 | |
1388 | sandbox_virtio1 { | |
1389 | compatible = "sandbox,virtio1"; | |
1390 | }; | |
1391 | ||
1392 | sandbox_virtio2 { | |
1393 | compatible = "sandbox,virtio2"; | |
1394 | }; | |
f41a824b | 1395 | |
87d4f277 EC |
1396 | sandbox_scmi { |
1397 | compatible = "sandbox,scmi-devices"; | |
10d3e5d2 | 1398 | clocks = <&clk_scmi 2>, <&clk_scmi 0>; |
41d62e2f EC |
1399 | resets = <&reset_scmi 3>; |
1400 | regul0-supply = <®ul0_scmi>; | |
1401 | regul1-supply = <®ul1_scmi>; | |
87d4f277 EC |
1402 | }; |
1403 | ||
f41a824b PC |
1404 | pinctrl { |
1405 | compatible = "sandbox,pinctrl"; | |
d15c05b5 | 1406 | |
7f0f1806 SA |
1407 | pinctrl-names = "default", "alternate"; |
1408 | pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>; | |
1409 | pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>; | |
d15c05b5 | 1410 | |
7f0f1806 | 1411 | pinctrl_gpios: gpios { |
d15c05b5 | 1412 | gpio0 { |
7f0f1806 SA |
1413 | pins = "P5"; |
1414 | function = "GPIO"; | |
d15c05b5 PD |
1415 | bias-pull-up; |
1416 | input-disable; | |
1417 | }; | |
1418 | gpio1 { | |
7f0f1806 SA |
1419 | pins = "P6"; |
1420 | function = "GPIO"; | |
d15c05b5 PD |
1421 | output-high; |
1422 | drive-open-drain; | |
1423 | }; | |
1424 | gpio2 { | |
7f0f1806 | 1425 | pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>; |
d15c05b5 PD |
1426 | bias-pull-down; |
1427 | input-enable; | |
1428 | }; | |
1429 | gpio3 { | |
7f0f1806 | 1430 | pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>; |
d15c05b5 PD |
1431 | bias-disable; |
1432 | }; | |
1433 | }; | |
7f0f1806 SA |
1434 | |
1435 | pinctrl_i2c: i2c { | |
1436 | groups { | |
1437 | groups = "I2C_UART"; | |
1438 | function = "I2C"; | |
1439 | }; | |
1440 | ||
1441 | pins { | |
1442 | pins = "P0", "P1"; | |
1443 | drive-open-drain; | |
1444 | }; | |
1445 | }; | |
1446 | ||
1447 | pinctrl_i2s: i2s { | |
1448 | groups = "SPI_I2S"; | |
1449 | function = "I2S"; | |
1450 | }; | |
1451 | ||
1452 | pinctrl_spi: spi { | |
1453 | groups = "SPI_I2S"; | |
1454 | function = "SPI"; | |
1455 | ||
1456 | cs { | |
1457 | pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>, | |
1458 | <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>; | |
1459 | }; | |
1460 | }; | |
f41a824b | 1461 | }; |
7f84fc67 | 1462 | |
5532262d DB |
1463 | pinctrl-single-no-width { |
1464 | compatible = "pinctrl-single"; | |
1465 | reg = <0x0000 0x238>; | |
1466 | #pinctrl-cells = <1>; | |
1467 | pinctrl-single,function-mask = <0x7f>; | |
1468 | }; | |
1469 | ||
1470 | pinctrl-single-pins { | |
1471 | compatible = "pinctrl-single"; | |
1472 | reg = <0x0000 0x238>; | |
1473 | #pinctrl-cells = <1>; | |
1474 | pinctrl-single,register-width = <32>; | |
1475 | pinctrl-single,function-mask = <0x7f>; | |
1476 | ||
1477 | pinmux_pwm_pins: pinmux_pwm_pins { | |
1478 | pinctrl-single,pins = < 0x48 0x06 >; | |
1479 | }; | |
1480 | ||
1481 | pinmux_spi0_pins: pinmux_spi0_pins { | |
1482 | pinctrl-single,pins = < | |
1483 | 0x190 0x0c | |
1484 | 0x194 0x0c | |
1485 | 0x198 0x23 | |
1486 | 0x19c 0x0c | |
1487 | >; | |
1488 | }; | |
1489 | ||
1490 | pinmux_uart0_pins: pinmux_uart0_pins { | |
1491 | pinctrl-single,pins = < | |
1492 | 0x70 0x30 | |
1493 | 0x74 0x00 | |
1494 | >; | |
1495 | }; | |
1496 | }; | |
1497 | ||
1498 | pinctrl-single-bits { | |
1499 | compatible = "pinctrl-single"; | |
1500 | reg = <0x0000 0x50>; | |
1501 | #pinctrl-cells = <2>; | |
1502 | pinctrl-single,bit-per-mux; | |
1503 | pinctrl-single,register-width = <32>; | |
1504 | pinctrl-single,function-mask = <0xf>; | |
1505 | ||
1506 | pinmux_i2c0_pins: pinmux_i2c0_pins { | |
1507 | pinctrl-single,bits = < | |
1508 | 0x10 0x00002200 0x0000ff00 | |
1509 | >; | |
1510 | }; | |
1511 | ||
1512 | pinmux_lcd_pins: pinmux_lcd_pins { | |
1513 | pinctrl-single,bits = < | |
1514 | 0x40 0x22222200 0xffffff00 | |
1515 | 0x44 0x22222222 0xffffffff | |
1516 | 0x48 0x00000022 0x000000ff | |
1517 | 0x48 0x02000000 0x0f000000 | |
1518 | 0x4c 0x02000022 0x0f0000ff | |
1519 | >; | |
1520 | }; | |
1521 | }; | |
1522 | ||
7f84fc67 BG |
1523 | hwspinlock@0 { |
1524 | compatible = "sandbox,hwspinlock"; | |
1525 | }; | |
b3309918 GS |
1526 | |
1527 | dma: dma { | |
1528 | compatible = "sandbox,dma"; | |
1529 | #dma-cells = <1>; | |
1530 | ||
1531 | dmas = <&dma 0>, <&dma 1>, <&dma 2>; | |
1532 | dma-names = "m2m", "tx0", "rx0"; | |
1533 | }; | |
ec9594a5 | 1534 | |
c3d9f3f8 AM |
1535 | /* |
1536 | * keep mdio-mux ahead of mdio so that the mux is removed first at the | |
1537 | * end of the test. If parent mdio is removed first, clean-up of the | |
1538 | * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio | |
1539 | * active at the end of the test. That it turn doesn't allow the mdio | |
1540 | * class to be destroyed, triggering an error. | |
1541 | */ | |
1542 | mdio-mux-test { | |
1543 | compatible = "sandbox,mdio-mux"; | |
1544 | #address-cells = <1>; | |
1545 | #size-cells = <0>; | |
1546 | mdio-parent-bus = <&mdio>; | |
1547 | ||
1548 | mdio-ch-test@0 { | |
1549 | reg = <0>; | |
1550 | }; | |
1551 | mdio-ch-test@1 { | |
1552 | reg = <1>; | |
1553 | }; | |
1554 | }; | |
1555 | ||
1556 | mdio: mdio-test { | |
ec9594a5 AM |
1557 | compatible = "sandbox,mdio"; |
1558 | }; | |
4a3390f1 SA |
1559 | |
1560 | pm-bus-test { | |
1561 | compatible = "simple-pm-bus"; | |
1562 | clocks = <&clk_sandbox 4>; | |
1563 | power-domains = <&pwrdom 1>; | |
1564 | }; | |
038b13ee SA |
1565 | |
1566 | resetc2: syscon-reset { | |
1567 | compatible = "syscon-reset"; | |
1568 | #reset-cells = <1>; | |
1569 | regmap = <&syscon0>; | |
1570 | offset = <1>; | |
1571 | mask = <0x27FFFFFF>; | |
1572 | assert-high = <0>; | |
1573 | }; | |
1574 | ||
1575 | syscon-reset-test { | |
1576 | compatible = "sandbox,misc_sandbox"; | |
1577 | resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>; | |
1578 | reset-names = "valid", "no_mask", "out_of_range"; | |
1579 | }; | |
0ced26a4 | 1580 | |
3a8ee3df SG |
1581 | sysinfo { |
1582 | compatible = "sandbox,sysinfo-sandbox"; | |
1583 | }; | |
1584 | ||
1cbfed8d SA |
1585 | sysinfo-gpio { |
1586 | compatible = "gpio-sysinfo"; | |
1587 | gpios = <&gpio_a 15>, <&gpio_a 16>, <&gpio_a 17>; | |
1588 | revisions = <19>, <5>; | |
1589 | names = "rev_a", "foo"; | |
1590 | }; | |
1591 | ||
0ced26a4 JJH |
1592 | some_regmapped-bus { |
1593 | #address-cells = <0x1>; | |
1594 | #size-cells = <0x1>; | |
1595 | ||
1596 | ranges = <0x0 0x0 0x10>; | |
1597 | compatible = "simple-bus"; | |
1598 | ||
1599 | regmap-test_0 { | |
1600 | reg = <0 0x10>; | |
1601 | compatible = "sandbox,regmap_test"; | |
1602 | }; | |
1603 | }; | |
2e7d35d2 | 1604 | }; |
9038cd53 PM |
1605 | |
1606 | #include "sandbox_pmic.dtsi" | |
4a2a78ca | 1607 | #include "cros-ec-keyboard.dtsi" |