[u-boot.git] / include / configs / trab.h

/*
 * (C) Copyright 2002-2003
 * Gary Jennejohn <[email protected]>
 *
 * Configuation settings for the TRAB board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#ifdef CONFIG_OLD_VERSION		/* Old configuration:		*/
#define	CONFIG_RAM_16MB			/*	16 MB SDRAM		*/
#endif
#define CONFIG_FLASH_8MB		/*	 8 MB Flash		*/

/*
 * If we are developing, we might want to start armboot from ram
 * so we MUST NOT initialize critical regs like mem-timing ...
 */
#define CONFIG_INIT_CRITICAL		/* undef for developing */

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM920T		1	/* This is an arm920t CPU	*/
#define CONFIG_S3C2400		1	/* in a SAMSUNG S3C2400 SoC	*/
#define CONFIG_TRAB		1	/* on a TRAB Board		*/
#undef CONFIG_TRAB_50MHZ		/* run the CPU at 50 MHz	*/
#define LITTLEENDIAN		1	/* used by usb_ohci.c		*/

/* automatic software updates (see board/trab/auto_update.c) */
#define CONFIG_AUTO_UPDATE	1

/* input clock of PLL */
#define CONFIG_SYS_CLK_FREQ	12000000 /* TRAB has 12 MHz input clock */

#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */

#define CONFIG_CMDLINE_TAG	 1	/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG	 1

#define CFG_DEVICE_NULLDEV	 1	/* enble null device		*/
#define CONFIG_SILENT_CONSOLE	 1	/* enable silent startup	*/

#define CONFIG_VERSION_VARIABLE	1       /* include version env variable */

/***********************************************************
 * I2C stuff:
 * the TRAB is equipped with an ATMEL 24C04 EEPROM at
 * address 0x54 with 8bit addressing
 ***********************************************************/
#define CONFIG_HARD_I2C			/* I2C with hardware support */
#define CFG_I2C_SPEED 		100000	/* I2C speed */
#define CFG_I2C_SLAVE 		0x7F	/* I2C slave addr */

#define CFG_I2C_EEPROM_ADDR	0x54	/* EEPROM address */
#define CFG_I2C_EEPROM_ADDR_LEN	1	/* 1 address byte */

#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
#define CFG_EEPROM_PAGE_WRITE_BITS 3	/* 8 bytes page write mode on 24C04 */
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10

/* USB stuff */
#define CONFIG_USB_OHCI		1
#define CONFIG_USB_STORAGE	1
#define CONFIG_DOS_PARTITION	1

/*
 * Size of malloc() pool
 */
#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */

/*
 * Hardware drivers
 */
#define CONFIG_DRIVER_CS8900	1	/* we have a CS8900 on-board */
#define CS8900_BASE		0x07000300 /* agrees with WIN CE PA */
#define CS8900_BUS16		1 /* the Linux driver does accesses as shorts */

#define CONFIG_DRIVER_S3C24X0_I2C 1	/* we use the buildin I2C controller */

#define CONFIG_VFD		1	/* VFD linear frame buffer driver */
#define VFD_TEST_LOGO		1	/* output a test logo to the VFDs */

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1		1	/* we use SERIAL 1 on TRAB */

#define CONFIG_HWFLOW			/* include RTS/CTS flow control support	*/

#define CONFIG_MODEM_SUPPORT	1	/* enable modem initialization stuff */

#define	CONFIG_MODEM_KEY_MAGIC	"23"	/* hold down these keys to enable modem */

/*
 * The following enables modem debugging stuff. The dbg() and
 * 'char screen[1024]' are used for debug printfs. Unfortunately,
 * it is usable only from BDI
 */
#undef CONFIG_MODEM_SUPPORT_DEBUG

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_BAUDRATE		115200

#define	CONFIG_TIMESTAMP	1	/* Print timestamp info for images */

/* Use s3c2400's RTC */
#define CONFIG_RTC_S3C24X0	1

#ifdef CONFIG_HWFLOW
#define CONFIG_COMMANDS_ADD_HWFLOW	CFG_CMD_HWFLOW
#else
#define	CONFIG_COMMANDS_ADD_HWFLOW	0
#endif

#ifdef	CONFIG_VFD
#define CONFIG_COMMANDS_ADD_VFD		CFG_CMD_VFD
#else
#define CONFIG_COMMANDS_ADD_VFD		0
#endif

#ifdef CONFIG_DRIVER_S3C24X0_I2C
#define CONFIG_COMMANDS_ADD_EEPROM	CFG_CMD_EEPROM
#define CONFIG_COMMANDS_I2C		CFG_CMD_I2C
#else
#define CONFIG_COMMANDS_ADD_EEPROM	0
#define CONFIG_COMMANDS_I2C		0
#endif

#ifndef USE_920T_MMU
#define CONFIG_COMMANDS		((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) | \
				 CFG_CMD_BSP			| \
				 CFG_CMD_DATE			| \
				 CONFIG_COMMANDS_ADD_HWFLOW	| \
				 CONFIG_COMMANDS_ADD_VFD	| \
				 CONFIG_COMMANDS_ADD_EEPROM	| \
				 CFG_CMD_USB			| \
				 CFG_CMD_FAT			| \
				 CONFIG_COMMANDS_I2C		)
#else
#define CONFIG_COMMANDS		(CONFIG_CMD_DFL			| \
				 CFG_CMD_BSP			| \
				 CFG_CMD_DATE			| \
				 CONFIG_COMMANDS_ADD_HWFLOW	| \
				 CONFIG_COMMANDS_ADD_VFD	| \
				 CONFIG_COMMANDS_ADD_EEPROM	| \
				 CFG_CMD_USB			| \
				 CFG_CMD_FAT			| \
				 CONFIG_COMMANDS_I2C		)
#endif

/* moved up */
#define CFG_HUSH_PARSER		1	/* use "hush" command parser	*/

/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>

#define CONFIG_BOOTDELAY	5
#define CONFIG_ZERO_BOOTDELAY_CHECK	/* allow to break in always */
#define CONFIG_PREBOOT		"echo;echo *** booting ***;echo"
#define CONFIG_BOOTARGS		"console=ttyS0"
#define CONFIG_NETMASK		255.255.0.0
#define CONFIG_IPADDR		192.168.3.68
#define CONFIG_HOSTNAME		trab
#define CONFIG_SERVERIP		192.168.3.1
#define CONFIG_BOOTCOMMAND	"burn_in"

#ifndef CONFIG_FLASH_8MB	/* current config: 16 MB flash */
#ifdef CFG_HUSH_PARSER
#define	CONFIG_EXTRA_ENV_SETTINGS	\
	"nfs_args=setenv bootargs root=/dev/nfs rw " \
		"nfsroot=$serverip:$rootpath\0" \
	"rootpath=/opt/eldk/arm_920TDI\0" \
	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	"add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
	"add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
	"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
	"load=tftp C100000 ${u-boot}\0" \
	"update=protect off 0 5FFFF;era 0 5FFFF;" \
		"cp.b C100000 0 $filesize\0" \
	"loadfile=/tftpboot/TRAB/uImage\0" \
	"loadaddr=c400000\0" \
	"net_load=tftpboot $loadaddr $loadfile\0" \
	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
	"kernel_addr=00060000\0" \
	"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
	"mdm_init1=ATZ\0" \
	"mdm_init2=ATS0=1\0" \
	"mdm_flow_control=rts/cts\0"
#else /* !CFG_HUSH_PARSER */
#define	CONFIG_EXTRA_ENV_SETTINGS	\
	"nfs_args=setenv bootargs root=/dev/nfs rw " \
		"nfsroot=$(serverip):$(rootpath)\0" \
	"rootpath=/opt/eldk/arm_920TDI\0" \
	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	"add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
	"add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
	"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
	"load=tftp C100000 $(u-boot)\0" \
	"update=protect off 0 5FFFF;era 0 5FFFF;" \
		"cp.b C100000 0 $(filesize)\0" \
	"loadfile=/tftpboot/TRAB/uImage\0" \
	"loadaddr=c400000\0" \
	"net_load=tftpboot $(loadaddr) $(loadfile)\0" \
	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
	"kernel_addr=000C0000\0" \
	"flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
	"mdm_init1=ATZ\0" \
	"mdm_init2=ATS0=1\0" \
	"mdm_flow_control=rts/cts\0"
#endif	/* CFG_HUSH_PARSER */
#else	/* CONFIG_FLASH_8MB 	 => 8 MB flash */
#ifdef CFG_HUSH_PARSER
#define	CONFIG_EXTRA_ENV_SETTINGS	\
	"nfs_args=setenv bootargs root=/dev/nfs rw " \
		"nfsroot=$serverip:$rootpath\0" \
	"rootpath=/opt/eldk/arm_920TDI\0" \
	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	"add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
	"add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
	"u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
	"load=tftp C100000 ${u-boot}\0" \
	"update=protect off 0 3FFFF;era 0 3FFFF;" \
		"cp.b C100000 0 $filesize;" \
		"setenv filesize;saveenv\0" \
	"loadfile=/tftpboot/TRAB/uImage\0" \
	"loadaddr=C400000\0" \
	"net_load=tftpboot $loadaddr $loadfile\0" \
	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
	"kernel_addr=000C0000\0" \
	"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
	"mdm_init1=ATZ\0" \
	"mdm_init2=ATS0=1\0" \
	"mdm_flow_control=rts/cts\0"
#else /* !CFG_HUSH_PARSER */
#define	CONFIG_EXTRA_ENV_SETTINGS	\
	"nfs_args=setenv bootargs root=/dev/nfs rw " \
		"nfsroot=$(serverip):$(rootpath)\0" \
	"rootpath=/opt/eldk/arm_920TDI\0" \
	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	"add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
	"add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
	"u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
	"load=tftp C100000 $(u-boot)\0" \
	"update=protect off 0 3FFFF;era 0 3FFFF;" \
		"cp.b C100000 0 $(filesize);" \
		"setenv filesize;saveenv\0" \
	"loadfile=/tftpboot/TRAB/uImage\0" \
	"loadaddr=C400000\0" \
	"net_load=tftpboot $(loadaddr) $(loadfile)\0" \
	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
	"kernel_addr=000C0000\0" \
	"flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
	"mdm_init1=ATZ\0" \
	"mdm_init2=ATS0=1\0" \
	"mdm_flow_control=rts/cts\0"
#endif /* CFG_HUSH_PARSER */
#endif	/* CONFIG_FLASH_8MB */

#if 0	/* disabled for development */
#define	CONFIG_AUTOBOOT_KEYED		/* Enable password protection	*/
#define CONFIG_AUTOBOOT_PROMPT	"\nEnter password - autoboot in %d sec...\n"
#define CONFIG_AUTOBOOT_DELAY_STR	"system"	/* 1st password	*/
#endif

#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	115200		/* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX	1		/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define	CFG_LONGHELP				/* undef to save memory		*/
#define	CFG_PROMPT		"TRAB # "	/* Monitor Command Prompt	*/
#ifdef	CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2	"> "
#endif

#define	CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define	CFG_MAXARGS		16		/* max number of command args	*/
#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_MEMTEST_START	0x0C000000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x0D000000	/* 16 MB in DRAM	*/

#undef CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */

#define	CFG_LOAD_ADDR		0x0CF00000	/* default load address	*/

#ifdef CONFIG_TRAB_50MHZ
/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
/* it to wrap 100 times (total 1562500) to get 1 sec. */
/* this should _really_ be calculated !! */
#define	CFG_HZ			1562500
#else
/* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
/* it to wrap 100 times (total 1039000) to get 1 sec. */
/* this should _really_ be calculated !! */
#define	CFG_HZ			1039000
#endif

/* valid baudrates */
#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

#define CONFIG_MISC_INIT_R		/* have misc_init_r() function	*/

/*-----------------------------------------------------------------------
 * burn-in test stuff.
 *
 * BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
 * Because the burn-in test itself causes also an delay of about 4 seconds,
 * this time must be subtracted from the desired overall burn-in cycle time.
 */
#define BURN_IN_CYCLE_DELAY	296	/* seconds between burn-in cycles */

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x0C000000	/* SDRAM Bank #1 */
#ifndef CONFIG_RAM_16MB
#define PHYS_SDRAM_1_SIZE	0x02000000	/* 32 MB */
#else
#define PHYS_SDRAM_1_SIZE	0x01000000	/* 16 MB */
#endif

#define CFG_FLASH_BASE		0x00000000	/* Flash Bank #1 */

/* The following #defines are needed to get flash environment right */
#define	CFG_MONITOR_BASE	CFG_FLASH_BASE
#define	CFG_MONITOR_LEN		(256 << 10)

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
#ifndef CONFIG_FLASH_8MB
#define CFG_MAX_FLASH_SECT	128	/* max number of sectors on one chip */
#else
#define CFG_MAX_FLASH_SECT	71	/* max number of sectors on one chip */
#endif

/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT	(2*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT	(2*CFG_HZ) /* Timeout for Flash Write */

#define	CFG_ENV_IS_IN_FLASH	1

/* Address and size of Primary Environment Sector	*/
#ifndef CONFIG_FLASH_8MB
#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x60000)
#define CFG_ENV_SIZE		0x4000
#define CFG_ENV_SECT_SIZE	0x20000
#else
#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x4000)
#define CFG_ENV_SIZE		0x4000
#define CFG_ENV_SECT_SIZE	0x4000
#endif

/* Address and size of Redundant Environment Sector	*/
#define CFG_ENV_OFFSET_REDUND	(CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND	(CFG_ENV_SIZE)

/* Initial value of the on-board touch screen brightness */
#define CFG_BRIGHTNESS 0x20

#endif	/* __CONFIG_H */
Commit	Line	Data
c609719b	1	/*
149dded2	2	* (C) Copyright 2002-2003
c609719b WD	3	* Gary Jennejohn <[email protected]>
	4	*
	5	* Configuation settings for the TRAB board.
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
b0639ca3 WD	29	#ifdef CONFIG_OLD_VERSION /* Old configuration: */
b0639ca3 WD	30	#define CONFIG_RAM_16MB /* 16 MB SDRAM */
b0639ca3	31	#endif
8a42eac7	32	#define CONFIG_FLASH_8MB /* 8 MB Flash */
b0639ca3	33
c609719b WD	34	/*
	35	* If we are developing, we might want to start armboot from ram
	36	* so we MUST NOT initialize critical regs like mem-timing ...
	37	*/
	38	#define CONFIG_INIT_CRITICAL /* undef for developing */
	39
	40	/*
	41	* High Level Configuration Options
	42	* (easy to change)
	43	*/
	44	#define CONFIG_ARM920T 1 /* This is an arm920t CPU */
6dff5529 WD	45	#define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
	46	#define CONFIG_TRAB 1 /* on a TRAB Board */
	47	#undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
149dded2	48	#define LITTLEENDIAN 1 /* used by usb_ohci.c */
c609719b	49
f54ebdfa WD	50	/* automatic software updates (see board/trab/auto_update.c) */
	51	#define CONFIG_AUTO_UPDATE 1
	52
c609719b	53	/* input clock of PLL */
7f6c2cbc	54	#define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
c609719b WD	55
	56	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	57
	58	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	59	#define CONFIG_SETUP_MEMORY_TAGS 1
	60	#define CONFIG_INITRD_TAG 1
	61
f72da340 WD	62	#define CFG_DEVICE_NULLDEV 1 /* enble null device */
f72da340 WD	63	#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
6dff5529	64
a0f2fe52 WD	65	#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
a0f2fe52 WD	66
6dff5529 WD	67	/***********************************************************
	68	* I2C stuff:
	69	* the TRAB is equipped with an ATMEL 24C04 EEPROM at
	70	* address 0x54 with 8bit addressing
	71	***********************************************************/
	72	#define CONFIG_HARD_I2C /* I2C with hardware support */
	73	#define CFG_I2C_SPEED 100000 /* I2C speed */
	74	#define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
	75
	76	#define CFG_I2C_EEPROM_ADDR 0x54 /* EEPROM address */
	77	#define CFG_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */
	78
	79	#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
	80	#define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */
	81	#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
	82
149dded2 WD	83	/* USB stuff */
	84	#define CONFIG_USB_OHCI 1
	85	#define CONFIG_USB_STORAGE 1
	86	#define CONFIG_DOS_PARTITION 1
	87
c609719b WD	88	/*
	89	* Size of malloc() pool
	90	*/
699b13a6	91	#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
a8c7c708	92	#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
c609719b WD	93
	94	/*
	95	* Hardware drivers
	96	*/
	97	#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
	98	#define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
	99	#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
	100
6dff5529 WD	101	#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
6dff5529 WD	102
c609719b WD	103	#define CONFIG_VFD 1 /* VFD linear frame buffer driver */
	104	#define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */
	105
	106	/*
	107	* select serial console configuration
	108	*/
6dff5529	109	#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
c609719b WD	110
	111	#define CONFIG_HWFLOW /* include RTS/CTS flow control support */
	112
	113	#define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
	114
	115	#define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */
	116
	117	/*
	118	* The following enables modem debugging stuff. The dbg() and
	119	* 'char screen[1024]' are used for debug printfs. Unfortunately,
	120	* it is usable only from BDI
	121	*/
	122	#undef CONFIG_MODEM_SUPPORT_DEBUG
	123
	124	/* allow to overwrite serial and ethaddr */
	125	#define CONFIG_ENV_OVERWRITE
	126
	127	#define CONFIG_BAUDRATE 115200
	128
	129	#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
	130
48b42616 WD	131	/* Use s3c2400's RTC */
	132	#define CONFIG_RTC_S3C24X0 1
	133
c609719b WD	134	#ifdef CONFIG_HWFLOW
	135	#define CONFIG_COMMANDS_ADD_HWFLOW CFG_CMD_HWFLOW
	136	#else
	137	#define CONFIG_COMMANDS_ADD_HWFLOW 0
	138	#endif
	139
	140	#ifdef CONFIG_VFD
	141	#define CONFIG_COMMANDS_ADD_VFD CFG_CMD_VFD
	142	#else
	143	#define CONFIG_COMMANDS_ADD_VFD 0
	144	#endif
	145
6dff5529 WD	146	#ifdef CONFIG_DRIVER_S3C24X0_I2C
	147	#define CONFIG_COMMANDS_ADD_EEPROM CFG_CMD_EEPROM
	148	#define CONFIG_COMMANDS_I2C CFG_CMD_I2C
	149	#else
	150	#define CONFIG_COMMANDS_ADD_EEPROM 0
	151	#define CONFIG_COMMANDS_I2C 0
	152	#endif
	153
c609719b WD	154	#ifndef USE_920T_MMU
	155	#define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) \| \
	156	CFG_CMD_BSP \| \
48b42616	157	CFG_CMD_DATE \| \
c609719b	158	CONFIG_COMMANDS_ADD_HWFLOW \| \
6dff5529 WD	159	CONFIG_COMMANDS_ADD_VFD \| \
6dff5529 WD	160	CONFIG_COMMANDS_ADD_EEPROM \| \
149dded2 WD	161	CFG_CMD_USB \| \
149dded2 WD	162	CFG_CMD_FAT \| \
6dff5529	163	CONFIG_COMMANDS_I2C )
c609719b WD	164	#else
	165	#define CONFIG_COMMANDS (CONFIG_CMD_DFL \| \
	166	CFG_CMD_BSP \| \
48b42616	167	CFG_CMD_DATE \| \
c609719b	168	CONFIG_COMMANDS_ADD_HWFLOW \| \
6dff5529 WD	169	CONFIG_COMMANDS_ADD_VFD \| \
6dff5529 WD	170	CONFIG_COMMANDS_ADD_EEPROM \| \
149dded2 WD	171	CFG_CMD_USB \| \
149dded2 WD	172	CFG_CMD_FAT \| \
6dff5529	173	CONFIG_COMMANDS_I2C )
c609719b WD	174	#endif
c609719b WD	175
149dded2 WD	176	/* moved up */
	177	#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
	178
c609719b WD	179	/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
	180	#include <cmd_confdefs.h>
	181
c609719b	182	#define CONFIG_BOOTDELAY 5
c8c3a8be	183	#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
c609719b	184	#define CONFIG_PREBOOT "echo;echo * booting *;echo"
6dff5529 WD	185	#define CONFIG_BOOTARGS "console=ttyS0"
6dff5529 WD	186	#define CONFIG_NETMASK 255.255.0.0
6069ff26	187	#define CONFIG_IPADDR 192.168.3.68
43d9616c	188	#define CONFIG_HOSTNAME trab
c609719b	189	#define CONFIG_SERVERIP 192.168.3.1
a0ff7f2e	190	#define CONFIG_BOOTCOMMAND "burn_in"
47cd00fa	191
b0639ca3	192	#ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
149dded2 WD	193	#ifdef CFG_HUSH_PARSER
	194	#define CONFIG_EXTRA_ENV_SETTINGS \
	195	"nfs_args=setenv bootargs root=/dev/nfs rw " \
	196	"nfsroot=$serverip:$rootpath\0" \
	197	"rootpath=/opt/eldk/arm_920TDI\0" \
	198	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	199	"add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
	200	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
	201	"add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
f54ebdfa WD	202	"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
	203	"load=tftp C100000 ${u-boot}\0" \
	204	"update=protect off 0 5FFFF;era 0 5FFFF;" \
	205	"cp.b C100000 0 $filesize\0" \
149dded2 WD	206	"loadfile=/tftpboot/TRAB/uImage\0" \
	207	"loadaddr=c400000\0" \
	208	"net_load=tftpboot $loadaddr $loadfile\0" \
	209	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
4654af27	210	"kernel_addr=00060000\0" \
149dded2 WD	211	"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
	212	"mdm_init1=ATZ\0" \
	213	"mdm_init2=ATS0=1\0" \
	214	"mdm_flow_control=rts/cts\0"
	215	#else /* !CFG_HUSH_PARSER */
c609719b WD	216	#define CONFIG_EXTRA_ENV_SETTINGS \
	217	"nfs_args=setenv bootargs root=/dev/nfs rw " \
	218	"nfsroot=$(serverip):$(rootpath)\0" \
	219	"rootpath=/opt/eldk/arm_920TDI\0" \
	220	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	221	"add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
	222	"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
	223	"add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
f54ebdfa WD	224	"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
	225	"load=tftp C100000 $(u-boot)\0" \
	226	"update=protect off 0 5FFFF;era 0 5FFFF;" \
	227	"cp.b C100000 0 $(filesize)\0" \
47cd00fa	228	"loadfile=/tftpboot/TRAB/uImage\0" \
c609719b WD	229	"loadaddr=c400000\0" \
	230	"net_load=tftpboot $(loadaddr) $(loadfile)\0" \
	231	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
f54ebdfa	232	"kernel_addr=000C0000\0" \
c609719b WD	233	"flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
	234	"mdm_init1=ATZ\0" \
	235	"mdm_init2=ATS0=1\0" \
	236	"mdm_flow_control=rts/cts\0"
f54ebdfa	237	#endif /* CFG_HUSH_PARSER */
b0639ca3	238	#else /* CONFIG_FLASH_8MB => 8 MB flash */
149dded2 WD	239	#ifdef CFG_HUSH_PARSER
	240	#define CONFIG_EXTRA_ENV_SETTINGS \
	241	"nfs_args=setenv bootargs root=/dev/nfs rw " \
	242	"nfsroot=$serverip:$rootpath\0" \
	243	"rootpath=/opt/eldk/arm_920TDI\0" \
	244	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	245	"add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
	246	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
	247	"add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
f54ebdfa WD	248	"u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
	249	"load=tftp C100000 ${u-boot}\0" \
	250	"update=protect off 0 3FFFF;era 0 3FFFF;" \
	251	"cp.b C100000 0 $filesize;" \
	252	"setenv filesize;saveenv\0" \
149dded2	253	"loadfile=/tftpboot/TRAB/uImage\0" \
f54ebdfa	254	"loadaddr=C400000\0" \
149dded2 WD	255	"net_load=tftpboot $loadaddr $loadfile\0" \
149dded2 WD	256	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
f54ebdfa	257	"kernel_addr=000C0000\0" \
149dded2 WD	258	"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
	259	"mdm_init1=ATZ\0" \
	260	"mdm_init2=ATS0=1\0" \
	261	"mdm_flow_control=rts/cts\0"
	262	#else /* !CFG_HUSH_PARSER */
47cd00fa WD	263	#define CONFIG_EXTRA_ENV_SETTINGS \
	264	"nfs_args=setenv bootargs root=/dev/nfs rw " \
	265	"nfsroot=$(serverip):$(rootpath)\0" \
	266	"rootpath=/opt/eldk/arm_920TDI\0" \
	267	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	268	"add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
	269	"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
	270	"add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
f54ebdfa WD	271	"u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
	272	"load=tftp C100000 $(u-boot)\0" \
	273	"update=protect off 0 3FFFF;era 0 3FFFF;" \
	274	"cp.b C100000 0 $(filesize);" \
	275	"setenv filesize;saveenv\0" \
47cd00fa	276	"loadfile=/tftpboot/TRAB/uImage\0" \
f54ebdfa	277	"loadaddr=C400000\0" \
47cd00fa WD	278	"net_load=tftpboot $(loadaddr) $(loadfile)\0" \
47cd00fa WD	279	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
f54ebdfa	280	"kernel_addr=000C0000\0" \
47cd00fa WD	281	"flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
	282	"mdm_init1=ATZ\0" \
	283	"mdm_init2=ATS0=1\0" \
	284	"mdm_flow_control=rts/cts\0"
149dded2	285	#endif /* CFG_HUSH_PARSER */
b0639ca3	286	#endif /* CONFIG_FLASH_8MB */
c609719b WD	287
	288	#if 0 /* disabled for development */
	289	#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
	290	#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
	291	#define CONFIG_AUTOBOOT_DELAY_STR "system" /* 1st password */
	292	#endif
	293
	294	#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
	295	#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
	296	/* what's this ? it's not used anywhere */
	297	#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
	298	#endif
	299
	300	/*
	301	* Miscellaneous configurable options
	302	*/
	303	#define CFG_LONGHELP /* undef to save memory */
	304	#define CFG_PROMPT "TRAB # " /* Monitor Command Prompt */
6dff5529 WD	305	#ifdef CFG_HUSH_PARSER
	306	#define CFG_PROMPT_HUSH_PS2 "> "
	307	#endif
	308
c609719b WD	309	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
	310	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
	311	#define CFG_MAXARGS 16 /* max number of command args */
	312	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
	313
f54ebdfa WD	314	#define CFG_MEMTEST_START 0x0C000000 /* memtest works on */
f54ebdfa WD	315	#define CFG_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
c609719b	316
6dff5529	317	#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
c609719b	318
f54ebdfa	319	#define CFG_LOAD_ADDR 0x0CF00000 /* default load address */
c609719b WD	320
	321	#ifdef CONFIG_TRAB_50MHZ
	322	/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
	323	/* it to wrap 100 times (total 1562500) to get 1 sec. */
	324	/* this should _really_ be calculated !! */
	325	#define CFG_HZ 1562500
	326	#else
	327	/* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
	328	/* it to wrap 100 times (total 1039000) to get 1 sec. */
	329	/* this should _really_ be calculated !! */
	330	#define CFG_HZ 1039000
	331	#endif
	332
	333	/* valid baudrates */
	334	#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
	335
	336	#define CONFIG_MISC_INIT_R /* have misc_init_r() function */
	337
4f7cb08e	338	/*-----------------------------------------------------------------------
a0ff7f2e	339	* burn-in test stuff.
42d1f039	340	*
a0ff7f2e WD	341	* BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
	342	* Because the burn-in test itself causes also an delay of about 4 seconds,
	343	* this time must be subtracted from the desired overall burn-in cycle time.
4f7cb08e	344	*/
a0ff7f2e	345	#define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */
4f7cb08e	346
c609719b WD	347	/*-----------------------------------------------------------------------
	348	* Stack sizes
	349	*
	350	* The stack sizes are set up in start.S using the settings below
	351	*/
	352	#define CONFIG_STACKSIZE (1281024) / regular stack */
	353	#ifdef CONFIG_USE_IRQ
	354	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	355	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	356	#endif
	357
	358	/*-----------------------------------------------------------------------
	359	* Physical Memory Map
	360	*/
6dff5529	361	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
f54ebdfa	362	#define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */
b0639ca3	363	#ifndef CONFIG_RAM_16MB
f54ebdfa WD	364	#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
f54ebdfa WD	365	#else
6dff5529	366	#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
f54ebdfa	367	#endif
c609719b	368
6dff5529	369	#define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
c609719b WD	370
c609719b WD	371	/* The following #defines are needed to get flash environment right */
6069ff26	372	#define CFG_MONITOR_BASE CFG_FLASH_BASE
c609719b WD	373	#define CFG_MONITOR_LEN (256 << 10)
c609719b WD	374
c609719b WD	375	/*-----------------------------------------------------------------------
	376	* FLASH and environment organization
	377	*/
	378	#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
b0639ca3	379	#ifndef CONFIG_FLASH_8MB
6069ff26	380	#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
f54ebdfa WD	381	#else
f54ebdfa WD	382	#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
43d9616c	383	#endif
c609719b WD	384
	385	/* timeout values are in ticks */
	386	#define CFG_FLASH_ERASE_TOUT (2CFG_HZ) / Timeout for Flash Erase */
	387	#define CFG_FLASH_WRITE_TOUT (2CFG_HZ) / Timeout for Flash Write */
	388
	389	#define CFG_ENV_IS_IN_FLASH 1
	390
	391	/* Address and size of Primary Environment Sector */
b0639ca3	392	#ifndef CONFIG_FLASH_8MB
f54ebdfa	393	#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
c609719b	394	#define CFG_ENV_SIZE 0x4000
f54ebdfa	395	#define CFG_ENV_SECT_SIZE 0x20000
43d9616c	396	#else
f54ebdfa	397	#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
43d9616c	398	#define CFG_ENV_SIZE 0x4000
f54ebdfa	399	#define CFG_ENV_SECT_SIZE 0x4000
43d9616c	400	#endif
c609719b WD	401
c609719b WD	402	/* Address and size of Redundant Environment Sector */
43d9616c	403	#define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
c609719b WD	404	#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
c609719b WD	405
1cb8e980 WD	406	/* Initial value of the on-board touch screen brightness */
	407	#define CFG_BRIGHTNESS 0x20
	408
c609719b	409	#endif /* __CONFIG_H */