[u-boot.git] / include / configs / trab.h

/*
 * (C) Copyright 2002-2003
 * Gary Jennejohn <[email protected]>
 *
 * Configuation settings for the TRAB board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#ifdef CONFIG_OLD_VERSION		/* Old configuration:		*/
#define	CONFIG_RAM_16MB			/*	16 MB SDRAM		*/
#endif
#define CONFIG_FLASH_8MB		/*	 8 MB Flash		*/

/*
 * If we are developing, we might want to start armboot from ram
 * so we MUST NOT initialize critical regs like mem-timing ...
 */
#define CONFIG_INIT_CRITICAL		/* undef for developing */

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM920T		1	/* This is an arm920t CPU	*/
#define CONFIG_S3C2400		1	/* in a SAMSUNG S3C2400 SoC	*/
#define CONFIG_TRAB		1	/* on a TRAB Board		*/
#undef CONFIG_TRAB_50MHZ		/* run the CPU at 50 MHz	*/
#define LITTLEENDIAN		1	/* used by usb_ohci.c		*/

/* automatic software updates (see board/trab/auto_update.c) */
#define CONFIG_AUTO_UPDATE	1

/* input clock of PLL */
#define CONFIG_SYS_CLK_FREQ	12000000 /* TRAB has 12 MHz input clock */

#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */

#define CONFIG_CMDLINE_TAG	 1	/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG	 1


/***********************************************************
 * I2C stuff:
 * the TRAB is equipped with an ATMEL 24C04 EEPROM at
 * address 0x54 with 8bit addressing
 ***********************************************************/
#define CONFIG_HARD_I2C			/* I2C with hardware support */
#define CFG_I2C_SPEED 		100000	/* I2C speed */
#define CFG_I2C_SLAVE 		0x7F	/* I2C slave addr */

#define CFG_I2C_EEPROM_ADDR	0x54	/* EEPROM address */
#define CFG_I2C_EEPROM_ADDR_LEN	1	/* 1 address byte */

#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
#define CFG_EEPROM_PAGE_WRITE_BITS 3	/* 8 bytes page write mode on 24C04 */
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10

/* USB stuff */
#define CONFIG_USB_OHCI		1
#define CONFIG_USB_STORAGE	1
#define CONFIG_DOS_PARTITION	1

/*
 * Size of malloc() pool
 */
#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128*1024)

/*
 * Hardware drivers
 */
#define CONFIG_DRIVER_CS8900	1	/* we have a CS8900 on-board */
#define CS8900_BASE		0x07000300 /* agrees with WIN CE PA */
#define CS8900_BUS16		1 /* the Linux driver does accesses as shorts */

#define CONFIG_DRIVER_S3C24X0_I2C 1	/* we use the buildin I2C controller */

#define CONFIG_VFD		1	/* VFD linear frame buffer driver */
#define VFD_TEST_LOGO		1	/* output a test logo to the VFDs */

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1		1	/* we use SERIAL 1 on TRAB */

#define CONFIG_HWFLOW			/* include RTS/CTS flow control support	*/

#define CONFIG_MODEM_SUPPORT	1	/* enable modem initialization stuff */

#define	CONFIG_MODEM_KEY_MAGIC	"23"	/* hold down these keys to enable modem */

/*
 * The following enables modem debugging stuff. The dbg() and
 * 'char screen[1024]' are used for debug printfs. Unfortunately,
 * it is usable only from BDI
 */
#undef CONFIG_MODEM_SUPPORT_DEBUG

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_BAUDRATE		115200

#define	CONFIG_TIMESTAMP	1	/* Print timestamp info for images */

/* Use s3c2400's RTC */
#define CONFIG_RTC_S3C24X0	1

#ifdef CONFIG_HWFLOW
#define CONFIG_COMMANDS_ADD_HWFLOW	CFG_CMD_HWFLOW
#else
#define	CONFIG_COMMANDS_ADD_HWFLOW	0
#endif

#ifdef	CONFIG_VFD
#define CONFIG_COMMANDS_ADD_VFD		CFG_CMD_VFD
#else
#define CONFIG_COMMANDS_ADD_VFD		0
#endif

#ifdef CONFIG_DRIVER_S3C24X0_I2C
#define CONFIG_COMMANDS_ADD_EEPROM	CFG_CMD_EEPROM
#define CONFIG_COMMANDS_I2C		CFG_CMD_I2C
#else
#define CONFIG_COMMANDS_ADD_EEPROM	0
#define CONFIG_COMMANDS_I2C		0
#endif

#ifndef USE_920T_MMU
#define CONFIG_COMMANDS		((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) | \
				 CFG_CMD_BSP			| \
				 CFG_CMD_DATE			| \
				 CONFIG_COMMANDS_ADD_HWFLOW	| \
				 CONFIG_COMMANDS_ADD_VFD	| \
				 CONFIG_COMMANDS_ADD_EEPROM	| \
				 CFG_CMD_USB			| \
				 CFG_CMD_FAT			| \
				 CONFIG_COMMANDS_I2C		)
#else
#define CONFIG_COMMANDS		(CONFIG_CMD_DFL			| \
				 CFG_CMD_BSP			| \
				 CFG_CMD_DATE			| \
				 CONFIG_COMMANDS_ADD_HWFLOW	| \
				 CONFIG_COMMANDS_ADD_VFD	| \
				 CONFIG_COMMANDS_ADD_EEPROM	| \
				 CFG_CMD_USB			| \
				 CFG_CMD_FAT			| \
				 CONFIG_COMMANDS_I2C		)
#endif

/* moved up */
#define CFG_HUSH_PARSER		1	/* use "hush" command parser	*/

/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>

#define CONFIG_BOOTDELAY	5
#define CONFIG_ZERO_BOOTDELAY_CHECK	/* allow to break in always */
#define CONFIG_PREBOOT		"echo;echo *** booting ***;echo"
#define CONFIG_BOOTARGS		"console=ttyS0"
#define CONFIG_NETMASK		255.255.0.0
#define CONFIG_IPADDR		192.168.3.68
#define CONFIG_HOSTNAME		trab
#define CONFIG_SERVERIP		192.168.3.1
#define CONFIG_BOOTCOMMAND	"run flash_nfs"

#ifndef CONFIG_FLASH_8MB	/* current config: 16 MB flash */
#ifdef CFG_HUSH_PARSER
#define	CONFIG_EXTRA_ENV_SETTINGS	\
	"nfs_args=setenv bootargs root=/dev/nfs rw " \
		"nfsroot=$serverip:$rootpath\0" \
	"rootpath=/opt/eldk/arm_920TDI\0" \
	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	"add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
	"add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
	"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
	"load=tftp C100000 ${u-boot}\0" \
	"update=protect off 0 5FFFF;era 0 5FFFF;" \
		"cp.b C100000 0 $filesize\0" \
	"loadfile=/tftpboot/TRAB/uImage\0" \
	"loadaddr=c400000\0" \
	"net_load=tftpboot $loadaddr $loadfile\0" \
	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
	"kernel_addr=000C0000\0" \
	"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
	"mdm_init1=ATZ\0" \
	"mdm_init2=ATS0=1\0" \
	"mdm_flow_control=rts/cts\0"
#else /* !CFG_HUSH_PARSER */
#define	CONFIG_EXTRA_ENV_SETTINGS	\
	"nfs_args=setenv bootargs root=/dev/nfs rw " \
		"nfsroot=$(serverip):$(rootpath)\0" \
	"rootpath=/opt/eldk/arm_920TDI\0" \
	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	"add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
	"add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
	"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
	"load=tftp C100000 $(u-boot)\0" \
	"update=protect off 0 5FFFF;era 0 5FFFF;" \
		"cp.b C100000 0 $(filesize)\0" \
	"loadfile=/tftpboot/TRAB/uImage\0" \
	"loadaddr=c400000\0" \
	"net_load=tftpboot $(loadaddr) $(loadfile)\0" \
	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
	"kernel_addr=000C0000\0" \
	"flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
	"mdm_init1=ATZ\0" \
	"mdm_init2=ATS0=1\0" \
	"mdm_flow_control=rts/cts\0"
#endif	/* CFG_HUSH_PARSER */
#else	/* CONFIG_FLASH_8MB 	 => 8 MB flash */
#ifdef CFG_HUSH_PARSER
#define	CONFIG_EXTRA_ENV_SETTINGS	\
	"nfs_args=setenv bootargs root=/dev/nfs rw " \
		"nfsroot=$serverip:$rootpath\0" \
	"rootpath=/opt/eldk/arm_920TDI\0" \
	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	"add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
	"add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
	"u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
	"load=tftp C100000 ${u-boot}\0" \
	"update=protect off 0 3FFFF;era 0 3FFFF;" \
		"cp.b C100000 0 $filesize;" \
		"setenv filesize;saveenv\0" \
	"loadfile=/tftpboot/TRAB/uImage\0" \
	"loadaddr=C400000\0" \
	"net_load=tftpboot $loadaddr $loadfile\0" \
	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
	"kernel_addr=000C0000\0" \
	"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
	"mdm_init1=ATZ\0" \
	"mdm_init2=ATS0=1\0" \
	"mdm_flow_control=rts/cts\0"
#else /* !CFG_HUSH_PARSER */
#define	CONFIG_EXTRA_ENV_SETTINGS	\
	"nfs_args=setenv bootargs root=/dev/nfs rw " \
		"nfsroot=$(serverip):$(rootpath)\0" \
	"rootpath=/opt/eldk/arm_920TDI\0" \
	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	"add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
	"add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
	"u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
	"load=tftp C100000 $(u-boot)\0" \
	"update=protect off 0 3FFFF;era 0 3FFFF;" \
		"cp.b C100000 0 $(filesize);" \
		"setenv filesize;saveenv\0" \
	"loadfile=/tftpboot/TRAB/uImage\0" \
	"loadaddr=C400000\0" \
	"net_load=tftpboot $(loadaddr) $(loadfile)\0" \
	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
	"kernel_addr=000C0000\0" \
	"flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
	"mdm_init1=ATZ\0" \
	"mdm_init2=ATS0=1\0" \
	"mdm_flow_control=rts/cts\0"
#endif /* CFG_HUSH_PARSER */
#endif	/* CONFIG_FLASH_8MB */

#if 0	/* disabled for development */
#define	CONFIG_AUTOBOOT_KEYED		/* Enable password protection	*/
#define CONFIG_AUTOBOOT_PROMPT	"\nEnter password - autoboot in %d sec...\n"
#define CONFIG_AUTOBOOT_DELAY_STR	"system"	/* 1st password	*/
#endif

#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	115200		/* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX	1		/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define	CFG_LONGHELP				/* undef to save memory		*/
#define	CFG_PROMPT		"TRAB # "	/* Monitor Command Prompt	*/
#ifdef	CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2	"> "
#endif

#define	CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define	CFG_MAXARGS		16		/* max number of command args	*/
#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_MEMTEST_START	0x0C000000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x0D000000	/* 16 MB in DRAM	*/

#undef CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */

#define	CFG_LOAD_ADDR		0x0CF00000	/* default load address	*/

#ifdef CONFIG_TRAB_50MHZ
/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
/* it to wrap 100 times (total 1562500) to get 1 sec. */
/* this should _really_ be calculated !! */
#define	CFG_HZ			1562500
#else
/* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
/* it to wrap 100 times (total 1039000) to get 1 sec. */
/* this should _really_ be calculated !! */
#define	CFG_HZ			1039000
#endif

/* valid baudrates */
#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

#define CONFIG_MISC_INIT_R		/* have misc_init_r() function	*/

/*-----------------------------------------------------------------------
 * burn-in test stuff
 */
#define BURN_IN_CYCLE_DELAY	20	/* delay in sec between burn-in test cycles */

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x0C000000	/* SDRAM Bank #1 */
#ifndef CONFIG_RAM_16MB
#define PHYS_SDRAM_1_SIZE	0x02000000	/* 32 MB */
#else
#define PHYS_SDRAM_1_SIZE	0x01000000	/* 16 MB */
#endif

#define CFG_FLASH_BASE		0x00000000	/* Flash Bank #1 */

/* The following #defines are needed to get flash environment right */
#define	CFG_MONITOR_BASE	CFG_FLASH_BASE
#define	CFG_MONITOR_LEN		(256 << 10)

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
#ifndef CONFIG_FLASH_8MB
#define CFG_MAX_FLASH_SECT	128	/* max number of sectors on one chip */
#else
#define CFG_MAX_FLASH_SECT	71	/* max number of sectors on one chip */
#endif

/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT	(2*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT	(2*CFG_HZ) /* Timeout for Flash Write */

#define	CFG_ENV_IS_IN_FLASH	1

/* Address and size of Primary Environment Sector	*/
#ifndef CONFIG_FLASH_8MB
#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x60000)
#define CFG_ENV_SIZE		0x4000
#define CFG_ENV_SECT_SIZE	0x20000
#else
#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x4000)
#define CFG_ENV_SIZE		0x4000
#define CFG_ENV_SECT_SIZE	0x4000
#endif

/* Address and size of Redundant Environment Sector	*/
#define CFG_ENV_OFFSET_REDUND	(CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND	(CFG_ENV_SIZE)

/* Initial value of the on-board touch screen brightness */
#define CFG_BRIGHTNESS 0x20

#endif	/* __CONFIG_H */
Commit	Line	Data
c609719b	1	/*
149dded2	2	* (C) Copyright 2002-2003
c609719b WD	3	* Gary Jennejohn <[email protected]>
	4	*
	5	* Configuation settings for the TRAB board.
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
b0639ca3 WD	29	#ifdef CONFIG_OLD_VERSION /* Old configuration: */
b0639ca3 WD	30	#define CONFIG_RAM_16MB /* 16 MB SDRAM */
b0639ca3	31	#endif
8a42eac7	32	#define CONFIG_FLASH_8MB /* 8 MB Flash */
b0639ca3	33
c609719b WD	34	/*
	35	* If we are developing, we might want to start armboot from ram
	36	* so we MUST NOT initialize critical regs like mem-timing ...
	37	*/
	38	#define CONFIG_INIT_CRITICAL /* undef for developing */
	39
	40	/*
	41	* High Level Configuration Options
	42	* (easy to change)
	43	*/
	44	#define CONFIG_ARM920T 1 /* This is an arm920t CPU */
6dff5529 WD	45	#define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
	46	#define CONFIG_TRAB 1 /* on a TRAB Board */
	47	#undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
149dded2	48	#define LITTLEENDIAN 1 /* used by usb_ohci.c */
c609719b	49
f54ebdfa WD	50	/* automatic software updates (see board/trab/auto_update.c) */
	51	#define CONFIG_AUTO_UPDATE 1
	52
c609719b	53	/* input clock of PLL */
7f6c2cbc	54	#define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
c609719b WD	55
	56	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	57
	58	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	59	#define CONFIG_SETUP_MEMORY_TAGS 1
	60	#define CONFIG_INITRD_TAG 1
	61
6dff5529 WD	62
	63	/***********************************************************
	64	* I2C stuff:
	65	* the TRAB is equipped with an ATMEL 24C04 EEPROM at
	66	* address 0x54 with 8bit addressing
	67	***********************************************************/
	68	#define CONFIG_HARD_I2C /* I2C with hardware support */
	69	#define CFG_I2C_SPEED 100000 /* I2C speed */
	70	#define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
	71
	72	#define CFG_I2C_EEPROM_ADDR 0x54 /* EEPROM address */
	73	#define CFG_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */
	74
	75	#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
	76	#define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */
	77	#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
	78
149dded2 WD	79	/* USB stuff */
	80	#define CONFIG_USB_OHCI 1
	81	#define CONFIG_USB_STORAGE 1
	82	#define CONFIG_DOS_PARTITION 1
	83
c609719b WD	84	/*
	85	* Size of malloc() pool
	86	*/
699b13a6	87	#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
c609719b WD	88
	89	/*
	90	* Hardware drivers
	91	*/
	92	#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
	93	#define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
	94	#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
	95
6dff5529 WD	96	#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
6dff5529 WD	97
c609719b WD	98	#define CONFIG_VFD 1 /* VFD linear frame buffer driver */
	99	#define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */
	100
	101	/*
	102	* select serial console configuration
	103	*/
6dff5529	104	#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
c609719b WD	105
	106	#define CONFIG_HWFLOW /* include RTS/CTS flow control support */
	107
	108	#define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
	109
	110	#define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */
	111
	112	/*
	113	* The following enables modem debugging stuff. The dbg() and
	114	* 'char screen[1024]' are used for debug printfs. Unfortunately,
	115	* it is usable only from BDI
	116	*/
	117	#undef CONFIG_MODEM_SUPPORT_DEBUG
	118
	119	/* allow to overwrite serial and ethaddr */
	120	#define CONFIG_ENV_OVERWRITE
	121
	122	#define CONFIG_BAUDRATE 115200
	123
	124	#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
	125
48b42616 WD	126	/* Use s3c2400's RTC */
	127	#define CONFIG_RTC_S3C24X0 1
	128
c609719b WD	129	#ifdef CONFIG_HWFLOW
	130	#define CONFIG_COMMANDS_ADD_HWFLOW CFG_CMD_HWFLOW
	131	#else
	132	#define CONFIG_COMMANDS_ADD_HWFLOW 0
	133	#endif
	134
	135	#ifdef CONFIG_VFD
	136	#define CONFIG_COMMANDS_ADD_VFD CFG_CMD_VFD
	137	#else
	138	#define CONFIG_COMMANDS_ADD_VFD 0
	139	#endif
	140
6dff5529 WD	141	#ifdef CONFIG_DRIVER_S3C24X0_I2C
	142	#define CONFIG_COMMANDS_ADD_EEPROM CFG_CMD_EEPROM
	143	#define CONFIG_COMMANDS_I2C CFG_CMD_I2C
	144	#else
	145	#define CONFIG_COMMANDS_ADD_EEPROM 0
	146	#define CONFIG_COMMANDS_I2C 0
	147	#endif
	148
c609719b WD	149	#ifndef USE_920T_MMU
	150	#define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) \| \
	151	CFG_CMD_BSP \| \
48b42616	152	CFG_CMD_DATE \| \
c609719b	153	CONFIG_COMMANDS_ADD_HWFLOW \| \
6dff5529 WD	154	CONFIG_COMMANDS_ADD_VFD \| \
6dff5529 WD	155	CONFIG_COMMANDS_ADD_EEPROM \| \
149dded2 WD	156	CFG_CMD_USB \| \
149dded2 WD	157	CFG_CMD_FAT \| \
6dff5529	158	CONFIG_COMMANDS_I2C )
c609719b WD	159	#else
	160	#define CONFIG_COMMANDS (CONFIG_CMD_DFL \| \
	161	CFG_CMD_BSP \| \
48b42616	162	CFG_CMD_DATE \| \
c609719b	163	CONFIG_COMMANDS_ADD_HWFLOW \| \
6dff5529 WD	164	CONFIG_COMMANDS_ADD_VFD \| \
6dff5529 WD	165	CONFIG_COMMANDS_ADD_EEPROM \| \
149dded2 WD	166	CFG_CMD_USB \| \
149dded2 WD	167	CFG_CMD_FAT \| \
6dff5529	168	CONFIG_COMMANDS_I2C )
c609719b WD	169	#endif
c609719b WD	170
149dded2 WD	171	/* moved up */
	172	#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
	173
c609719b WD	174	/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
	175	#include <cmd_confdefs.h>
	176
c609719b	177	#define CONFIG_BOOTDELAY 5
c8c3a8be	178	#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
c609719b	179	#define CONFIG_PREBOOT "echo;echo * booting *;echo"
6dff5529 WD	180	#define CONFIG_BOOTARGS "console=ttyS0"
6dff5529 WD	181	#define CONFIG_NETMASK 255.255.0.0
6069ff26	182	#define CONFIG_IPADDR 192.168.3.68
43d9616c	183	#define CONFIG_HOSTNAME trab
c609719b WD	184	#define CONFIG_SERVERIP 192.168.3.1
c609719b WD	185	#define CONFIG_BOOTCOMMAND "run flash_nfs"
47cd00fa	186
b0639ca3	187	#ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
149dded2 WD	188	#ifdef CFG_HUSH_PARSER
	189	#define CONFIG_EXTRA_ENV_SETTINGS \
	190	"nfs_args=setenv bootargs root=/dev/nfs rw " \
	191	"nfsroot=$serverip:$rootpath\0" \
	192	"rootpath=/opt/eldk/arm_920TDI\0" \
	193	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	194	"add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
	195	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
	196	"add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
f54ebdfa WD	197	"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
	198	"load=tftp C100000 ${u-boot}\0" \
	199	"update=protect off 0 5FFFF;era 0 5FFFF;" \
	200	"cp.b C100000 0 $filesize\0" \
149dded2 WD	201	"loadfile=/tftpboot/TRAB/uImage\0" \
	202	"loadaddr=c400000\0" \
	203	"net_load=tftpboot $loadaddr $loadfile\0" \
	204	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
f54ebdfa	205	"kernel_addr=000C0000\0" \
149dded2 WD	206	"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
	207	"mdm_init1=ATZ\0" \
	208	"mdm_init2=ATS0=1\0" \
	209	"mdm_flow_control=rts/cts\0"
	210	#else /* !CFG_HUSH_PARSER */
c609719b WD	211	#define CONFIG_EXTRA_ENV_SETTINGS \
	212	"nfs_args=setenv bootargs root=/dev/nfs rw " \
	213	"nfsroot=$(serverip):$(rootpath)\0" \
	214	"rootpath=/opt/eldk/arm_920TDI\0" \
	215	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	216	"add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
	217	"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
	218	"add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
f54ebdfa WD	219	"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
	220	"load=tftp C100000 $(u-boot)\0" \
	221	"update=protect off 0 5FFFF;era 0 5FFFF;" \
	222	"cp.b C100000 0 $(filesize)\0" \
47cd00fa	223	"loadfile=/tftpboot/TRAB/uImage\0" \
c609719b WD	224	"loadaddr=c400000\0" \
	225	"net_load=tftpboot $(loadaddr) $(loadfile)\0" \
	226	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
f54ebdfa	227	"kernel_addr=000C0000\0" \
c609719b WD	228	"flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
	229	"mdm_init1=ATZ\0" \
	230	"mdm_init2=ATS0=1\0" \
	231	"mdm_flow_control=rts/cts\0"
f54ebdfa	232	#endif /* CFG_HUSH_PARSER */
b0639ca3	233	#else /* CONFIG_FLASH_8MB => 8 MB flash */
149dded2 WD	234	#ifdef CFG_HUSH_PARSER
	235	#define CONFIG_EXTRA_ENV_SETTINGS \
	236	"nfs_args=setenv bootargs root=/dev/nfs rw " \
	237	"nfsroot=$serverip:$rootpath\0" \
	238	"rootpath=/opt/eldk/arm_920TDI\0" \
	239	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	240	"add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
	241	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
	242	"add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
f54ebdfa WD	243	"u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
	244	"load=tftp C100000 ${u-boot}\0" \
	245	"update=protect off 0 3FFFF;era 0 3FFFF;" \
	246	"cp.b C100000 0 $filesize;" \
	247	"setenv filesize;saveenv\0" \
149dded2	248	"loadfile=/tftpboot/TRAB/uImage\0" \
f54ebdfa	249	"loadaddr=C400000\0" \
149dded2 WD	250	"net_load=tftpboot $loadaddr $loadfile\0" \
149dded2 WD	251	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
f54ebdfa	252	"kernel_addr=000C0000\0" \
149dded2 WD	253	"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
	254	"mdm_init1=ATZ\0" \
	255	"mdm_init2=ATS0=1\0" \
	256	"mdm_flow_control=rts/cts\0"
	257	#else /* !CFG_HUSH_PARSER */
47cd00fa WD	258	#define CONFIG_EXTRA_ENV_SETTINGS \
	259	"nfs_args=setenv bootargs root=/dev/nfs rw " \
	260	"nfsroot=$(serverip):$(rootpath)\0" \
	261	"rootpath=/opt/eldk/arm_920TDI\0" \
	262	"ram_args=setenv bootargs root=/dev/ram rw\0" \
	263	"add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
	264	"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
	265	"add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
f54ebdfa WD	266	"u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
	267	"load=tftp C100000 $(u-boot)\0" \
	268	"update=protect off 0 3FFFF;era 0 3FFFF;" \
	269	"cp.b C100000 0 $(filesize);" \
	270	"setenv filesize;saveenv\0" \
47cd00fa	271	"loadfile=/tftpboot/TRAB/uImage\0" \
f54ebdfa	272	"loadaddr=C400000\0" \
47cd00fa WD	273	"net_load=tftpboot $(loadaddr) $(loadfile)\0" \
47cd00fa WD	274	"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
f54ebdfa	275	"kernel_addr=000C0000\0" \
47cd00fa WD	276	"flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
	277	"mdm_init1=ATZ\0" \
	278	"mdm_init2=ATS0=1\0" \
	279	"mdm_flow_control=rts/cts\0"
149dded2	280	#endif /* CFG_HUSH_PARSER */
b0639ca3	281	#endif /* CONFIG_FLASH_8MB */
c609719b WD	282
	283	#if 0 /* disabled for development */
	284	#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
	285	#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
	286	#define CONFIG_AUTOBOOT_DELAY_STR "system" /* 1st password */
	287	#endif
	288
	289	#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
	290	#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
	291	/* what's this ? it's not used anywhere */
	292	#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
	293	#endif
	294
	295	/*
	296	* Miscellaneous configurable options
	297	*/
	298	#define CFG_LONGHELP /* undef to save memory */
	299	#define CFG_PROMPT "TRAB # " /* Monitor Command Prompt */
6dff5529 WD	300	#ifdef CFG_HUSH_PARSER
	301	#define CFG_PROMPT_HUSH_PS2 "> "
	302	#endif
	303
c609719b WD	304	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
	305	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
	306	#define CFG_MAXARGS 16 /* max number of command args */
	307	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
	308
f54ebdfa WD	309	#define CFG_MEMTEST_START 0x0C000000 /* memtest works on */
f54ebdfa WD	310	#define CFG_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
c609719b	311
6dff5529	312	#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
c609719b	313
f54ebdfa	314	#define CFG_LOAD_ADDR 0x0CF00000 /* default load address */
c609719b WD	315
	316	#ifdef CONFIG_TRAB_50MHZ
	317	/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
	318	/* it to wrap 100 times (total 1562500) to get 1 sec. */
	319	/* this should _really_ be calculated !! */
	320	#define CFG_HZ 1562500
	321	#else
	322	/* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
	323	/* it to wrap 100 times (total 1039000) to get 1 sec. */
	324	/* this should _really_ be calculated !! */
	325	#define CFG_HZ 1039000
	326	#endif
	327
	328	/* valid baudrates */
	329	#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
	330
	331	#define CONFIG_MISC_INIT_R /* have misc_init_r() function */
	332
4f7cb08e WD	333	/*-----------------------------------------------------------------------
	334	* burn-in test stuff
	335	*/
	336	#define BURN_IN_CYCLE_DELAY 20 /* delay in sec between burn-in test cycles */
	337
c609719b WD	338	/*-----------------------------------------------------------------------
	339	* Stack sizes
	340	*
	341	* The stack sizes are set up in start.S using the settings below
	342	*/
	343	#define CONFIG_STACKSIZE (1281024) / regular stack */
	344	#ifdef CONFIG_USE_IRQ
	345	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	346	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	347	#endif
	348
	349	/*-----------------------------------------------------------------------
	350	* Physical Memory Map
	351	*/
6dff5529	352	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
f54ebdfa	353	#define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */
b0639ca3	354	#ifndef CONFIG_RAM_16MB
f54ebdfa WD	355	#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
f54ebdfa WD	356	#else
6dff5529	357	#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
f54ebdfa	358	#endif
c609719b	359
6dff5529	360	#define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
c609719b WD	361
c609719b WD	362	/* The following #defines are needed to get flash environment right */
6069ff26	363	#define CFG_MONITOR_BASE CFG_FLASH_BASE
c609719b WD	364	#define CFG_MONITOR_LEN (256 << 10)
c609719b WD	365
c609719b WD	366	/*-----------------------------------------------------------------------
	367	* FLASH and environment organization
	368	*/
	369	#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
b0639ca3	370	#ifndef CONFIG_FLASH_8MB
6069ff26	371	#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
f54ebdfa WD	372	#else
f54ebdfa WD	373	#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
43d9616c	374	#endif
c609719b WD	375
	376	/* timeout values are in ticks */
	377	#define CFG_FLASH_ERASE_TOUT (2CFG_HZ) / Timeout for Flash Erase */
	378	#define CFG_FLASH_WRITE_TOUT (2CFG_HZ) / Timeout for Flash Write */
	379
	380	#define CFG_ENV_IS_IN_FLASH 1
	381
	382	/* Address and size of Primary Environment Sector */
b0639ca3	383	#ifndef CONFIG_FLASH_8MB
f54ebdfa	384	#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
c609719b	385	#define CFG_ENV_SIZE 0x4000
f54ebdfa	386	#define CFG_ENV_SECT_SIZE 0x20000
43d9616c	387	#else
f54ebdfa	388	#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
43d9616c	389	#define CFG_ENV_SIZE 0x4000
f54ebdfa	390	#define CFG_ENV_SECT_SIZE 0x4000
43d9616c	391	#endif
c609719b WD	392
c609719b WD	393	/* Address and size of Redundant Environment Sector */
43d9616c	394	#define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
c609719b WD	395	#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
c609719b WD	396
1cb8e980 WD	397	/* Initial value of the on-board touch screen brightness */
	398	#define CFG_BRIGHTNESS 0x20
	399
c609719b	400	#endif /* __CONFIG_H */