msi: Invoke msi/msix_reset from PCI core

There is no point in pushing this burden to the devices, they tend to
forget to call them (like intel-hda, ahci, xhci did). Instead, reset
functions are now called from pci_device_reset. They do nothing if
MSI/MSI-X is not in use.

CC: Alexander Graf <[email protected]>
CC: Gerd Hoffmann <[email protected]>
CC: Isaku Yamahata <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>

diff --git a/hw/ide/ich.c b/hw/ide/ich.c
index e7026bb414466839903f68642688c1c0a81c2988..d3bc822831102586bff360f4b21bfd846b20e066 100644 (file)
--- a/hw/ide/ich.c
+++ b/hw/ide/ich.c
@@ -88,7 +88,6 @@ static void pci_ich9_reset(DeviceState *dev)
 {
     struct AHCIPCIState *d = DO_UPCAST(struct AHCIPCIState, card.qdev, dev);
 
-    msi_reset(&d->card);
     ahci_reset(&d->ahci);
 }
 

diff --git a/hw/intel-hda.c b/hw/intel-hda.c
index e38861e5de1f11f2c3f003d0ebaea0cb94fc3528..bb11af286a81135d3c0384f5072411fa6dacd5b5 100644 (file)
--- a/hw/intel-hda.c
+++ b/hw/intel-hda.c
@@ -1107,9 +1107,6 @@ static void intel_hda_reset(DeviceState *dev)
     DeviceState *qdev;
     HDACodecDevice *cdev;
 
-    if (d->msi) {
-        msi_reset(&d->pci);
-    }
     intel_hda_regs_reset(d);
     d->wall_base_ns = qemu_get_clock_ns(vm_clock);
 

diff --git a/hw/ioh3420.c b/hw/ioh3420.c
index 1632d31c191001e68fbb1d86a4d18fb6b1575635..d1499da4ac240f66090020f4022acc1274476ff4 100644 (file)
--- a/hw/ioh3420.c
+++ b/hw/ioh3420.c
@@ -81,7 +81,7 @@ static void ioh3420_write_config(PCIDevice *d,
 static void ioh3420_reset(DeviceState *qdev)
 {
     PCIDevice *d = PCI_DEVICE(qdev);
-    msi_reset(d);
+
     ioh3420_aer_vector_update(d);
     pcie_cap_root_reset(d);
     pcie_cap_deverr_reset(d);

diff --git a/hw/ivshmem.c b/hw/ivshmem.c
index d48e5f99064e9b01ed0d445cf8e6b8d372aebd8c..05559b639c942a16db358799aa5916d1413ef6d2 100644 (file)
--- a/hw/ivshmem.c
+++ b/hw/ivshmem.c
@@ -530,7 +530,6 @@ static void ivshmem_reset(DeviceState *d)
     IVShmemState *s = DO_UPCAST(IVShmemState, dev.qdev, d);
 
     s->intrstatus = 0;
-    msix_reset(&s->dev);
     ivshmem_use_msix(s);
     return;
 }

diff --git a/hw/pci.c b/hw/pci.c
index c1ebdde91e9de22823bacf8ec8d96df4aceab678..2b429c03d191d4dfcb3db0bcbfb46b6ad9ae0df1 100644 (file)
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -31,6 +31,8 @@
 #include "loader.h"
 #include "range.h"
 #include "qmp-commands.h"
+#include "msi.h"
+#include "msix.h"
 
 //#define DEBUG_PCI
 #ifdef DEBUG_PCI
@@ -188,6 +190,9 @@ void pci_device_reset(PCIDevice *dev)
         }
     }
     pci_update_mappings(dev);
+
+    msi_reset(dev);
+    msix_reset(dev);
 }
 
 /*

diff --git a/hw/pci_bridge.c b/hw/pci_bridge.c
index 866f0b6c524b439efbe02bd14593ce764bfeb93d..e0832b4a67e92ca1dfab6e416eca85c6080cc42b 100644 (file)
--- a/hw/pci_bridge.c
+++ b/hw/pci_bridge.c
@@ -254,8 +254,9 @@ void pci_bridge_disable_base_limit(PCIDevice *dev)
 }
 
 /* reset bridge specific configuration registers */
-void pci_bridge_reset_reg(PCIDevice *dev)
+void pci_bridge_reset(DeviceState *qdev)
 {
+    PCIDevice *dev = PCI_DEVICE(qdev);
     uint8_t *conf = dev->config;
 
     conf[PCI_PRIMARY_BUS] = 0;
@@ -291,13 +292,6 @@ void pci_bridge_reset_reg(PCIDevice *dev)
     pci_set_word(conf + PCI_BRIDGE_CONTROL, 0);
 }
 
-/* default reset function for PCI-to-PCI bridge */
-void pci_bridge_reset(DeviceState *qdev)
-{
-    PCIDevice *dev = PCI_DEVICE(qdev);
-    pci_bridge_reset_reg(dev);
-}
-
 /* default qdev initialization function for PCI-to-PCI bridge */
 int pci_bridge_initfn(PCIDevice *dev)
 {

diff --git a/hw/pci_bridge_dev.c b/hw/pci_bridge_dev.c
index eccaa5831ee7739c5bc143ce2f579a3a23dfd368..b6d5fb7388ff548ba771ed20ba4a69f85e81ca16 100644 (file)
--- a/hw/pci_bridge_dev.c
+++ b/hw/pci_bridge_dev.c
@@ -119,10 +119,8 @@ static void pci_bridge_dev_write_config(PCIDevice *d,
 static void qdev_pci_bridge_dev_reset(DeviceState *qdev)
 {
     PCIDevice *dev = DO_UPCAST(PCIDevice, qdev, qdev);
+
     pci_bridge_reset(qdev);
-    if (msi_present(dev)) {
-        msi_reset(dev);
-    }
     shpc_reset(dev);
 }
 

diff --git a/hw/virtio-pci.c b/hw/virtio-pci.c
index d08c1590d2144ffb79d0e4fcd0e9738c0468b16f..4736ba3898fbeedd82a3f95d73b02447f2e23827 100644 (file)
--- a/hw/virtio-pci.c
+++ b/hw/virtio-pci.c
@@ -278,7 +278,6 @@ void virtio_pci_reset(DeviceState *d)
     VirtIOPCIProxy *proxy = container_of(d, VirtIOPCIProxy, pci_dev.qdev);
     virtio_pci_stop_ioeventfd(proxy);
     virtio_reset(proxy->vdev);
-    msix_reset(&proxy->pci_dev);
     proxy->flags &= ~VIRTIO_PCI_FLAG_BUS_MASTER_BUG;
 }
 

diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c
index 319624f212052b297ed874be6ead8050e6ed7ad6..3716e4541ae477a3d91cc9cb56f6daa3e58d46b5 100644 (file)
--- a/hw/xio3130_downstream.c
+++ b/hw/xio3130_downstream.c
@@ -48,7 +48,7 @@ static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address,
 static void xio3130_downstream_reset(DeviceState *qdev)
 {
     PCIDevice *d = PCI_DEVICE(qdev);
-    msi_reset(d);
+
     pcie_cap_deverr_reset(d);
     pcie_cap_slot_reset(d);
     pcie_cap_ari_reset(d);

diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c
index 34a99bba081247e3d89026ac84026153500b56b0..962d48e63eb23f6057eaf6e5c2fdca049a0fce8f 100644 (file)
--- a/hw/xio3130_upstream.c
+++ b/hw/xio3130_upstream.c
@@ -47,7 +47,7 @@ static void xio3130_upstream_write_config(PCIDevice *d, uint32_t address,
 static void xio3130_upstream_reset(DeviceState *qdev)
 {
     PCIDevice *d = PCI_DEVICE(qdev);
-    msi_reset(d);
+
     pci_bridge_reset(qdev);
     pcie_cap_deverr_reset(d);
 }