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Commit | Line | Data |
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b00052e4 AZ |
1 | /* |
2 | * PXA270-based Clamshell PDA platforms. | |
3 | * | |
4 | * Copyright (c) 2006 Openedhand Ltd. | |
5 | * Written by Andrzej Zaborowski <[email protected]> | |
6 | * | |
7 | * This code is licensed under the GNU GPL v2. | |
6b620ca3 PB |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the | |
10 | * GNU GPL, version 2 or (at your option) any later version. | |
b00052e4 AZ |
11 | */ |
12 | ||
12b16722 | 13 | #include "qemu/osdep.h" |
da34e65c | 14 | #include "qapi/error.h" |
0d09e41a | 15 | #include "hw/arm/pxa.h" |
12ec8bd5 | 16 | #include "hw/arm/boot.h" |
54d31236 | 17 | #include "sysemu/runstate.h" |
9c17d615 | 18 | #include "sysemu/sysemu.h" |
83c9f4ca | 19 | #include "hw/pcmcia.h" |
a27bd6c7 | 20 | #include "hw/qdev-properties.h" |
0d09e41a | 21 | #include "hw/i2c/i2c.h" |
64552b6b | 22 | #include "hw/irq.h" |
8fd06719 | 23 | #include "hw/ssi/ssi.h" |
0d09e41a | 24 | #include "hw/block/flash.h" |
1de7afc9 | 25 | #include "qemu/timer.h" |
eb2d6dbc | 26 | #include "qemu/log.h" |
0d09e41a | 27 | #include "hw/arm/sharpsl.h" |
28ecbaee | 28 | #include "ui/console.h" |
7ab14c5a | 29 | #include "hw/audio/wm8750.h" |
87ecb68b | 30 | #include "audio/audio.h" |
83c9f4ca | 31 | #include "hw/boards.h" |
83c9f4ca | 32 | #include "hw/sysbus.h" |
58f3e3fe | 33 | #include "hw/adc/max111x.h" |
d6454270 | 34 | #include "migration/vmstate.h" |
022c62cb | 35 | #include "exec/address-spaces.h" |
ba1ba5cc | 36 | #include "cpu.h" |
db1015e9 | 37 | #include "qom/object.h" |
b00052e4 | 38 | |
e3d986da PM |
39 | enum spitz_model_e { spitz, akita, borzoi, terrier }; |
40 | ||
db1015e9 | 41 | struct SpitzMachineClass { |
e3d986da PM |
42 | MachineClass parent; |
43 | enum spitz_model_e model; | |
44 | int arm_id; | |
db1015e9 | 45 | }; |
e3d986da | 46 | |
db1015e9 | 47 | struct SpitzMachineState { |
e3d986da | 48 | MachineState parent; |
39854425 PM |
49 | PXA2xxState *mpu; |
50 | DeviceState *mux; | |
51 | DeviceState *lcdtg; | |
52 | DeviceState *ads7846; | |
53 | DeviceState *max1111; | |
ffe7f906 PM |
54 | DeviceState *scp0; |
55 | DeviceState *scp1; | |
eb2dc887 | 56 | DeviceState *misc_gpio; |
db1015e9 | 57 | }; |
e3d986da PM |
58 | |
59 | #define TYPE_SPITZ_MACHINE "spitz-common" | |
a489d195 | 60 | OBJECT_DECLARE_TYPE(SpitzMachineState, SpitzMachineClass, SPITZ_MACHINE) |
e3d986da | 61 | |
a0a8cf78 PM |
62 | #define zaurus_printf(format, ...) \ |
63 | fprintf(stderr, "%s: " format, __func__, ##__VA_ARGS__) | |
64 | ||
b00052e4 | 65 | /* Spitz Flash */ |
f6319db2 PM |
66 | #define FLASH_BASE 0x0c000000 |
67 | #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ | |
68 | #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ | |
69 | #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ | |
70 | #define FLASH_ECCCNTR 0x0c /* ECC byte counter */ | |
71 | #define FLASH_ECCCLRR 0x10 /* Clear ECC */ | |
72 | #define FLASH_FLASHIO 0x14 /* Flash I/O */ | |
73 | #define FLASH_FLASHCTL 0x18 /* Flash Control */ | |
74 | ||
75 | #define FLASHCTL_CE0 (1 << 0) | |
76 | #define FLASHCTL_CLE (1 << 1) | |
77 | #define FLASHCTL_ALE (1 << 2) | |
78 | #define FLASHCTL_WP (1 << 3) | |
79 | #define FLASHCTL_CE1 (1 << 4) | |
80 | #define FLASHCTL_RYBY (1 << 5) | |
81 | #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) | |
b00052e4 | 82 | |
7eb8104a | 83 | #define TYPE_SL_NAND "sl-nand" |
8063396b | 84 | OBJECT_DECLARE_SIMPLE_TYPE(SLNANDState, SL_NAND) |
7eb8104a | 85 | |
db1015e9 | 86 | struct SLNANDState { |
7eb8104a AF |
87 | SysBusDevice parent_obj; |
88 | ||
7cc09e6c | 89 | MemoryRegion iomem; |
d4220389 | 90 | DeviceState *nand; |
b00052e4 | 91 | uint8_t ctl; |
34f9f0b5 DES |
92 | uint8_t manf_id; |
93 | uint8_t chip_id; | |
bc24a225 | 94 | ECCState ecc; |
db1015e9 | 95 | }; |
b00052e4 | 96 | |
a8170e5e | 97 | static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) |
b00052e4 | 98 | { |
bc24a225 | 99 | SLNANDState *s = (SLNANDState *) opaque; |
b00052e4 | 100 | int ryby; |
b00052e4 AZ |
101 | |
102 | switch (addr) { | |
f6319db2 | 103 | #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) |
b00052e4 AZ |
104 | case FLASH_ECCLPLB: |
105 | return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | | |
106 | BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); | |
107 | ||
f6319db2 | 108 | #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) |
b00052e4 AZ |
109 | case FLASH_ECCLPUB: |
110 | return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | | |
111 | BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); | |
112 | ||
113 | case FLASH_ECCCP: | |
114 | return s->ecc.cp; | |
115 | ||
116 | case FLASH_ECCCNTR: | |
117 | return s->ecc.count & 0xff; | |
118 | ||
119 | case FLASH_FLASHCTL: | |
120 | nand_getpins(s->nand, &ryby); | |
121 | if (ryby) | |
122 | return s->ctl | FLASHCTL_RYBY; | |
123 | else | |
124 | return s->ctl; | |
125 | ||
126 | case FLASH_FLASHIO: | |
7cc09e6c AK |
127 | if (size == 4) { |
128 | return ecc_digest(&s->ecc, nand_getio(s->nand)) | | |
129 | (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16); | |
130 | } | |
b00052e4 AZ |
131 | return ecc_digest(&s->ecc, nand_getio(s->nand)); |
132 | ||
133 | default: | |
eb2d6dbc PM |
134 | qemu_log_mask(LOG_GUEST_ERROR, |
135 | "sl_read: bad register offset 0x%02" HWADDR_PRIx "\n", | |
136 | addr); | |
b00052e4 AZ |
137 | } |
138 | return 0; | |
139 | } | |
140 | ||
a8170e5e | 141 | static void sl_write(void *opaque, hwaddr addr, |
7cc09e6c | 142 | uint64_t value, unsigned size) |
b00052e4 | 143 | { |
bc24a225 | 144 | SLNANDState *s = (SLNANDState *) opaque; |
b00052e4 AZ |
145 | |
146 | switch (addr) { | |
147 | case FLASH_ECCCLRR: | |
148 | /* Value is ignored. */ | |
149 | ecc_reset(&s->ecc); | |
150 | break; | |
151 | ||
152 | case FLASH_FLASHCTL: | |
153 | s->ctl = value & 0xff & ~FLASHCTL_RYBY; | |
154 | nand_setpins(s->nand, | |
155 | s->ctl & FLASHCTL_CLE, | |
156 | s->ctl & FLASHCTL_ALE, | |
157 | s->ctl & FLASHCTL_NCE, | |
158 | s->ctl & FLASHCTL_WP, | |
159 | 0); | |
160 | break; | |
161 | ||
162 | case FLASH_FLASHIO: | |
163 | nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff)); | |
164 | break; | |
165 | ||
166 | default: | |
eb2d6dbc PM |
167 | qemu_log_mask(LOG_GUEST_ERROR, |
168 | "sl_write: bad register offset 0x%02" HWADDR_PRIx "\n", | |
169 | addr); | |
b00052e4 AZ |
170 | } |
171 | } | |
172 | ||
173 | enum { | |
174 | FLASH_128M, | |
175 | FLASH_1024M, | |
176 | }; | |
177 | ||
7cc09e6c AK |
178 | static const MemoryRegionOps sl_ops = { |
179 | .read = sl_read, | |
180 | .write = sl_write, | |
181 | .endianness = DEVICE_NATIVE_ENDIAN, | |
34f9f0b5 DES |
182 | }; |
183 | ||
bc24a225 | 184 | static void sl_flash_register(PXA2xxState *cpu, int size) |
b00052e4 | 185 | { |
34f9f0b5 DES |
186 | DeviceState *dev; |
187 | ||
3e80f690 | 188 | dev = qdev_new(TYPE_SL_NAND); |
34f9f0b5 DES |
189 | |
190 | qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); | |
191 | if (size == FLASH_128M) | |
192 | qdev_prop_set_uint8(dev, "chip_id", 0x73); | |
193 | else if (size == FLASH_1024M) | |
194 | qdev_prop_set_uint8(dev, "chip_id", 0xf1); | |
195 | ||
3c6ef471 | 196 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
1356b98d | 197 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); |
34f9f0b5 DES |
198 | } |
199 | ||
f68575c9 | 200 | static void sl_nand_init(Object *obj) |
7eb8104a | 201 | { |
f68575c9 XZ |
202 | SLNANDState *s = SL_NAND(obj); |
203 | SysBusDevice *dev = SYS_BUS_DEVICE(obj); | |
34f9f0b5 | 204 | |
b00052e4 | 205 | s->ctl = 0; |
07bc425e TH |
206 | |
207 | memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40); | |
208 | sysbus_init_mmio(dev, &s->iomem); | |
209 | } | |
210 | ||
211 | static void sl_nand_realize(DeviceState *dev, Error **errp) | |
212 | { | |
213 | SLNANDState *s = SL_NAND(dev); | |
214 | DriveInfo *nand; | |
215 | ||
af9e40aa | 216 | /* FIXME use a qdev drive property instead of drive_get() */ |
522f253c | 217 | nand = drive_get(IF_MTD, 0, 0); |
4be74634 | 218 | s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL, |
fa1d36df | 219 | s->manf_id, s->chip_id); |
b00052e4 AZ |
220 | } |
221 | ||
222 | /* Spitz Keyboard */ | |
223 | ||
f6319db2 PM |
224 | #define SPITZ_KEY_STROBE_NUM 11 |
225 | #define SPITZ_KEY_SENSE_NUM 7 | |
b00052e4 AZ |
226 | |
227 | static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { | |
228 | 12, 17, 91, 34, 36, 38, 39 | |
229 | }; | |
230 | ||
231 | static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { | |
232 | 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 | |
233 | }; | |
234 | ||
235 | /* Eighth additional row maps the special keys */ | |
236 | static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { | |
237 | { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, | |
238 | { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, | |
239 | { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, | |
240 | { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, | |
241 | { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, | |
2b76bdc9 AZ |
242 | { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, |
243 | { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, | |
b00052e4 AZ |
244 | { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, |
245 | }; | |
246 | ||
f6319db2 PM |
247 | #define SPITZ_GPIO_AK_INT 13 /* Remote control */ |
248 | #define SPITZ_GPIO_SYNC 16 /* Sync button */ | |
249 | #define SPITZ_GPIO_ON_KEY 95 /* Power button */ | |
250 | #define SPITZ_GPIO_SWA 97 /* Lid */ | |
251 | #define SPITZ_GPIO_SWB 96 /* Tablet mode */ | |
b00052e4 AZ |
252 | |
253 | /* The special buttons are mapped to unused keys */ | |
254 | static const int spitz_gpiomap[5] = { | |
255 | SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, | |
256 | SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, | |
257 | }; | |
b00052e4 | 258 | |
73e9d965 | 259 | #define TYPE_SPITZ_KEYBOARD "spitz-keyboard" |
8063396b | 260 | OBJECT_DECLARE_SIMPLE_TYPE(SpitzKeyboardState, SPITZ_KEYBOARD) |
73e9d965 | 261 | |
db1015e9 | 262 | struct SpitzKeyboardState { |
73e9d965 AF |
263 | SysBusDevice parent_obj; |
264 | ||
38641a52 | 265 | qemu_irq sense[SPITZ_KEY_SENSE_NUM]; |
38641a52 | 266 | qemu_irq gpiomap[5]; |
b00052e4 AZ |
267 | int keymap[0x80]; |
268 | uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; | |
269 | uint16_t strobe_state; | |
270 | uint16_t sense_state; | |
271 | ||
272 | uint16_t pre_map[0x100]; | |
273 | uint16_t modifiers; | |
274 | uint16_t imodifiers; | |
275 | uint8_t fifo[16]; | |
276 | int fifopos, fifolen; | |
277 | QEMUTimer *kbdtimer; | |
db1015e9 | 278 | }; |
b00052e4 | 279 | |
bc24a225 | 280 | static void spitz_keyboard_sense_update(SpitzKeyboardState *s) |
b00052e4 AZ |
281 | { |
282 | int i; | |
283 | uint16_t strobe, sense = 0; | |
284 | for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { | |
285 | strobe = s->keyrow[i] & s->strobe_state; | |
286 | if (strobe) { | |
287 | sense |= 1 << i; | |
288 | if (!(s->sense_state & (1 << i))) | |
38641a52 | 289 | qemu_irq_raise(s->sense[i]); |
b00052e4 | 290 | } else if (s->sense_state & (1 << i)) |
38641a52 | 291 | qemu_irq_lower(s->sense[i]); |
b00052e4 AZ |
292 | } |
293 | ||
294 | s->sense_state = sense; | |
295 | } | |
296 | ||
38641a52 | 297 | static void spitz_keyboard_strobe(void *opaque, int line, int level) |
b00052e4 | 298 | { |
bc24a225 | 299 | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
38641a52 AZ |
300 | |
301 | if (level) | |
302 | s->strobe_state |= 1 << line; | |
303 | else | |
304 | s->strobe_state &= ~(1 << line); | |
305 | spitz_keyboard_sense_update(s); | |
b00052e4 AZ |
306 | } |
307 | ||
bc24a225 | 308 | static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) |
b00052e4 AZ |
309 | { |
310 | int spitz_keycode = s->keymap[keycode & 0x7f]; | |
311 | if (spitz_keycode == -1) | |
312 | return; | |
313 | ||
314 | /* Handle the additional keys */ | |
315 | if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { | |
7ef4227b | 316 | qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80)); |
b00052e4 AZ |
317 | return; |
318 | } | |
319 | ||
320 | if (keycode & 0x80) | |
321 | s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); | |
322 | else | |
323 | s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); | |
324 | ||
325 | spitz_keyboard_sense_update(s); | |
326 | } | |
327 | ||
0062609f PM |
328 | #define SPITZ_MOD_SHIFT (1 << 7) |
329 | #define SPITZ_MOD_CTRL (1 << 8) | |
330 | #define SPITZ_MOD_FN (1 << 9) | |
b00052e4 | 331 | |
f6319db2 | 332 | #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c |
b00052e4 | 333 | |
7ef4227b | 334 | static void spitz_keyboard_handler(void *opaque, int keycode) |
b00052e4 | 335 | { |
7ef4227b | 336 | SpitzKeyboardState *s = opaque; |
b00052e4 AZ |
337 | uint16_t code; |
338 | int mapcode; | |
339 | switch (keycode) { | |
f6319db2 | 340 | case 0x2a: /* Left Shift */ |
b00052e4 AZ |
341 | s->modifiers |= 1; |
342 | break; | |
343 | case 0xaa: | |
344 | s->modifiers &= ~1; | |
345 | break; | |
f6319db2 | 346 | case 0x36: /* Right Shift */ |
b00052e4 AZ |
347 | s->modifiers |= 2; |
348 | break; | |
349 | case 0xb6: | |
350 | s->modifiers &= ~2; | |
351 | break; | |
f6319db2 | 352 | case 0x1d: /* Control */ |
b00052e4 AZ |
353 | s->modifiers |= 4; |
354 | break; | |
355 | case 0x9d: | |
356 | s->modifiers &= ~4; | |
357 | break; | |
f6319db2 | 358 | case 0x38: /* Alt */ |
b00052e4 AZ |
359 | s->modifiers |= 8; |
360 | break; | |
361 | case 0xb8: | |
362 | s->modifiers &= ~8; | |
363 | break; | |
364 | } | |
365 | ||
366 | code = s->pre_map[mapcode = ((s->modifiers & 3) ? | |
0062609f PM |
367 | (keycode | SPITZ_MOD_SHIFT) : |
368 | (keycode & ~SPITZ_MOD_SHIFT))]; | |
b00052e4 AZ |
369 | |
370 | if (code != mapcode) { | |
371 | #if 0 | |
0062609f | 372 | if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) { |
b00052e4 | 373 | QUEUE_KEY(0x2a | (keycode & 0x80)); |
0062609f PM |
374 | } |
375 | if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) { | |
b00052e4 | 376 | QUEUE_KEY(0x1d | (keycode & 0x80)); |
0062609f PM |
377 | } |
378 | if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) { | |
b00052e4 | 379 | QUEUE_KEY(0x38 | (keycode & 0x80)); |
0062609f PM |
380 | } |
381 | if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) { | |
b00052e4 | 382 | QUEUE_KEY(0x2a | (~keycode & 0x80)); |
0062609f PM |
383 | } |
384 | if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) { | |
b00052e4 | 385 | QUEUE_KEY(0x36 | (~keycode & 0x80)); |
0062609f | 386 | } |
b00052e4 AZ |
387 | #else |
388 | if (keycode & 0x80) { | |
389 | if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) | |
390 | QUEUE_KEY(0x2a | 0x80); | |
391 | if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) | |
392 | QUEUE_KEY(0x1d | 0x80); | |
393 | if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) | |
394 | QUEUE_KEY(0x38 | 0x80); | |
395 | if ((s->imodifiers & 0x10) && (s->modifiers & 1)) | |
396 | QUEUE_KEY(0x2a); | |
397 | if ((s->imodifiers & 0x20) && (s->modifiers & 2)) | |
398 | QUEUE_KEY(0x36); | |
399 | s->imodifiers = 0; | |
400 | } else { | |
0062609f PM |
401 | if ((code & SPITZ_MOD_SHIFT) && |
402 | !((s->modifiers | s->imodifiers) & 1)) { | |
b00052e4 AZ |
403 | QUEUE_KEY(0x2a); |
404 | s->imodifiers |= 1; | |
405 | } | |
0062609f PM |
406 | if ((code & SPITZ_MOD_CTRL) && |
407 | !((s->modifiers | s->imodifiers) & 4)) { | |
b00052e4 AZ |
408 | QUEUE_KEY(0x1d); |
409 | s->imodifiers |= 4; | |
410 | } | |
0062609f PM |
411 | if ((code & SPITZ_MOD_FN) && |
412 | !((s->modifiers | s->imodifiers) & 8)) { | |
b00052e4 AZ |
413 | QUEUE_KEY(0x38); |
414 | s->imodifiers |= 8; | |
415 | } | |
0062609f | 416 | if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) && |
b00052e4 AZ |
417 | !(s->imodifiers & 0x10)) { |
418 | QUEUE_KEY(0x2a | 0x80); | |
419 | s->imodifiers |= 0x10; | |
420 | } | |
0062609f | 421 | if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) && |
b00052e4 AZ |
422 | !(s->imodifiers & 0x20)) { |
423 | QUEUE_KEY(0x36 | 0x80); | |
424 | s->imodifiers |= 0x20; | |
425 | } | |
426 | } | |
427 | #endif | |
428 | } | |
429 | ||
430 | QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); | |
431 | } | |
432 | ||
433 | static void spitz_keyboard_tick(void *opaque) | |
434 | { | |
bc24a225 | 435 | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
b00052e4 AZ |
436 | |
437 | if (s->fifolen) { | |
438 | spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); | |
439 | s->fifolen --; | |
440 | if (s->fifopos >= 16) | |
441 | s->fifopos = 0; | |
442 | } | |
443 | ||
bc72ad67 | 444 | timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + |
73bcb24d | 445 | NANOSECONDS_PER_SECOND / 32); |
b00052e4 AZ |
446 | } |
447 | ||
bc24a225 | 448 | static void spitz_keyboard_pre_map(SpitzKeyboardState *s) |
b00052e4 AZ |
449 | { |
450 | int i; | |
451 | for (i = 0; i < 0x100; i ++) | |
452 | s->pre_map[i] = i; | |
0062609f PM |
453 | s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */ |
454 | s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */ | |
455 | s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */ | |
456 | s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */ | |
457 | s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */ | |
458 | s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */ | |
459 | s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */ | |
460 | s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */ | |
461 | s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */ | |
462 | s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */ | |
463 | s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */ | |
464 | s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */ | |
465 | s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */ | |
466 | s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */ | |
467 | s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */ | |
468 | s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */ | |
469 | s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */ | |
470 | s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */ | |
471 | s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */ | |
472 | s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */ | |
473 | s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */ | |
474 | s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */ | |
475 | s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */ | |
476 | s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */ | |
477 | s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */ | |
478 | s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */ | |
479 | s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */ | |
480 | s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */ | |
481 | s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */ | |
482 | s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */ | |
483 | s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */ | |
484 | s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */ | |
b00052e4 AZ |
485 | |
486 | s->modifiers = 0; | |
487 | s->imodifiers = 0; | |
488 | s->fifopos = 0; | |
489 | s->fifolen = 0; | |
b00052e4 AZ |
490 | } |
491 | ||
0062609f PM |
492 | #undef SPITZ_MOD_SHIFT |
493 | #undef SPITZ_MOD_CTRL | |
494 | #undef SPITZ_MOD_FN | |
b00052e4 | 495 | |
7ef4227b | 496 | static int spitz_keyboard_post_load(void *opaque, int version_id) |
aa941b94 | 497 | { |
bc24a225 | 498 | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
aa941b94 AZ |
499 | |
500 | /* Release all pressed keys */ | |
501 | memset(s->keyrow, 0, sizeof(s->keyrow)); | |
502 | spitz_keyboard_sense_update(s); | |
503 | s->modifiers = 0; | |
504 | s->imodifiers = 0; | |
505 | s->fifopos = 0; | |
506 | s->fifolen = 0; | |
507 | ||
508 | return 0; | |
509 | } | |
510 | ||
bc24a225 | 511 | static void spitz_keyboard_register(PXA2xxState *cpu) |
b00052e4 | 512 | { |
7ef4227b DES |
513 | int i; |
514 | DeviceState *dev; | |
bc24a225 | 515 | SpitzKeyboardState *s; |
b00052e4 | 516 | |
73e9d965 AF |
517 | dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL); |
518 | s = SPITZ_KEYBOARD(dev); | |
b00052e4 | 519 | |
38641a52 | 520 | for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) |
0bb53337 | 521 | qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i])); |
38641a52 AZ |
522 | |
523 | for (i = 0; i < 5; i ++) | |
0bb53337 | 524 | s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); |
38641a52 | 525 | |
7ef4227b DES |
526 | if (!graphic_rotate) |
527 | s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); | |
528 | ||
529 | for (i = 0; i < 5; i++) | |
530 | qemu_set_irq(s->gpiomap[i], 0); | |
531 | ||
b00052e4 | 532 | for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) |
0bb53337 | 533 | qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], |
7ef4227b DES |
534 | qdev_get_gpio_in(dev, i)); |
535 | ||
bc72ad67 | 536 | timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); |
7ef4227b DES |
537 | |
538 | qemu_add_kbd_event_handler(spitz_keyboard_handler, s); | |
539 | } | |
540 | ||
f68575c9 | 541 | static void spitz_keyboard_init(Object *obj) |
7ef4227b | 542 | { |
f68575c9 XZ |
543 | DeviceState *dev = DEVICE(obj); |
544 | SpitzKeyboardState *s = SPITZ_KEYBOARD(obj); | |
7ef4227b DES |
545 | int i, j; |
546 | ||
7ef4227b DES |
547 | for (i = 0; i < 0x80; i ++) |
548 | s->keymap[i] = -1; | |
549 | for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) | |
550 | for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) | |
551 | if (spitz_keymap[i][j] != -1) | |
552 | s->keymap[spitz_keymap[i][j]] = (i << 4) | j; | |
b00052e4 AZ |
553 | |
554 | spitz_keyboard_pre_map(s); | |
aa941b94 | 555 | |
73e9d965 AF |
556 | qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); |
557 | qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM); | |
b00052e4 AZ |
558 | } |
559 | ||
5719f974 PN |
560 | static void spitz_keyboard_realize(DeviceState *dev, Error **errp) |
561 | { | |
562 | SpitzKeyboardState *s = SPITZ_KEYBOARD(dev); | |
563 | s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s); | |
564 | } | |
565 | ||
b00052e4 AZ |
566 | /* LCD backlight controller */ |
567 | ||
f6319db2 PM |
568 | #define LCDTG_RESCTL 0x00 |
569 | #define LCDTG_PHACTRL 0x01 | |
570 | #define LCDTG_DUTYCTRL 0x02 | |
571 | #define LCDTG_POWERREG0 0x03 | |
572 | #define LCDTG_POWERREG1 0x04 | |
573 | #define LCDTG_GPOR3 0x05 | |
574 | #define LCDTG_PICTRL 0x06 | |
575 | #define LCDTG_POLCTRL 0x07 | |
b00052e4 | 576 | |
62a4d340 | 577 | #define TYPE_SPITZ_LCDTG "spitz-lcdtg" |
8063396b | 578 | OBJECT_DECLARE_SIMPLE_TYPE(SpitzLCDTG, SPITZ_LCDTG) |
62a4d340 | 579 | |
db1015e9 | 580 | struct SpitzLCDTG { |
ec7e429b | 581 | SSIPeripheral ssidev; |
43842120 DES |
582 | uint32_t bl_intensity; |
583 | uint32_t bl_power; | |
db1015e9 | 584 | }; |
b00052e4 | 585 | |
a984a69e | 586 | static void spitz_bl_update(SpitzLCDTG *s) |
b00052e4 | 587 | { |
a984a69e | 588 | if (s->bl_power && s->bl_intensity) |
98554b3b | 589 | zaurus_printf("LCD Backlight now at %u/63\n", s->bl_intensity); |
b00052e4 | 590 | else |
89cdb6af | 591 | zaurus_printf("LCD Backlight now off\n"); |
b00052e4 AZ |
592 | } |
593 | ||
38641a52 | 594 | static inline void spitz_bl_bit5(void *opaque, int line, int level) |
b00052e4 | 595 | { |
2e354c02 | 596 | SpitzLCDTG *s = opaque; |
a984a69e | 597 | int prev = s->bl_intensity; |
b00052e4 AZ |
598 | |
599 | if (level) | |
a984a69e | 600 | s->bl_intensity &= ~0x20; |
b00052e4 | 601 | else |
a984a69e | 602 | s->bl_intensity |= 0x20; |
b00052e4 | 603 | |
a984a69e PB |
604 | if (s->bl_power && prev != s->bl_intensity) |
605 | spitz_bl_update(s); | |
b00052e4 AZ |
606 | } |
607 | ||
38641a52 | 608 | static inline void spitz_bl_power(void *opaque, int line, int level) |
b00052e4 | 609 | { |
2e354c02 | 610 | SpitzLCDTG *s = opaque; |
a984a69e PB |
611 | s->bl_power = !!level; |
612 | spitz_bl_update(s); | |
b00052e4 AZ |
613 | } |
614 | ||
ec7e429b | 615 | static uint32_t spitz_lcdtg_transfer(SSIPeripheral *dev, uint32_t value) |
b00052e4 | 616 | { |
62a4d340 | 617 | SpitzLCDTG *s = SPITZ_LCDTG(dev); |
a984a69e PB |
618 | int addr; |
619 | addr = value >> 5; | |
620 | value &= 0x1f; | |
b00052e4 AZ |
621 | |
622 | switch (addr) { | |
623 | case LCDTG_RESCTL: | |
624 | if (value) | |
89cdb6af | 625 | zaurus_printf("LCD in QVGA mode\n"); |
b00052e4 | 626 | else |
89cdb6af | 627 | zaurus_printf("LCD in VGA mode\n"); |
b00052e4 AZ |
628 | break; |
629 | ||
630 | case LCDTG_DUTYCTRL: | |
a984a69e PB |
631 | s->bl_intensity &= ~0x1f; |
632 | s->bl_intensity |= value; | |
633 | if (s->bl_power) | |
634 | spitz_bl_update(s); | |
b00052e4 AZ |
635 | break; |
636 | ||
637 | case LCDTG_POWERREG0: | |
638 | /* Set common voltage to M62332FP */ | |
639 | break; | |
640 | } | |
a984a69e PB |
641 | return 0; |
642 | } | |
643 | ||
ec7e429b | 644 | static void spitz_lcdtg_realize(SSIPeripheral *ssi, Error **errp) |
a984a69e | 645 | { |
62a4d340 | 646 | SpitzLCDTG *s = SPITZ_LCDTG(ssi); |
2e354c02 | 647 | DeviceState *dev = DEVICE(s); |
a984a69e | 648 | |
a984a69e PB |
649 | s->bl_power = 0; |
650 | s->bl_intensity = 0x20; | |
2e354c02 PM |
651 | |
652 | qdev_init_gpio_in_named(dev, spitz_bl_bit5, "bl_bit5", 1); | |
653 | qdev_init_gpio_in_named(dev, spitz_bl_power, "bl_power", 1); | |
b00052e4 AZ |
654 | } |
655 | ||
656 | /* SSP devices */ | |
657 | ||
f6319db2 | 658 | #define CORGI_SSP_PORT 2 |
b00052e4 | 659 | |
f6319db2 PM |
660 | #define SPITZ_GPIO_LCDCON_CS 53 |
661 | #define SPITZ_GPIO_ADS7846_CS 14 | |
662 | #define SPITZ_GPIO_MAX1111_CS 20 | |
663 | #define SPITZ_GPIO_TP_INT 11 | |
b00052e4 | 664 | |
62a4d340 | 665 | #define TYPE_CORGI_SSP "corgi-ssp" |
8063396b | 666 | OBJECT_DECLARE_SIMPLE_TYPE(CorgiSSPState, CORGI_SSP) |
62a4d340 | 667 | |
b00052e4 | 668 | /* "Demux" the signal based on current chipselect */ |
db1015e9 | 669 | struct CorgiSSPState { |
ec7e429b | 670 | SSIPeripheral ssidev; |
a984a69e | 671 | SSIBus *bus[3]; |
43842120 | 672 | uint32_t enable[3]; |
db1015e9 | 673 | }; |
b00052e4 | 674 | |
ec7e429b | 675 | static uint32_t corgi_ssp_transfer(SSIPeripheral *dev, uint32_t value) |
b00052e4 | 676 | { |
62a4d340 | 677 | CorgiSSPState *s = CORGI_SSP(dev); |
a984a69e PB |
678 | int i; |
679 | ||
680 | for (i = 0; i < 3; i++) { | |
681 | if (s->enable[i]) { | |
682 | return ssi_transfer(s->bus[i], value); | |
683 | } | |
684 | } | |
685 | return 0; | |
b00052e4 AZ |
686 | } |
687 | ||
38641a52 | 688 | static void corgi_ssp_gpio_cs(void *opaque, int line, int level) |
b00052e4 | 689 | { |
a984a69e PB |
690 | CorgiSSPState *s = (CorgiSSPState *)opaque; |
691 | assert(line >= 0 && line < 3); | |
692 | s->enable[line] = !level; | |
b00052e4 AZ |
693 | } |
694 | ||
f6319db2 PM |
695 | #define MAX1111_BATT_VOLT 1 |
696 | #define MAX1111_BATT_TEMP 2 | |
697 | #define MAX1111_ACIN_VOLT 3 | |
b00052e4 | 698 | |
f6319db2 PM |
699 | #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ |
700 | #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ | |
701 | #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ | |
b00052e4 | 702 | |
ec7e429b | 703 | static void corgi_ssp_realize(SSIPeripheral *d, Error **errp) |
a984a69e | 704 | { |
1a7d9ee6 | 705 | DeviceState *dev = DEVICE(d); |
62a4d340 | 706 | CorgiSSPState *s = CORGI_SSP(d); |
a984a69e | 707 | |
1a7d9ee6 PC |
708 | qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3); |
709 | s->bus[0] = ssi_create_bus(dev, "ssi0"); | |
710 | s->bus[1] = ssi_create_bus(dev, "ssi1"); | |
711 | s->bus[2] = ssi_create_bus(dev, "ssi2"); | |
a984a69e PB |
712 | } |
713 | ||
39854425 | 714 | static void spitz_ssp_attach(SpitzMachineState *sms) |
b00052e4 | 715 | { |
a984a69e PB |
716 | void *bus; |
717 | ||
ec7e429b PMD |
718 | sms->mux = ssi_create_peripheral(sms->mpu->ssp[CORGI_SSP_PORT - 1], |
719 | TYPE_CORGI_SSP); | |
38641a52 | 720 | |
39854425 | 721 | bus = qdev_get_child_bus(sms->mux, "ssi0"); |
ec7e429b | 722 | sms->lcdtg = ssi_create_peripheral(bus, TYPE_SPITZ_LCDTG); |
b00052e4 | 723 | |
39854425 | 724 | bus = qdev_get_child_bus(sms->mux, "ssi1"); |
ec7e429b | 725 | sms->ads7846 = ssi_create_peripheral(bus, "ads7846"); |
39854425 PM |
726 | qdev_connect_gpio_out(sms->ads7846, 0, |
727 | qdev_get_gpio_in(sms->mpu->gpio, SPITZ_GPIO_TP_INT)); | |
b00052e4 | 728 | |
39854425 | 729 | bus = qdev_get_child_bus(sms->mux, "ssi2"); |
30296812 | 730 | sms->max1111 = qdev_new(TYPE_MAX_1111); |
4aed7b51 PM |
731 | qdev_prop_set_uint8(sms->max1111, "input1" /* BATT_VOLT */, |
732 | SPITZ_BATTERY_VOLT); | |
733 | qdev_prop_set_uint8(sms->max1111, "input2" /* BATT_TEMP */, 0); | |
734 | qdev_prop_set_uint8(sms->max1111, "input3" /* ACIN_VOLT */, | |
735 | SPITZ_CHARGEON_ACIN); | |
736 | ssi_realize_and_unref(sms->max1111, bus, &error_fatal); | |
b00052e4 | 737 | |
39854425 PM |
738 | qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_LCDCON_CS, |
739 | qdev_get_gpio_in(sms->mux, 0)); | |
740 | qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_ADS7846_CS, | |
741 | qdev_get_gpio_in(sms->mux, 1)); | |
742 | qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_MAX1111_CS, | |
743 | qdev_get_gpio_in(sms->mux, 2)); | |
b00052e4 AZ |
744 | } |
745 | ||
746 | /* CF Microdrive */ | |
747 | ||
bc24a225 | 748 | static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) |
b00052e4 | 749 | { |
bc24a225 | 750 | PCMCIACardState *md; |
751c6a17 | 751 | DriveInfo *dinfo; |
b00052e4 | 752 | |
751c6a17 | 753 | dinfo = drive_get(IF_IDE, 0, 0); |
124386cc | 754 | if (!dinfo || dinfo->media_cd) |
e4bcb14c | 755 | return; |
124386cc MA |
756 | md = dscm1xxxx_init(dinfo); |
757 | pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); | |
b00052e4 AZ |
758 | } |
759 | ||
adb86c37 AZ |
760 | /* Wm8750 and Max7310 on I2C */ |
761 | ||
f6319db2 PM |
762 | #define AKITA_MAX_ADDR 0x18 |
763 | #define SPITZ_WM_ADDRL 0x1b | |
764 | #define SPITZ_WM_ADDRH 0x1a | |
adb86c37 | 765 | |
f6319db2 | 766 | #define SPITZ_GPIO_WM 5 |
adb86c37 | 767 | |
38641a52 | 768 | static void spitz_wm8750_addr(void *opaque, int line, int level) |
adb86c37 | 769 | { |
9e07bdf8 | 770 | I2CSlave *wm = (I2CSlave *) opaque; |
adb86c37 | 771 | if (level) |
c8665a59 | 772 | i2c_slave_set_address(wm, SPITZ_WM_ADDRH); |
adb86c37 | 773 | else |
c8665a59 | 774 | i2c_slave_set_address(wm, SPITZ_WM_ADDRL); |
adb86c37 | 775 | } |
adb86c37 | 776 | |
bc24a225 | 777 | static void spitz_i2c_setup(PXA2xxState *cpu) |
adb86c37 AZ |
778 | { |
779 | /* Attach the CPU on one end of our I2C bus. */ | |
a5c82852 | 780 | I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); |
adb86c37 | 781 | |
cdbe40ca | 782 | DeviceState *wm; |
adb86c37 | 783 | |
adb86c37 | 784 | /* Attach a WM8750 to the bus */ |
1373b15b | 785 | wm = DEVICE(i2c_slave_create_simple(bus, TYPE_WM8750, 0)); |
adb86c37 | 786 | |
38641a52 | 787 | spitz_wm8750_addr(wm, 0, 0); |
0bb53337 | 788 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, |
f3c7d038 | 789 | qemu_allocate_irq(spitz_wm8750_addr, wm, 0)); |
adb86c37 AZ |
790 | /* .. and to the sound interface. */ |
791 | cpu->i2s->opaque = wm; | |
792 | cpu->i2s->codec_out = wm8750_dac_dat; | |
793 | cpu->i2s->codec_in = wm8750_adc_dat; | |
794 | wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); | |
adb86c37 AZ |
795 | } |
796 | ||
bc24a225 | 797 | static void spitz_akita_i2c_setup(PXA2xxState *cpu) |
adb86c37 AZ |
798 | { |
799 | /* Attach a Max7310 to Akita I2C bus. */ | |
1373b15b | 800 | i2c_slave_create_simple(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", |
6c0bd6bd | 801 | AKITA_MAX_ADDR); |
adb86c37 AZ |
802 | } |
803 | ||
b00052e4 AZ |
804 | /* Other peripherals */ |
805 | ||
eb2dc887 PM |
806 | /* |
807 | * Encapsulation of some miscellaneous GPIO line behaviour for the Spitz boards. | |
808 | * | |
809 | * QEMU interface: | |
810 | * + named GPIO inputs "green-led", "orange-led", "charging", "discharging": | |
811 | * these currently just print messages that the line has been signalled | |
812 | * + named GPIO input "adc-temp-on": set to cause the battery-temperature | |
813 | * value to be passed to the max111x ADC | |
814 | * + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x | |
815 | */ | |
816 | #define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio" | |
8063396b | 817 | OBJECT_DECLARE_SIMPLE_TYPE(SpitzMiscGPIOState, SPITZ_MISC_GPIO) |
eb2dc887 | 818 | |
db1015e9 | 819 | struct SpitzMiscGPIOState { |
eb2dc887 PM |
820 | SysBusDevice parent_obj; |
821 | ||
822 | qemu_irq adc_value; | |
db1015e9 | 823 | }; |
eb2dc887 PM |
824 | |
825 | static void spitz_misc_charging(void *opaque, int n, int level) | |
b00052e4 | 826 | { |
eb2dc887 PM |
827 | zaurus_printf("Charging %s.\n", level ? "off" : "on"); |
828 | } | |
829 | ||
830 | static void spitz_misc_discharging(void *opaque, int n, int level) | |
831 | { | |
832 | zaurus_printf("Discharging %s.\n", level ? "off" : "on"); | |
833 | } | |
834 | ||
835 | static void spitz_misc_green_led(void *opaque, int n, int level) | |
836 | { | |
837 | zaurus_printf("Green LED %s.\n", level ? "off" : "on"); | |
838 | } | |
839 | ||
840 | static void spitz_misc_orange_led(void *opaque, int n, int level) | |
841 | { | |
842 | zaurus_printf("Orange LED %s.\n", level ? "off" : "on"); | |
843 | } | |
844 | ||
845 | static void spitz_misc_adc_temp(void *opaque, int n, int level) | |
846 | { | |
847 | SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(opaque); | |
848 | int batt_temp = level ? SPITZ_BATTERY_TEMP : 0; | |
849 | ||
850 | qemu_set_irq(s->adc_value, batt_temp); | |
851 | } | |
852 | ||
853 | static void spitz_misc_gpio_init(Object *obj) | |
854 | { | |
855 | SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(obj); | |
856 | DeviceState *dev = DEVICE(obj); | |
857 | ||
858 | qdev_init_gpio_in_named(dev, spitz_misc_charging, "charging", 1); | |
859 | qdev_init_gpio_in_named(dev, spitz_misc_discharging, "discharging", 1); | |
860 | qdev_init_gpio_in_named(dev, spitz_misc_green_led, "green-led", 1); | |
861 | qdev_init_gpio_in_named(dev, spitz_misc_orange_led, "orange-led", 1); | |
862 | qdev_init_gpio_in_named(dev, spitz_misc_adc_temp, "adc-temp-on", 1); | |
863 | ||
864 | qdev_init_gpio_out_named(dev, &s->adc_value, "adc-temp", 1); | |
b00052e4 AZ |
865 | } |
866 | ||
f6319db2 PM |
867 | #define SPITZ_SCP_LED_GREEN 1 |
868 | #define SPITZ_SCP_JK_B 2 | |
869 | #define SPITZ_SCP_CHRG_ON 3 | |
870 | #define SPITZ_SCP_MUTE_L 4 | |
871 | #define SPITZ_SCP_MUTE_R 5 | |
872 | #define SPITZ_SCP_CF_POWER 6 | |
873 | #define SPITZ_SCP_LED_ORANGE 7 | |
874 | #define SPITZ_SCP_JK_A 8 | |
875 | #define SPITZ_SCP_ADC_TEMP_ON 9 | |
876 | #define SPITZ_SCP2_IR_ON 1 | |
877 | #define SPITZ_SCP2_AKIN_PULLUP 2 | |
878 | #define SPITZ_SCP2_BACKLIGHT_CONT 7 | |
879 | #define SPITZ_SCP2_BACKLIGHT_ON 8 | |
880 | #define SPITZ_SCP2_MIC_BIAS 9 | |
b00052e4 | 881 | |
ffe7f906 | 882 | static void spitz_scoop_gpio_setup(SpitzMachineState *sms) |
b00052e4 | 883 | { |
eb2dc887 PM |
884 | DeviceState *miscdev = sysbus_create_simple(TYPE_SPITZ_MISC_GPIO, -1, NULL); |
885 | ||
886 | sms->misc_gpio = miscdev; | |
887 | ||
888 | qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_CHRG_ON, | |
889 | qdev_get_gpio_in_named(miscdev, "charging", 0)); | |
890 | qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_JK_B, | |
891 | qdev_get_gpio_in_named(miscdev, "discharging", 0)); | |
892 | qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_GREEN, | |
893 | qdev_get_gpio_in_named(miscdev, "green-led", 0)); | |
894 | qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_ORANGE, | |
895 | qdev_get_gpio_in_named(miscdev, "orange-led", 0)); | |
896 | qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_ADC_TEMP_ON, | |
897 | qdev_get_gpio_in_named(miscdev, "adc-temp-on", 0)); | |
898 | qdev_connect_gpio_out_named(miscdev, "adc-temp", 0, | |
899 | qdev_get_gpio_in(sms->max1111, MAX1111_BATT_TEMP)); | |
b00052e4 | 900 | |
ffe7f906 PM |
901 | if (sms->scp1) { |
902 | qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_CONT, | |
2e354c02 | 903 | qdev_get_gpio_in_named(sms->lcdtg, "bl_bit5", 0)); |
ffe7f906 | 904 | qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_ON, |
2e354c02 | 905 | qdev_get_gpio_in_named(sms->lcdtg, "bl_power", 0)); |
b00052e4 | 906 | } |
b00052e4 AZ |
907 | } |
908 | ||
f6319db2 PM |
909 | #define SPITZ_GPIO_HSYNC 22 |
910 | #define SPITZ_GPIO_SD_DETECT 9 | |
911 | #define SPITZ_GPIO_SD_WP 81 | |
912 | #define SPITZ_GPIO_ON_RESET 89 | |
913 | #define SPITZ_GPIO_BAT_COVER 90 | |
914 | #define SPITZ_GPIO_CF1_IRQ 105 | |
915 | #define SPITZ_GPIO_CF1_CD 94 | |
916 | #define SPITZ_GPIO_CF2_IRQ 106 | |
917 | #define SPITZ_GPIO_CF2_CD 93 | |
b00052e4 | 918 | |
38641a52 | 919 | static int spitz_hsync; |
b00052e4 | 920 | |
38641a52 | 921 | static void spitz_lcd_hsync_handler(void *opaque, int line, int level) |
b00052e4 | 922 | { |
bc24a225 | 923 | PXA2xxState *cpu = (PXA2xxState *) opaque; |
0bb53337 | 924 | qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync); |
b00052e4 AZ |
925 | spitz_hsync ^= 1; |
926 | } | |
927 | ||
14da5821 GR |
928 | static void spitz_reset(void *opaque, int line, int level) |
929 | { | |
930 | if (level) { | |
cf83f140 | 931 | qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); |
14da5821 GR |
932 | } |
933 | } | |
934 | ||
bc24a225 | 935 | static void spitz_gpio_setup(PXA2xxState *cpu, int slots) |
b00052e4 | 936 | { |
38641a52 | 937 | qemu_irq lcd_hsync; |
14da5821 GR |
938 | qemu_irq reset; |
939 | ||
b00052e4 AZ |
940 | /* |
941 | * Bad hack: We toggle the LCD hsync GPIO on every GPIO status | |
942 | * read to satisfy broken guests that poll-wait for hsync. | |
943 | * Simulating a real hsync event would be less practical and | |
944 | * wouldn't guarantee that a guest ever exits the loop. | |
945 | */ | |
946 | spitz_hsync = 0; | |
f3c7d038 | 947 | lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0); |
38641a52 AZ |
948 | pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); |
949 | pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); | |
b00052e4 AZ |
950 | |
951 | /* MMC/SD host */ | |
02ce600c | 952 | pxa2xx_mmci_handlers(cpu->mmc, |
0bb53337 DES |
953 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), |
954 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); | |
b00052e4 AZ |
955 | |
956 | /* Battery lock always closed */ | |
0bb53337 | 957 | qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); |
b00052e4 AZ |
958 | |
959 | /* Handle reset */ | |
14da5821 GR |
960 | reset = qemu_allocate_irq(spitz_reset, cpu, 0); |
961 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset); | |
b00052e4 AZ |
962 | |
963 | /* PCMCIA signals: card's IRQ and Card-Detect */ | |
b00052e4 | 964 | if (slots >= 1) |
38641a52 | 965 | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], |
0bb53337 DES |
966 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ), |
967 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD)); | |
b00052e4 | 968 | if (slots >= 2) |
38641a52 | 969 | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], |
0bb53337 DES |
970 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ), |
971 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD)); | |
b00052e4 AZ |
972 | } |
973 | ||
b00052e4 | 974 | /* Board init. */ |
f6319db2 PM |
975 | #define SPITZ_RAM 0x04000000 |
976 | #define SPITZ_ROM 0x00800000 | |
7fb4fdcf | 977 | |
f93eb9ff AZ |
978 | static struct arm_boot_info spitz_binfo = { |
979 | .loader_start = PXA2XX_SDRAM_BASE, | |
980 | .ram_size = 0x04000000, | |
981 | }; | |
982 | ||
e3d986da | 983 | static void spitz_common_init(MachineState *machine) |
b00052e4 | 984 | { |
e3d986da | 985 | SpitzMachineClass *smc = SPITZ_MACHINE_GET_CLASS(machine); |
39854425 | 986 | SpitzMachineState *sms = SPITZ_MACHINE(machine); |
e3d986da | 987 | enum spitz_model_e model = smc->model; |
2e7ad760 | 988 | PXA2xxState *mpu; |
a6dc4c2d | 989 | MemoryRegion *address_space_mem = get_system_memory(); |
7cc09e6c | 990 | MemoryRegion *rom = g_new(MemoryRegion, 1); |
b00052e4 | 991 | |
d95b2f8d | 992 | /* Setup CPU & memory */ |
ba1ba5cc IM |
993 | mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, |
994 | machine->cpu_type); | |
39854425 | 995 | sms->mpu = mpu; |
b00052e4 | 996 | |
2e7ad760 | 997 | sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); |
b00052e4 | 998 | |
16260006 | 999 | memory_region_init_rom(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); |
7cc09e6c | 1000 | memory_region_add_subregion(address_space_mem, 0, rom); |
b00052e4 AZ |
1001 | |
1002 | /* Setup peripherals */ | |
2e7ad760 | 1003 | spitz_keyboard_register(mpu); |
b00052e4 | 1004 | |
39854425 | 1005 | spitz_ssp_attach(sms); |
b00052e4 | 1006 | |
ffe7f906 | 1007 | sms->scp0 = sysbus_create_simple("scoop", 0x10800000, NULL); |
e33d8cdb | 1008 | if (model != akita) { |
ffe7f906 PM |
1009 | sms->scp1 = sysbus_create_simple("scoop", 0x08800040, NULL); |
1010 | } else { | |
1011 | sms->scp1 = NULL; | |
e33d8cdb | 1012 | } |
b00052e4 | 1013 | |
ffe7f906 | 1014 | spitz_scoop_gpio_setup(sms); |
b00052e4 | 1015 | |
2e7ad760 | 1016 | spitz_gpio_setup(mpu, (model == akita) ? 1 : 2); |
b00052e4 | 1017 | |
2e7ad760 | 1018 | spitz_i2c_setup(mpu); |
adb86c37 AZ |
1019 | |
1020 | if (model == akita) | |
2e7ad760 | 1021 | spitz_akita_i2c_setup(mpu); |
adb86c37 | 1022 | |
b00052e4 | 1023 | if (model == terrier) |
bf5ee248 | 1024 | /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */ |
2e7ad760 | 1025 | spitz_microdrive_attach(mpu, 1); |
b00052e4 | 1026 | else if (model != akita) |
15b18ec2 | 1027 | /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ |
2e7ad760 | 1028 | spitz_microdrive_attach(mpu, 0); |
b00052e4 | 1029 | |
e3d986da | 1030 | spitz_binfo.board_id = smc->arm_id; |
2744ece8 | 1031 | arm_load_kernel(mpu->cpu, machine, &spitz_binfo); |
f78630ab | 1032 | sl_bootparam_write(SL_PXA_PARAM_BASE); |
b00052e4 AZ |
1033 | } |
1034 | ||
e3d986da | 1035 | static void spitz_common_class_init(ObjectClass *oc, void *data) |
b00052e4 | 1036 | { |
e3d986da | 1037 | MachineClass *mc = MACHINE_CLASS(oc); |
b00052e4 | 1038 | |
e3d986da PM |
1039 | mc->block_default_type = IF_IDE; |
1040 | mc->ignore_memory_transaction_failures = true; | |
1041 | mc->init = spitz_common_init; | |
b00052e4 AZ |
1042 | } |
1043 | ||
e3d986da PM |
1044 | static const TypeInfo spitz_common_info = { |
1045 | .name = TYPE_SPITZ_MACHINE, | |
1046 | .parent = TYPE_MACHINE, | |
1047 | .abstract = true, | |
1048 | .instance_size = sizeof(SpitzMachineState), | |
1049 | .class_size = sizeof(SpitzMachineClass), | |
1050 | .class_init = spitz_common_class_init, | |
1051 | }; | |
b00052e4 | 1052 | |
8a661aea | 1053 | static void akitapda_class_init(ObjectClass *oc, void *data) |
e264d29d | 1054 | { |
8a661aea | 1055 | MachineClass *mc = MACHINE_CLASS(oc); |
e3d986da | 1056 | SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); |
8a661aea | 1057 | |
ad1e8db8 | 1058 | mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)"; |
ba1ba5cc | 1059 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); |
e3d986da PM |
1060 | smc->model = akita; |
1061 | smc->arm_id = 0x2e8; | |
e264d29d | 1062 | } |
b00052e4 | 1063 | |
8a661aea AF |
1064 | static const TypeInfo akitapda_type = { |
1065 | .name = MACHINE_TYPE_NAME("akita"), | |
e3d986da | 1066 | .parent = TYPE_SPITZ_MACHINE, |
8a661aea AF |
1067 | .class_init = akitapda_class_init, |
1068 | }; | |
b00052e4 | 1069 | |
8a661aea | 1070 | static void spitzpda_class_init(ObjectClass *oc, void *data) |
e264d29d | 1071 | { |
8a661aea | 1072 | MachineClass *mc = MACHINE_CLASS(oc); |
e3d986da | 1073 | SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); |
8a661aea | 1074 | |
ad1e8db8 | 1075 | mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)"; |
ba1ba5cc | 1076 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); |
e3d986da PM |
1077 | smc->model = spitz; |
1078 | smc->arm_id = 0x2c9; | |
e264d29d | 1079 | } |
b00052e4 | 1080 | |
8a661aea AF |
1081 | static const TypeInfo spitzpda_type = { |
1082 | .name = MACHINE_TYPE_NAME("spitz"), | |
e3d986da | 1083 | .parent = TYPE_SPITZ_MACHINE, |
8a661aea AF |
1084 | .class_init = spitzpda_class_init, |
1085 | }; | |
e264d29d | 1086 | |
8a661aea | 1087 | static void borzoipda_class_init(ObjectClass *oc, void *data) |
e264d29d | 1088 | { |
8a661aea | 1089 | MachineClass *mc = MACHINE_CLASS(oc); |
e3d986da | 1090 | SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); |
8a661aea | 1091 | |
ad1e8db8 | 1092 | mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)"; |
ba1ba5cc | 1093 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); |
e3d986da PM |
1094 | smc->model = borzoi; |
1095 | smc->arm_id = 0x33f; | |
e264d29d EH |
1096 | } |
1097 | ||
8a661aea AF |
1098 | static const TypeInfo borzoipda_type = { |
1099 | .name = MACHINE_TYPE_NAME("borzoi"), | |
e3d986da | 1100 | .parent = TYPE_SPITZ_MACHINE, |
8a661aea AF |
1101 | .class_init = borzoipda_class_init, |
1102 | }; | |
a984a69e | 1103 | |
8a661aea | 1104 | static void terrierpda_class_init(ObjectClass *oc, void *data) |
f80f9ec9 | 1105 | { |
8a661aea | 1106 | MachineClass *mc = MACHINE_CLASS(oc); |
e3d986da | 1107 | SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); |
8a661aea | 1108 | |
ad1e8db8 | 1109 | mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)"; |
ba1ba5cc | 1110 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5"); |
e3d986da PM |
1111 | smc->model = terrier; |
1112 | smc->arm_id = 0x33f; | |
f80f9ec9 AL |
1113 | } |
1114 | ||
8a661aea AF |
1115 | static const TypeInfo terrierpda_type = { |
1116 | .name = MACHINE_TYPE_NAME("terrier"), | |
e3d986da | 1117 | .parent = TYPE_SPITZ_MACHINE, |
8a661aea AF |
1118 | .class_init = terrierpda_class_init, |
1119 | }; | |
1120 | ||
1121 | static void spitz_machine_init(void) | |
1122 | { | |
e3d986da | 1123 | type_register_static(&spitz_common_info); |
8a661aea AF |
1124 | type_register_static(&akitapda_type); |
1125 | type_register_static(&spitzpda_type); | |
1126 | type_register_static(&borzoipda_type); | |
1127 | type_register_static(&terrierpda_type); | |
1128 | } | |
1129 | ||
0e6aac87 | 1130 | type_init(spitz_machine_init) |
f80f9ec9 | 1131 | |
7ef4227b DES |
1132 | static bool is_version_0(void *opaque, int version_id) |
1133 | { | |
1134 | return version_id == 0; | |
1135 | } | |
1136 | ||
cfa52e09 | 1137 | static const VMStateDescription vmstate_sl_nand_info = { |
34f9f0b5 DES |
1138 | .name = "sl-nand", |
1139 | .version_id = 0, | |
1140 | .minimum_version_id = 0, | |
8f1e884b | 1141 | .fields = (VMStateField[]) { |
34f9f0b5 DES |
1142 | VMSTATE_UINT8(ctl, SLNANDState), |
1143 | VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState), | |
1144 | VMSTATE_END_OF_LIST(), | |
1145 | }, | |
1146 | }; | |
1147 | ||
999e12bb AL |
1148 | static Property sl_nand_properties[] = { |
1149 | DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG), | |
1150 | DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1), | |
1151 | DEFINE_PROP_END_OF_LIST(), | |
1152 | }; | |
1153 | ||
1154 | static void sl_nand_class_init(ObjectClass *klass, void *data) | |
1155 | { | |
39bffca2 | 1156 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb | 1157 | |
39bffca2 | 1158 | dc->vmsd = &vmstate_sl_nand_info; |
4f67d30b | 1159 | device_class_set_props(dc, sl_nand_properties); |
07bc425e | 1160 | dc->realize = sl_nand_realize; |
9f9bdf43 | 1161 | /* Reason: init() method uses drive_get() */ |
e90f2a8c | 1162 | dc->user_creatable = false; |
999e12bb AL |
1163 | } |
1164 | ||
8c43a6f0 | 1165 | static const TypeInfo sl_nand_info = { |
7eb8104a | 1166 | .name = TYPE_SL_NAND, |
39bffca2 AL |
1167 | .parent = TYPE_SYS_BUS_DEVICE, |
1168 | .instance_size = sizeof(SLNANDState), | |
f68575c9 | 1169 | .instance_init = sl_nand_init, |
39bffca2 | 1170 | .class_init = sl_nand_class_init, |
34f9f0b5 DES |
1171 | }; |
1172 | ||
cfa52e09 | 1173 | static const VMStateDescription vmstate_spitz_kbd = { |
7ef4227b DES |
1174 | .name = "spitz-keyboard", |
1175 | .version_id = 1, | |
1176 | .minimum_version_id = 0, | |
7ef4227b | 1177 | .post_load = spitz_keyboard_post_load, |
8f1e884b | 1178 | .fields = (VMStateField[]) { |
7ef4227b DES |
1179 | VMSTATE_UINT16(sense_state, SpitzKeyboardState), |
1180 | VMSTATE_UINT16(strobe_state, SpitzKeyboardState), | |
1181 | VMSTATE_UNUSED_TEST(is_version_0, 5), | |
1182 | VMSTATE_END_OF_LIST(), | |
1183 | }, | |
1184 | }; | |
1185 | ||
999e12bb AL |
1186 | static void spitz_keyboard_class_init(ObjectClass *klass, void *data) |
1187 | { | |
39bffca2 | 1188 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb | 1189 | |
39bffca2 | 1190 | dc->vmsd = &vmstate_spitz_kbd; |
5719f974 | 1191 | dc->realize = spitz_keyboard_realize; |
999e12bb AL |
1192 | } |
1193 | ||
8c43a6f0 | 1194 | static const TypeInfo spitz_keyboard_info = { |
73e9d965 | 1195 | .name = TYPE_SPITZ_KEYBOARD, |
39bffca2 AL |
1196 | .parent = TYPE_SYS_BUS_DEVICE, |
1197 | .instance_size = sizeof(SpitzKeyboardState), | |
f68575c9 | 1198 | .instance_init = spitz_keyboard_init, |
39bffca2 | 1199 | .class_init = spitz_keyboard_class_init, |
7ef4227b DES |
1200 | }; |
1201 | ||
43842120 DES |
1202 | static const VMStateDescription vmstate_corgi_ssp_regs = { |
1203 | .name = "corgi-ssp", | |
66530953 PC |
1204 | .version_id = 2, |
1205 | .minimum_version_id = 2, | |
8f1e884b | 1206 | .fields = (VMStateField[]) { |
ec7e429b | 1207 | VMSTATE_SSI_PERIPHERAL(ssidev, CorgiSSPState), |
43842120 DES |
1208 | VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3), |
1209 | VMSTATE_END_OF_LIST(), | |
1210 | } | |
1211 | }; | |
1212 | ||
cd6c4cf2 AL |
1213 | static void corgi_ssp_class_init(ObjectClass *klass, void *data) |
1214 | { | |
39bffca2 | 1215 | DeviceClass *dc = DEVICE_CLASS(klass); |
ec7e429b | 1216 | SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass); |
cd6c4cf2 | 1217 | |
7673bb4c | 1218 | k->realize = corgi_ssp_realize; |
cd6c4cf2 | 1219 | k->transfer = corgi_ssp_transfer; |
39bffca2 | 1220 | dc->vmsd = &vmstate_corgi_ssp_regs; |
cd6c4cf2 AL |
1221 | } |
1222 | ||
8c43a6f0 | 1223 | static const TypeInfo corgi_ssp_info = { |
62a4d340 | 1224 | .name = TYPE_CORGI_SSP, |
ec7e429b | 1225 | .parent = TYPE_SSI_PERIPHERAL, |
39bffca2 AL |
1226 | .instance_size = sizeof(CorgiSSPState), |
1227 | .class_init = corgi_ssp_class_init, | |
a984a69e PB |
1228 | }; |
1229 | ||
43842120 DES |
1230 | static const VMStateDescription vmstate_spitz_lcdtg_regs = { |
1231 | .name = "spitz-lcdtg", | |
1232 | .version_id = 1, | |
1233 | .minimum_version_id = 1, | |
8f1e884b | 1234 | .fields = (VMStateField[]) { |
ec7e429b | 1235 | VMSTATE_SSI_PERIPHERAL(ssidev, SpitzLCDTG), |
43842120 DES |
1236 | VMSTATE_UINT32(bl_intensity, SpitzLCDTG), |
1237 | VMSTATE_UINT32(bl_power, SpitzLCDTG), | |
1238 | VMSTATE_END_OF_LIST(), | |
1239 | } | |
1240 | }; | |
1241 | ||
cd6c4cf2 AL |
1242 | static void spitz_lcdtg_class_init(ObjectClass *klass, void *data) |
1243 | { | |
39bffca2 | 1244 | DeviceClass *dc = DEVICE_CLASS(klass); |
ec7e429b | 1245 | SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass); |
cd6c4cf2 | 1246 | |
7673bb4c | 1247 | k->realize = spitz_lcdtg_realize; |
cd6c4cf2 | 1248 | k->transfer = spitz_lcdtg_transfer; |
39bffca2 | 1249 | dc->vmsd = &vmstate_spitz_lcdtg_regs; |
cd6c4cf2 AL |
1250 | } |
1251 | ||
8c43a6f0 | 1252 | static const TypeInfo spitz_lcdtg_info = { |
62a4d340 | 1253 | .name = TYPE_SPITZ_LCDTG, |
ec7e429b | 1254 | .parent = TYPE_SSI_PERIPHERAL, |
39bffca2 AL |
1255 | .instance_size = sizeof(SpitzLCDTG), |
1256 | .class_init = spitz_lcdtg_class_init, | |
a984a69e PB |
1257 | }; |
1258 | ||
eb2dc887 PM |
1259 | static const TypeInfo spitz_misc_gpio_info = { |
1260 | .name = TYPE_SPITZ_MISC_GPIO, | |
1261 | .parent = TYPE_SYS_BUS_DEVICE, | |
1262 | .instance_size = sizeof(SpitzMiscGPIOState), | |
1263 | .instance_init = spitz_misc_gpio_init, | |
1264 | /* | |
1265 | * No class_init required: device has no internal state so does not | |
1266 | * need to set up reset or vmstate, and does not have a realize method. | |
1267 | */ | |
1268 | }; | |
1269 | ||
83f7d43a | 1270 | static void spitz_register_types(void) |
a984a69e | 1271 | { |
39bffca2 AL |
1272 | type_register_static(&corgi_ssp_info); |
1273 | type_register_static(&spitz_lcdtg_info); | |
1274 | type_register_static(&spitz_keyboard_info); | |
1275 | type_register_static(&sl_nand_info); | |
eb2dc887 | 1276 | type_register_static(&spitz_misc_gpio_info); |
a984a69e PB |
1277 | } |
1278 | ||
83f7d43a | 1279 | type_init(spitz_register_types) |