]>
Commit | Line | Data |
---|---|---|
b00052e4 AZ |
1 | /* |
2 | * PXA270-based Clamshell PDA platforms. | |
3 | * | |
4 | * Copyright (c) 2006 Openedhand Ltd. | |
5 | * Written by Andrzej Zaborowski <[email protected]> | |
6 | * | |
7 | * This code is licensed under the GNU GPL v2. | |
6b620ca3 PB |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the | |
10 | * GNU GPL, version 2 or (at your option) any later version. | |
b00052e4 AZ |
11 | */ |
12 | ||
12b16722 | 13 | #include "qemu/osdep.h" |
da34e65c | 14 | #include "qapi/error.h" |
0d09e41a | 15 | #include "hw/arm/pxa.h" |
12ec8bd5 | 16 | #include "hw/arm/boot.h" |
54d31236 | 17 | #include "sysemu/runstate.h" |
9c17d615 | 18 | #include "sysemu/sysemu.h" |
83c9f4ca | 19 | #include "hw/pcmcia.h" |
a27bd6c7 | 20 | #include "hw/qdev-properties.h" |
0d09e41a | 21 | #include "hw/i2c/i2c.h" |
64552b6b | 22 | #include "hw/irq.h" |
8fd06719 | 23 | #include "hw/ssi/ssi.h" |
0d09e41a | 24 | #include "hw/block/flash.h" |
1de7afc9 | 25 | #include "qemu/timer.h" |
0d09e41a | 26 | #include "hw/arm/sharpsl.h" |
28ecbaee | 27 | #include "ui/console.h" |
7ab14c5a | 28 | #include "hw/audio/wm8750.h" |
87ecb68b | 29 | #include "audio/audio.h" |
83c9f4ca | 30 | #include "hw/boards.h" |
83c9f4ca | 31 | #include "hw/sysbus.h" |
d6454270 | 32 | #include "migration/vmstate.h" |
022c62cb | 33 | #include "exec/address-spaces.h" |
ba1ba5cc | 34 | #include "cpu.h" |
b00052e4 | 35 | |
b00052e4 AZ |
36 | #undef REG_FMT |
37 | #define REG_FMT "0x%02lx" | |
38 | ||
39 | /* Spitz Flash */ | |
40 | #define FLASH_BASE 0x0c000000 | |
41 | #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ | |
42 | #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ | |
43 | #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ | |
44 | #define FLASH_ECCCNTR 0x0c /* ECC byte counter */ | |
45 | #define FLASH_ECCCLRR 0x10 /* Clear ECC */ | |
46 | #define FLASH_FLASHIO 0x14 /* Flash I/O */ | |
47 | #define FLASH_FLASHCTL 0x18 /* Flash Control */ | |
48 | ||
49 | #define FLASHCTL_CE0 (1 << 0) | |
50 | #define FLASHCTL_CLE (1 << 1) | |
51 | #define FLASHCTL_ALE (1 << 2) | |
52 | #define FLASHCTL_WP (1 << 3) | |
53 | #define FLASHCTL_CE1 (1 << 4) | |
54 | #define FLASHCTL_RYBY (1 << 5) | |
55 | #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) | |
56 | ||
7eb8104a AF |
57 | #define TYPE_SL_NAND "sl-nand" |
58 | #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND) | |
59 | ||
bc24a225 | 60 | typedef struct { |
7eb8104a AF |
61 | SysBusDevice parent_obj; |
62 | ||
7cc09e6c | 63 | MemoryRegion iomem; |
d4220389 | 64 | DeviceState *nand; |
b00052e4 | 65 | uint8_t ctl; |
34f9f0b5 DES |
66 | uint8_t manf_id; |
67 | uint8_t chip_id; | |
bc24a225 PB |
68 | ECCState ecc; |
69 | } SLNANDState; | |
b00052e4 | 70 | |
a8170e5e | 71 | static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) |
b00052e4 | 72 | { |
bc24a225 | 73 | SLNANDState *s = (SLNANDState *) opaque; |
b00052e4 | 74 | int ryby; |
b00052e4 AZ |
75 | |
76 | switch (addr) { | |
77 | #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) | |
78 | case FLASH_ECCLPLB: | |
79 | return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | | |
80 | BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); | |
81 | ||
82 | #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) | |
83 | case FLASH_ECCLPUB: | |
84 | return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | | |
85 | BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); | |
86 | ||
87 | case FLASH_ECCCP: | |
88 | return s->ecc.cp; | |
89 | ||
90 | case FLASH_ECCCNTR: | |
91 | return s->ecc.count & 0xff; | |
92 | ||
93 | case FLASH_FLASHCTL: | |
94 | nand_getpins(s->nand, &ryby); | |
95 | if (ryby) | |
96 | return s->ctl | FLASHCTL_RYBY; | |
97 | else | |
98 | return s->ctl; | |
99 | ||
100 | case FLASH_FLASHIO: | |
7cc09e6c AK |
101 | if (size == 4) { |
102 | return ecc_digest(&s->ecc, nand_getio(s->nand)) | | |
103 | (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16); | |
104 | } | |
b00052e4 AZ |
105 | return ecc_digest(&s->ecc, nand_getio(s->nand)); |
106 | ||
107 | default: | |
a8b7063b | 108 | zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); |
b00052e4 AZ |
109 | } |
110 | return 0; | |
111 | } | |
112 | ||
a8170e5e | 113 | static void sl_write(void *opaque, hwaddr addr, |
7cc09e6c | 114 | uint64_t value, unsigned size) |
b00052e4 | 115 | { |
bc24a225 | 116 | SLNANDState *s = (SLNANDState *) opaque; |
b00052e4 AZ |
117 | |
118 | switch (addr) { | |
119 | case FLASH_ECCCLRR: | |
120 | /* Value is ignored. */ | |
121 | ecc_reset(&s->ecc); | |
122 | break; | |
123 | ||
124 | case FLASH_FLASHCTL: | |
125 | s->ctl = value & 0xff & ~FLASHCTL_RYBY; | |
126 | nand_setpins(s->nand, | |
127 | s->ctl & FLASHCTL_CLE, | |
128 | s->ctl & FLASHCTL_ALE, | |
129 | s->ctl & FLASHCTL_NCE, | |
130 | s->ctl & FLASHCTL_WP, | |
131 | 0); | |
132 | break; | |
133 | ||
134 | case FLASH_FLASHIO: | |
135 | nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff)); | |
136 | break; | |
137 | ||
138 | default: | |
a8b7063b | 139 | zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); |
b00052e4 AZ |
140 | } |
141 | } | |
142 | ||
143 | enum { | |
144 | FLASH_128M, | |
145 | FLASH_1024M, | |
146 | }; | |
147 | ||
7cc09e6c AK |
148 | static const MemoryRegionOps sl_ops = { |
149 | .read = sl_read, | |
150 | .write = sl_write, | |
151 | .endianness = DEVICE_NATIVE_ENDIAN, | |
34f9f0b5 DES |
152 | }; |
153 | ||
bc24a225 | 154 | static void sl_flash_register(PXA2xxState *cpu, int size) |
b00052e4 | 155 | { |
34f9f0b5 DES |
156 | DeviceState *dev; |
157 | ||
7eb8104a | 158 | dev = qdev_create(NULL, TYPE_SL_NAND); |
34f9f0b5 DES |
159 | |
160 | qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); | |
161 | if (size == FLASH_128M) | |
162 | qdev_prop_set_uint8(dev, "chip_id", 0x73); | |
163 | else if (size == FLASH_1024M) | |
164 | qdev_prop_set_uint8(dev, "chip_id", 0xf1); | |
165 | ||
166 | qdev_init_nofail(dev); | |
1356b98d | 167 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); |
34f9f0b5 DES |
168 | } |
169 | ||
f68575c9 | 170 | static void sl_nand_init(Object *obj) |
7eb8104a | 171 | { |
f68575c9 XZ |
172 | SLNANDState *s = SL_NAND(obj); |
173 | SysBusDevice *dev = SYS_BUS_DEVICE(obj); | |
34f9f0b5 | 174 | |
b00052e4 | 175 | s->ctl = 0; |
07bc425e TH |
176 | |
177 | memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40); | |
178 | sysbus_init_mmio(dev, &s->iomem); | |
179 | } | |
180 | ||
181 | static void sl_nand_realize(DeviceState *dev, Error **errp) | |
182 | { | |
183 | SLNANDState *s = SL_NAND(dev); | |
184 | DriveInfo *nand; | |
185 | ||
af9e40aa | 186 | /* FIXME use a qdev drive property instead of drive_get() */ |
522f253c | 187 | nand = drive_get(IF_MTD, 0, 0); |
4be74634 | 188 | s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL, |
fa1d36df | 189 | s->manf_id, s->chip_id); |
b00052e4 AZ |
190 | } |
191 | ||
192 | /* Spitz Keyboard */ | |
193 | ||
194 | #define SPITZ_KEY_STROBE_NUM 11 | |
195 | #define SPITZ_KEY_SENSE_NUM 7 | |
196 | ||
197 | static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { | |
198 | 12, 17, 91, 34, 36, 38, 39 | |
199 | }; | |
200 | ||
201 | static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { | |
202 | 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 | |
203 | }; | |
204 | ||
205 | /* Eighth additional row maps the special keys */ | |
206 | static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { | |
207 | { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, | |
208 | { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, | |
209 | { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, | |
210 | { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, | |
211 | { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, | |
2b76bdc9 AZ |
212 | { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, |
213 | { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, | |
b00052e4 AZ |
214 | { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, |
215 | }; | |
216 | ||
217 | #define SPITZ_GPIO_AK_INT 13 /* Remote control */ | |
218 | #define SPITZ_GPIO_SYNC 16 /* Sync button */ | |
219 | #define SPITZ_GPIO_ON_KEY 95 /* Power button */ | |
220 | #define SPITZ_GPIO_SWA 97 /* Lid */ | |
221 | #define SPITZ_GPIO_SWB 96 /* Tablet mode */ | |
222 | ||
223 | /* The special buttons are mapped to unused keys */ | |
224 | static const int spitz_gpiomap[5] = { | |
225 | SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, | |
226 | SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, | |
227 | }; | |
b00052e4 | 228 | |
73e9d965 AF |
229 | #define TYPE_SPITZ_KEYBOARD "spitz-keyboard" |
230 | #define SPITZ_KEYBOARD(obj) \ | |
231 | OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD) | |
232 | ||
bc24a225 | 233 | typedef struct { |
73e9d965 AF |
234 | SysBusDevice parent_obj; |
235 | ||
38641a52 | 236 | qemu_irq sense[SPITZ_KEY_SENSE_NUM]; |
38641a52 | 237 | qemu_irq gpiomap[5]; |
b00052e4 AZ |
238 | int keymap[0x80]; |
239 | uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; | |
240 | uint16_t strobe_state; | |
241 | uint16_t sense_state; | |
242 | ||
243 | uint16_t pre_map[0x100]; | |
244 | uint16_t modifiers; | |
245 | uint16_t imodifiers; | |
246 | uint8_t fifo[16]; | |
247 | int fifopos, fifolen; | |
248 | QEMUTimer *kbdtimer; | |
bc24a225 | 249 | } SpitzKeyboardState; |
b00052e4 | 250 | |
bc24a225 | 251 | static void spitz_keyboard_sense_update(SpitzKeyboardState *s) |
b00052e4 AZ |
252 | { |
253 | int i; | |
254 | uint16_t strobe, sense = 0; | |
255 | for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { | |
256 | strobe = s->keyrow[i] & s->strobe_state; | |
257 | if (strobe) { | |
258 | sense |= 1 << i; | |
259 | if (!(s->sense_state & (1 << i))) | |
38641a52 | 260 | qemu_irq_raise(s->sense[i]); |
b00052e4 | 261 | } else if (s->sense_state & (1 << i)) |
38641a52 | 262 | qemu_irq_lower(s->sense[i]); |
b00052e4 AZ |
263 | } |
264 | ||
265 | s->sense_state = sense; | |
266 | } | |
267 | ||
38641a52 | 268 | static void spitz_keyboard_strobe(void *opaque, int line, int level) |
b00052e4 | 269 | { |
bc24a225 | 270 | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
38641a52 AZ |
271 | |
272 | if (level) | |
273 | s->strobe_state |= 1 << line; | |
274 | else | |
275 | s->strobe_state &= ~(1 << line); | |
276 | spitz_keyboard_sense_update(s); | |
b00052e4 AZ |
277 | } |
278 | ||
bc24a225 | 279 | static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) |
b00052e4 AZ |
280 | { |
281 | int spitz_keycode = s->keymap[keycode & 0x7f]; | |
282 | if (spitz_keycode == -1) | |
283 | return; | |
284 | ||
285 | /* Handle the additional keys */ | |
286 | if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { | |
7ef4227b | 287 | qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80)); |
b00052e4 AZ |
288 | return; |
289 | } | |
290 | ||
291 | if (keycode & 0x80) | |
292 | s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); | |
293 | else | |
294 | s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); | |
295 | ||
296 | spitz_keyboard_sense_update(s); | |
297 | } | |
298 | ||
0062609f PM |
299 | #define SPITZ_MOD_SHIFT (1 << 7) |
300 | #define SPITZ_MOD_CTRL (1 << 8) | |
301 | #define SPITZ_MOD_FN (1 << 9) | |
b00052e4 AZ |
302 | |
303 | #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c | |
304 | ||
7ef4227b | 305 | static void spitz_keyboard_handler(void *opaque, int keycode) |
b00052e4 | 306 | { |
7ef4227b | 307 | SpitzKeyboardState *s = opaque; |
b00052e4 AZ |
308 | uint16_t code; |
309 | int mapcode; | |
310 | switch (keycode) { | |
311 | case 0x2a: /* Left Shift */ | |
312 | s->modifiers |= 1; | |
313 | break; | |
314 | case 0xaa: | |
315 | s->modifiers &= ~1; | |
316 | break; | |
317 | case 0x36: /* Right Shift */ | |
318 | s->modifiers |= 2; | |
319 | break; | |
320 | case 0xb6: | |
321 | s->modifiers &= ~2; | |
322 | break; | |
323 | case 0x1d: /* Control */ | |
324 | s->modifiers |= 4; | |
325 | break; | |
326 | case 0x9d: | |
327 | s->modifiers &= ~4; | |
328 | break; | |
329 | case 0x38: /* Alt */ | |
330 | s->modifiers |= 8; | |
331 | break; | |
332 | case 0xb8: | |
333 | s->modifiers &= ~8; | |
334 | break; | |
335 | } | |
336 | ||
337 | code = s->pre_map[mapcode = ((s->modifiers & 3) ? | |
0062609f PM |
338 | (keycode | SPITZ_MOD_SHIFT) : |
339 | (keycode & ~SPITZ_MOD_SHIFT))]; | |
b00052e4 AZ |
340 | |
341 | if (code != mapcode) { | |
342 | #if 0 | |
0062609f | 343 | if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) { |
b00052e4 | 344 | QUEUE_KEY(0x2a | (keycode & 0x80)); |
0062609f PM |
345 | } |
346 | if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) { | |
b00052e4 | 347 | QUEUE_KEY(0x1d | (keycode & 0x80)); |
0062609f PM |
348 | } |
349 | if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) { | |
b00052e4 | 350 | QUEUE_KEY(0x38 | (keycode & 0x80)); |
0062609f PM |
351 | } |
352 | if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) { | |
b00052e4 | 353 | QUEUE_KEY(0x2a | (~keycode & 0x80)); |
0062609f PM |
354 | } |
355 | if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) { | |
b00052e4 | 356 | QUEUE_KEY(0x36 | (~keycode & 0x80)); |
0062609f | 357 | } |
b00052e4 AZ |
358 | #else |
359 | if (keycode & 0x80) { | |
360 | if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) | |
361 | QUEUE_KEY(0x2a | 0x80); | |
362 | if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) | |
363 | QUEUE_KEY(0x1d | 0x80); | |
364 | if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) | |
365 | QUEUE_KEY(0x38 | 0x80); | |
366 | if ((s->imodifiers & 0x10) && (s->modifiers & 1)) | |
367 | QUEUE_KEY(0x2a); | |
368 | if ((s->imodifiers & 0x20) && (s->modifiers & 2)) | |
369 | QUEUE_KEY(0x36); | |
370 | s->imodifiers = 0; | |
371 | } else { | |
0062609f PM |
372 | if ((code & SPITZ_MOD_SHIFT) && |
373 | !((s->modifiers | s->imodifiers) & 1)) { | |
b00052e4 AZ |
374 | QUEUE_KEY(0x2a); |
375 | s->imodifiers |= 1; | |
376 | } | |
0062609f PM |
377 | if ((code & SPITZ_MOD_CTRL) && |
378 | !((s->modifiers | s->imodifiers) & 4)) { | |
b00052e4 AZ |
379 | QUEUE_KEY(0x1d); |
380 | s->imodifiers |= 4; | |
381 | } | |
0062609f PM |
382 | if ((code & SPITZ_MOD_FN) && |
383 | !((s->modifiers | s->imodifiers) & 8)) { | |
b00052e4 AZ |
384 | QUEUE_KEY(0x38); |
385 | s->imodifiers |= 8; | |
386 | } | |
0062609f | 387 | if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) && |
b00052e4 AZ |
388 | !(s->imodifiers & 0x10)) { |
389 | QUEUE_KEY(0x2a | 0x80); | |
390 | s->imodifiers |= 0x10; | |
391 | } | |
0062609f | 392 | if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) && |
b00052e4 AZ |
393 | !(s->imodifiers & 0x20)) { |
394 | QUEUE_KEY(0x36 | 0x80); | |
395 | s->imodifiers |= 0x20; | |
396 | } | |
397 | } | |
398 | #endif | |
399 | } | |
400 | ||
401 | QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); | |
402 | } | |
403 | ||
404 | static void spitz_keyboard_tick(void *opaque) | |
405 | { | |
bc24a225 | 406 | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
b00052e4 AZ |
407 | |
408 | if (s->fifolen) { | |
409 | spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); | |
410 | s->fifolen --; | |
411 | if (s->fifopos >= 16) | |
412 | s->fifopos = 0; | |
413 | } | |
414 | ||
bc72ad67 | 415 | timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + |
73bcb24d | 416 | NANOSECONDS_PER_SECOND / 32); |
b00052e4 AZ |
417 | } |
418 | ||
bc24a225 | 419 | static void spitz_keyboard_pre_map(SpitzKeyboardState *s) |
b00052e4 AZ |
420 | { |
421 | int i; | |
422 | for (i = 0; i < 0x100; i ++) | |
423 | s->pre_map[i] = i; | |
0062609f PM |
424 | s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */ |
425 | s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */ | |
426 | s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */ | |
427 | s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */ | |
428 | s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */ | |
429 | s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */ | |
430 | s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */ | |
431 | s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */ | |
432 | s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */ | |
433 | s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */ | |
434 | s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */ | |
435 | s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */ | |
436 | s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */ | |
437 | s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */ | |
438 | s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */ | |
439 | s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */ | |
440 | s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */ | |
441 | s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */ | |
442 | s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */ | |
443 | s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */ | |
444 | s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */ | |
445 | s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */ | |
446 | s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */ | |
447 | s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */ | |
448 | s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */ | |
449 | s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */ | |
450 | s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */ | |
451 | s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */ | |
452 | s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */ | |
453 | s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */ | |
454 | s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */ | |
455 | s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */ | |
b00052e4 AZ |
456 | |
457 | s->modifiers = 0; | |
458 | s->imodifiers = 0; | |
459 | s->fifopos = 0; | |
460 | s->fifolen = 0; | |
b00052e4 AZ |
461 | } |
462 | ||
0062609f PM |
463 | #undef SPITZ_MOD_SHIFT |
464 | #undef SPITZ_MOD_CTRL | |
465 | #undef SPITZ_MOD_FN | |
b00052e4 | 466 | |
7ef4227b | 467 | static int spitz_keyboard_post_load(void *opaque, int version_id) |
aa941b94 | 468 | { |
bc24a225 | 469 | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
aa941b94 AZ |
470 | |
471 | /* Release all pressed keys */ | |
472 | memset(s->keyrow, 0, sizeof(s->keyrow)); | |
473 | spitz_keyboard_sense_update(s); | |
474 | s->modifiers = 0; | |
475 | s->imodifiers = 0; | |
476 | s->fifopos = 0; | |
477 | s->fifolen = 0; | |
478 | ||
479 | return 0; | |
480 | } | |
481 | ||
bc24a225 | 482 | static void spitz_keyboard_register(PXA2xxState *cpu) |
b00052e4 | 483 | { |
7ef4227b DES |
484 | int i; |
485 | DeviceState *dev; | |
bc24a225 | 486 | SpitzKeyboardState *s; |
b00052e4 | 487 | |
73e9d965 AF |
488 | dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL); |
489 | s = SPITZ_KEYBOARD(dev); | |
b00052e4 | 490 | |
38641a52 | 491 | for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) |
0bb53337 | 492 | qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i])); |
38641a52 AZ |
493 | |
494 | for (i = 0; i < 5; i ++) | |
0bb53337 | 495 | s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); |
38641a52 | 496 | |
7ef4227b DES |
497 | if (!graphic_rotate) |
498 | s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); | |
499 | ||
500 | for (i = 0; i < 5; i++) | |
501 | qemu_set_irq(s->gpiomap[i], 0); | |
502 | ||
b00052e4 | 503 | for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) |
0bb53337 | 504 | qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], |
7ef4227b DES |
505 | qdev_get_gpio_in(dev, i)); |
506 | ||
bc72ad67 | 507 | timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); |
7ef4227b DES |
508 | |
509 | qemu_add_kbd_event_handler(spitz_keyboard_handler, s); | |
510 | } | |
511 | ||
f68575c9 | 512 | static void spitz_keyboard_init(Object *obj) |
7ef4227b | 513 | { |
f68575c9 XZ |
514 | DeviceState *dev = DEVICE(obj); |
515 | SpitzKeyboardState *s = SPITZ_KEYBOARD(obj); | |
7ef4227b DES |
516 | int i, j; |
517 | ||
7ef4227b DES |
518 | for (i = 0; i < 0x80; i ++) |
519 | s->keymap[i] = -1; | |
520 | for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) | |
521 | for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) | |
522 | if (spitz_keymap[i][j] != -1) | |
523 | s->keymap[spitz_keymap[i][j]] = (i << 4) | j; | |
b00052e4 AZ |
524 | |
525 | spitz_keyboard_pre_map(s); | |
aa941b94 | 526 | |
bc72ad67 | 527 | s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s); |
73e9d965 AF |
528 | qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); |
529 | qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM); | |
b00052e4 AZ |
530 | } |
531 | ||
b00052e4 AZ |
532 | /* LCD backlight controller */ |
533 | ||
534 | #define LCDTG_RESCTL 0x00 | |
535 | #define LCDTG_PHACTRL 0x01 | |
536 | #define LCDTG_DUTYCTRL 0x02 | |
537 | #define LCDTG_POWERREG0 0x03 | |
538 | #define LCDTG_POWERREG1 0x04 | |
539 | #define LCDTG_GPOR3 0x05 | |
540 | #define LCDTG_PICTRL 0x06 | |
541 | #define LCDTG_POLCTRL 0x07 | |
542 | ||
a984a69e PB |
543 | typedef struct { |
544 | SSISlave ssidev; | |
43842120 DES |
545 | uint32_t bl_intensity; |
546 | uint32_t bl_power; | |
a984a69e | 547 | } SpitzLCDTG; |
b00052e4 | 548 | |
a984a69e | 549 | static void spitz_bl_update(SpitzLCDTG *s) |
b00052e4 | 550 | { |
a984a69e PB |
551 | if (s->bl_power && s->bl_intensity) |
552 | zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity); | |
b00052e4 | 553 | else |
89cdb6af | 554 | zaurus_printf("LCD Backlight now off\n"); |
b00052e4 AZ |
555 | } |
556 | ||
a984a69e PB |
557 | /* FIXME: Implement GPIO properly and remove this hack. */ |
558 | static SpitzLCDTG *spitz_lcdtg; | |
559 | ||
38641a52 | 560 | static inline void spitz_bl_bit5(void *opaque, int line, int level) |
b00052e4 | 561 | { |
a984a69e PB |
562 | SpitzLCDTG *s = spitz_lcdtg; |
563 | int prev = s->bl_intensity; | |
b00052e4 AZ |
564 | |
565 | if (level) | |
a984a69e | 566 | s->bl_intensity &= ~0x20; |
b00052e4 | 567 | else |
a984a69e | 568 | s->bl_intensity |= 0x20; |
b00052e4 | 569 | |
a984a69e PB |
570 | if (s->bl_power && prev != s->bl_intensity) |
571 | spitz_bl_update(s); | |
b00052e4 AZ |
572 | } |
573 | ||
38641a52 | 574 | static inline void spitz_bl_power(void *opaque, int line, int level) |
b00052e4 | 575 | { |
a984a69e PB |
576 | SpitzLCDTG *s = spitz_lcdtg; |
577 | s->bl_power = !!level; | |
578 | spitz_bl_update(s); | |
b00052e4 AZ |
579 | } |
580 | ||
a984a69e | 581 | static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value) |
b00052e4 | 582 | { |
a984a69e PB |
583 | SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); |
584 | int addr; | |
585 | addr = value >> 5; | |
586 | value &= 0x1f; | |
b00052e4 AZ |
587 | |
588 | switch (addr) { | |
589 | case LCDTG_RESCTL: | |
590 | if (value) | |
89cdb6af | 591 | zaurus_printf("LCD in QVGA mode\n"); |
b00052e4 | 592 | else |
89cdb6af | 593 | zaurus_printf("LCD in VGA mode\n"); |
b00052e4 AZ |
594 | break; |
595 | ||
596 | case LCDTG_DUTYCTRL: | |
a984a69e PB |
597 | s->bl_intensity &= ~0x1f; |
598 | s->bl_intensity |= value; | |
599 | if (s->bl_power) | |
600 | spitz_bl_update(s); | |
b00052e4 AZ |
601 | break; |
602 | ||
603 | case LCDTG_POWERREG0: | |
604 | /* Set common voltage to M62332FP */ | |
605 | break; | |
606 | } | |
a984a69e PB |
607 | return 0; |
608 | } | |
609 | ||
7673bb4c | 610 | static void spitz_lcdtg_realize(SSISlave *dev, Error **errp) |
a984a69e PB |
611 | { |
612 | SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); | |
613 | ||
614 | spitz_lcdtg = s; | |
615 | s->bl_power = 0; | |
616 | s->bl_intensity = 0x20; | |
b00052e4 AZ |
617 | } |
618 | ||
619 | /* SSP devices */ | |
620 | ||
621 | #define CORGI_SSP_PORT 2 | |
622 | ||
623 | #define SPITZ_GPIO_LCDCON_CS 53 | |
624 | #define SPITZ_GPIO_ADS7846_CS 14 | |
625 | #define SPITZ_GPIO_MAX1111_CS 20 | |
626 | #define SPITZ_GPIO_TP_INT 11 | |
627 | ||
a984a69e | 628 | static DeviceState *max1111; |
b00052e4 AZ |
629 | |
630 | /* "Demux" the signal based on current chipselect */ | |
a984a69e PB |
631 | typedef struct { |
632 | SSISlave ssidev; | |
633 | SSIBus *bus[3]; | |
43842120 | 634 | uint32_t enable[3]; |
a984a69e | 635 | } CorgiSSPState; |
b00052e4 | 636 | |
a984a69e | 637 | static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value) |
b00052e4 | 638 | { |
a984a69e PB |
639 | CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); |
640 | int i; | |
641 | ||
642 | for (i = 0; i < 3; i++) { | |
643 | if (s->enable[i]) { | |
644 | return ssi_transfer(s->bus[i], value); | |
645 | } | |
646 | } | |
647 | return 0; | |
b00052e4 AZ |
648 | } |
649 | ||
38641a52 | 650 | static void corgi_ssp_gpio_cs(void *opaque, int line, int level) |
b00052e4 | 651 | { |
a984a69e PB |
652 | CorgiSSPState *s = (CorgiSSPState *)opaque; |
653 | assert(line >= 0 && line < 3); | |
654 | s->enable[line] = !level; | |
b00052e4 AZ |
655 | } |
656 | ||
657 | #define MAX1111_BATT_VOLT 1 | |
658 | #define MAX1111_BATT_TEMP 2 | |
659 | #define MAX1111_ACIN_VOLT 3 | |
660 | ||
661 | #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ | |
662 | #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ | |
663 | #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ | |
664 | ||
38641a52 | 665 | static void spitz_adc_temp_on(void *opaque, int line, int level) |
b00052e4 AZ |
666 | { |
667 | if (!max1111) | |
668 | return; | |
669 | ||
670 | if (level) | |
671 | max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP); | |
672 | else | |
673 | max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); | |
674 | } | |
675 | ||
7673bb4c | 676 | static void corgi_ssp_realize(SSISlave *d, Error **errp) |
a984a69e | 677 | { |
1a7d9ee6 PC |
678 | DeviceState *dev = DEVICE(d); |
679 | CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d); | |
a984a69e | 680 | |
1a7d9ee6 PC |
681 | qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3); |
682 | s->bus[0] = ssi_create_bus(dev, "ssi0"); | |
683 | s->bus[1] = ssi_create_bus(dev, "ssi1"); | |
684 | s->bus[2] = ssi_create_bus(dev, "ssi2"); | |
a984a69e PB |
685 | } |
686 | ||
bc24a225 | 687 | static void spitz_ssp_attach(PXA2xxState *cpu) |
b00052e4 | 688 | { |
a984a69e PB |
689 | DeviceState *mux; |
690 | DeviceState *dev; | |
691 | void *bus; | |
692 | ||
693 | mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp"); | |
38641a52 | 694 | |
a984a69e | 695 | bus = qdev_get_child_bus(mux, "ssi0"); |
22ed1d34 | 696 | ssi_create_slave(bus, "spitz-lcdtg"); |
b00052e4 | 697 | |
a984a69e PB |
698 | bus = qdev_get_child_bus(mux, "ssi1"); |
699 | dev = ssi_create_slave(bus, "ads7846"); | |
700 | qdev_connect_gpio_out(dev, 0, | |
0bb53337 | 701 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT)); |
b00052e4 | 702 | |
a984a69e PB |
703 | bus = qdev_get_child_bus(mux, "ssi2"); |
704 | max1111 = ssi_create_slave(bus, "max1111"); | |
b00052e4 AZ |
705 | max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT); |
706 | max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); | |
707 | max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN); | |
708 | ||
0bb53337 | 709 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS, |
a984a69e | 710 | qdev_get_gpio_in(mux, 0)); |
0bb53337 | 711 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS, |
a984a69e | 712 | qdev_get_gpio_in(mux, 1)); |
0bb53337 | 713 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS, |
a984a69e | 714 | qdev_get_gpio_in(mux, 2)); |
b00052e4 AZ |
715 | } |
716 | ||
717 | /* CF Microdrive */ | |
718 | ||
bc24a225 | 719 | static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) |
b00052e4 | 720 | { |
bc24a225 | 721 | PCMCIACardState *md; |
751c6a17 | 722 | DriveInfo *dinfo; |
b00052e4 | 723 | |
751c6a17 | 724 | dinfo = drive_get(IF_IDE, 0, 0); |
124386cc | 725 | if (!dinfo || dinfo->media_cd) |
e4bcb14c | 726 | return; |
124386cc MA |
727 | md = dscm1xxxx_init(dinfo); |
728 | pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); | |
b00052e4 AZ |
729 | } |
730 | ||
adb86c37 AZ |
731 | /* Wm8750 and Max7310 on I2C */ |
732 | ||
733 | #define AKITA_MAX_ADDR 0x18 | |
611d7189 AZ |
734 | #define SPITZ_WM_ADDRL 0x1b |
735 | #define SPITZ_WM_ADDRH 0x1a | |
adb86c37 AZ |
736 | |
737 | #define SPITZ_GPIO_WM 5 | |
738 | ||
38641a52 | 739 | static void spitz_wm8750_addr(void *opaque, int line, int level) |
adb86c37 | 740 | { |
9e07bdf8 | 741 | I2CSlave *wm = (I2CSlave *) opaque; |
adb86c37 AZ |
742 | if (level) |
743 | i2c_set_slave_address(wm, SPITZ_WM_ADDRH); | |
744 | else | |
745 | i2c_set_slave_address(wm, SPITZ_WM_ADDRL); | |
746 | } | |
adb86c37 | 747 | |
bc24a225 | 748 | static void spitz_i2c_setup(PXA2xxState *cpu) |
adb86c37 AZ |
749 | { |
750 | /* Attach the CPU on one end of our I2C bus. */ | |
a5c82852 | 751 | I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); |
adb86c37 | 752 | |
cdbe40ca | 753 | DeviceState *wm; |
adb86c37 | 754 | |
adb86c37 | 755 | /* Attach a WM8750 to the bus */ |
7ab14c5a | 756 | wm = i2c_create_slave(bus, TYPE_WM8750, 0); |
adb86c37 | 757 | |
38641a52 | 758 | spitz_wm8750_addr(wm, 0, 0); |
0bb53337 | 759 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, |
f3c7d038 | 760 | qemu_allocate_irq(spitz_wm8750_addr, wm, 0)); |
adb86c37 AZ |
761 | /* .. and to the sound interface. */ |
762 | cpu->i2s->opaque = wm; | |
763 | cpu->i2s->codec_out = wm8750_dac_dat; | |
764 | cpu->i2s->codec_in = wm8750_adc_dat; | |
765 | wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); | |
adb86c37 AZ |
766 | } |
767 | ||
bc24a225 | 768 | static void spitz_akita_i2c_setup(PXA2xxState *cpu) |
adb86c37 AZ |
769 | { |
770 | /* Attach a Max7310 to Akita I2C bus. */ | |
6c0bd6bd PB |
771 | i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", |
772 | AKITA_MAX_ADDR); | |
adb86c37 AZ |
773 | } |
774 | ||
b00052e4 AZ |
775 | /* Other peripherals */ |
776 | ||
38641a52 | 777 | static void spitz_out_switch(void *opaque, int line, int level) |
b00052e4 | 778 | { |
38641a52 AZ |
779 | switch (line) { |
780 | case 0: | |
89cdb6af | 781 | zaurus_printf("Charging %s.\n", level ? "off" : "on"); |
38641a52 AZ |
782 | break; |
783 | case 1: | |
89cdb6af | 784 | zaurus_printf("Discharging %s.\n", level ? "on" : "off"); |
38641a52 AZ |
785 | break; |
786 | case 2: | |
89cdb6af | 787 | zaurus_printf("Green LED %s.\n", level ? "on" : "off"); |
38641a52 AZ |
788 | break; |
789 | case 3: | |
89cdb6af | 790 | zaurus_printf("Orange LED %s.\n", level ? "on" : "off"); |
38641a52 AZ |
791 | break; |
792 | case 4: | |
793 | spitz_bl_bit5(opaque, line, level); | |
794 | break; | |
795 | case 5: | |
796 | spitz_bl_power(opaque, line, level); | |
797 | break; | |
798 | case 6: | |
799 | spitz_adc_temp_on(opaque, line, level); | |
800 | break; | |
801 | } | |
b00052e4 AZ |
802 | } |
803 | ||
804 | #define SPITZ_SCP_LED_GREEN 1 | |
805 | #define SPITZ_SCP_JK_B 2 | |
806 | #define SPITZ_SCP_CHRG_ON 3 | |
807 | #define SPITZ_SCP_MUTE_L 4 | |
808 | #define SPITZ_SCP_MUTE_R 5 | |
809 | #define SPITZ_SCP_CF_POWER 6 | |
810 | #define SPITZ_SCP_LED_ORANGE 7 | |
811 | #define SPITZ_SCP_JK_A 8 | |
812 | #define SPITZ_SCP_ADC_TEMP_ON 9 | |
813 | #define SPITZ_SCP2_IR_ON 1 | |
814 | #define SPITZ_SCP2_AKIN_PULLUP 2 | |
815 | #define SPITZ_SCP2_BACKLIGHT_CONT 7 | |
816 | #define SPITZ_SCP2_BACKLIGHT_ON 8 | |
817 | #define SPITZ_SCP2_MIC_BIAS 9 | |
818 | ||
bc24a225 | 819 | static void spitz_scoop_gpio_setup(PXA2xxState *cpu, |
383d01c6 | 820 | DeviceState *scp0, DeviceState *scp1) |
b00052e4 | 821 | { |
38641a52 AZ |
822 | qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8); |
823 | ||
383d01c6 DES |
824 | qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]); |
825 | qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]); | |
826 | qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]); | |
827 | qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]); | |
b00052e4 | 828 | |
e33d8cdb | 829 | if (scp1) { |
383d01c6 DES |
830 | qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]); |
831 | qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]); | |
b00052e4 AZ |
832 | } |
833 | ||
383d01c6 | 834 | qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]); |
b00052e4 AZ |
835 | } |
836 | ||
837 | #define SPITZ_GPIO_HSYNC 22 | |
838 | #define SPITZ_GPIO_SD_DETECT 9 | |
839 | #define SPITZ_GPIO_SD_WP 81 | |
840 | #define SPITZ_GPIO_ON_RESET 89 | |
841 | #define SPITZ_GPIO_BAT_COVER 90 | |
842 | #define SPITZ_GPIO_CF1_IRQ 105 | |
843 | #define SPITZ_GPIO_CF1_CD 94 | |
844 | #define SPITZ_GPIO_CF2_IRQ 106 | |
845 | #define SPITZ_GPIO_CF2_CD 93 | |
846 | ||
38641a52 | 847 | static int spitz_hsync; |
b00052e4 | 848 | |
38641a52 | 849 | static void spitz_lcd_hsync_handler(void *opaque, int line, int level) |
b00052e4 | 850 | { |
bc24a225 | 851 | PXA2xxState *cpu = (PXA2xxState *) opaque; |
0bb53337 | 852 | qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync); |
b00052e4 AZ |
853 | spitz_hsync ^= 1; |
854 | } | |
855 | ||
14da5821 GR |
856 | static void spitz_reset(void *opaque, int line, int level) |
857 | { | |
858 | if (level) { | |
cf83f140 | 859 | qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); |
14da5821 GR |
860 | } |
861 | } | |
862 | ||
bc24a225 | 863 | static void spitz_gpio_setup(PXA2xxState *cpu, int slots) |
b00052e4 | 864 | { |
38641a52 | 865 | qemu_irq lcd_hsync; |
14da5821 GR |
866 | qemu_irq reset; |
867 | ||
b00052e4 AZ |
868 | /* |
869 | * Bad hack: We toggle the LCD hsync GPIO on every GPIO status | |
870 | * read to satisfy broken guests that poll-wait for hsync. | |
871 | * Simulating a real hsync event would be less practical and | |
872 | * wouldn't guarantee that a guest ever exits the loop. | |
873 | */ | |
874 | spitz_hsync = 0; | |
f3c7d038 | 875 | lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0); |
38641a52 AZ |
876 | pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); |
877 | pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); | |
b00052e4 AZ |
878 | |
879 | /* MMC/SD host */ | |
02ce600c | 880 | pxa2xx_mmci_handlers(cpu->mmc, |
0bb53337 DES |
881 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), |
882 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); | |
b00052e4 AZ |
883 | |
884 | /* Battery lock always closed */ | |
0bb53337 | 885 | qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); |
b00052e4 AZ |
886 | |
887 | /* Handle reset */ | |
14da5821 GR |
888 | reset = qemu_allocate_irq(spitz_reset, cpu, 0); |
889 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset); | |
b00052e4 AZ |
890 | |
891 | /* PCMCIA signals: card's IRQ and Card-Detect */ | |
b00052e4 | 892 | if (slots >= 1) |
38641a52 | 893 | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], |
0bb53337 DES |
894 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ), |
895 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD)); | |
b00052e4 | 896 | if (slots >= 2) |
38641a52 | 897 | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], |
0bb53337 DES |
898 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ), |
899 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD)); | |
b00052e4 AZ |
900 | } |
901 | ||
b00052e4 AZ |
902 | /* Board init. */ |
903 | enum spitz_model_e { spitz, akita, borzoi, terrier }; | |
904 | ||
7fb4fdcf AZ |
905 | #define SPITZ_RAM 0x04000000 |
906 | #define SPITZ_ROM 0x00800000 | |
907 | ||
f93eb9ff AZ |
908 | static struct arm_boot_info spitz_binfo = { |
909 | .loader_start = PXA2XX_SDRAM_BASE, | |
910 | .ram_size = 0x04000000, | |
911 | }; | |
912 | ||
3ef96221 | 913 | static void spitz_common_init(MachineState *machine, |
72a9f5b7 | 914 | enum spitz_model_e model, int arm_id) |
b00052e4 | 915 | { |
2e7ad760 | 916 | PXA2xxState *mpu; |
383d01c6 | 917 | DeviceState *scp0, *scp1 = NULL; |
a6dc4c2d | 918 | MemoryRegion *address_space_mem = get_system_memory(); |
7cc09e6c | 919 | MemoryRegion *rom = g_new(MemoryRegion, 1); |
b00052e4 | 920 | |
d95b2f8d | 921 | /* Setup CPU & memory */ |
ba1ba5cc IM |
922 | mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, |
923 | machine->cpu_type); | |
b00052e4 | 924 | |
2e7ad760 | 925 | sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); |
b00052e4 | 926 | |
98a99ce0 | 927 | memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); |
7cc09e6c AK |
928 | memory_region_set_readonly(rom, true); |
929 | memory_region_add_subregion(address_space_mem, 0, rom); | |
b00052e4 AZ |
930 | |
931 | /* Setup peripherals */ | |
2e7ad760 | 932 | spitz_keyboard_register(mpu); |
b00052e4 | 933 | |
2e7ad760 | 934 | spitz_ssp_attach(mpu); |
b00052e4 | 935 | |
383d01c6 | 936 | scp0 = sysbus_create_simple("scoop", 0x10800000, NULL); |
e33d8cdb | 937 | if (model != akita) { |
383d01c6 | 938 | scp1 = sysbus_create_simple("scoop", 0x08800040, NULL); |
e33d8cdb | 939 | } |
b00052e4 | 940 | |
2e7ad760 | 941 | spitz_scoop_gpio_setup(mpu, scp0, scp1); |
b00052e4 | 942 | |
2e7ad760 | 943 | spitz_gpio_setup(mpu, (model == akita) ? 1 : 2); |
b00052e4 | 944 | |
2e7ad760 | 945 | spitz_i2c_setup(mpu); |
adb86c37 AZ |
946 | |
947 | if (model == akita) | |
2e7ad760 | 948 | spitz_akita_i2c_setup(mpu); |
adb86c37 | 949 | |
b00052e4 | 950 | if (model == terrier) |
bf5ee248 | 951 | /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */ |
2e7ad760 | 952 | spitz_microdrive_attach(mpu, 1); |
b00052e4 | 953 | else if (model != akita) |
15b18ec2 | 954 | /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ |
2e7ad760 | 955 | spitz_microdrive_attach(mpu, 0); |
b00052e4 | 956 | |
3ef96221 MA |
957 | spitz_binfo.kernel_filename = machine->kernel_filename; |
958 | spitz_binfo.kernel_cmdline = machine->kernel_cmdline; | |
959 | spitz_binfo.initrd_filename = machine->initrd_filename; | |
f93eb9ff | 960 | spitz_binfo.board_id = arm_id; |
3aaa8dfa | 961 | arm_load_kernel(mpu->cpu, &spitz_binfo); |
f78630ab | 962 | sl_bootparam_write(SL_PXA_PARAM_BASE); |
b00052e4 AZ |
963 | } |
964 | ||
3ef96221 | 965 | static void spitz_init(MachineState *machine) |
b00052e4 | 966 | { |
3ef96221 | 967 | spitz_common_init(machine, spitz, 0x2c9); |
b00052e4 AZ |
968 | } |
969 | ||
3ef96221 | 970 | static void borzoi_init(MachineState *machine) |
b00052e4 | 971 | { |
3ef96221 | 972 | spitz_common_init(machine, borzoi, 0x33f); |
b00052e4 AZ |
973 | } |
974 | ||
3ef96221 | 975 | static void akita_init(MachineState *machine) |
b00052e4 | 976 | { |
3ef96221 | 977 | spitz_common_init(machine, akita, 0x2e8); |
b00052e4 AZ |
978 | } |
979 | ||
3ef96221 | 980 | static void terrier_init(MachineState *machine) |
b00052e4 | 981 | { |
3ef96221 | 982 | spitz_common_init(machine, terrier, 0x33f); |
b00052e4 AZ |
983 | } |
984 | ||
8a661aea | 985 | static void akitapda_class_init(ObjectClass *oc, void *data) |
e264d29d | 986 | { |
8a661aea AF |
987 | MachineClass *mc = MACHINE_CLASS(oc); |
988 | ||
ad1e8db8 | 989 | mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)"; |
e264d29d | 990 | mc->init = akita_init; |
4672cbd7 | 991 | mc->ignore_memory_transaction_failures = true; |
ba1ba5cc | 992 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); |
e264d29d | 993 | } |
b00052e4 | 994 | |
8a661aea AF |
995 | static const TypeInfo akitapda_type = { |
996 | .name = MACHINE_TYPE_NAME("akita"), | |
997 | .parent = TYPE_MACHINE, | |
998 | .class_init = akitapda_class_init, | |
999 | }; | |
b00052e4 | 1000 | |
8a661aea | 1001 | static void spitzpda_class_init(ObjectClass *oc, void *data) |
e264d29d | 1002 | { |
8a661aea AF |
1003 | MachineClass *mc = MACHINE_CLASS(oc); |
1004 | ||
ad1e8db8 | 1005 | mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)"; |
e264d29d | 1006 | mc->init = spitz_init; |
2059839b | 1007 | mc->block_default_type = IF_IDE; |
4672cbd7 | 1008 | mc->ignore_memory_transaction_failures = true; |
ba1ba5cc | 1009 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); |
e264d29d | 1010 | } |
b00052e4 | 1011 | |
8a661aea AF |
1012 | static const TypeInfo spitzpda_type = { |
1013 | .name = MACHINE_TYPE_NAME("spitz"), | |
1014 | .parent = TYPE_MACHINE, | |
1015 | .class_init = spitzpda_class_init, | |
1016 | }; | |
e264d29d | 1017 | |
8a661aea | 1018 | static void borzoipda_class_init(ObjectClass *oc, void *data) |
e264d29d | 1019 | { |
8a661aea AF |
1020 | MachineClass *mc = MACHINE_CLASS(oc); |
1021 | ||
ad1e8db8 | 1022 | mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)"; |
e264d29d | 1023 | mc->init = borzoi_init; |
2059839b | 1024 | mc->block_default_type = IF_IDE; |
4672cbd7 | 1025 | mc->ignore_memory_transaction_failures = true; |
ba1ba5cc | 1026 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); |
e264d29d EH |
1027 | } |
1028 | ||
8a661aea AF |
1029 | static const TypeInfo borzoipda_type = { |
1030 | .name = MACHINE_TYPE_NAME("borzoi"), | |
1031 | .parent = TYPE_MACHINE, | |
1032 | .class_init = borzoipda_class_init, | |
1033 | }; | |
a984a69e | 1034 | |
8a661aea | 1035 | static void terrierpda_class_init(ObjectClass *oc, void *data) |
f80f9ec9 | 1036 | { |
8a661aea AF |
1037 | MachineClass *mc = MACHINE_CLASS(oc); |
1038 | ||
ad1e8db8 | 1039 | mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)"; |
e264d29d | 1040 | mc->init = terrier_init; |
2059839b | 1041 | mc->block_default_type = IF_IDE; |
4672cbd7 | 1042 | mc->ignore_memory_transaction_failures = true; |
ba1ba5cc | 1043 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5"); |
f80f9ec9 AL |
1044 | } |
1045 | ||
8a661aea AF |
1046 | static const TypeInfo terrierpda_type = { |
1047 | .name = MACHINE_TYPE_NAME("terrier"), | |
1048 | .parent = TYPE_MACHINE, | |
1049 | .class_init = terrierpda_class_init, | |
1050 | }; | |
1051 | ||
1052 | static void spitz_machine_init(void) | |
1053 | { | |
1054 | type_register_static(&akitapda_type); | |
1055 | type_register_static(&spitzpda_type); | |
1056 | type_register_static(&borzoipda_type); | |
1057 | type_register_static(&terrierpda_type); | |
1058 | } | |
1059 | ||
0e6aac87 | 1060 | type_init(spitz_machine_init) |
f80f9ec9 | 1061 | |
7ef4227b DES |
1062 | static bool is_version_0(void *opaque, int version_id) |
1063 | { | |
1064 | return version_id == 0; | |
1065 | } | |
1066 | ||
34f9f0b5 DES |
1067 | static VMStateDescription vmstate_sl_nand_info = { |
1068 | .name = "sl-nand", | |
1069 | .version_id = 0, | |
1070 | .minimum_version_id = 0, | |
8f1e884b | 1071 | .fields = (VMStateField[]) { |
34f9f0b5 DES |
1072 | VMSTATE_UINT8(ctl, SLNANDState), |
1073 | VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState), | |
1074 | VMSTATE_END_OF_LIST(), | |
1075 | }, | |
1076 | }; | |
1077 | ||
999e12bb AL |
1078 | static Property sl_nand_properties[] = { |
1079 | DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG), | |
1080 | DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1), | |
1081 | DEFINE_PROP_END_OF_LIST(), | |
1082 | }; | |
1083 | ||
1084 | static void sl_nand_class_init(ObjectClass *klass, void *data) | |
1085 | { | |
39bffca2 | 1086 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb | 1087 | |
39bffca2 AL |
1088 | dc->vmsd = &vmstate_sl_nand_info; |
1089 | dc->props = sl_nand_properties; | |
07bc425e | 1090 | dc->realize = sl_nand_realize; |
9f9bdf43 | 1091 | /* Reason: init() method uses drive_get() */ |
e90f2a8c | 1092 | dc->user_creatable = false; |
999e12bb AL |
1093 | } |
1094 | ||
8c43a6f0 | 1095 | static const TypeInfo sl_nand_info = { |
7eb8104a | 1096 | .name = TYPE_SL_NAND, |
39bffca2 AL |
1097 | .parent = TYPE_SYS_BUS_DEVICE, |
1098 | .instance_size = sizeof(SLNANDState), | |
f68575c9 | 1099 | .instance_init = sl_nand_init, |
39bffca2 | 1100 | .class_init = sl_nand_class_init, |
34f9f0b5 DES |
1101 | }; |
1102 | ||
7ef4227b DES |
1103 | static VMStateDescription vmstate_spitz_kbd = { |
1104 | .name = "spitz-keyboard", | |
1105 | .version_id = 1, | |
1106 | .minimum_version_id = 0, | |
7ef4227b | 1107 | .post_load = spitz_keyboard_post_load, |
8f1e884b | 1108 | .fields = (VMStateField[]) { |
7ef4227b DES |
1109 | VMSTATE_UINT16(sense_state, SpitzKeyboardState), |
1110 | VMSTATE_UINT16(strobe_state, SpitzKeyboardState), | |
1111 | VMSTATE_UNUSED_TEST(is_version_0, 5), | |
1112 | VMSTATE_END_OF_LIST(), | |
1113 | }, | |
1114 | }; | |
1115 | ||
999e12bb AL |
1116 | static void spitz_keyboard_class_init(ObjectClass *klass, void *data) |
1117 | { | |
39bffca2 | 1118 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb | 1119 | |
39bffca2 | 1120 | dc->vmsd = &vmstate_spitz_kbd; |
999e12bb AL |
1121 | } |
1122 | ||
8c43a6f0 | 1123 | static const TypeInfo spitz_keyboard_info = { |
73e9d965 | 1124 | .name = TYPE_SPITZ_KEYBOARD, |
39bffca2 AL |
1125 | .parent = TYPE_SYS_BUS_DEVICE, |
1126 | .instance_size = sizeof(SpitzKeyboardState), | |
f68575c9 | 1127 | .instance_init = spitz_keyboard_init, |
39bffca2 | 1128 | .class_init = spitz_keyboard_class_init, |
7ef4227b DES |
1129 | }; |
1130 | ||
43842120 DES |
1131 | static const VMStateDescription vmstate_corgi_ssp_regs = { |
1132 | .name = "corgi-ssp", | |
66530953 PC |
1133 | .version_id = 2, |
1134 | .minimum_version_id = 2, | |
8f1e884b | 1135 | .fields = (VMStateField[]) { |
66530953 | 1136 | VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState), |
43842120 DES |
1137 | VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3), |
1138 | VMSTATE_END_OF_LIST(), | |
1139 | } | |
1140 | }; | |
1141 | ||
cd6c4cf2 AL |
1142 | static void corgi_ssp_class_init(ObjectClass *klass, void *data) |
1143 | { | |
39bffca2 | 1144 | DeviceClass *dc = DEVICE_CLASS(klass); |
cd6c4cf2 AL |
1145 | SSISlaveClass *k = SSI_SLAVE_CLASS(klass); |
1146 | ||
7673bb4c | 1147 | k->realize = corgi_ssp_realize; |
cd6c4cf2 | 1148 | k->transfer = corgi_ssp_transfer; |
39bffca2 | 1149 | dc->vmsd = &vmstate_corgi_ssp_regs; |
cd6c4cf2 AL |
1150 | } |
1151 | ||
8c43a6f0 | 1152 | static const TypeInfo corgi_ssp_info = { |
39bffca2 AL |
1153 | .name = "corgi-ssp", |
1154 | .parent = TYPE_SSI_SLAVE, | |
1155 | .instance_size = sizeof(CorgiSSPState), | |
1156 | .class_init = corgi_ssp_class_init, | |
a984a69e PB |
1157 | }; |
1158 | ||
43842120 DES |
1159 | static const VMStateDescription vmstate_spitz_lcdtg_regs = { |
1160 | .name = "spitz-lcdtg", | |
1161 | .version_id = 1, | |
1162 | .minimum_version_id = 1, | |
8f1e884b | 1163 | .fields = (VMStateField[]) { |
66530953 | 1164 | VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG), |
43842120 DES |
1165 | VMSTATE_UINT32(bl_intensity, SpitzLCDTG), |
1166 | VMSTATE_UINT32(bl_power, SpitzLCDTG), | |
1167 | VMSTATE_END_OF_LIST(), | |
1168 | } | |
1169 | }; | |
1170 | ||
cd6c4cf2 AL |
1171 | static void spitz_lcdtg_class_init(ObjectClass *klass, void *data) |
1172 | { | |
39bffca2 | 1173 | DeviceClass *dc = DEVICE_CLASS(klass); |
cd6c4cf2 AL |
1174 | SSISlaveClass *k = SSI_SLAVE_CLASS(klass); |
1175 | ||
7673bb4c | 1176 | k->realize = spitz_lcdtg_realize; |
cd6c4cf2 | 1177 | k->transfer = spitz_lcdtg_transfer; |
39bffca2 | 1178 | dc->vmsd = &vmstate_spitz_lcdtg_regs; |
cd6c4cf2 AL |
1179 | } |
1180 | ||
8c43a6f0 | 1181 | static const TypeInfo spitz_lcdtg_info = { |
39bffca2 AL |
1182 | .name = "spitz-lcdtg", |
1183 | .parent = TYPE_SSI_SLAVE, | |
1184 | .instance_size = sizeof(SpitzLCDTG), | |
1185 | .class_init = spitz_lcdtg_class_init, | |
a984a69e PB |
1186 | }; |
1187 | ||
83f7d43a | 1188 | static void spitz_register_types(void) |
a984a69e | 1189 | { |
39bffca2 AL |
1190 | type_register_static(&corgi_ssp_info); |
1191 | type_register_static(&spitz_lcdtg_info); | |
1192 | type_register_static(&spitz_keyboard_info); | |
1193 | type_register_static(&sl_nand_info); | |
a984a69e PB |
1194 | } |
1195 | ||
83f7d43a | 1196 | type_init(spitz_register_types) |