[qemu.git] / target-cris / op_helper.c

/*
 *  CRIS helper routines
 *
 *  Copyright (c) 2007 AXIS Communications
 *  Written by Edgar E. Iglesias
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include "qemu/osdep.h"
#include "cpu.h"
#include "mmu.h"
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
#include "exec/cpu_ldst.h"

//#define CRIS_OP_HELPER_DEBUG


#ifdef CRIS_OP_HELPER_DEBUG
#define D(x) x
#define D_LOG(...) qemu_log(__VA_ARGS__)
#else
#define D(x)
#define D_LOG(...) do { } while (0)
#endif

#if !defined(CONFIG_USER_ONLY)
/* Try to fill the TLB and return an exception if error. If retaddr is
   NULL, it means that the function was called in C code (i.e. not
   from generated code or from helper.c) */
void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
              uintptr_t retaddr)
{
    CRISCPU *cpu = CRIS_CPU(cs);
    CPUCRISState *env = &cpu->env;
    int ret;

    D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
          env->pc, env->pregs[PR_EDA], (void *)retaddr);
    ret = cris_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
    if (unlikely(ret)) {
        if (retaddr) {
            /* now we have a real cpu fault */
            if (cpu_restore_state(cs, retaddr)) {
		/* Evaluate flags after retranslation.  */
                helper_top_evaluate_flags(env);
            }
        }
        cpu_loop_exit(cs);
    }
}

#endif

void helper_raise_exception(CPUCRISState *env, uint32_t index)
{
    CPUState *cs = CPU(cris_env_get_cpu(env));

    cs->exception_index = index;
    cpu_loop_exit(cs);
}

void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
{
#if !defined(CONFIG_USER_ONLY)
	pid &= 0xff;
	if (pid != (env->pregs[PR_PID] & 0xff))
		cris_mmu_flush_pid(env, env->pregs[PR_PID]);
#endif
}

void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
{
#if !defined(CONFIG_USER_ONLY)
    CRISCPU *cpu = cris_env_get_cpu(env);
    CPUState *cs = CPU(cpu);

    tlb_flush_page(cs, env->pregs[PR_SPC]);
    tlb_flush_page(cs, new_spc);
#endif
}

/* Used by the tlb decoder.  */
#define EXTRACT_FIELD(src, start, end) \
	    (((src) >> start) & ((1 << (end - start + 1)) - 1))

void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
{
#if !defined(CONFIG_USER_ONLY)
    CRISCPU *cpu = cris_env_get_cpu(env);
#endif
	uint32_t srs;
	srs = env->pregs[PR_SRS];
	srs &= 3;
	env->sregs[srs][sreg] = env->regs[reg];

#if !defined(CONFIG_USER_ONLY)
	if (srs == 1 || srs == 2) {
		if (sreg == 6) {
			/* Writes to tlb-hi write to mm_cause as a side 
			   effect.  */
			env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
			env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
		}
		else if (sreg == 5) {
			uint32_t set;
			uint32_t idx;
			uint32_t lo, hi;
			uint32_t vaddr;
			int tlb_v;

			idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
			set >>= 4;
			set &= 3;

			idx &= 15;
			/* We've just made a write to tlb_lo.  */
			lo = env->sregs[SFR_RW_MM_TLB_LO];
			/* Writes are done via r_mm_cause.  */
			hi = env->sregs[SFR_R_MM_CAUSE];

			vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
					      13, 31);
			vaddr <<= TARGET_PAGE_BITS;
			tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
					    3, 3);
			env->tlbsets[srs - 1][set][idx].lo = lo;
			env->tlbsets[srs - 1][set][idx].hi = hi;

			D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", 
				  vaddr, tlb_v, env->pc);
			if (tlb_v) {
                tlb_flush_page(CPU(cpu), vaddr);
			}
		}
	}
#endif
}

void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
{
	uint32_t srs;
	env->pregs[PR_SRS] &= 3;
	srs = env->pregs[PR_SRS];
	
#if !defined(CONFIG_USER_ONLY)
	if (srs == 1 || srs == 2)
	{
		uint32_t set;
		uint32_t idx;
		uint32_t lo, hi;

		idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
		set >>= 4;
		set &= 3;
		idx &= 15;

		/* Update the mirror regs.  */
		hi = env->tlbsets[srs - 1][set][idx].hi;
		lo = env->tlbsets[srs - 1][set][idx].lo;
		env->sregs[SFR_RW_MM_TLB_HI] = hi;
		env->sregs[SFR_RW_MM_TLB_LO] = lo;
	}
#endif
	env->regs[reg] = env->sregs[srs][sreg];
}

static void cris_ccs_rshift(CPUCRISState *env)
{
	uint32_t ccs;

	/* Apply the ccs shift.  */
	ccs = env->pregs[PR_CCS];
	ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
	if (ccs & U_FLAG)
	{
		/* Enter user mode.  */
		env->ksp = env->regs[R_SP];
		env->regs[R_SP] = env->pregs[PR_USP];
	}

	env->pregs[PR_CCS] = ccs;
}

void helper_rfe(CPUCRISState *env)
{
	int rflag = env->pregs[PR_CCS] & R_FLAG;

	D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n", 
		 env->pregs[PR_ERP], env->pregs[PR_PID],
		 env->pregs[PR_CCS],
		 env->btarget);

	cris_ccs_rshift(env);

	/* RFE sets the P_FLAG only if the R_FLAG is not set.  */
	if (!rflag)
		env->pregs[PR_CCS] |= P_FLAG;
}

void helper_rfn(CPUCRISState *env)
{
	int rflag = env->pregs[PR_CCS] & R_FLAG;

	D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n", 
		 env->pregs[PR_ERP], env->pregs[PR_PID],
		 env->pregs[PR_CCS],
		 env->btarget);

	cris_ccs_rshift(env);

	/* Set the P_FLAG only if the R_FLAG is not set.  */
	if (!rflag)
		env->pregs[PR_CCS] |= P_FLAG;

	/* Always set the M flag.  */
	env->pregs[PR_CCS] |= M_FLAG_V32;
}

uint32_t helper_lz(uint32_t t0)
{
	return clz32(t0);
}

uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
{
	/* FIXME: clean this up.  */

	/* des ref:
	   The N flag is set according to the selected bit in the dest reg.
	   The Z flag is set if the selected bit and all bits to the right are
	   zero.
	   The X flag is cleared.
	   Other flags are left untouched.
	   The destination reg is not affected.*/
	unsigned int fz, sbit, bset, mask, masked_t0;

	sbit = t1 & 31;
	bset = !!(t0 & (1 << sbit));
	mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
	masked_t0 = t0 & mask;
	fz = !(masked_t0 | bset);

	/* Clear the X, N and Z flags.  */
	ccs = ccs & ~(X_FLAG | N_FLAG | Z_FLAG);
	if (env->pregs[PR_VR] < 32)
		ccs &= ~(V_FLAG | C_FLAG);
	/* Set the N and Z flags accordingly.  */
	ccs |= (bset << 3) | (fz << 2);
	return ccs;
}

static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
                                                uint32_t flags, uint32_t ccs)
{
	unsigned int x, z, mask;

	/* Extended arithmetics, leave the z flag alone.  */
	x = env->cc_x;
	mask = env->cc_mask | X_FLAG;
        if (x) {
		z = flags & Z_FLAG;
		mask = mask & ~z;
	}
	flags &= mask;

	/* all insn clear the x-flag except setf or clrf.  */
	ccs &= ~mask;
	ccs |= flags;
	return ccs;
}

uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
                                    uint32_t ccs, uint32_t res, uint32_t mof)
{
	uint32_t flags = 0;
	int64_t tmp;
	int dneg;

	dneg = ((int32_t)res) < 0;

	tmp = mof;
	tmp <<= 32;
	tmp |= res;
	if (tmp == 0)
		flags |= Z_FLAG;
	else if (tmp < 0)
		flags |= N_FLAG;
	if ((dneg && mof != -1)
	    || (!dneg && mof != 0))
		flags |= V_FLAG;
        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
                                    uint32_t ccs, uint32_t res, uint32_t mof)
{
	uint32_t flags = 0;
	uint64_t tmp;

	tmp = mof;
	tmp <<= 32;
	tmp |= res;
	if (tmp == 0)
		flags |= Z_FLAG;
	else if (tmp >> 63)
		flags |= N_FLAG;
	if (mof)
		flags |= V_FLAG;

        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
				   uint32_t src, uint32_t dst, uint32_t res)
{
	uint32_t flags = 0;

	src = src & 0x80000000;
	dst = dst & 0x80000000;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (!src && !dst)
			flags |= V_FLAG;
		else if (src & dst)
			flags |= R_FLAG;
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (src & dst) 
			flags |= V_FLAG;
		if (dst | src) 
			flags |= R_FLAG;
	}

        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
				     uint32_t src, uint32_t dst, uint32_t res)
{
	uint32_t flags = 0;

	src = src & 0x80000000;
	dst = dst & 0x80000000;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (!src && !dst)
			flags |= V_FLAG;
		else if (src & dst)
			flags |= C_FLAG;
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (src & dst) 
			flags |= V_FLAG;
		if (dst | src) 
			flags |= C_FLAG;
	}

        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
				     uint32_t src, uint32_t dst, uint32_t res)
{
	uint32_t flags = 0;

	src = (~src) & 0x80000000;
	dst = dst & 0x80000000;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (!src && !dst)
			flags |= V_FLAG;
		else if (src & dst)
			flags |= C_FLAG;
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (src & dst) 
			flags |= V_FLAG;
		if (dst | src) 
			flags |= C_FLAG;
	}

	flags ^= C_FLAG;
        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
                                      uint32_t ccs, uint32_t res)
{
	uint32_t flags = 0;

	if ((int32_t)res < 0)
		flags |= N_FLAG;
	else if (res == 0L)
		flags |= Z_FLAG;

        return evaluate_flags_writeback(env, flags, ccs);
}
uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
                                      uint32_t ccs, uint32_t res)
{
	uint32_t flags = 0;

	if ((int16_t)res < 0L)
		flags |= N_FLAG;
	else if (res == 0)
		flags |= Z_FLAG;

        return evaluate_flags_writeback(env, flags, ccs);
}

/* TODO: This is expensive. We could split things up and only evaluate part of
   CCR on a need to know basis. For now, we simply re-evaluate everything.  */
void helper_evaluate_flags(CPUCRISState *env)
{
	uint32_t src, dst, res;
	uint32_t flags = 0;

	src = env->cc_src;
	dst = env->cc_dest;
	res = env->cc_result;

	if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
		src = ~src;

	/* Now, evaluate the flags. This stuff is based on
	   Per Zander's CRISv10 simulator.  */
	switch (env->cc_size)
	{
		case 1:
			if ((res & 0x80L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x80L) == 0L)
				    && ((dst & 0x80L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x80L) != 0L)
					 && ((dst & 0x80L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if ((res & 0xFFL) == 0L)
				{
					flags |= Z_FLAG;
				}
				if (((src & 0x80L) != 0L)
				    && ((dst & 0x80L) != 0L))
				{
					flags |= V_FLAG;
				}
				if ((dst & 0x80L) != 0L
				    || (src & 0x80L) != 0L)
				{
					flags |= C_FLAG;
				}
			}
			break;
		case 2:
			if ((res & 0x8000L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x8000L) == 0L)
				    && ((dst & 0x8000L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x8000L) != 0L)
					 && ((dst & 0x8000L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if ((res & 0xFFFFL) == 0L)
				{
					flags |= Z_FLAG;
				}
				if (((src & 0x8000L) != 0L)
				    && ((dst & 0x8000L) != 0L))
				{
					flags |= V_FLAG;
				}
				if ((dst & 0x8000L) != 0L
				    || (src & 0x8000L) != 0L)
				{
					flags |= C_FLAG;
				}
			}
			break;
		case 4:
			if ((res & 0x80000000L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x80000000L) == 0L)
				    && ((dst & 0x80000000L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x80000000L) != 0L) &&
					 ((dst & 0x80000000L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if (res == 0L)
					flags |= Z_FLAG;
				if (((src & 0x80000000L) != 0L)
				    && ((dst & 0x80000000L) != 0L))
					flags |= V_FLAG;
				if ((dst & 0x80000000L) != 0L
				    || (src & 0x80000000L) != 0L)
					flags |= C_FLAG;
			}
			break;
		default:
			break;
	}

	if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
		flags ^= C_FLAG;

        env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
                                                      env->pregs[PR_CCS]);
}

void helper_top_evaluate_flags(CPUCRISState *env)
{
	switch (env->cc_op)
	{
		case CC_OP_MCP:
                        env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
					env->pregs[PR_CCS], env->cc_src,
					env->cc_dest, env->cc_result);
			break;
		case CC_OP_MULS:
                        env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
					env->pregs[PR_CCS], env->cc_result,
					env->pregs[PR_MOF]);
			break;
		case CC_OP_MULU:
                        env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
					env->pregs[PR_CCS], env->cc_result,
					env->pregs[PR_MOF]);
			break;
		case CC_OP_MOVE:
		case CC_OP_AND:
		case CC_OP_OR:
		case CC_OP_XOR:
		case CC_OP_ASR:
		case CC_OP_LSR:
		case CC_OP_LSL:
		switch (env->cc_size)
		{
			case 4:
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_move_4(env,
							env->pregs[PR_CCS],
							env->cc_result);
				break;
			case 2:
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_move_2(env,
							env->pregs[PR_CCS],
							env->cc_result);
				break;
			default:
                                helper_evaluate_flags(env);
				break;
		}
		break;
		case CC_OP_FLAGS:
			/* live.  */
			break;
		case CC_OP_SUB:
		case CC_OP_CMP:
			if (env->cc_size == 4)
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_sub_4(env,
						env->pregs[PR_CCS],
						env->cc_src, env->cc_dest,
						env->cc_result);
			else
                                helper_evaluate_flags(env);
			break;
		default:
		{
			switch (env->cc_size)
			{
			case 4:
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_alu_4(env,
						env->pregs[PR_CCS],
						env->cc_src, env->cc_dest,
						env->cc_result);
				break;
			default:
                                helper_evaluate_flags(env);
				break;
			}
		}
		break;
	}
}
Commit	Line	Data
81fdc5f8 TS	1	/*
	2	* CRIS helper routines
	3	*
	4	* Copyright (c) 2007 AXIS Communications
	5	* Written by Edgar E. Iglesias
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
8167ee88	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
81fdc5f8 TS	19	*/
81fdc5f8 TS	20
23b0d7df	21	#include "qemu/osdep.h"
3e457172	22	#include "cpu.h"
786c02f1	23	#include "mmu.h"
2ef6175a	24	#include "exec/helper-proto.h"
1de7afc9	25	#include "qemu/host-utils.h"
f08b6170	26	#include "exec/cpu_ldst.h"
81fdc5f8	27
d12d51d5 AL	28	//#define CRIS_OP_HELPER_DEBUG
	29
	30
	31	#ifdef CRIS_OP_HELPER_DEBUG
	32	#define D(x) x
3f668b6c	33	#define D_LOG(...) qemu_log(__VA_ARGS__)
d12d51d5	34	#else
e2eef170	35	#define D(x)
d12d51d5 AL	36	#define D_LOG(...) do { } while (0)
d12d51d5 AL	37	#endif
e2eef170 PB	38
e2eef170 PB	39	#if !defined(CONFIG_USER_ONLY)
81fdc5f8 TS	40	/* Try to fill the TLB and return an exception if error. If retaddr is
	41	NULL, it means that the function was called in C code (i.e. not
	42	from generated code or from helper.c) */
d5a11fef	43	void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
20503968	44	uintptr_t retaddr)
81fdc5f8	45	{
d5a11fef AF	46	CRISCPU *cpu = CRIS_CPU(cs);
d5a11fef AF	47	CPUCRISState *env = &cpu->env;
81fdc5f8 TS	48	int ret;
81fdc5f8 TS	49
20503968	50	D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
ff057ccb	51	env->pc, env->pregs[PR_EDA], (void *)retaddr);
d5a11fef	52	ret = cris_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
551bd27f	53	if (unlikely(ret)) {
81fdc5f8 TS	54	if (retaddr) {
81fdc5f8 TS	55	/* now we have a real cpu fault */
3f38f309	56	if (cpu_restore_state(cs, retaddr)) {
30abcfc7	57	/* Evaluate flags after retranslation. */
febc9920	58	helper_top_evaluate_flags(env);
81fdc5f8 TS	59	}
81fdc5f8 TS	60	}
5638d180	61	cpu_loop_exit(cs);
81fdc5f8	62	}
81fdc5f8 TS	63	}
81fdc5f8 TS	64
e2eef170 PB	65	#endif
e2eef170 PB	66
febc9920	67	void helper_raise_exception(CPUCRISState *env, uint32_t index)
786c02f1	68	{
27103424 AF	69	CPUState *cs = CPU(cris_env_get_cpu(env));
	70
	71	cs->exception_index = index;
5638d180	72	cpu_loop_exit(cs);
786c02f1 EI	73	}
786c02f1 EI	74
febc9920	75	void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
cf1d97f0 EI	76	{
cf1d97f0 EI	77	#if !defined(CONFIG_USER_ONLY)
28de16da EI	78	pid &= 0xff;
	79	if (pid != (env->pregs[PR_PID] & 0xff))
	80	cris_mmu_flush_pid(env, env->pregs[PR_PID]);
cf1d97f0 EI	81	#endif
	82	}
	83
febc9920	84	void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
a1aebcb8 EI	85	{
a1aebcb8 EI	86	#if !defined(CONFIG_USER_ONLY)
31b030d4 AF	87	CRISCPU *cpu = cris_env_get_cpu(env);
	88	CPUState *cs = CPU(cpu);
	89
	90	tlb_flush_page(cs, env->pregs[PR_SPC]);
	91	tlb_flush_page(cs, new_spc);
a1aebcb8 EI	92	#endif
	93	}
	94
cf1d97f0 EI	95	/* Used by the tlb decoder. */
	96	#define EXTRACT_FIELD(src, start, end) \
	97	(((src) >> start) & ((1 << (end - start + 1)) - 1))
	98
febc9920	99	void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
dceaf394	100	{
31b030d4 AF	101	#if !defined(CONFIG_USER_ONLY)
	102	CRISCPU *cpu = cris_env_get_cpu(env);
	103	#endif
dceaf394 EI	104	uint32_t srs;
	105	srs = env->pregs[PR_SRS];
	106	srs &= 3;
	107	env->sregs[srs][sreg] = env->regs[reg];
	108
	109	#if !defined(CONFIG_USER_ONLY)
	110	if (srs == 1 \|\| srs == 2) {
	111	if (sreg == 6) {
	112	/* Writes to tlb-hi write to mm_cause as a side
	113	effect. */
6913ba56 EI	114	env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
6913ba56 EI	115	env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
dceaf394 EI	116	}
	117	else if (sreg == 5) {
	118	uint32_t set;
	119	uint32_t idx;
	120	uint32_t lo, hi;
	121	uint32_t vaddr;
cf1d97f0	122	int tlb_v;
dceaf394 EI	123
	124	idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
	125	set >>= 4;
	126	set &= 3;
	127
	128	idx &= 15;
	129	/* We've just made a write to tlb_lo. */
	130	lo = env->sregs[SFR_RW_MM_TLB_LO];
	131	/* Writes are done via r_mm_cause. */
	132	hi = env->sregs[SFR_R_MM_CAUSE];
cf1d97f0 EI	133
	134	vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
	135	13, 31);
	136	vaddr <<= TARGET_PAGE_BITS;
	137	tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
	138	3, 3);
dceaf394 EI	139	env->tlbsets[srs - 1][set][idx].lo = lo;
dceaf394 EI	140	env->tlbsets[srs - 1][set][idx].hi = hi;
cf1d97f0	141
d12d51d5 AL	142	D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
d12d51d5 AL	143	vaddr, tlb_v, env->pc);
3e18c6bf	144	if (tlb_v) {
31b030d4	145	tlb_flush_page(CPU(cpu), vaddr);
3e18c6bf	146	}
dceaf394 EI	147	}
	148	}
	149	#endif
	150	}
	151
febc9920	152	void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
dceaf394 EI	153	{
	154	uint32_t srs;
	155	env->pregs[PR_SRS] &= 3;
	156	srs = env->pregs[PR_SRS];
	157
	158	#if !defined(CONFIG_USER_ONLY)
	159	if (srs == 1 \|\| srs == 2)
	160	{
	161	uint32_t set;
	162	uint32_t idx;
	163	uint32_t lo, hi;
	164
	165	idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
	166	set >>= 4;
	167	set &= 3;
	168	idx &= 15;
	169
	170	/* Update the mirror regs. */
	171	hi = env->tlbsets[srs - 1][set][idx].hi;
	172	lo = env->tlbsets[srs - 1][set][idx].lo;
	173	env->sregs[SFR_RW_MM_TLB_HI] = hi;
	174	env->sregs[SFR_RW_MM_TLB_LO] = lo;
	175	}
	176	#endif
	177	env->regs[reg] = env->sregs[srs][sreg];
dceaf394 EI	178	}
dceaf394 EI	179
a1170bfd	180	static void cris_ccs_rshift(CPUCRISState *env)
dceaf394 EI	181	{
	182	uint32_t ccs;
	183
	184	/* Apply the ccs shift. */
	185	ccs = env->pregs[PR_CCS];
	186	ccs = (ccs & 0xc0000000) \| ((ccs & 0x0fffffff) >> 10);
	187	if (ccs & U_FLAG)
	188	{
	189	/* Enter user mode. */
	190	env->ksp = env->regs[R_SP];
	191	env->regs[R_SP] = env->pregs[PR_USP];
	192	}
	193
	194	env->pregs[PR_CCS] = ccs;
	195	}
	196
febc9920	197	void helper_rfe(CPUCRISState *env)
b41f7df0	198	{
bf443337 EI	199	int rflag = env->pregs[PR_CCS] & R_FLAG;
bf443337 EI	200
d12d51d5	201	D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
b41f7df0 EI	202	env->pregs[PR_ERP], env->pregs[PR_PID],
b41f7df0 EI	203	env->pregs[PR_CCS],
d12d51d5	204	env->btarget);
dceaf394 EI	205
	206	cris_ccs_rshift(env);
	207
	208	/* RFE sets the P_FLAG only if the R_FLAG is not set. */
bf443337	209	if (!rflag)
dceaf394	210	env->pregs[PR_CCS] \|= P_FLAG;
b41f7df0 EI	211	}
b41f7df0 EI	212
febc9920	213	void helper_rfn(CPUCRISState *env)
5bf8f1ab EI	214	{
	215	int rflag = env->pregs[PR_CCS] & R_FLAG;
	216
d12d51d5	217	D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
5bf8f1ab EI	218	env->pregs[PR_ERP], env->pregs[PR_PID],
5bf8f1ab EI	219	env->pregs[PR_CCS],
d12d51d5	220	env->btarget);
5bf8f1ab EI	221
	222	cris_ccs_rshift(env);
	223
	224	/* Set the P_FLAG only if the R_FLAG is not set. */
	225	if (!rflag)
	226	env->pregs[PR_CCS] \|= P_FLAG;
	227
8219314b LP	228	/* Always set the M flag. */
8219314b LP	229	env->pregs[PR_CCS] \|= M_FLAG_V32;
5bf8f1ab EI	230	}
5bf8f1ab EI	231
c38ac98d EI	232	uint32_t helper_lz(uint32_t t0)
	233	{
	234	return clz32(t0);
	235	}
	236
febc9920	237	uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
abd5c94e EI	238	{
	239	/* FIXME: clean this up. */
	240
	241	/* des ref:
	242	The N flag is set according to the selected bit in the dest reg.
	243	The Z flag is set if the selected bit and all bits to the right are
	244	zero.
	245	The X flag is cleared.
	246	Other flags are left untouched.
	247	The destination reg is not affected.*/
	248	unsigned int fz, sbit, bset, mask, masked_t0;
	249
	250	sbit = t1 & 31;
	251	bset = !!(t0 & (1 << sbit));
	252	mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
	253	masked_t0 = t0 & mask;
	254	fz = !(masked_t0 \| bset);
	255
	256	/* Clear the X, N and Z flags. */
	257	ccs = ccs & ~(X_FLAG \| N_FLAG \| Z_FLAG);
95475216 EI	258	if (env->pregs[PR_VR] < 32)
95475216 EI	259	ccs &= ~(V_FLAG \| C_FLAG);
abd5c94e EI	260	/* Set the N and Z flags accordingly. */
	261	ccs \|= (bset << 3) \| (fz << 2);
	262	return ccs;
	263	}
	264
febc9920 AJ	265	static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
febc9920 AJ	266	uint32_t flags, uint32_t ccs)
b41f7df0	267	{
a8cf66bb	268	unsigned int x, z, mask;
b41f7df0 EI	269
b41f7df0 EI	270	/* Extended arithmetics, leave the z flag alone. */
30abcfc7	271	x = env->cc_x;
a8cf66bb EI	272	mask = env->cc_mask \| X_FLAG;
	273	if (x) {
	274	z = flags & Z_FLAG;
	275	mask = mask & ~z;
	276	}
	277	flags &= mask;
b41f7df0 EI	278
b41f7df0 EI	279	/* all insn clear the x-flag except setf or clrf. */
6231868b EI	280	ccs &= ~mask;
	281	ccs \|= flags;
	282	return ccs;
b41f7df0 EI	283	}
b41f7df0 EI	284
febc9920 AJ	285	uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
febc9920 AJ	286	uint32_t ccs, uint32_t res, uint32_t mof)
b41f7df0	287	{
b41f7df0	288	uint32_t flags = 0;
dceaf394	289	int64_t tmp;
b41f7df0 EI	290	int dneg;
b41f7df0 EI	291
b41f7df0 EI	292	dneg = ((int32_t)res) < 0;
b41f7df0 EI	293
dceaf394 EI	294	tmp = mof;
	295	tmp <<= 32;
	296	tmp \|= res;
b41f7df0 EI	297	if (tmp == 0)
	298	flags \|= Z_FLAG;
	299	else if (tmp < 0)
	300	flags \|= N_FLAG;
	301	if ((dneg && mof != -1)
	302	\|\| (!dneg && mof != 0))
	303	flags \|= V_FLAG;
febc9920	304	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	305	}
b41f7df0 EI	306
febc9920 AJ	307	uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
febc9920 AJ	308	uint32_t ccs, uint32_t res, uint32_t mof)
b41f7df0	309	{
b41f7df0	310	uint32_t flags = 0;
dceaf394	311	uint64_t tmp;
b41f7df0	312
dceaf394 EI	313	tmp = mof;
	314	tmp <<= 32;
	315	tmp \|= res;
b41f7df0 EI	316	if (tmp == 0)
	317	flags \|= Z_FLAG;
	318	else if (tmp >> 63)
	319	flags \|= N_FLAG;
	320	if (mof)
	321	flags \|= V_FLAG;
	322
febc9920	323	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	324	}
b41f7df0 EI	325
febc9920	326	uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
6231868b	327	uint32_t src, uint32_t dst, uint32_t res)
b41f7df0	328	{
b41f7df0 EI	329	uint32_t flags = 0;
b41f7df0 EI	330
6231868b EI	331	src = src & 0x80000000;
6231868b EI	332	dst = dst & 0x80000000;
b41f7df0 EI	333
	334	if ((res & 0x80000000L) != 0L)
	335	{
	336	flags \|= N_FLAG;
a8cf66bb	337	if (!src && !dst)
b41f7df0	338	flags \|= V_FLAG;
a8cf66bb	339	else if (src & dst)
b41f7df0	340	flags \|= R_FLAG;
b41f7df0 EI	341	}
	342	else
	343	{
	344	if (res == 0L)
	345	flags \|= Z_FLAG;
a8cf66bb	346	if (src & dst)
b41f7df0	347	flags \|= V_FLAG;
a8cf66bb	348	if (dst \| src)
b41f7df0 EI	349	flags \|= R_FLAG;
	350	}
	351
febc9920	352	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	353	}
b41f7df0 EI	354
febc9920	355	uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
6231868b	356	uint32_t src, uint32_t dst, uint32_t res)
b41f7df0	357	{
b41f7df0 EI	358	uint32_t flags = 0;
b41f7df0 EI	359
6231868b EI	360	src = src & 0x80000000;
6231868b EI	361	dst = dst & 0x80000000;
30abcfc7	362
a8cf66bb	363	if ((res & 0x80000000L) != 0L)
30abcfc7	364	{
a8cf66bb EI	365	flags \|= N_FLAG;
	366	if (!src && !dst)
	367	flags \|= V_FLAG;
	368	else if (src & dst)
	369	flags \|= C_FLAG;
	370	}
	371	else
	372	{
	373	if (res == 0L)
	374	flags \|= Z_FLAG;
	375	if (src & dst)
	376	flags \|= V_FLAG;
	377	if (dst \| src)
	378	flags \|= C_FLAG;
30abcfc7 EI	379	}
30abcfc7 EI	380
febc9920	381	return evaluate_flags_writeback(env, flags, ccs);
a8cf66bb EI	382	}
a8cf66bb EI	383
febc9920	384	uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
6231868b	385	uint32_t src, uint32_t dst, uint32_t res)
a8cf66bb	386	{
a8cf66bb EI	387	uint32_t flags = 0;
a8cf66bb EI	388
6231868b EI	389	src = (~src) & 0x80000000;
6231868b EI	390	dst = dst & 0x80000000;
b41f7df0 EI	391
	392	if ((res & 0x80000000L) != 0L)
	393	{
	394	flags \|= N_FLAG;
a8cf66bb	395	if (!src && !dst)
b41f7df0	396	flags \|= V_FLAG;
a8cf66bb	397	else if (src & dst)
b41f7df0	398	flags \|= C_FLAG;
b41f7df0 EI	399	}
	400	else
	401	{
	402	if (res == 0L)
	403	flags \|= Z_FLAG;
a8cf66bb	404	if (src & dst)
b41f7df0	405	flags \|= V_FLAG;
a8cf66bb	406	if (dst \| src)
b41f7df0 EI	407	flags \|= C_FLAG;
	408	}
	409
a8cf66bb	410	flags ^= C_FLAG;
febc9920	411	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	412	}
b41f7df0 EI	413
febc9920 AJ	414	uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
febc9920 AJ	415	uint32_t ccs, uint32_t res)
b41f7df0	416	{
b41f7df0 EI	417	uint32_t flags = 0;
b41f7df0 EI	418
b41f7df0 EI	419	if ((int32_t)res < 0)
	420	flags \|= N_FLAG;
	421	else if (res == 0L)
	422	flags \|= Z_FLAG;
	423
febc9920	424	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0	425	}
febc9920 AJ	426	uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
febc9920 AJ	427	uint32_t ccs, uint32_t res)
b41f7df0	428	{
b41f7df0	429	uint32_t flags = 0;
b41f7df0 EI	430
	431	if ((int16_t)res < 0L)
	432	flags \|= N_FLAG;
	433	else if (res == 0)
	434	flags \|= Z_FLAG;
	435
febc9920	436	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	437	}
	438
	439	/* TODO: This is expensive. We could split things up and only evaluate part of
	440	CCR on a need to know basis. For now, we simply re-evaluate everything. */
febc9920	441	void helper_evaluate_flags(CPUCRISState *env)
b41f7df0	442	{
6231868b	443	uint32_t src, dst, res;
b41f7df0 EI	444	uint32_t flags = 0;
	445
	446	src = env->cc_src;
	447	dst = env->cc_dest;
	448	res = env->cc_result;
	449
30abcfc7 EI	450	if (env->cc_op == CC_OP_SUB \|\| env->cc_op == CC_OP_CMP)
30abcfc7 EI	451	src = ~src;
b41f7df0 EI	452
	453	/* Now, evaluate the flags. This stuff is based on
	454	Per Zander's CRISv10 simulator. */
	455	switch (env->cc_size)
	456	{
	457	case 1:
	458	if ((res & 0x80L) != 0L)
	459	{
	460	flags \|= N_FLAG;
	461	if (((src & 0x80L) == 0L)
	462	&& ((dst & 0x80L) == 0L))
	463	{
	464	flags \|= V_FLAG;
	465	}
	466	else if (((src & 0x80L) != 0L)
	467	&& ((dst & 0x80L) != 0L))
	468	{
	469	flags \|= C_FLAG;
	470	}
	471	}
	472	else
	473	{
	474	if ((res & 0xFFL) == 0L)
	475	{
	476	flags \|= Z_FLAG;
	477	}
	478	if (((src & 0x80L) != 0L)
	479	&& ((dst & 0x80L) != 0L))
	480	{
	481	flags \|= V_FLAG;
	482	}
	483	if ((dst & 0x80L) != 0L
	484	\|\| (src & 0x80L) != 0L)
	485	{
	486	flags \|= C_FLAG;
	487	}
	488	}
	489	break;
	490	case 2:
	491	if ((res & 0x8000L) != 0L)
	492	{
	493	flags \|= N_FLAG;
	494	if (((src & 0x8000L) == 0L)
	495	&& ((dst & 0x8000L) == 0L))
	496	{
	497	flags \|= V_FLAG;
	498	}
	499	else if (((src & 0x8000L) != 0L)
	500	&& ((dst & 0x8000L) != 0L))
	501	{
	502	flags \|= C_FLAG;
	503	}
	504	}
	505	else
	506	{
	507	if ((res & 0xFFFFL) == 0L)
	508	{
	509	flags \|= Z_FLAG;
	510	}
	511	if (((src & 0x8000L) != 0L)
	512	&& ((dst & 0x8000L) != 0L))
	513	{
	514	flags \|= V_FLAG;
	515	}
516	if ((dst & 0x8000L) != 0L
517	\|\| (src & 0x8000L) != 0L)
518	{
519	flags \|= C_FLAG;
520	}
521	}
522	break;
523	case 4:
524	if ((res & 0x80000000L) != 0L)
525	{
526	flags \|= N_FLAG;
527	if (((src & 0x80000000L) == 0L)
528	&& ((dst & 0x80000000L) == 0L))
529	{
530	flags \|= V_FLAG;
531	}
532	else if (((src & 0x80000000L) != 0L) &&
533	((dst & 0x80000000L) != 0L))
534	{
535	flags \|= C_FLAG;
536	}
537	}
538	else
539	{
540	if (res == 0L)
541	flags \|= Z_FLAG;
542	if (((src & 0x80000000L) != 0L)
543	&& ((dst & 0x80000000L) != 0L))
544	flags \|= V_FLAG;
545	if ((dst & 0x80000000L) != 0L
546	\|\| (src & 0x80000000L) != 0L)
547	flags \|= C_FLAG;
548	}
549	break;
550	default:
551	break;
552	}
553
6231868b	554	if (env->cc_op == CC_OP_SUB \|\| env->cc_op == CC_OP_CMP)
b41f7df0	555	flags ^= C_FLAG;
6231868b	556
febc9920 AJ	557	env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
febc9920 AJ	558	env->pregs[PR_CCS]);
b41f7df0	559	}
30abcfc7	560
febc9920	561	void helper_top_evaluate_flags(CPUCRISState *env)
30abcfc7 EI	562	{
	563	switch (env->cc_op)
	564	{
	565	case CC_OP_MCP:
febc9920	566	env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
6231868b EI	567	env->pregs[PR_CCS], env->cc_src,
6231868b EI	568	env->cc_dest, env->cc_result);
30abcfc7 EI	569	break;
30abcfc7 EI	570	case CC_OP_MULS:
febc9920	571	env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
6231868b EI	572	env->pregs[PR_CCS], env->cc_result,
6231868b EI	573	env->pregs[PR_MOF]);
30abcfc7 EI	574	break;
30abcfc7 EI	575	case CC_OP_MULU:
febc9920	576	env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
6231868b EI	577	env->pregs[PR_CCS], env->cc_result,
6231868b EI	578	env->pregs[PR_MOF]);
30abcfc7 EI	579	break;
	580	case CC_OP_MOVE:
	581	case CC_OP_AND:
	582	case CC_OP_OR:
	583	case CC_OP_XOR:
	584	case CC_OP_ASR:
	585	case CC_OP_LSR:
	586	case CC_OP_LSL:
6231868b EI	587	switch (env->cc_size)
	588	{
	589	case 4:
	590	env->pregs[PR_CCS] =
febc9920	591	helper_evaluate_flags_move_4(env,
6231868b EI	592	env->pregs[PR_CCS],
	593	env->cc_result);
	594	break;
	595	case 2:
	596	env->pregs[PR_CCS] =
febc9920	597	helper_evaluate_flags_move_2(env,
6231868b EI	598	env->pregs[PR_CCS],
	599	env->cc_result);
	600	break;
	601	default:
febc9920	602	helper_evaluate_flags(env);
6231868b EI	603	break;
	604	}
	605	break;
30abcfc7 EI	606	case CC_OP_FLAGS:
	607	/* live. */
	608	break;
a8cf66bb EI	609	case CC_OP_SUB:
	610	case CC_OP_CMP:
	611	if (env->cc_size == 4)
6231868b	612	env->pregs[PR_CCS] =
febc9920	613	helper_evaluate_flags_sub_4(env,
6231868b EI	614	env->pregs[PR_CCS],
	615	env->cc_src, env->cc_dest,
	616	env->cc_result);
a8cf66bb	617	else
febc9920	618	helper_evaluate_flags(env);
a8cf66bb	619	break;
30abcfc7 EI	620	default:
	621	{
	622	switch (env->cc_size)
	623	{
6231868b EI	624	case 4:
6231868b EI	625	env->pregs[PR_CCS] =
febc9920	626	helper_evaluate_flags_alu_4(env,
6231868b EI	627	env->pregs[PR_CCS],
	628	env->cc_src, env->cc_dest,
	629	env->cc_result);
	630	break;
	631	default:
febc9920	632	helper_evaluate_flags(env);
6231868b	633	break;
30abcfc7 EI	634	}
	635	}
	636	break;
	637	}
	638	}