[qemu.git] / target-cris / op_helper.c

/*
 *  CRIS helper routines
 *
 *  Copyright (c) 2007 AXIS Communications
 *  Written by Edgar E. Iglesias
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include "cpu.h"
#include "mmu.h"
#include "helper.h"
#include "qemu/host-utils.h"

//#define CRIS_OP_HELPER_DEBUG


#ifdef CRIS_OP_HELPER_DEBUG
#define D(x) x
#define D_LOG(...) qemu_log(__VA_ARGS__)
#else
#define D(x)
#define D_LOG(...) do { } while (0)
#endif

#if !defined(CONFIG_USER_ONLY)
#include "exec/softmmu_exec.h"

#define MMUSUFFIX _mmu

#define SHIFT 0
#include "exec/softmmu_template.h"

#define SHIFT 1
#include "exec/softmmu_template.h"

#define SHIFT 2
#include "exec/softmmu_template.h"

#define SHIFT 3
#include "exec/softmmu_template.h"

/* Try to fill the TLB and return an exception if error. If retaddr is
   NULL, it means that the function was called in C code (i.e. not
   from generated code or from helper.c) */
void tlb_fill(CPUCRISState *env, target_ulong addr, int is_write, int mmu_idx,
              uintptr_t retaddr)
{
    CRISCPU *cpu = cris_env_get_cpu(env);
    int ret;

    D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
          env->pc, env->pregs[PR_EDA], (void *)retaddr);
    ret = cris_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx);
    if (unlikely(ret)) {
        if (retaddr) {
            /* now we have a real cpu fault */
            if (cpu_restore_state(env, retaddr)) {
		/* Evaluate flags after retranslation.  */
                helper_top_evaluate_flags(env);
            }
        }
        cpu_loop_exit(env);
    }
}

#endif

void helper_raise_exception(CPUCRISState *env, uint32_t index)
{
    CPUState *cs = CPU(cris_env_get_cpu(env));

    cs->exception_index = index;
    cpu_loop_exit(env);
}

void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
{
#if !defined(CONFIG_USER_ONLY)
	pid &= 0xff;
	if (pid != (env->pregs[PR_PID] & 0xff))
		cris_mmu_flush_pid(env, env->pregs[PR_PID]);
#endif
}

void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
{
#if !defined(CONFIG_USER_ONLY)
	tlb_flush_page(env, env->pregs[PR_SPC]);
	tlb_flush_page(env, new_spc);
#endif
}

void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
{
	qemu_log("%s: a0=%x a1=%x\n", __func__, a0, a1);
}

/* Used by the tlb decoder.  */
#define EXTRACT_FIELD(src, start, end) \
	    (((src) >> start) & ((1 << (end - start + 1)) - 1))

void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
{
	uint32_t srs;
	srs = env->pregs[PR_SRS];
	srs &= 3;
	env->sregs[srs][sreg] = env->regs[reg];

#if !defined(CONFIG_USER_ONLY)
	if (srs == 1 || srs == 2) {
		if (sreg == 6) {
			/* Writes to tlb-hi write to mm_cause as a side 
			   effect.  */
			env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
			env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
		}
		else if (sreg == 5) {
			uint32_t set;
			uint32_t idx;
			uint32_t lo, hi;
			uint32_t vaddr;
			int tlb_v;

			idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
			set >>= 4;
			set &= 3;

			idx &= 15;
			/* We've just made a write to tlb_lo.  */
			lo = env->sregs[SFR_RW_MM_TLB_LO];
			/* Writes are done via r_mm_cause.  */
			hi = env->sregs[SFR_R_MM_CAUSE];

			vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
					      13, 31);
			vaddr <<= TARGET_PAGE_BITS;
			tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
					    3, 3);
			env->tlbsets[srs - 1][set][idx].lo = lo;
			env->tlbsets[srs - 1][set][idx].hi = hi;

			D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", 
				  vaddr, tlb_v, env->pc);
			if (tlb_v) {
				tlb_flush_page(env, vaddr);
			}
		}
	}
#endif
}

void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
{
	uint32_t srs;
	env->pregs[PR_SRS] &= 3;
	srs = env->pregs[PR_SRS];
	
#if !defined(CONFIG_USER_ONLY)
	if (srs == 1 || srs == 2)
	{
		uint32_t set;
		uint32_t idx;
		uint32_t lo, hi;

		idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
		set >>= 4;
		set &= 3;
		idx &= 15;

		/* Update the mirror regs.  */
		hi = env->tlbsets[srs - 1][set][idx].hi;
		lo = env->tlbsets[srs - 1][set][idx].lo;
		env->sregs[SFR_RW_MM_TLB_HI] = hi;
		env->sregs[SFR_RW_MM_TLB_LO] = lo;
	}
#endif
	env->regs[reg] = env->sregs[srs][sreg];
}

static void cris_ccs_rshift(CPUCRISState *env)
{
	uint32_t ccs;

	/* Apply the ccs shift.  */
	ccs = env->pregs[PR_CCS];
	ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
	if (ccs & U_FLAG)
	{
		/* Enter user mode.  */
		env->ksp = env->regs[R_SP];
		env->regs[R_SP] = env->pregs[PR_USP];
	}

	env->pregs[PR_CCS] = ccs;
}

void helper_rfe(CPUCRISState *env)
{
	int rflag = env->pregs[PR_CCS] & R_FLAG;

	D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n", 
		 env->pregs[PR_ERP], env->pregs[PR_PID],
		 env->pregs[PR_CCS],
		 env->btarget);

	cris_ccs_rshift(env);

	/* RFE sets the P_FLAG only if the R_FLAG is not set.  */
	if (!rflag)
		env->pregs[PR_CCS] |= P_FLAG;
}

void helper_rfn(CPUCRISState *env)
{
	int rflag = env->pregs[PR_CCS] & R_FLAG;

	D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n", 
		 env->pregs[PR_ERP], env->pregs[PR_PID],
		 env->pregs[PR_CCS],
		 env->btarget);

	cris_ccs_rshift(env);

	/* Set the P_FLAG only if the R_FLAG is not set.  */
	if (!rflag)
		env->pregs[PR_CCS] |= P_FLAG;

	/* Always set the M flag.  */
	env->pregs[PR_CCS] |= M_FLAG_V32;
}

uint32_t helper_lz(uint32_t t0)
{
	return clz32(t0);
}

uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
{
	/* FIXME: clean this up.  */

	/* des ref:
	   The N flag is set according to the selected bit in the dest reg.
	   The Z flag is set if the selected bit and all bits to the right are
	   zero.
	   The X flag is cleared.
	   Other flags are left untouched.
	   The destination reg is not affected.*/
	unsigned int fz, sbit, bset, mask, masked_t0;

	sbit = t1 & 31;
	bset = !!(t0 & (1 << sbit));
	mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
	masked_t0 = t0 & mask;
	fz = !(masked_t0 | bset);

	/* Clear the X, N and Z flags.  */
	ccs = ccs & ~(X_FLAG | N_FLAG | Z_FLAG);
	if (env->pregs[PR_VR] < 32)
		ccs &= ~(V_FLAG | C_FLAG);
	/* Set the N and Z flags accordingly.  */
	ccs |= (bset << 3) | (fz << 2);
	return ccs;
}

static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
                                                uint32_t flags, uint32_t ccs)
{
	unsigned int x, z, mask;

	/* Extended arithmetics, leave the z flag alone.  */
	x = env->cc_x;
	mask = env->cc_mask | X_FLAG;
        if (x) {
		z = flags & Z_FLAG;
		mask = mask & ~z;
	}
	flags &= mask;

	/* all insn clear the x-flag except setf or clrf.  */
	ccs &= ~mask;
	ccs |= flags;
	return ccs;
}

uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
                                    uint32_t ccs, uint32_t res, uint32_t mof)
{
	uint32_t flags = 0;
	int64_t tmp;
	int dneg;

	dneg = ((int32_t)res) < 0;

	tmp = mof;
	tmp <<= 32;
	tmp |= res;
	if (tmp == 0)
		flags |= Z_FLAG;
	else if (tmp < 0)
		flags |= N_FLAG;
	if ((dneg && mof != -1)
	    || (!dneg && mof != 0))
		flags |= V_FLAG;
        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
                                    uint32_t ccs, uint32_t res, uint32_t mof)
{
	uint32_t flags = 0;
	uint64_t tmp;

	tmp = mof;
	tmp <<= 32;
	tmp |= res;
	if (tmp == 0)
		flags |= Z_FLAG;
	else if (tmp >> 63)
		flags |= N_FLAG;
	if (mof)
		flags |= V_FLAG;

        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
				   uint32_t src, uint32_t dst, uint32_t res)
{
	uint32_t flags = 0;

	src = src & 0x80000000;
	dst = dst & 0x80000000;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (!src && !dst)
			flags |= V_FLAG;
		else if (src & dst)
			flags |= R_FLAG;
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (src & dst) 
			flags |= V_FLAG;
		if (dst | src) 
			flags |= R_FLAG;
	}

        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
				     uint32_t src, uint32_t dst, uint32_t res)
{
	uint32_t flags = 0;

	src = src & 0x80000000;
	dst = dst & 0x80000000;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (!src && !dst)
			flags |= V_FLAG;
		else if (src & dst)
			flags |= C_FLAG;
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (src & dst) 
			flags |= V_FLAG;
		if (dst | src) 
			flags |= C_FLAG;
	}

        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
				     uint32_t src, uint32_t dst, uint32_t res)
{
	uint32_t flags = 0;

	src = (~src) & 0x80000000;
	dst = dst & 0x80000000;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (!src && !dst)
			flags |= V_FLAG;
		else if (src & dst)
			flags |= C_FLAG;
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (src & dst) 
			flags |= V_FLAG;
		if (dst | src) 
			flags |= C_FLAG;
	}

	flags ^= C_FLAG;
        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
                                      uint32_t ccs, uint32_t res)
{
	uint32_t flags = 0;

	if ((int32_t)res < 0)
		flags |= N_FLAG;
	else if (res == 0L)
		flags |= Z_FLAG;

        return evaluate_flags_writeback(env, flags, ccs);
}
uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
                                      uint32_t ccs, uint32_t res)
{
	uint32_t flags = 0;

	if ((int16_t)res < 0L)
		flags |= N_FLAG;
	else if (res == 0)
		flags |= Z_FLAG;

        return evaluate_flags_writeback(env, flags, ccs);
}

/* TODO: This is expensive. We could split things up and only evaluate part of
   CCR on a need to know basis. For now, we simply re-evaluate everything.  */
void helper_evaluate_flags(CPUCRISState *env)
{
	uint32_t src, dst, res;
	uint32_t flags = 0;

	src = env->cc_src;
	dst = env->cc_dest;
	res = env->cc_result;

	if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
		src = ~src;

	/* Now, evaluate the flags. This stuff is based on
	   Per Zander's CRISv10 simulator.  */
	switch (env->cc_size)
	{
		case 1:
			if ((res & 0x80L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x80L) == 0L)
				    && ((dst & 0x80L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x80L) != 0L)
					 && ((dst & 0x80L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if ((res & 0xFFL) == 0L)
				{
					flags |= Z_FLAG;
				}
				if (((src & 0x80L) != 0L)
				    && ((dst & 0x80L) != 0L))
				{
					flags |= V_FLAG;
				}
				if ((dst & 0x80L) != 0L
				    || (src & 0x80L) != 0L)
				{
					flags |= C_FLAG;
				}
			}
			break;
		case 2:
			if ((res & 0x8000L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x8000L) == 0L)
				    && ((dst & 0x8000L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x8000L) != 0L)
					 && ((dst & 0x8000L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if ((res & 0xFFFFL) == 0L)
				{
					flags |= Z_FLAG;
				}
				if (((src & 0x8000L) != 0L)
				    && ((dst & 0x8000L) != 0L))
				{
					flags |= V_FLAG;
				}
				if ((dst & 0x8000L) != 0L
				    || (src & 0x8000L) != 0L)
				{
					flags |= C_FLAG;
				}
			}
			break;
		case 4:
			if ((res & 0x80000000L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x80000000L) == 0L)
				    && ((dst & 0x80000000L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x80000000L) != 0L) &&
					 ((dst & 0x80000000L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if (res == 0L)
					flags |= Z_FLAG;
				if (((src & 0x80000000L) != 0L)
				    && ((dst & 0x80000000L) != 0L))
					flags |= V_FLAG;
				if ((dst & 0x80000000L) != 0L
				    || (src & 0x80000000L) != 0L)
					flags |= C_FLAG;
			}
			break;
		default:
			break;
	}

	if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
		flags ^= C_FLAG;

        env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
                                                      env->pregs[PR_CCS]);
}

void helper_top_evaluate_flags(CPUCRISState *env)
{
	switch (env->cc_op)
	{
		case CC_OP_MCP:
                        env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
					env->pregs[PR_CCS], env->cc_src,
					env->cc_dest, env->cc_result);
			break;
		case CC_OP_MULS:
                        env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
					env->pregs[PR_CCS], env->cc_result,
					env->pregs[PR_MOF]);
			break;
		case CC_OP_MULU:
                        env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
					env->pregs[PR_CCS], env->cc_result,
					env->pregs[PR_MOF]);
			break;
		case CC_OP_MOVE:
		case CC_OP_AND:
		case CC_OP_OR:
		case CC_OP_XOR:
		case CC_OP_ASR:
		case CC_OP_LSR:
		case CC_OP_LSL:
		switch (env->cc_size)
		{
			case 4:
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_move_4(env,
							env->pregs[PR_CCS],
							env->cc_result);
				break;
			case 2:
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_move_2(env,
							env->pregs[PR_CCS],
							env->cc_result);
				break;
			default:
                                helper_evaluate_flags(env);
				break;
		}
		break;
		case CC_OP_FLAGS:
			/* live.  */
			break;
		case CC_OP_SUB:
		case CC_OP_CMP:
			if (env->cc_size == 4)
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_sub_4(env,
						env->pregs[PR_CCS],
						env->cc_src, env->cc_dest,
						env->cc_result);
			else
                                helper_evaluate_flags(env);
			break;
		default:
		{
			switch (env->cc_size)
			{
			case 4:
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_alu_4(env,
						env->pregs[PR_CCS],
						env->cc_src, env->cc_dest,
						env->cc_result);
				break;
			default:
                                helper_evaluate_flags(env);
				break;
			}
		}
		break;
	}
}
Commit	Line	Data
81fdc5f8 TS	1	/*
	2	* CRIS helper routines
	3	*
	4	* Copyright (c) 2007 AXIS Communications
	5	* Written by Edgar E. Iglesias
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
8167ee88	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
81fdc5f8 TS	19	*/
81fdc5f8 TS	20
3e457172	21	#include "cpu.h"
786c02f1	22	#include "mmu.h"
30abcfc7	23	#include "helper.h"
1de7afc9	24	#include "qemu/host-utils.h"
81fdc5f8	25
d12d51d5 AL	26	//#define CRIS_OP_HELPER_DEBUG
	27
	28
	29	#ifdef CRIS_OP_HELPER_DEBUG
	30	#define D(x) x
3f668b6c	31	#define D_LOG(...) qemu_log(__VA_ARGS__)
d12d51d5	32	#else
e2eef170	33	#define D(x)
d12d51d5 AL	34	#define D_LOG(...) do { } while (0)
d12d51d5 AL	35	#endif
e2eef170 PB	36
e2eef170 PB	37	#if !defined(CONFIG_USER_ONLY)
022c62cb	38	#include "exec/softmmu_exec.h"
e2eef170	39
81fdc5f8	40	#define MMUSUFFIX _mmu
81fdc5f8 TS	41
81fdc5f8 TS	42	#define SHIFT 0
022c62cb	43	#include "exec/softmmu_template.h"
81fdc5f8 TS	44
81fdc5f8 TS	45	#define SHIFT 1
022c62cb	46	#include "exec/softmmu_template.h"
81fdc5f8 TS	47
81fdc5f8 TS	48	#define SHIFT 2
022c62cb	49	#include "exec/softmmu_template.h"
81fdc5f8 TS	50
81fdc5f8 TS	51	#define SHIFT 3
022c62cb	52	#include "exec/softmmu_template.h"
81fdc5f8 TS	53
	54	/* Try to fill the TLB and return an exception if error. If retaddr is
	55	NULL, it means that the function was called in C code (i.e. not
	56	from generated code or from helper.c) */
cf7e0c80	57	void tlb_fill(CPUCRISState *env, target_ulong addr, int is_write, int mmu_idx,
20503968	58	uintptr_t retaddr)
81fdc5f8	59	{
7510454e	60	CRISCPU *cpu = cris_env_get_cpu(env);
81fdc5f8 TS	61	int ret;
81fdc5f8 TS	62
20503968	63	D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
ff057ccb	64	env->pc, env->pregs[PR_EDA], (void *)retaddr);
7510454e	65	ret = cris_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx);
551bd27f	66	if (unlikely(ret)) {
81fdc5f8 TS	67	if (retaddr) {
81fdc5f8 TS	68	/* now we have a real cpu fault */
a8a826a3	69	if (cpu_restore_state(env, retaddr)) {
30abcfc7	70	/* Evaluate flags after retranslation. */
febc9920	71	helper_top_evaluate_flags(env);
81fdc5f8 TS	72	}
81fdc5f8 TS	73	}
1162c041	74	cpu_loop_exit(env);
81fdc5f8	75	}
81fdc5f8 TS	76	}
81fdc5f8 TS	77
e2eef170 PB	78	#endif
e2eef170 PB	79
febc9920	80	void helper_raise_exception(CPUCRISState *env, uint32_t index)
786c02f1	81	{
27103424 AF	82	CPUState *cs = CPU(cris_env_get_cpu(env));
	83
	84	cs->exception_index = index;
	85	cpu_loop_exit(env);
786c02f1 EI	86	}
786c02f1 EI	87
febc9920	88	void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
cf1d97f0 EI	89	{
cf1d97f0 EI	90	#if !defined(CONFIG_USER_ONLY)
28de16da EI	91	pid &= 0xff;
	92	if (pid != (env->pregs[PR_PID] & 0xff))
	93	cris_mmu_flush_pid(env, env->pregs[PR_PID]);
cf1d97f0 EI	94	#endif
	95	}
	96
febc9920	97	void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
a1aebcb8 EI	98	{
	99	#if !defined(CONFIG_USER_ONLY)
	100	tlb_flush_page(env, env->pregs[PR_SPC]);
	101	tlb_flush_page(env, new_spc);
	102	#endif
	103	}
	104
30abcfc7	105	void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
b41f7df0	106	{
93fcfe39	107	qemu_log("%s: a0=%x a1=%x\n", __func__, a0, a1);
b41f7df0 EI	108	}
b41f7df0 EI	109
cf1d97f0 EI	110	/* Used by the tlb decoder. */
	111	#define EXTRACT_FIELD(src, start, end) \
	112	(((src) >> start) & ((1 << (end - start + 1)) - 1))
	113
febc9920	114	void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
dceaf394 EI	115	{
	116	uint32_t srs;
	117	srs = env->pregs[PR_SRS];
	118	srs &= 3;
	119	env->sregs[srs][sreg] = env->regs[reg];
	120
	121	#if !defined(CONFIG_USER_ONLY)
	122	if (srs == 1 \|\| srs == 2) {
	123	if (sreg == 6) {
	124	/* Writes to tlb-hi write to mm_cause as a side
	125	effect. */
6913ba56 EI	126	env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
6913ba56 EI	127	env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
dceaf394 EI	128	}
	129	else if (sreg == 5) {
	130	uint32_t set;
	131	uint32_t idx;
	132	uint32_t lo, hi;
	133	uint32_t vaddr;
cf1d97f0	134	int tlb_v;
dceaf394 EI	135
	136	idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
	137	set >>= 4;
	138	set &= 3;
	139
	140	idx &= 15;
	141	/* We've just made a write to tlb_lo. */
	142	lo = env->sregs[SFR_RW_MM_TLB_LO];
	143	/* Writes are done via r_mm_cause. */
	144	hi = env->sregs[SFR_R_MM_CAUSE];
cf1d97f0 EI	145
	146	vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
	147	13, 31);
	148	vaddr <<= TARGET_PAGE_BITS;
	149	tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
	150	3, 3);
dceaf394 EI	151	env->tlbsets[srs - 1][set][idx].lo = lo;
dceaf394 EI	152	env->tlbsets[srs - 1][set][idx].hi = hi;
cf1d97f0	153
d12d51d5 AL	154	D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
d12d51d5 AL	155	vaddr, tlb_v, env->pc);
3e18c6bf EI	156	if (tlb_v) {
	157	tlb_flush_page(env, vaddr);
	158	}
dceaf394 EI	159	}
	160	}
	161	#endif
	162	}
	163
febc9920	164	void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
dceaf394 EI	165	{
	166	uint32_t srs;
	167	env->pregs[PR_SRS] &= 3;
	168	srs = env->pregs[PR_SRS];
	169
	170	#if !defined(CONFIG_USER_ONLY)
	171	if (srs == 1 \|\| srs == 2)
	172	{
	173	uint32_t set;
	174	uint32_t idx;
	175	uint32_t lo, hi;
	176
	177	idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
	178	set >>= 4;
	179	set &= 3;
	180	idx &= 15;
	181
	182	/* Update the mirror regs. */
	183	hi = env->tlbsets[srs - 1][set][idx].hi;
	184	lo = env->tlbsets[srs - 1][set][idx].lo;
	185	env->sregs[SFR_RW_MM_TLB_HI] = hi;
	186	env->sregs[SFR_RW_MM_TLB_LO] = lo;
	187	}
	188	#endif
	189	env->regs[reg] = env->sregs[srs][sreg];
dceaf394 EI	190	}
dceaf394 EI	191
a1170bfd	192	static void cris_ccs_rshift(CPUCRISState *env)
dceaf394 EI	193	{
	194	uint32_t ccs;
	195
	196	/* Apply the ccs shift. */
	197	ccs = env->pregs[PR_CCS];
	198	ccs = (ccs & 0xc0000000) \| ((ccs & 0x0fffffff) >> 10);
	199	if (ccs & U_FLAG)
	200	{
	201	/* Enter user mode. */
	202	env->ksp = env->regs[R_SP];
	203	env->regs[R_SP] = env->pregs[PR_USP];
	204	}
	205
	206	env->pregs[PR_CCS] = ccs;
	207	}
	208
febc9920	209	void helper_rfe(CPUCRISState *env)
b41f7df0	210	{
bf443337 EI	211	int rflag = env->pregs[PR_CCS] & R_FLAG;
bf443337 EI	212
d12d51d5	213	D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
b41f7df0 EI	214	env->pregs[PR_ERP], env->pregs[PR_PID],
b41f7df0 EI	215	env->pregs[PR_CCS],
d12d51d5	216	env->btarget);
dceaf394 EI	217
	218	cris_ccs_rshift(env);
	219
	220	/* RFE sets the P_FLAG only if the R_FLAG is not set. */
bf443337	221	if (!rflag)
dceaf394	222	env->pregs[PR_CCS] \|= P_FLAG;
b41f7df0 EI	223	}
b41f7df0 EI	224
febc9920	225	void helper_rfn(CPUCRISState *env)
5bf8f1ab EI	226	{
	227	int rflag = env->pregs[PR_CCS] & R_FLAG;
	228
d12d51d5	229	D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
5bf8f1ab EI	230	env->pregs[PR_ERP], env->pregs[PR_PID],
5bf8f1ab EI	231	env->pregs[PR_CCS],
d12d51d5	232	env->btarget);
5bf8f1ab EI	233
	234	cris_ccs_rshift(env);
	235
	236	/* Set the P_FLAG only if the R_FLAG is not set. */
	237	if (!rflag)
	238	env->pregs[PR_CCS] \|= P_FLAG;
	239
8219314b LP	240	/* Always set the M flag. */
8219314b LP	241	env->pregs[PR_CCS] \|= M_FLAG_V32;
5bf8f1ab EI	242	}
5bf8f1ab EI	243
c38ac98d EI	244	uint32_t helper_lz(uint32_t t0)
	245	{
	246	return clz32(t0);
	247	}
	248
febc9920	249	uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
abd5c94e EI	250	{
	251	/* FIXME: clean this up. */
	252
	253	/* des ref:
	254	The N flag is set according to the selected bit in the dest reg.
	255	The Z flag is set if the selected bit and all bits to the right are
	256	zero.
	257	The X flag is cleared.
	258	Other flags are left untouched.
	259	The destination reg is not affected.*/
	260	unsigned int fz, sbit, bset, mask, masked_t0;
	261
	262	sbit = t1 & 31;
	263	bset = !!(t0 & (1 << sbit));
	264	mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
	265	masked_t0 = t0 & mask;
	266	fz = !(masked_t0 \| bset);
	267
	268	/* Clear the X, N and Z flags. */
	269	ccs = ccs & ~(X_FLAG \| N_FLAG \| Z_FLAG);
95475216 EI	270	if (env->pregs[PR_VR] < 32)
95475216 EI	271	ccs &= ~(V_FLAG \| C_FLAG);
abd5c94e EI	272	/* Set the N and Z flags accordingly. */
	273	ccs \|= (bset << 3) \| (fz << 2);
	274	return ccs;
	275	}
	276
febc9920 AJ	277	static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
febc9920 AJ	278	uint32_t flags, uint32_t ccs)
b41f7df0	279	{
a8cf66bb	280	unsigned int x, z, mask;
b41f7df0 EI	281
b41f7df0 EI	282	/* Extended arithmetics, leave the z flag alone. */
30abcfc7	283	x = env->cc_x;
a8cf66bb EI	284	mask = env->cc_mask \| X_FLAG;
	285	if (x) {
	286	z = flags & Z_FLAG;
	287	mask = mask & ~z;
	288	}
	289	flags &= mask;
b41f7df0 EI	290
b41f7df0 EI	291	/* all insn clear the x-flag except setf or clrf. */
6231868b EI	292	ccs &= ~mask;
	293	ccs \|= flags;
	294	return ccs;
b41f7df0 EI	295	}
b41f7df0 EI	296
febc9920 AJ	297	uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
febc9920 AJ	298	uint32_t ccs, uint32_t res, uint32_t mof)
b41f7df0	299	{
b41f7df0	300	uint32_t flags = 0;
dceaf394	301	int64_t tmp;
b41f7df0 EI	302	int dneg;
b41f7df0 EI	303
b41f7df0 EI	304	dneg = ((int32_t)res) < 0;
b41f7df0 EI	305
dceaf394 EI	306	tmp = mof;
	307	tmp <<= 32;
	308	tmp \|= res;
b41f7df0 EI	309	if (tmp == 0)
	310	flags \|= Z_FLAG;
	311	else if (tmp < 0)
	312	flags \|= N_FLAG;
	313	if ((dneg && mof != -1)
	314	\|\| (!dneg && mof != 0))
	315	flags \|= V_FLAG;
febc9920	316	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	317	}
b41f7df0 EI	318
febc9920 AJ	319	uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
febc9920 AJ	320	uint32_t ccs, uint32_t res, uint32_t mof)
b41f7df0	321	{
b41f7df0	322	uint32_t flags = 0;
dceaf394	323	uint64_t tmp;
b41f7df0	324
dceaf394 EI	325	tmp = mof;
	326	tmp <<= 32;
	327	tmp \|= res;
b41f7df0 EI	328	if (tmp == 0)
	329	flags \|= Z_FLAG;
	330	else if (tmp >> 63)
	331	flags \|= N_FLAG;
	332	if (mof)
	333	flags \|= V_FLAG;
	334
febc9920	335	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	336	}
b41f7df0 EI	337
febc9920	338	uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
6231868b	339	uint32_t src, uint32_t dst, uint32_t res)
b41f7df0	340	{
b41f7df0 EI	341	uint32_t flags = 0;
b41f7df0 EI	342
6231868b EI	343	src = src & 0x80000000;
6231868b EI	344	dst = dst & 0x80000000;
b41f7df0 EI	345
	346	if ((res & 0x80000000L) != 0L)
	347	{
	348	flags \|= N_FLAG;
a8cf66bb	349	if (!src && !dst)
b41f7df0	350	flags \|= V_FLAG;
a8cf66bb	351	else if (src & dst)
b41f7df0	352	flags \|= R_FLAG;
b41f7df0 EI	353	}
	354	else
	355	{
	356	if (res == 0L)
	357	flags \|= Z_FLAG;
a8cf66bb	358	if (src & dst)
b41f7df0	359	flags \|= V_FLAG;
a8cf66bb	360	if (dst \| src)
b41f7df0 EI	361	flags \|= R_FLAG;
	362	}
	363
febc9920	364	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	365	}
b41f7df0 EI	366
febc9920	367	uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
6231868b	368	uint32_t src, uint32_t dst, uint32_t res)
b41f7df0	369	{
b41f7df0 EI	370	uint32_t flags = 0;
b41f7df0 EI	371
6231868b EI	372	src = src & 0x80000000;
6231868b EI	373	dst = dst & 0x80000000;
30abcfc7	374
a8cf66bb	375	if ((res & 0x80000000L) != 0L)
30abcfc7	376	{
a8cf66bb EI	377	flags \|= N_FLAG;
	378	if (!src && !dst)
	379	flags \|= V_FLAG;
	380	else if (src & dst)
	381	flags \|= C_FLAG;
	382	}
	383	else
	384	{
	385	if (res == 0L)
	386	flags \|= Z_FLAG;
	387	if (src & dst)
	388	flags \|= V_FLAG;
	389	if (dst \| src)
	390	flags \|= C_FLAG;
30abcfc7 EI	391	}
30abcfc7 EI	392
febc9920	393	return evaluate_flags_writeback(env, flags, ccs);
a8cf66bb EI	394	}
a8cf66bb EI	395
febc9920	396	uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
6231868b	397	uint32_t src, uint32_t dst, uint32_t res)
a8cf66bb	398	{
a8cf66bb EI	399	uint32_t flags = 0;
a8cf66bb EI	400
6231868b EI	401	src = (~src) & 0x80000000;
6231868b EI	402	dst = dst & 0x80000000;
b41f7df0 EI	403
	404	if ((res & 0x80000000L) != 0L)
	405	{
	406	flags \|= N_FLAG;
a8cf66bb	407	if (!src && !dst)
b41f7df0	408	flags \|= V_FLAG;
a8cf66bb	409	else if (src & dst)
b41f7df0	410	flags \|= C_FLAG;
b41f7df0 EI	411	}
	412	else
	413	{
	414	if (res == 0L)
	415	flags \|= Z_FLAG;
a8cf66bb	416	if (src & dst)
b41f7df0	417	flags \|= V_FLAG;
a8cf66bb	418	if (dst \| src)
b41f7df0 EI	419	flags \|= C_FLAG;
	420	}
	421
a8cf66bb	422	flags ^= C_FLAG;
febc9920	423	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	424	}
b41f7df0 EI	425
febc9920 AJ	426	uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
febc9920 AJ	427	uint32_t ccs, uint32_t res)
b41f7df0	428	{
b41f7df0 EI	429	uint32_t flags = 0;
b41f7df0 EI	430
b41f7df0 EI	431	if ((int32_t)res < 0)
	432	flags \|= N_FLAG;
	433	else if (res == 0L)
	434	flags \|= Z_FLAG;
	435
febc9920	436	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0	437	}
febc9920 AJ	438	uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
febc9920 AJ	439	uint32_t ccs, uint32_t res)
b41f7df0	440	{
b41f7df0	441	uint32_t flags = 0;
b41f7df0 EI	442
	443	if ((int16_t)res < 0L)
	444	flags \|= N_FLAG;
	445	else if (res == 0)
	446	flags \|= Z_FLAG;
	447
febc9920	448	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	449	}
	450
	451	/* TODO: This is expensive. We could split things up and only evaluate part of
	452	CCR on a need to know basis. For now, we simply re-evaluate everything. */
febc9920	453	void helper_evaluate_flags(CPUCRISState *env)
b41f7df0	454	{
6231868b	455	uint32_t src, dst, res;
b41f7df0 EI	456	uint32_t flags = 0;
	457
	458	src = env->cc_src;
	459	dst = env->cc_dest;
	460	res = env->cc_result;
	461
30abcfc7 EI	462	if (env->cc_op == CC_OP_SUB \|\| env->cc_op == CC_OP_CMP)
30abcfc7 EI	463	src = ~src;
b41f7df0 EI	464
	465	/* Now, evaluate the flags. This stuff is based on
	466	Per Zander's CRISv10 simulator. */
	467	switch (env->cc_size)
	468	{
	469	case 1:
	470	if ((res & 0x80L) != 0L)
	471	{
	472	flags \|= N_FLAG;
	473	if (((src & 0x80L) == 0L)
	474	&& ((dst & 0x80L) == 0L))
	475	{
	476	flags \|= V_FLAG;
	477	}
	478	else if (((src & 0x80L) != 0L)
	479	&& ((dst & 0x80L) != 0L))
	480	{
	481	flags \|= C_FLAG;
	482	}
	483	}
	484	else
	485	{
	486	if ((res & 0xFFL) == 0L)
	487	{
	488	flags \|= Z_FLAG;
	489	}
	490	if (((src & 0x80L) != 0L)
	491	&& ((dst & 0x80L) != 0L))
	492	{
	493	flags \|= V_FLAG;
	494	}
	495	if ((dst & 0x80L) != 0L
	496	\|\| (src & 0x80L) != 0L)
	497	{
	498	flags \|= C_FLAG;
	499	}
	500	}
	501	break;
	502	case 2:
	503	if ((res & 0x8000L) != 0L)
	504	{
	505	flags \|= N_FLAG;
	506	if (((src & 0x8000L) == 0L)
	507	&& ((dst & 0x8000L) == 0L))
	508	{
	509	flags \|= V_FLAG;
	510	}
	511	else if (((src & 0x8000L) != 0L)
	512	&& ((dst & 0x8000L) != 0L))
	513	{
	514	flags \|= C_FLAG;
	515	}
	516	}
	517	else
	518	{
	519	if ((res & 0xFFFFL) == 0L)
	520	{
	521	flags \|= Z_FLAG;
	522	}
	523	if (((src & 0x8000L) != 0L)
	524	&& ((dst & 0x8000L) != 0L))
	525	{
	526	flags \|= V_FLAG;
	527	}
528	if ((dst & 0x8000L) != 0L
529	\|\| (src & 0x8000L) != 0L)
530	{
531	flags \|= C_FLAG;
532	}
533	}
534	break;
535	case 4:
536	if ((res & 0x80000000L) != 0L)
537	{
538	flags \|= N_FLAG;
539	if (((src & 0x80000000L) == 0L)
540	&& ((dst & 0x80000000L) == 0L))
541	{
542	flags \|= V_FLAG;
543	}
544	else if (((src & 0x80000000L) != 0L) &&
545	((dst & 0x80000000L) != 0L))
546	{
547	flags \|= C_FLAG;
548	}
549	}
550	else
551	{
552	if (res == 0L)
553	flags \|= Z_FLAG;
554	if (((src & 0x80000000L) != 0L)
555	&& ((dst & 0x80000000L) != 0L))
556	flags \|= V_FLAG;
557	if ((dst & 0x80000000L) != 0L
558	\|\| (src & 0x80000000L) != 0L)
559	flags \|= C_FLAG;
560	}
561	break;
562	default:
563	break;
564	}
565
6231868b	566	if (env->cc_op == CC_OP_SUB \|\| env->cc_op == CC_OP_CMP)
b41f7df0	567	flags ^= C_FLAG;
6231868b	568
febc9920 AJ	569	env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
febc9920 AJ	570	env->pregs[PR_CCS]);
b41f7df0	571	}
30abcfc7	572
febc9920	573	void helper_top_evaluate_flags(CPUCRISState *env)
30abcfc7 EI	574	{
	575	switch (env->cc_op)
	576	{
	577	case CC_OP_MCP:
febc9920	578	env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
6231868b EI	579	env->pregs[PR_CCS], env->cc_src,
6231868b EI	580	env->cc_dest, env->cc_result);
30abcfc7 EI	581	break;
30abcfc7 EI	582	case CC_OP_MULS:
febc9920	583	env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
6231868b EI	584	env->pregs[PR_CCS], env->cc_result,
6231868b EI	585	env->pregs[PR_MOF]);
30abcfc7 EI	586	break;
30abcfc7 EI	587	case CC_OP_MULU:
febc9920	588	env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
6231868b EI	589	env->pregs[PR_CCS], env->cc_result,
6231868b EI	590	env->pregs[PR_MOF]);
30abcfc7 EI	591	break;
	592	case CC_OP_MOVE:
	593	case CC_OP_AND:
	594	case CC_OP_OR:
	595	case CC_OP_XOR:
	596	case CC_OP_ASR:
	597	case CC_OP_LSR:
	598	case CC_OP_LSL:
6231868b EI	599	switch (env->cc_size)
	600	{
	601	case 4:
	602	env->pregs[PR_CCS] =
febc9920	603	helper_evaluate_flags_move_4(env,
6231868b EI	604	env->pregs[PR_CCS],
	605	env->cc_result);
	606	break;
	607	case 2:
	608	env->pregs[PR_CCS] =
febc9920	609	helper_evaluate_flags_move_2(env,
6231868b EI	610	env->pregs[PR_CCS],
	611	env->cc_result);
	612	break;
	613	default:
febc9920	614	helper_evaluate_flags(env);
6231868b EI	615	break;
	616	}
	617	break;
30abcfc7 EI	618	case CC_OP_FLAGS:
	619	/* live. */
	620	break;
a8cf66bb EI	621	case CC_OP_SUB:
	622	case CC_OP_CMP:
	623	if (env->cc_size == 4)
6231868b	624	env->pregs[PR_CCS] =
febc9920	625	helper_evaluate_flags_sub_4(env,
6231868b EI	626	env->pregs[PR_CCS],
	627	env->cc_src, env->cc_dest,
	628	env->cc_result);
a8cf66bb	629	else
febc9920	630	helper_evaluate_flags(env);
a8cf66bb	631	break;
30abcfc7 EI	632	default:
	633	{
	634	switch (env->cc_size)
	635	{
6231868b EI	636	case 4:
6231868b EI	637	env->pregs[PR_CCS] =
febc9920	638	helper_evaluate_flags_alu_4(env,
6231868b EI	639	env->pregs[PR_CCS],
	640	env->cc_src, env->cc_dest,
	641	env->cc_result);
	642	break;
	643	default:
febc9920	644	helper_evaluate_flags(env);
6231868b	645	break;
30abcfc7 EI	646	}
	647	}
	648	break;
	649	}
	650	}