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296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
26 | #include "config-host.h" | |
27 | ||
28 | #include "monitor.h" | |
29 | #include "sysemu.h" | |
30 | #include "gdbstub.h" | |
31 | #include "dma.h" | |
32 | #include "kvm.h" | |
de0b36b6 | 33 | #include "qmp-commands.h" |
296af7c9 | 34 | |
96284e89 | 35 | #include "qemu-thread.h" |
296af7c9 | 36 | #include "cpus.h" |
44a9b356 | 37 | #include "main-loop.h" |
0ff0fc19 JK |
38 | |
39 | #ifndef _WIN32 | |
a8486bc9 | 40 | #include "compatfd.h" |
0ff0fc19 | 41 | #endif |
296af7c9 | 42 | |
6d9cb73c JK |
43 | #ifdef CONFIG_LINUX |
44 | ||
45 | #include <sys/prctl.h> | |
46 | ||
c0532a76 MT |
47 | #ifndef PR_MCE_KILL |
48 | #define PR_MCE_KILL 33 | |
49 | #endif | |
50 | ||
6d9cb73c JK |
51 | #ifndef PR_MCE_KILL_SET |
52 | #define PR_MCE_KILL_SET 1 | |
53 | #endif | |
54 | ||
55 | #ifndef PR_MCE_KILL_EARLY | |
56 | #define PR_MCE_KILL_EARLY 1 | |
57 | #endif | |
58 | ||
59 | #endif /* CONFIG_LINUX */ | |
60 | ||
296af7c9 BS |
61 | static CPUState *next_cpu; |
62 | ||
946fb27c PB |
63 | /***********************************************************/ |
64 | /* guest cycle counter */ | |
65 | ||
66 | /* Conversion factor from emulated instructions to virtual clock ticks. */ | |
67 | static int icount_time_shift; | |
68 | /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ | |
69 | #define MAX_ICOUNT_SHIFT 10 | |
70 | /* Compensate for varying guest execution speed. */ | |
71 | static int64_t qemu_icount_bias; | |
72 | static QEMUTimer *icount_rt_timer; | |
73 | static QEMUTimer *icount_vm_timer; | |
74 | static QEMUTimer *icount_warp_timer; | |
75 | static int64_t vm_clock_warp_start; | |
76 | static int64_t qemu_icount; | |
77 | ||
78 | typedef struct TimersState { | |
79 | int64_t cpu_ticks_prev; | |
80 | int64_t cpu_ticks_offset; | |
81 | int64_t cpu_clock_offset; | |
82 | int32_t cpu_ticks_enabled; | |
83 | int64_t dummy; | |
84 | } TimersState; | |
85 | ||
86 | TimersState timers_state; | |
87 | ||
88 | /* Return the virtual CPU time, based on the instruction counter. */ | |
89 | int64_t cpu_get_icount(void) | |
90 | { | |
91 | int64_t icount; | |
92 | CPUState *env = cpu_single_env;; | |
93 | ||
94 | icount = qemu_icount; | |
95 | if (env) { | |
96 | if (!can_do_io(env)) { | |
97 | fprintf(stderr, "Bad clock read\n"); | |
98 | } | |
99 | icount -= (env->icount_decr.u16.low + env->icount_extra); | |
100 | } | |
101 | return qemu_icount_bias + (icount << icount_time_shift); | |
102 | } | |
103 | ||
104 | /* return the host CPU cycle counter and handle stop/restart */ | |
105 | int64_t cpu_get_ticks(void) | |
106 | { | |
107 | if (use_icount) { | |
108 | return cpu_get_icount(); | |
109 | } | |
110 | if (!timers_state.cpu_ticks_enabled) { | |
111 | return timers_state.cpu_ticks_offset; | |
112 | } else { | |
113 | int64_t ticks; | |
114 | ticks = cpu_get_real_ticks(); | |
115 | if (timers_state.cpu_ticks_prev > ticks) { | |
116 | /* Note: non increasing ticks may happen if the host uses | |
117 | software suspend */ | |
118 | timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks; | |
119 | } | |
120 | timers_state.cpu_ticks_prev = ticks; | |
121 | return ticks + timers_state.cpu_ticks_offset; | |
122 | } | |
123 | } | |
124 | ||
125 | /* return the host CPU monotonic timer and handle stop/restart */ | |
126 | int64_t cpu_get_clock(void) | |
127 | { | |
128 | int64_t ti; | |
129 | if (!timers_state.cpu_ticks_enabled) { | |
130 | return timers_state.cpu_clock_offset; | |
131 | } else { | |
132 | ti = get_clock(); | |
133 | return ti + timers_state.cpu_clock_offset; | |
134 | } | |
135 | } | |
136 | ||
137 | /* enable cpu_get_ticks() */ | |
138 | void cpu_enable_ticks(void) | |
139 | { | |
140 | if (!timers_state.cpu_ticks_enabled) { | |
141 | timers_state.cpu_ticks_offset -= cpu_get_real_ticks(); | |
142 | timers_state.cpu_clock_offset -= get_clock(); | |
143 | timers_state.cpu_ticks_enabled = 1; | |
144 | } | |
145 | } | |
146 | ||
147 | /* disable cpu_get_ticks() : the clock is stopped. You must not call | |
148 | cpu_get_ticks() after that. */ | |
149 | void cpu_disable_ticks(void) | |
150 | { | |
151 | if (timers_state.cpu_ticks_enabled) { | |
152 | timers_state.cpu_ticks_offset = cpu_get_ticks(); | |
153 | timers_state.cpu_clock_offset = cpu_get_clock(); | |
154 | timers_state.cpu_ticks_enabled = 0; | |
155 | } | |
156 | } | |
157 | ||
158 | /* Correlation between real and virtual time is always going to be | |
159 | fairly approximate, so ignore small variation. | |
160 | When the guest is idle real and virtual time will be aligned in | |
161 | the IO wait loop. */ | |
162 | #define ICOUNT_WOBBLE (get_ticks_per_sec() / 10) | |
163 | ||
164 | static void icount_adjust(void) | |
165 | { | |
166 | int64_t cur_time; | |
167 | int64_t cur_icount; | |
168 | int64_t delta; | |
169 | static int64_t last_delta; | |
170 | /* If the VM is not running, then do nothing. */ | |
171 | if (!runstate_is_running()) { | |
172 | return; | |
173 | } | |
174 | cur_time = cpu_get_clock(); | |
175 | cur_icount = qemu_get_clock_ns(vm_clock); | |
176 | delta = cur_icount - cur_time; | |
177 | /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */ | |
178 | if (delta > 0 | |
179 | && last_delta + ICOUNT_WOBBLE < delta * 2 | |
180 | && icount_time_shift > 0) { | |
181 | /* The guest is getting too far ahead. Slow time down. */ | |
182 | icount_time_shift--; | |
183 | } | |
184 | if (delta < 0 | |
185 | && last_delta - ICOUNT_WOBBLE > delta * 2 | |
186 | && icount_time_shift < MAX_ICOUNT_SHIFT) { | |
187 | /* The guest is getting too far behind. Speed time up. */ | |
188 | icount_time_shift++; | |
189 | } | |
190 | last_delta = delta; | |
191 | qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift); | |
192 | } | |
193 | ||
194 | static void icount_adjust_rt(void *opaque) | |
195 | { | |
196 | qemu_mod_timer(icount_rt_timer, | |
197 | qemu_get_clock_ms(rt_clock) + 1000); | |
198 | icount_adjust(); | |
199 | } | |
200 | ||
201 | static void icount_adjust_vm(void *opaque) | |
202 | { | |
203 | qemu_mod_timer(icount_vm_timer, | |
204 | qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10); | |
205 | icount_adjust(); | |
206 | } | |
207 | ||
208 | static int64_t qemu_icount_round(int64_t count) | |
209 | { | |
210 | return (count + (1 << icount_time_shift) - 1) >> icount_time_shift; | |
211 | } | |
212 | ||
213 | static void icount_warp_rt(void *opaque) | |
214 | { | |
215 | if (vm_clock_warp_start == -1) { | |
216 | return; | |
217 | } | |
218 | ||
219 | if (runstate_is_running()) { | |
220 | int64_t clock = qemu_get_clock_ns(rt_clock); | |
221 | int64_t warp_delta = clock - vm_clock_warp_start; | |
222 | if (use_icount == 1) { | |
223 | qemu_icount_bias += warp_delta; | |
224 | } else { | |
225 | /* | |
226 | * In adaptive mode, do not let the vm_clock run too | |
227 | * far ahead of real time. | |
228 | */ | |
229 | int64_t cur_time = cpu_get_clock(); | |
230 | int64_t cur_icount = qemu_get_clock_ns(vm_clock); | |
231 | int64_t delta = cur_time - cur_icount; | |
232 | qemu_icount_bias += MIN(warp_delta, delta); | |
233 | } | |
234 | if (qemu_clock_expired(vm_clock)) { | |
235 | qemu_notify_event(); | |
236 | } | |
237 | } | |
238 | vm_clock_warp_start = -1; | |
239 | } | |
240 | ||
241 | void qemu_clock_warp(QEMUClock *clock) | |
242 | { | |
243 | int64_t deadline; | |
244 | ||
245 | /* | |
246 | * There are too many global variables to make the "warp" behavior | |
247 | * applicable to other clocks. But a clock argument removes the | |
248 | * need for if statements all over the place. | |
249 | */ | |
250 | if (clock != vm_clock || !use_icount) { | |
251 | return; | |
252 | } | |
253 | ||
254 | /* | |
255 | * If the CPUs have been sleeping, advance the vm_clock timer now. This | |
256 | * ensures that the deadline for the timer is computed correctly below. | |
257 | * This also makes sure that the insn counter is synchronized before the | |
258 | * CPU starts running, in case the CPU is woken by an event other than | |
259 | * the earliest vm_clock timer. | |
260 | */ | |
261 | icount_warp_rt(NULL); | |
262 | if (!all_cpu_threads_idle() || !qemu_clock_has_timers(vm_clock)) { | |
263 | qemu_del_timer(icount_warp_timer); | |
264 | return; | |
265 | } | |
266 | ||
267 | vm_clock_warp_start = qemu_get_clock_ns(rt_clock); | |
268 | deadline = qemu_clock_deadline(vm_clock); | |
269 | if (deadline > 0) { | |
270 | /* | |
271 | * Ensure the vm_clock proceeds even when the virtual CPU goes to | |
272 | * sleep. Otherwise, the CPU might be waiting for a future timer | |
273 | * interrupt to wake it up, but the interrupt never comes because | |
274 | * the vCPU isn't running any insns and thus doesn't advance the | |
275 | * vm_clock. | |
276 | * | |
277 | * An extreme solution for this problem would be to never let VCPUs | |
278 | * sleep in icount mode if there is a pending vm_clock timer; rather | |
279 | * time could just advance to the next vm_clock event. Instead, we | |
280 | * do stop VCPUs and only advance vm_clock after some "real" time, | |
281 | * (related to the time left until the next event) has passed. This | |
282 | * rt_clock timer will do this. This avoids that the warps are too | |
283 | * visible externally---for example, you will not be sending network | |
284 | * packets continously instead of every 100ms. | |
285 | */ | |
286 | qemu_mod_timer(icount_warp_timer, vm_clock_warp_start + deadline); | |
287 | } else { | |
288 | qemu_notify_event(); | |
289 | } | |
290 | } | |
291 | ||
292 | static const VMStateDescription vmstate_timers = { | |
293 | .name = "timer", | |
294 | .version_id = 2, | |
295 | .minimum_version_id = 1, | |
296 | .minimum_version_id_old = 1, | |
297 | .fields = (VMStateField[]) { | |
298 | VMSTATE_INT64(cpu_ticks_offset, TimersState), | |
299 | VMSTATE_INT64(dummy, TimersState), | |
300 | VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2), | |
301 | VMSTATE_END_OF_LIST() | |
302 | } | |
303 | }; | |
304 | ||
305 | void configure_icount(const char *option) | |
306 | { | |
307 | vmstate_register(NULL, 0, &vmstate_timers, &timers_state); | |
308 | if (!option) { | |
309 | return; | |
310 | } | |
311 | ||
312 | icount_warp_timer = qemu_new_timer_ns(rt_clock, icount_warp_rt, NULL); | |
313 | if (strcmp(option, "auto") != 0) { | |
314 | icount_time_shift = strtol(option, NULL, 0); | |
315 | use_icount = 1; | |
316 | return; | |
317 | } | |
318 | ||
319 | use_icount = 2; | |
320 | ||
321 | /* 125MIPS seems a reasonable initial guess at the guest speed. | |
322 | It will be corrected fairly quickly anyway. */ | |
323 | icount_time_shift = 3; | |
324 | ||
325 | /* Have both realtime and virtual time triggers for speed adjustment. | |
326 | The realtime trigger catches emulated time passing too slowly, | |
327 | the virtual time trigger catches emulated time passing too fast. | |
328 | Realtime triggers occur even when idle, so use them less frequently | |
329 | than VM triggers. */ | |
330 | icount_rt_timer = qemu_new_timer_ms(rt_clock, icount_adjust_rt, NULL); | |
331 | qemu_mod_timer(icount_rt_timer, | |
332 | qemu_get_clock_ms(rt_clock) + 1000); | |
333 | icount_vm_timer = qemu_new_timer_ns(vm_clock, icount_adjust_vm, NULL); | |
334 | qemu_mod_timer(icount_vm_timer, | |
335 | qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10); | |
336 | } | |
337 | ||
296af7c9 BS |
338 | /***********************************************************/ |
339 | void hw_error(const char *fmt, ...) | |
340 | { | |
341 | va_list ap; | |
342 | CPUState *env; | |
343 | ||
344 | va_start(ap, fmt); | |
345 | fprintf(stderr, "qemu: hardware error: "); | |
346 | vfprintf(stderr, fmt, ap); | |
347 | fprintf(stderr, "\n"); | |
348 | for(env = first_cpu; env != NULL; env = env->next_cpu) { | |
349 | fprintf(stderr, "CPU #%d:\n", env->cpu_index); | |
350 | #ifdef TARGET_I386 | |
351 | cpu_dump_state(env, stderr, fprintf, X86_DUMP_FPU); | |
352 | #else | |
353 | cpu_dump_state(env, stderr, fprintf, 0); | |
354 | #endif | |
355 | } | |
356 | va_end(ap); | |
357 | abort(); | |
358 | } | |
359 | ||
360 | void cpu_synchronize_all_states(void) | |
361 | { | |
362 | CPUState *cpu; | |
363 | ||
364 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
365 | cpu_synchronize_state(cpu); | |
366 | } | |
367 | } | |
368 | ||
369 | void cpu_synchronize_all_post_reset(void) | |
370 | { | |
371 | CPUState *cpu; | |
372 | ||
373 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
374 | cpu_synchronize_post_reset(cpu); | |
375 | } | |
376 | } | |
377 | ||
378 | void cpu_synchronize_all_post_init(void) | |
379 | { | |
380 | CPUState *cpu; | |
381 | ||
382 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
383 | cpu_synchronize_post_init(cpu); | |
384 | } | |
385 | } | |
386 | ||
3ae9501c MT |
387 | int cpu_is_stopped(CPUState *env) |
388 | { | |
1354869c | 389 | return !runstate_is_running() || env->stopped; |
3ae9501c MT |
390 | } |
391 | ||
1dfb4dd9 | 392 | static void do_vm_stop(RunState state) |
296af7c9 | 393 | { |
1354869c | 394 | if (runstate_is_running()) { |
296af7c9 | 395 | cpu_disable_ticks(); |
296af7c9 | 396 | pause_all_vcpus(); |
f5bbfba1 | 397 | runstate_set(state); |
1dfb4dd9 | 398 | vm_state_notify(0, state); |
55df6f33 MT |
399 | qemu_aio_flush(); |
400 | bdrv_flush_all(); | |
296af7c9 BS |
401 | monitor_protocol_event(QEVENT_STOP, NULL); |
402 | } | |
403 | } | |
404 | ||
405 | static int cpu_can_run(CPUState *env) | |
406 | { | |
0ab07c62 | 407 | if (env->stop) { |
296af7c9 | 408 | return 0; |
0ab07c62 | 409 | } |
1354869c | 410 | if (env->stopped || !runstate_is_running()) { |
296af7c9 | 411 | return 0; |
0ab07c62 | 412 | } |
296af7c9 BS |
413 | return 1; |
414 | } | |
415 | ||
16400322 | 416 | static bool cpu_thread_is_idle(CPUState *env) |
296af7c9 | 417 | { |
16400322 JK |
418 | if (env->stop || env->queued_work_first) { |
419 | return false; | |
420 | } | |
1354869c | 421 | if (env->stopped || !runstate_is_running()) { |
16400322 JK |
422 | return true; |
423 | } | |
f2c1cc81 JK |
424 | if (!env->halted || qemu_cpu_has_work(env) || |
425 | (kvm_enabled() && kvm_irqchip_in_kernel())) { | |
16400322 JK |
426 | return false; |
427 | } | |
428 | return true; | |
296af7c9 BS |
429 | } |
430 | ||
ab33fcda | 431 | bool all_cpu_threads_idle(void) |
296af7c9 BS |
432 | { |
433 | CPUState *env; | |
434 | ||
16400322 JK |
435 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
436 | if (!cpu_thread_is_idle(env)) { | |
437 | return false; | |
438 | } | |
439 | } | |
440 | return true; | |
296af7c9 BS |
441 | } |
442 | ||
1009d2ed | 443 | static void cpu_handle_guest_debug(CPUState *env) |
83f338f7 | 444 | { |
3c638d06 | 445 | gdb_set_stop_cpu(env); |
8cf71710 | 446 | qemu_system_debug_request(); |
83f338f7 | 447 | env->stopped = 1; |
3c638d06 JK |
448 | } |
449 | ||
714bd040 PB |
450 | static void cpu_signal(int sig) |
451 | { | |
452 | if (cpu_single_env) { | |
453 | cpu_exit(cpu_single_env); | |
454 | } | |
455 | exit_request = 1; | |
456 | } | |
714bd040 | 457 | |
6d9cb73c JK |
458 | #ifdef CONFIG_LINUX |
459 | static void sigbus_reraise(void) | |
460 | { | |
461 | sigset_t set; | |
462 | struct sigaction action; | |
463 | ||
464 | memset(&action, 0, sizeof(action)); | |
465 | action.sa_handler = SIG_DFL; | |
466 | if (!sigaction(SIGBUS, &action, NULL)) { | |
467 | raise(SIGBUS); | |
468 | sigemptyset(&set); | |
469 | sigaddset(&set, SIGBUS); | |
470 | sigprocmask(SIG_UNBLOCK, &set, NULL); | |
471 | } | |
472 | perror("Failed to re-raise SIGBUS!\n"); | |
473 | abort(); | |
474 | } | |
475 | ||
476 | static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo, | |
477 | void *ctx) | |
478 | { | |
479 | if (kvm_on_sigbus(siginfo->ssi_code, | |
480 | (void *)(intptr_t)siginfo->ssi_addr)) { | |
481 | sigbus_reraise(); | |
482 | } | |
483 | } | |
484 | ||
485 | static void qemu_init_sigbus(void) | |
486 | { | |
487 | struct sigaction action; | |
488 | ||
489 | memset(&action, 0, sizeof(action)); | |
490 | action.sa_flags = SA_SIGINFO; | |
491 | action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler; | |
492 | sigaction(SIGBUS, &action, NULL); | |
493 | ||
494 | prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0); | |
495 | } | |
496 | ||
1ab3c6c0 JK |
497 | static void qemu_kvm_eat_signals(CPUState *env) |
498 | { | |
499 | struct timespec ts = { 0, 0 }; | |
500 | siginfo_t siginfo; | |
501 | sigset_t waitset; | |
502 | sigset_t chkset; | |
503 | int r; | |
504 | ||
505 | sigemptyset(&waitset); | |
506 | sigaddset(&waitset, SIG_IPI); | |
507 | sigaddset(&waitset, SIGBUS); | |
508 | ||
509 | do { | |
510 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
511 | if (r == -1 && !(errno == EAGAIN || errno == EINTR)) { | |
512 | perror("sigtimedwait"); | |
513 | exit(1); | |
514 | } | |
515 | ||
516 | switch (r) { | |
517 | case SIGBUS: | |
518 | if (kvm_on_sigbus_vcpu(env, siginfo.si_code, siginfo.si_addr)) { | |
519 | sigbus_reraise(); | |
520 | } | |
521 | break; | |
522 | default: | |
523 | break; | |
524 | } | |
525 | ||
526 | r = sigpending(&chkset); | |
527 | if (r == -1) { | |
528 | perror("sigpending"); | |
529 | exit(1); | |
530 | } | |
531 | } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS)); | |
1ab3c6c0 JK |
532 | } |
533 | ||
6d9cb73c JK |
534 | #else /* !CONFIG_LINUX */ |
535 | ||
536 | static void qemu_init_sigbus(void) | |
537 | { | |
538 | } | |
1ab3c6c0 JK |
539 | |
540 | static void qemu_kvm_eat_signals(CPUState *env) | |
541 | { | |
542 | } | |
6d9cb73c JK |
543 | #endif /* !CONFIG_LINUX */ |
544 | ||
296af7c9 | 545 | #ifndef _WIN32 |
55f8d6ac JK |
546 | static void dummy_signal(int sig) |
547 | { | |
548 | } | |
55f8d6ac | 549 | |
714bd040 PB |
550 | static void qemu_kvm_init_cpu_signals(CPUState *env) |
551 | { | |
552 | int r; | |
553 | sigset_t set; | |
554 | struct sigaction sigact; | |
555 | ||
556 | memset(&sigact, 0, sizeof(sigact)); | |
557 | sigact.sa_handler = dummy_signal; | |
558 | sigaction(SIG_IPI, &sigact, NULL); | |
559 | ||
714bd040 PB |
560 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
561 | sigdelset(&set, SIG_IPI); | |
562 | sigdelset(&set, SIGBUS); | |
563 | r = kvm_set_signal_mask(env, &set); | |
564 | if (r) { | |
565 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
566 | exit(1); | |
567 | } | |
714bd040 | 568 | |
714bd040 PB |
569 | sigdelset(&set, SIG_IPI); |
570 | sigdelset(&set, SIGBUS); | |
571 | r = kvm_set_signal_mask(env, &set); | |
572 | if (r) { | |
573 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
574 | exit(1); | |
575 | } | |
576 | } | |
577 | ||
578 | static void qemu_tcg_init_cpu_signals(void) | |
579 | { | |
714bd040 PB |
580 | sigset_t set; |
581 | struct sigaction sigact; | |
582 | ||
583 | memset(&sigact, 0, sizeof(sigact)); | |
584 | sigact.sa_handler = cpu_signal; | |
585 | sigaction(SIG_IPI, &sigact, NULL); | |
586 | ||
587 | sigemptyset(&set); | |
588 | sigaddset(&set, SIG_IPI); | |
589 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
714bd040 PB |
590 | } |
591 | ||
55f8d6ac | 592 | #else /* _WIN32 */ |
ff48eb5f JK |
593 | static void qemu_kvm_init_cpu_signals(CPUState *env) |
594 | { | |
714bd040 PB |
595 | abort(); |
596 | } | |
ff48eb5f | 597 | |
714bd040 PB |
598 | static void qemu_tcg_init_cpu_signals(void) |
599 | { | |
ff48eb5f | 600 | } |
714bd040 | 601 | #endif /* _WIN32 */ |
ff48eb5f | 602 | |
296af7c9 | 603 | QemuMutex qemu_global_mutex; |
46daff13 PB |
604 | static QemuCond qemu_io_proceeded_cond; |
605 | static bool iothread_requesting_mutex; | |
296af7c9 BS |
606 | |
607 | static QemuThread io_thread; | |
608 | ||
609 | static QemuThread *tcg_cpu_thread; | |
610 | static QemuCond *tcg_halt_cond; | |
611 | ||
296af7c9 BS |
612 | /* cpu creation */ |
613 | static QemuCond qemu_cpu_cond; | |
614 | /* system init */ | |
296af7c9 | 615 | static QemuCond qemu_pause_cond; |
e82bcec2 | 616 | static QemuCond qemu_work_cond; |
296af7c9 | 617 | |
d3b12f5d | 618 | void qemu_init_cpu_loop(void) |
296af7c9 | 619 | { |
6d9cb73c | 620 | qemu_init_sigbus(); |
ed94592b | 621 | qemu_cond_init(&qemu_cpu_cond); |
ed94592b AL |
622 | qemu_cond_init(&qemu_pause_cond); |
623 | qemu_cond_init(&qemu_work_cond); | |
46daff13 | 624 | qemu_cond_init(&qemu_io_proceeded_cond); |
296af7c9 | 625 | qemu_mutex_init(&qemu_global_mutex); |
296af7c9 | 626 | |
b7680cb6 | 627 | qemu_thread_get_self(&io_thread); |
296af7c9 BS |
628 | } |
629 | ||
e82bcec2 MT |
630 | void run_on_cpu(CPUState *env, void (*func)(void *data), void *data) |
631 | { | |
632 | struct qemu_work_item wi; | |
633 | ||
b7680cb6 | 634 | if (qemu_cpu_is_self(env)) { |
e82bcec2 MT |
635 | func(data); |
636 | return; | |
637 | } | |
638 | ||
639 | wi.func = func; | |
640 | wi.data = data; | |
0ab07c62 | 641 | if (!env->queued_work_first) { |
e82bcec2 | 642 | env->queued_work_first = &wi; |
0ab07c62 | 643 | } else { |
e82bcec2 | 644 | env->queued_work_last->next = &wi; |
0ab07c62 | 645 | } |
e82bcec2 MT |
646 | env->queued_work_last = &wi; |
647 | wi.next = NULL; | |
648 | wi.done = false; | |
649 | ||
650 | qemu_cpu_kick(env); | |
651 | while (!wi.done) { | |
652 | CPUState *self_env = cpu_single_env; | |
653 | ||
654 | qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex); | |
655 | cpu_single_env = self_env; | |
656 | } | |
657 | } | |
658 | ||
659 | static void flush_queued_work(CPUState *env) | |
660 | { | |
661 | struct qemu_work_item *wi; | |
662 | ||
0ab07c62 | 663 | if (!env->queued_work_first) { |
e82bcec2 | 664 | return; |
0ab07c62 | 665 | } |
e82bcec2 MT |
666 | |
667 | while ((wi = env->queued_work_first)) { | |
668 | env->queued_work_first = wi->next; | |
669 | wi->func(wi->data); | |
670 | wi->done = true; | |
671 | } | |
672 | env->queued_work_last = NULL; | |
673 | qemu_cond_broadcast(&qemu_work_cond); | |
674 | } | |
675 | ||
296af7c9 BS |
676 | static void qemu_wait_io_event_common(CPUState *env) |
677 | { | |
678 | if (env->stop) { | |
679 | env->stop = 0; | |
680 | env->stopped = 1; | |
681 | qemu_cond_signal(&qemu_pause_cond); | |
682 | } | |
e82bcec2 | 683 | flush_queued_work(env); |
aa2c364b | 684 | env->thread_kicked = false; |
296af7c9 BS |
685 | } |
686 | ||
6cabe1f3 | 687 | static void qemu_tcg_wait_io_event(void) |
296af7c9 | 688 | { |
6cabe1f3 JK |
689 | CPUState *env; |
690 | ||
16400322 | 691 | while (all_cpu_threads_idle()) { |
ab33fcda PB |
692 | /* Start accounting real time to the virtual clock if the CPUs |
693 | are idle. */ | |
694 | qemu_clock_warp(vm_clock); | |
9705fbb5 | 695 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
16400322 | 696 | } |
296af7c9 | 697 | |
46daff13 PB |
698 | while (iothread_requesting_mutex) { |
699 | qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex); | |
700 | } | |
6cabe1f3 JK |
701 | |
702 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
703 | qemu_wait_io_event_common(env); | |
704 | } | |
296af7c9 BS |
705 | } |
706 | ||
296af7c9 BS |
707 | static void qemu_kvm_wait_io_event(CPUState *env) |
708 | { | |
16400322 | 709 | while (cpu_thread_is_idle(env)) { |
9705fbb5 | 710 | qemu_cond_wait(env->halt_cond, &qemu_global_mutex); |
16400322 | 711 | } |
296af7c9 | 712 | |
5db5bdac | 713 | qemu_kvm_eat_signals(env); |
296af7c9 BS |
714 | qemu_wait_io_event_common(env); |
715 | } | |
716 | ||
7e97cd88 | 717 | static void *qemu_kvm_cpu_thread_fn(void *arg) |
296af7c9 BS |
718 | { |
719 | CPUState *env = arg; | |
84b4915d | 720 | int r; |
296af7c9 | 721 | |
6164e6d6 | 722 | qemu_mutex_lock(&qemu_global_mutex); |
b7680cb6 | 723 | qemu_thread_get_self(env->thread); |
dc7a09cf | 724 | env->thread_id = qemu_get_thread_id(); |
296af7c9 | 725 | |
84b4915d JK |
726 | r = kvm_init_vcpu(env); |
727 | if (r < 0) { | |
728 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
729 | exit(1); | |
730 | } | |
296af7c9 | 731 | |
55f8d6ac | 732 | qemu_kvm_init_cpu_signals(env); |
296af7c9 BS |
733 | |
734 | /* signal CPU creation */ | |
296af7c9 BS |
735 | env->created = 1; |
736 | qemu_cond_signal(&qemu_cpu_cond); | |
737 | ||
296af7c9 | 738 | while (1) { |
0ab07c62 | 739 | if (cpu_can_run(env)) { |
6792a57b | 740 | r = kvm_cpu_exec(env); |
83f338f7 | 741 | if (r == EXCP_DEBUG) { |
1009d2ed | 742 | cpu_handle_guest_debug(env); |
83f338f7 | 743 | } |
0ab07c62 | 744 | } |
296af7c9 BS |
745 | qemu_kvm_wait_io_event(env); |
746 | } | |
747 | ||
748 | return NULL; | |
749 | } | |
750 | ||
7e97cd88 | 751 | static void *qemu_tcg_cpu_thread_fn(void *arg) |
296af7c9 BS |
752 | { |
753 | CPUState *env = arg; | |
754 | ||
55f8d6ac | 755 | qemu_tcg_init_cpu_signals(); |
b7680cb6 | 756 | qemu_thread_get_self(env->thread); |
296af7c9 BS |
757 | |
758 | /* signal CPU creation */ | |
759 | qemu_mutex_lock(&qemu_global_mutex); | |
0ab07c62 | 760 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
dc7a09cf | 761 | env->thread_id = qemu_get_thread_id(); |
296af7c9 | 762 | env->created = 1; |
0ab07c62 | 763 | } |
296af7c9 BS |
764 | qemu_cond_signal(&qemu_cpu_cond); |
765 | ||
fa7d1867 JK |
766 | /* wait for initial kick-off after machine start */ |
767 | while (first_cpu->stopped) { | |
768 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); | |
0ab07c62 | 769 | } |
296af7c9 BS |
770 | |
771 | while (1) { | |
472fb0c4 | 772 | cpu_exec_all(); |
946fb27c | 773 | if (use_icount && qemu_clock_deadline(vm_clock) <= 0) { |
3b2319a3 PB |
774 | qemu_notify_event(); |
775 | } | |
6cabe1f3 | 776 | qemu_tcg_wait_io_event(); |
296af7c9 BS |
777 | } |
778 | ||
779 | return NULL; | |
780 | } | |
781 | ||
cc015e9a PB |
782 | static void qemu_cpu_kick_thread(CPUState *env) |
783 | { | |
784 | #ifndef _WIN32 | |
785 | int err; | |
786 | ||
787 | err = pthread_kill(env->thread->thread, SIG_IPI); | |
788 | if (err) { | |
789 | fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); | |
790 | exit(1); | |
791 | } | |
792 | #else /* _WIN32 */ | |
793 | if (!qemu_cpu_is_self(env)) { | |
794 | SuspendThread(env->thread->thread); | |
795 | cpu_signal(0); | |
796 | ResumeThread(env->thread->thread); | |
797 | } | |
798 | #endif | |
799 | } | |
800 | ||
296af7c9 BS |
801 | void qemu_cpu_kick(void *_env) |
802 | { | |
803 | CPUState *env = _env; | |
296af7c9 | 804 | |
296af7c9 | 805 | qemu_cond_broadcast(env->halt_cond); |
eae74cf9 | 806 | if (kvm_enabled() && !env->thread_kicked) { |
cc015e9a | 807 | qemu_cpu_kick_thread(env); |
aa2c364b JK |
808 | env->thread_kicked = true; |
809 | } | |
296af7c9 BS |
810 | } |
811 | ||
46d62fac | 812 | void qemu_cpu_kick_self(void) |
296af7c9 | 813 | { |
b55c22c6 | 814 | #ifndef _WIN32 |
46d62fac | 815 | assert(cpu_single_env); |
296af7c9 | 816 | |
46d62fac | 817 | if (!cpu_single_env->thread_kicked) { |
cc015e9a | 818 | qemu_cpu_kick_thread(cpu_single_env); |
46d62fac | 819 | cpu_single_env->thread_kicked = true; |
296af7c9 | 820 | } |
b55c22c6 PB |
821 | #else |
822 | abort(); | |
823 | #endif | |
296af7c9 BS |
824 | } |
825 | ||
b7680cb6 | 826 | int qemu_cpu_is_self(void *_env) |
296af7c9 | 827 | { |
296af7c9 | 828 | CPUState *env = _env; |
a8486bc9 | 829 | |
b7680cb6 | 830 | return qemu_thread_is_self(env->thread); |
296af7c9 BS |
831 | } |
832 | ||
296af7c9 BS |
833 | void qemu_mutex_lock_iothread(void) |
834 | { | |
835 | if (kvm_enabled()) { | |
296af7c9 | 836 | qemu_mutex_lock(&qemu_global_mutex); |
1a28cac3 | 837 | } else { |
46daff13 | 838 | iothread_requesting_mutex = true; |
1a28cac3 | 839 | if (qemu_mutex_trylock(&qemu_global_mutex)) { |
cc015e9a | 840 | qemu_cpu_kick_thread(first_cpu); |
1a28cac3 MT |
841 | qemu_mutex_lock(&qemu_global_mutex); |
842 | } | |
46daff13 PB |
843 | iothread_requesting_mutex = false; |
844 | qemu_cond_broadcast(&qemu_io_proceeded_cond); | |
1a28cac3 | 845 | } |
296af7c9 BS |
846 | } |
847 | ||
848 | void qemu_mutex_unlock_iothread(void) | |
849 | { | |
850 | qemu_mutex_unlock(&qemu_global_mutex); | |
851 | } | |
852 | ||
853 | static int all_vcpus_paused(void) | |
854 | { | |
855 | CPUState *penv = first_cpu; | |
856 | ||
857 | while (penv) { | |
0ab07c62 | 858 | if (!penv->stopped) { |
296af7c9 | 859 | return 0; |
0ab07c62 | 860 | } |
296af7c9 BS |
861 | penv = (CPUState *)penv->next_cpu; |
862 | } | |
863 | ||
864 | return 1; | |
865 | } | |
866 | ||
867 | void pause_all_vcpus(void) | |
868 | { | |
869 | CPUState *penv = first_cpu; | |
870 | ||
a5c57d64 | 871 | qemu_clock_enable(vm_clock, false); |
296af7c9 BS |
872 | while (penv) { |
873 | penv->stop = 1; | |
296af7c9 BS |
874 | qemu_cpu_kick(penv); |
875 | penv = (CPUState *)penv->next_cpu; | |
876 | } | |
877 | ||
878 | while (!all_vcpus_paused()) { | |
be7d6c57 | 879 | qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex); |
296af7c9 BS |
880 | penv = first_cpu; |
881 | while (penv) { | |
1fbb22e5 | 882 | qemu_cpu_kick(penv); |
296af7c9 BS |
883 | penv = (CPUState *)penv->next_cpu; |
884 | } | |
885 | } | |
886 | } | |
887 | ||
888 | void resume_all_vcpus(void) | |
889 | { | |
890 | CPUState *penv = first_cpu; | |
891 | ||
892 | while (penv) { | |
893 | penv->stop = 0; | |
894 | penv->stopped = 0; | |
296af7c9 BS |
895 | qemu_cpu_kick(penv); |
896 | penv = (CPUState *)penv->next_cpu; | |
897 | } | |
898 | } | |
899 | ||
7e97cd88 | 900 | static void qemu_tcg_init_vcpu(void *_env) |
296af7c9 BS |
901 | { |
902 | CPUState *env = _env; | |
0ab07c62 | 903 | |
296af7c9 BS |
904 | /* share a single thread for all cpus with TCG */ |
905 | if (!tcg_cpu_thread) { | |
7267c094 AL |
906 | env->thread = g_malloc0(sizeof(QemuThread)); |
907 | env->halt_cond = g_malloc0(sizeof(QemuCond)); | |
296af7c9 | 908 | qemu_cond_init(env->halt_cond); |
fa7d1867 | 909 | tcg_halt_cond = env->halt_cond; |
7e97cd88 | 910 | qemu_thread_create(env->thread, qemu_tcg_cpu_thread_fn, env); |
0ab07c62 | 911 | while (env->created == 0) { |
18a85728 | 912 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 913 | } |
296af7c9 | 914 | tcg_cpu_thread = env->thread; |
296af7c9 BS |
915 | } else { |
916 | env->thread = tcg_cpu_thread; | |
917 | env->halt_cond = tcg_halt_cond; | |
918 | } | |
919 | } | |
920 | ||
7e97cd88 | 921 | static void qemu_kvm_start_vcpu(CPUState *env) |
296af7c9 | 922 | { |
7267c094 AL |
923 | env->thread = g_malloc0(sizeof(QemuThread)); |
924 | env->halt_cond = g_malloc0(sizeof(QemuCond)); | |
296af7c9 | 925 | qemu_cond_init(env->halt_cond); |
7e97cd88 | 926 | qemu_thread_create(env->thread, qemu_kvm_cpu_thread_fn, env); |
0ab07c62 | 927 | while (env->created == 0) { |
18a85728 | 928 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 929 | } |
296af7c9 BS |
930 | } |
931 | ||
932 | void qemu_init_vcpu(void *_env) | |
933 | { | |
934 | CPUState *env = _env; | |
935 | ||
936 | env->nr_cores = smp_cores; | |
937 | env->nr_threads = smp_threads; | |
fa7d1867 | 938 | env->stopped = 1; |
0ab07c62 | 939 | if (kvm_enabled()) { |
7e97cd88 | 940 | qemu_kvm_start_vcpu(env); |
0ab07c62 | 941 | } else { |
7e97cd88 | 942 | qemu_tcg_init_vcpu(env); |
0ab07c62 | 943 | } |
296af7c9 BS |
944 | } |
945 | ||
b4a3d965 | 946 | void cpu_stop_current(void) |
296af7c9 | 947 | { |
b4a3d965 | 948 | if (cpu_single_env) { |
67bb172f | 949 | cpu_single_env->stop = 0; |
b4a3d965 JK |
950 | cpu_single_env->stopped = 1; |
951 | cpu_exit(cpu_single_env); | |
67bb172f | 952 | qemu_cond_signal(&qemu_pause_cond); |
b4a3d965 | 953 | } |
296af7c9 BS |
954 | } |
955 | ||
1dfb4dd9 | 956 | void vm_stop(RunState state) |
296af7c9 | 957 | { |
b7680cb6 | 958 | if (!qemu_thread_is_self(&io_thread)) { |
1dfb4dd9 | 959 | qemu_system_vmstop_request(state); |
296af7c9 BS |
960 | /* |
961 | * FIXME: should not return to device code in case | |
962 | * vm_stop() has been requested. | |
963 | */ | |
b4a3d965 | 964 | cpu_stop_current(); |
296af7c9 BS |
965 | return; |
966 | } | |
1dfb4dd9 | 967 | do_vm_stop(state); |
296af7c9 BS |
968 | } |
969 | ||
8a9236f1 LC |
970 | /* does a state transition even if the VM is already stopped, |
971 | current state is forgotten forever */ | |
972 | void vm_stop_force_state(RunState state) | |
973 | { | |
974 | if (runstate_is_running()) { | |
975 | vm_stop(state); | |
976 | } else { | |
977 | runstate_set(state); | |
978 | } | |
979 | } | |
980 | ||
6792a57b | 981 | static int tcg_cpu_exec(CPUState *env) |
296af7c9 BS |
982 | { |
983 | int ret; | |
984 | #ifdef CONFIG_PROFILER | |
985 | int64_t ti; | |
986 | #endif | |
987 | ||
988 | #ifdef CONFIG_PROFILER | |
989 | ti = profile_getclock(); | |
990 | #endif | |
991 | if (use_icount) { | |
992 | int64_t count; | |
993 | int decr; | |
994 | qemu_icount -= (env->icount_decr.u16.low + env->icount_extra); | |
995 | env->icount_decr.u16.low = 0; | |
996 | env->icount_extra = 0; | |
946fb27c | 997 | count = qemu_icount_round(qemu_clock_deadline(vm_clock)); |
296af7c9 BS |
998 | qemu_icount += count; |
999 | decr = (count > 0xffff) ? 0xffff : count; | |
1000 | count -= decr; | |
1001 | env->icount_decr.u16.low = decr; | |
1002 | env->icount_extra = count; | |
1003 | } | |
1004 | ret = cpu_exec(env); | |
1005 | #ifdef CONFIG_PROFILER | |
1006 | qemu_time += profile_getclock() - ti; | |
1007 | #endif | |
1008 | if (use_icount) { | |
1009 | /* Fold pending instructions back into the | |
1010 | instruction counter, and clear the interrupt flag. */ | |
1011 | qemu_icount -= (env->icount_decr.u16.low | |
1012 | + env->icount_extra); | |
1013 | env->icount_decr.u32 = 0; | |
1014 | env->icount_extra = 0; | |
1015 | } | |
1016 | return ret; | |
1017 | } | |
1018 | ||
472fb0c4 | 1019 | bool cpu_exec_all(void) |
296af7c9 | 1020 | { |
9a36085b JK |
1021 | int r; |
1022 | ||
ab33fcda PB |
1023 | /* Account partial waits to the vm_clock. */ |
1024 | qemu_clock_warp(vm_clock); | |
1025 | ||
0ab07c62 | 1026 | if (next_cpu == NULL) { |
296af7c9 | 1027 | next_cpu = first_cpu; |
0ab07c62 | 1028 | } |
c629a4bc | 1029 | for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) { |
345f4426 | 1030 | CPUState *env = next_cpu; |
296af7c9 BS |
1031 | |
1032 | qemu_clock_enable(vm_clock, | |
345f4426 | 1033 | (env->singlestep_enabled & SSTEP_NOTIMER) == 0); |
296af7c9 | 1034 | |
3c638d06 | 1035 | if (cpu_can_run(env)) { |
9a36085b | 1036 | if (kvm_enabled()) { |
6792a57b | 1037 | r = kvm_cpu_exec(env); |
9a36085b | 1038 | qemu_kvm_eat_signals(env); |
6792a57b JK |
1039 | } else { |
1040 | r = tcg_cpu_exec(env); | |
9a36085b JK |
1041 | } |
1042 | if (r == EXCP_DEBUG) { | |
1009d2ed | 1043 | cpu_handle_guest_debug(env); |
3c638d06 JK |
1044 | break; |
1045 | } | |
df646dfd | 1046 | } else if (env->stop || env->stopped) { |
296af7c9 BS |
1047 | break; |
1048 | } | |
1049 | } | |
c629a4bc | 1050 | exit_request = 0; |
16400322 | 1051 | return !all_cpu_threads_idle(); |
296af7c9 BS |
1052 | } |
1053 | ||
1054 | void set_numa_modes(void) | |
1055 | { | |
1056 | CPUState *env; | |
1057 | int i; | |
1058 | ||
1059 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
1060 | for (i = 0; i < nb_numa_nodes; i++) { | |
1061 | if (node_cpumask[i] & (1 << env->cpu_index)) { | |
1062 | env->numa_node = i; | |
1063 | } | |
1064 | } | |
1065 | } | |
1066 | } | |
1067 | ||
1068 | void set_cpu_log(const char *optarg) | |
1069 | { | |
1070 | int mask; | |
1071 | const CPULogItem *item; | |
1072 | ||
1073 | mask = cpu_str_to_log_mask(optarg); | |
1074 | if (!mask) { | |
1075 | printf("Log items (comma separated):\n"); | |
1076 | for (item = cpu_log_items; item->mask != 0; item++) { | |
1077 | printf("%-10s %s\n", item->name, item->help); | |
1078 | } | |
1079 | exit(1); | |
1080 | } | |
1081 | cpu_set_log(mask); | |
1082 | } | |
29e922b6 | 1083 | |
c235d738 MF |
1084 | void set_cpu_log_filename(const char *optarg) |
1085 | { | |
1086 | cpu_set_log_filename(optarg); | |
1087 | } | |
1088 | ||
9a78eead | 1089 | void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) |
262353cb BS |
1090 | { |
1091 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
1092 | #if defined(cpu_list_id) | |
1093 | cpu_list_id(f, cpu_fprintf, optarg); | |
1094 | #elif defined(cpu_list) | |
1095 | cpu_list(f, cpu_fprintf); /* deprecated */ | |
1096 | #endif | |
1097 | } | |
de0b36b6 LC |
1098 | |
1099 | CpuInfoList *qmp_query_cpus(Error **errp) | |
1100 | { | |
1101 | CpuInfoList *head = NULL, *cur_item = NULL; | |
1102 | CPUState *env; | |
1103 | ||
1104 | for(env = first_cpu; env != NULL; env = env->next_cpu) { | |
1105 | CpuInfoList *info; | |
1106 | ||
1107 | cpu_synchronize_state(env); | |
1108 | ||
1109 | info = g_malloc0(sizeof(*info)); | |
1110 | info->value = g_malloc0(sizeof(*info->value)); | |
1111 | info->value->CPU = env->cpu_index; | |
1112 | info->value->current = (env == first_cpu); | |
1113 | info->value->halted = env->halted; | |
1114 | info->value->thread_id = env->thread_id; | |
1115 | #if defined(TARGET_I386) | |
1116 | info->value->has_pc = true; | |
1117 | info->value->pc = env->eip + env->segs[R_CS].base; | |
1118 | #elif defined(TARGET_PPC) | |
1119 | info->value->has_nip = true; | |
1120 | info->value->nip = env->nip; | |
1121 | #elif defined(TARGET_SPARC) | |
1122 | info->value->has_pc = true; | |
1123 | info->value->pc = env->pc; | |
1124 | info->value->has_npc = true; | |
1125 | info->value->npc = env->npc; | |
1126 | #elif defined(TARGET_MIPS) | |
1127 | info->value->has_PC = true; | |
1128 | info->value->PC = env->active_tc.PC; | |
1129 | #endif | |
1130 | ||
1131 | /* XXX: waiting for the qapi to support GSList */ | |
1132 | if (!cur_item) { | |
1133 | head = cur_item = info; | |
1134 | } else { | |
1135 | cur_item->next = info; | |
1136 | cur_item = info; | |
1137 | } | |
1138 | } | |
1139 | ||
1140 | return head; | |
1141 | } |