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Commit | Line | Data |
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94a420b1 SH |
1 | # Trace events for debugging and performance instrumentation |
2 | # | |
3 | # This file is processed by the tracetool script during the build. | |
4 | # | |
5 | # To add a new trace event: | |
6 | # | |
7 | # 1. Choose a name for the trace event. Declare its arguments and format | |
8 | # string. | |
9 | # | |
10 | # 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> | |
11 | # trace_multiwrite_cb(). The source file must #include "trace.h". | |
12 | # | |
13 | # Format of a trace event: | |
14 | # | |
1e2cf2bc | 15 | # [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" |
94a420b1 | 16 | # |
a74cd8cc | 17 | # Example: g_malloc(size_t size) "size %zu" |
94a420b1 | 18 | # |
1e2cf2bc | 19 | # The "disable" keyword will build without the trace event. |
1e2cf2bc | 20 | # |
94a420b1 SH |
21 | # The <name> must be a valid as a C function name. |
22 | # | |
23 | # Types should be standard C types. Use void * for pointers because the trace | |
24 | # system may not have the necessary headers included. | |
25 | # | |
26 | # The <format-string> should be a sprintf()-compatible format string. | |
cd245a19 | 27 | |
3ba00637 MA |
28 | # util/oslib-win32.c |
29 | # util/oslib-posix.c | |
47f08d7a | 30 | qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" |
6eebf958 | 31 | qemu_anon_ram_alloc(size_t size, void *ptr) "size %zu ptr %p" |
47f08d7a | 32 | qemu_vfree(void *ptr) "ptr %p" |
da4c1a7a | 33 | qemu_anon_ram_free(void *ptr, size_t size) "ptr %p size %zu" |
6d519a5f | 34 | |
3ba00637 | 35 | # hw/virtio/virtio.c |
47f08d7a LV |
36 | virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" |
37 | virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" | |
38 | virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" | |
39 | virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" | |
40 | virtio_irq(void *vq) "vq %p" | |
41 | virtio_notify(void *vdev, void *vq) "vdev %p vq %p" | |
4e1837f8 | 42 | virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u" |
64979a4d | 43 | |
3ba00637 | 44 | # hw/char/virtio-serial-bus.c |
47f08d7a LV |
45 | virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u" |
46 | virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d" | |
47 | virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u" | |
48 | virtio_serial_handle_control_message_port(unsigned int port) "port %u" | |
49e3fdd7 | 49 | |
3ba00637 | 50 | # hw/char/virtio-console.c |
47f08d7a LV |
51 | virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd" |
52 | virtio_console_chr_read(unsigned int port, int size) "port %u, size %d" | |
53 | virtio_console_chr_event(unsigned int port, int event) "port %u, event %d" | |
d02e4fa4 | 54 | |
6d519a5f | 55 | # block.c |
28dcee10 | 56 | bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags %#x format_name \"%s\"" |
47f08d7a LV |
57 | multiwrite_cb(void *mcb, int ret) "mcb %p ret %d" |
58 | bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d" | |
4265d620 | 59 | bdrv_aio_discard(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" |
47f08d7a LV |
60 | bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p" |
61 | bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" | |
62 | bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" | |
d5ef94d4 | 63 | bdrv_aio_write_zeroes(void *bs, int64_t sector_num, int nb_sectors, int flags, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d flags %#x opaque %p" |
025e849a | 64 | bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d" |
47f08d7a | 65 | bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
470c0504 | 66 | bdrv_co_copy_on_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
47f08d7a | 67 | bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
94d6ff21 | 68 | bdrv_co_write_zeroes(void *bs, int64_t sector_num, int nb_sector, int flags) "bs %p sector_num %"PRId64" nb_sectors %d flags %#x" |
59370aaa | 69 | bdrv_co_io_em(void *bs, int64_t sector_num, int nb_sectors, int is_write, void *acb) "bs %p sector_num %"PRId64" nb_sectors %d is_write %d acb %p" |
470c0504 | 70 | bdrv_co_do_copy_on_readv(void *bs, int64_t sector_num, int nb_sectors, int64_t cluster_sector_num, int cluster_nb_sectors) "bs %p sector_num %"PRId64" nb_sectors %d cluster_sector_num %"PRId64" cluster_nb_sectors %d" |
6d519a5f | 71 | |
4f1043b4 SH |
72 | # block/stream.c |
73 | stream_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d" | |
74 | stream_start(void *bs, void *base, void *s, void *co, void *opaque) "bs %p base %p s %p co %p opaque %p" | |
3ba00637 MA |
75 | |
76 | # block/commit.c | |
747ff602 JC |
77 | commit_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d" |
78 | commit_start(void *bs, void *base, void *top, void *s, void *co, void *opaque) "bs %p base %p top %p s %p co %p opaque %p" | |
4f1043b4 | 79 | |
893f7eba PB |
80 | # block/mirror.c |
81 | mirror_start(void *bs, void *s, void *co, void *opaque) "bs %p s %p co %p opaque %p" | |
8f0720ec | 82 | mirror_restart_iter(void *s, int64_t cnt) "s %p dirty count %"PRId64 |
893f7eba PB |
83 | mirror_before_flush(void *s) "s %p" |
84 | mirror_before_drain(void *s, int64_t cnt) "s %p dirty count %"PRId64 | |
85 | mirror_before_sleep(void *s, int64_t cnt, int synced) "s %p dirty count %"PRId64" synced %d" | |
86 | mirror_one_iteration(void *s, int64_t sector_num, int nb_sectors) "s %p sector_num %"PRId64" nb_sectors %d" | |
bd48bde8 | 87 | mirror_iteration_done(void *s, int64_t sector_num, int nb_sectors, int ret) "s %p sector_num %"PRId64" nb_sectors %d ret %d" |
402a4741 PB |
88 | mirror_yield(void *s, int64_t cnt, int buf_free_count, int in_flight) "s %p dirty count %"PRId64" free buffers %d in_flight %d" |
89 | mirror_yield_in_flight(void *s, int64_t sector_num, int in_flight) "s %p sector_num %"PRId64" in_flight %d" | |
90 | mirror_yield_buf_busy(void *s, int nb_chunks, int in_flight) "s %p requested chunks %d in_flight %d" | |
884fea4e | 91 | mirror_break_buf_busy(void *s, int nb_chunks, int in_flight) "s %p requested chunks %d in_flight %d" |
4f1043b4 | 92 | |
98d2c6f2 DM |
93 | # block/backup.c |
94 | backup_do_cow_enter(void *job, int64_t start, int64_t sector_num, int nb_sectors) "job %p start %"PRId64" sector_num %"PRId64" nb_sectors %d" | |
95 | backup_do_cow_return(void *job, int64_t sector_num, int nb_sectors, int ret) "job %p sector_num %"PRId64" nb_sectors %d ret %d" | |
96 | backup_do_cow_skip(void *job, int64_t start) "job %p start %"PRId64 | |
97 | backup_do_cow_process(void *job, int64_t start) "job %p start %"PRId64 | |
98 | backup_do_cow_read_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d" | |
99 | backup_do_cow_write_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d" | |
100 | ||
12bd451f | 101 | # blockdev.c |
370521a1 | 102 | qmp_block_job_cancel(void *job) "job %p" |
6e37fb81 PB |
103 | qmp_block_job_pause(void *job) "job %p" |
104 | qmp_block_job_resume(void *job) "job %p" | |
aeae883b | 105 | qmp_block_job_complete(void *job) "job %p" |
9abf2dba | 106 | block_job_cb(void *bs, void *job, int ret) "bs %p job %p ret %d" |
12bd451f SH |
107 | qmp_block_stream(void *bs, void *job) "bs %p job %p" |
108 | ||
3ba00637 | 109 | # hw/block/virtio-blk.c |
47f08d7a LV |
110 | virtio_blk_req_complete(void *req, int status) "req %p status %d" |
111 | virtio_blk_rw_complete(void *req, int ret) "req %p ret %d" | |
112 | virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" | |
81b6b9fa | 113 | virtio_blk_handle_read(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" |
6d519a5f | 114 | |
3ba00637 | 115 | # hw/block/dataplane/virtio-blk.c |
e72f66a0 SH |
116 | virtio_blk_data_plane_start(void *s) "dataplane %p" |
117 | virtio_blk_data_plane_stop(void *s) "dataplane %p" | |
118 | virtio_blk_data_plane_process_request(void *s, unsigned int out_num, unsigned int in_num, unsigned int head) "dataplane %p out_num %u in_num %u head %u" | |
119 | virtio_blk_data_plane_complete_request(void *s, unsigned int head, int ret) "dataplane %p head %u ret %d" | |
120 | ||
3ba00637 | 121 | # hw/virtio/dataplane/vring.c |
88807f89 SH |
122 | vring_setup(uint64_t physical, void *desc, void *avail, void *used) "vring physical %#"PRIx64" desc %p avail %p used %p" |
123 | ||
d354c7ec | 124 | # thread-pool.c |
b811203c SH |
125 | thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %p" |
126 | thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d" | |
d354c7ec PB |
127 | thread_pool_cancel(void *req, void *opaque) "req %p opaque %p" |
128 | ||
3ba00637 MA |
129 | # block/raw-win32.c |
130 | # block/raw-posix.c | |
260a82e5 | 131 | paio_submit_co(int64_t sector_num, int nb_sectors, int type) "sector_num %"PRId64" nb_sectors %d type %d" |
47f08d7a | 132 | paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d" |
bd3c9aa5 PS |
133 | |
134 | # ioport.c | |
47f08d7a LV |
135 | cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u" |
136 | cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u" | |
62dd89de PS |
137 | |
138 | # balloon.c | |
139 | # Since requests are raised via monitor, not many tracepoints are needed. | |
47f08d7a | 140 | balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" |
d8023f31 | 141 | |
3ba00637 | 142 | # hw/intc/apic_common.c |
689d7e2f SH |
143 | cpu_set_apic_base(uint64_t val) "%016"PRIx64 |
144 | cpu_get_apic_base(uint64_t val) "%016"PRIx64 | |
d8023f31 | 145 | # coalescing |
343270ea | 146 | apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d" |
47f08d7a LV |
147 | apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" |
148 | apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" | |
97bf4851 | 149 | |
3ba00637 MA |
150 | # hw/intc/apic.c |
151 | apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" | |
152 | apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" | |
153 | apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" | |
154 | apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" | |
155 | ||
156 | # hw/audio/cs4231.c | |
47f08d7a LV |
157 | cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" |
158 | cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" | |
159 | cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" | |
160 | cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" | |
97bf4851 | 161 | |
3ba00637 | 162 | # hw/nvram/ds1225y.c |
47f08d7a LV |
163 | nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" |
164 | nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x" | |
d43ed9ec | 165 | |
3ba00637 | 166 | # hw/misc/eccmemctl.c |
47f08d7a LV |
167 | ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" |
168 | ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" | |
169 | ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" | |
170 | ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" | |
171 | ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" | |
172 | ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" | |
173 | ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" | |
174 | ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" | |
175 | ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" | |
176 | ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" | |
177 | ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" | |
178 | ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" | |
179 | ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" | |
180 | ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" | |
181 | ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" | |
182 | ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" | |
183 | ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" | |
184 | ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" | |
97bf4851 | 185 | |
3ba00637 | 186 | # hw/nvram/fw_cfg.c |
f6e35343 MA |
187 | fw_cfg_write(void *s, uint8_t value) "%p %d" |
188 | fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d = %d" | |
189 | fw_cfg_read(void *s, uint8_t ret) "%p = %d" | |
190 | fw_cfg_add_file_dupe(void *s, char *name) "%p %s" | |
089da572 | 191 | fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %s (%zd bytes)" |
f6e35343 | 192 | |
3ba00637 | 193 | # hw/block/hd-geometry.c |
31f7eedf | 194 | hd_geometry_lchs_guess(void *bs, int cyls, int heads, int secs) "bs %p LCHS %d %d %d" |
1f24d7b4 | 195 | hd_geometry_guess(void *bs, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) "bs %p CHS %u %u %u trans %d" |
31f7eedf | 196 | |
3ba00637 | 197 | # hw/display/jazz_led.c |
63b9932d HP |
198 | jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x" |
199 | jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x" | |
200 | ||
3ba00637 | 201 | # hw/net/lance.c |
47f08d7a LV |
202 | lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" |
203 | lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" | |
97bf4851 | 204 | |
3ba00637 | 205 | # hw/intc/slavio_intctl.c |
47f08d7a LV |
206 | slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" |
207 | slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" | |
208 | slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" | |
209 | slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" | |
210 | slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" | |
211 | slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" | |
212 | slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" | |
213 | slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" | |
214 | slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" | |
215 | slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" | |
216 | slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" | |
217 | slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" | |
97bf4851 | 218 | |
3ba00637 | 219 | # hw/misc/slavio_misc.c |
47f08d7a LV |
220 | slavio_misc_update_irq_raise(void) "Raise IRQ" |
221 | slavio_misc_update_irq_lower(void) "Lower IRQ" | |
222 | slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" | |
223 | slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" | |
224 | slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" | |
225 | slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" | |
226 | slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" | |
227 | slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" | |
228 | slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" | |
229 | slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" | |
230 | slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" | |
231 | slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" | |
232 | slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" | |
233 | apc_mem_writeb(uint32_t val) "Write power management %02x" | |
234 | apc_mem_readb(uint32_t ret) "Read power management %02x" | |
235 | slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" | |
236 | slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" | |
237 | slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" | |
238 | slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" | |
97bf4851 | 239 | |
3ba00637 | 240 | # hw/timer/slavio_timer.c |
47f08d7a LV |
241 | slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" |
242 | slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" | |
689d7e2f | 243 | slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64 |
47f08d7a LV |
244 | slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" |
245 | slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" | |
689d7e2f | 246 | slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64 |
47f08d7a LV |
247 | slavio_timer_mem_writel_counter_invalid(void) "not user timer" |
248 | slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" | |
249 | slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" | |
250 | slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" | |
251 | slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" | |
252 | slavio_timer_mem_writel_mode_invalid(void) "not system timer" | |
689d7e2f | 253 | slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64 |
97bf4851 | 254 | |
3ba00637 | 255 | # hw/dma/sparc32_dma.c |
689d7e2f SH |
256 | ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64 |
257 | ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64 | |
47f08d7a LV |
258 | sparc32_dma_set_irq_raise(void) "Raise IRQ" |
259 | sparc32_dma_set_irq_lower(void) "Lower IRQ" | |
260 | espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" | |
261 | espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" | |
262 | sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" | |
263 | sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" | |
264 | sparc32_dma_enable_raise(void) "Raise DMA enable" | |
265 | sparc32_dma_enable_lower(void) "Lower DMA enable" | |
97bf4851 | 266 | |
3ba00637 | 267 | # hw/sparc/sun4m.c |
47f08d7a LV |
268 | sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" |
269 | sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" | |
270 | sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" | |
271 | sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" | |
97bf4851 | 272 | |
3ba00637 | 273 | # hw/dma/sun4m_iommu.c |
47f08d7a LV |
274 | sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" |
275 | sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" | |
689d7e2f | 276 | sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64 |
47f08d7a LV |
277 | sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" |
278 | sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" | |
279 | sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" | |
280 | sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" | |
689d7e2f | 281 | sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64 |
94b0b5ff | 282 | |
f1ae32a1 | 283 | # hw/usb/core.c |
808aeb98 | 284 | usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s" |
5ac2731c | 285 | usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s, expected %s" |
808aeb98 | 286 | |
f1ae32a1 | 287 | # hw/usb/bus.c |
891fb2cd | 288 | usb_port_claim(int bus, const char *port) "bus %d, port %s" |
3b7e759a | 289 | usb_port_attach(int bus, const char *port, const char *devspeed, const char *portspeed) "bus %d, port %s, devspeed %s, portspeed %s" |
891fb2cd GH |
290 | usb_port_detach(int bus, const char *port) "bus %d, port %s" |
291 | usb_port_release(int bus, const char *port) "bus %d, port %s" | |
292 | ||
f1ae32a1 | 293 | # hw/usb/hcd-ehci.c |
47f08d7a | 294 | usb_ehci_reset(void) "=== RESET ===" |
3e4f910c GH |
295 | usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x" |
296 | usb_ehci_opreg_write(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x" | |
297 | usb_ehci_opreg_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)" | |
298 | usb_ehci_portsc_read(uint32_t addr, uint32_t port, uint32_t val) "rd mmio %04x [port %d] = %x" | |
299 | usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) "wr mmio %04x [port %d] = %x" | |
300 | usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_t old) "ch mmio %04x [port %d] = %x (old: %x)" | |
47f08d7a LV |
301 | usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d" |
302 | usb_ehci_state(const char *schedule, const char *state) "%s schedule %s" | |
303 | usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x" | |
304 | usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d" | |
305 | usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d" | |
306 | usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x" | |
307 | usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d" | |
308 | usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d" | |
309 | usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d" | |
2fe80192 | 310 | usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d" |
30e9d412 GH |
311 | usb_ehci_port_attach(uint32_t port, const char *owner, const char *device) "attach port #%d, owner %s, device %s" |
312 | usb_ehci_port_detach(uint32_t port, const char *owner) "detach port #%d, owner %s" | |
47f08d7a | 313 | usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d" |
e489df40 GH |
314 | usb_ehci_port_suspend(uint32_t port) "port #%d" |
315 | usb_ehci_port_wakeup(uint32_t port) "port #%d" | |
316 | usb_ehci_port_resume(uint32_t port) "port #%d" | |
47f08d7a | 317 | usb_ehci_queue_action(void *q, const char *action) "q %p: %s" |
eb36a88e | 318 | usb_ehci_packet_action(void *q, void *p, const char *action) "q %p p %p: %s" |
7efc17af | 319 | usb_ehci_irq(uint32_t level, uint32_t frindex, uint32_t sts, uint32_t mask) "level %d, frindex 0x%04x, sts 0x%x, mask 0x%x" |
5c514681 | 320 | usb_ehci_guest_bug(const char *reason) "%s" |
1defcbd1 GH |
321 | usb_ehci_doorbell_ring(void) "" |
322 | usb_ehci_doorbell_ack(void) "" | |
55903f1d | 323 | usb_ehci_dma_error(void) "" |
439a97cc | 324 | |
50dcc0f8 GH |
325 | # hw/usb/hcd-uhci.c |
326 | usb_uhci_reset(void) "=== RESET ===" | |
327 | usb_uhci_schedule_start(void) "" | |
328 | usb_uhci_schedule_stop(void) "" | |
329 | usb_uhci_frame_start(uint32_t num) "nr %d" | |
4aed20e2 | 330 | usb_uhci_frame_stop_bandwidth(void) "" |
50dcc0f8 | 331 | usb_uhci_frame_loop_stop_idle(void) "" |
50dcc0f8 | 332 | usb_uhci_frame_loop_continue(void) "" |
7dd0dfd7 GH |
333 | usb_uhci_mmio_readw(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%04x" |
334 | usb_uhci_mmio_writew(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%04x" | |
50dcc0f8 | 335 | usb_uhci_queue_add(uint32_t token) "token 0x%x" |
66a08cbe | 336 | usb_uhci_queue_del(uint32_t token, const char *reason) "token 0x%x: %s" |
50dcc0f8 GH |
337 | usb_uhci_packet_add(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" |
338 | usb_uhci_packet_link_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
339 | usb_uhci_packet_unlink_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
340 | usb_uhci_packet_cancel(uint32_t token, uint32_t addr, int done) "token 0x%x, td 0x%x, done %d" | |
341 | usb_uhci_packet_complete_success(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
342 | usb_uhci_packet_complete_shortxfer(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
343 | usb_uhci_packet_complete_stall(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
344 | usb_uhci_packet_complete_babble(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
345 | usb_uhci_packet_complete_error(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
346 | usb_uhci_packet_del(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" | |
347 | usb_uhci_qh_load(uint32_t qh) "qh 0x%x" | |
348 | usb_uhci_td_load(uint32_t qh, uint32_t td, uint32_t ctrl, uint32_t token) "qh 0x%x, td 0x%x, ctrl 0x%x, token 0x%x" | |
349 | usb_uhci_td_queue(uint32_t td, uint32_t ctrl, uint32_t token) "td 0x%x, ctrl 0x%x, token 0x%x" | |
350 | usb_uhci_td_nextqh(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" | |
351 | usb_uhci_td_async(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" | |
352 | usb_uhci_td_complete(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" | |
353 | ||
2d754a10 GH |
354 | # hw/usb/hcd-xhci.c |
355 | usb_xhci_reset(void) "=== RESET ===" | |
fc0ddaca GH |
356 | usb_xhci_run(void) "" |
357 | usb_xhci_stop(void) "" | |
2d754a10 GH |
358 | usb_xhci_cap_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" |
359 | usb_xhci_oper_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" | |
360 | usb_xhci_port_read(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, ret 0x%08x" | |
361 | usb_xhci_runtime_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" | |
362 | usb_xhci_doorbell_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" | |
363 | usb_xhci_oper_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" | |
364 | usb_xhci_port_write(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, val 0x%08x" | |
365 | usb_xhci_runtime_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" | |
366 | usb_xhci_doorbell_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" | |
7acd279f GH |
367 | usb_xhci_irq_intx(uint32_t level) "level %d" |
368 | usb_xhci_irq_msi(uint32_t nr) "nr %d" | |
4c47f800 GH |
369 | usb_xhci_irq_msix(uint32_t nr) "nr %d" |
370 | usb_xhci_irq_msix_use(uint32_t nr) "nr %d" | |
371 | usb_xhci_irq_msix_unuse(uint32_t nr) "nr %d" | |
962d11e1 | 372 | usb_xhci_queue_event(uint32_t vector, uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) "v %d, idx %d, %s, %s, p %016" PRIx64 ", s %08x, c 0x%08x" |
0703a4a7 | 373 | usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) "addr %016" PRIx64 ", %s, p %016" PRIx64 ", s %08x, c 0x%08x" |
4f47f0f8 GH |
374 | usb_xhci_port_reset(uint32_t port) "port %d" |
375 | usb_xhci_port_link(uint32_t port, uint32_t pls) "port %d, pls %d" | |
bdfce20d | 376 | usb_xhci_port_notify(uint32_t port, uint32_t pls) "port %d, bits %x" |
348f1037 GH |
377 | usb_xhci_slot_enable(uint32_t slotid) "slotid %d" |
378 | usb_xhci_slot_disable(uint32_t slotid) "slotid %d" | |
65d81ed4 | 379 | usb_xhci_slot_address(uint32_t slotid, const char *port) "slotid %d, port %s" |
348f1037 GH |
380 | usb_xhci_slot_configure(uint32_t slotid) "slotid %d" |
381 | usb_xhci_slot_evaluate(uint32_t slotid) "slotid %d" | |
382 | usb_xhci_slot_reset(uint32_t slotid) "slotid %d" | |
c1f6b493 GH |
383 | usb_xhci_ep_enable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" |
384 | usb_xhci_ep_disable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" | |
024426ac GH |
385 | usb_xhci_ep_set_dequeue(uint32_t slotid, uint32_t epid, uint32_t streamid, uint64_t param) "slotid %d, epid %d, streamid %d, ptr %016" PRIx64 |
386 | usb_xhci_ep_kick(uint32_t slotid, uint32_t epid, uint32_t streamid) "slotid %d, epid %d, streamid %d" | |
c1f6b493 GH |
387 | usb_xhci_ep_stop(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" |
388 | usb_xhci_ep_reset(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" | |
1c82392a | 389 | usb_xhci_ep_state(uint32_t slotid, uint32_t epid, const char *os, const char *ns) "slotid %d, epid %d, %s -> %s" |
024426ac | 390 | usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid, uint32_t streamid) "%p: slotid %d, epid %d, streamid %d" |
97df650b GH |
391 | usb_xhci_xfer_async(void *xfer) "%p" |
392 | usb_xhci_xfer_nak(void *xfer) "%p" | |
393 | usb_xhci_xfer_retry(void *xfer) "%p" | |
394 | usb_xhci_xfer_success(void *xfer, uint32_t bytes) "%p: len %d" | |
395 | usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d" | |
0ab966cf | 396 | usb_xhci_unimplemented(const char *item, int nr) "%s (0x%x)" |
2d754a10 | 397 | |
529f8f9f | 398 | # hw/usb/desc.c |
47f08d7a LV |
399 | usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" |
400 | usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" | |
401 | usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" | |
402 | usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" | |
403 | usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d" | |
2077469b | 404 | usb_desc_bos(int addr, int len, int ret) "dev %d bos, len %d, ret %d" |
5319dc7b | 405 | usb_desc_msos(int addr, int index, int len, int ret) "dev %d msos, index 0x%x, len %d, ret %d" |
47f08d7a LV |
406 | usb_set_addr(int addr) "dev %d" |
407 | usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" | |
1de14d43 | 408 | usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, altsetting %d, ret %d" |
47f08d7a LV |
409 | usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" |
410 | usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" | |
37fb59d3 | 411 | |
529f8f9f GH |
412 | # hw/usb/dev-hub.c |
413 | usb_hub_reset(int addr) "dev %d" | |
414 | usb_hub_control(int addr, int request, int value, int index, int length) "dev %d, req 0x%x, value %d, index %d, langth %d" | |
415 | usb_hub_get_port_status(int addr, int nr, int status, int changed) "dev %d, port %d, status 0x%x, changed 0x%x" | |
416 | usb_hub_set_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s" | |
417 | usb_hub_clear_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s" | |
418 | usb_hub_attach(int addr, int nr) "dev %d, port %d" | |
419 | usb_hub_detach(int addr, int nr) "dev %d, port %d" | |
b8cbc137 | 420 | usb_hub_status_report(int addr, int status) "dev %d, status 0x%x" |
529f8f9f | 421 | |
0f58f68b GH |
422 | # hw/usb/dev-uas.c |
423 | usb_uas_reset(int addr) "dev %d" | |
424 | usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 %08x-%08x" | |
425 | usb_uas_response(int addr, uint16_t tag, uint8_t code) "dev %d, tag 0x%x, code 0x%x" | |
426 | usb_uas_sense(int addr, uint16_t tag, uint8_t status) "dev %d, tag 0x%x, status 0x%x" | |
427 | usb_uas_read_ready(int addr, uint16_t tag) "dev %d, tag 0x%x" | |
428 | usb_uas_write_ready(int addr, uint16_t tag) "dev %d, tag 0x%x" | |
429 | usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, uint32_t usize, uint32_t soff, uint32_t ssize) "dev %d, tag 0x%x, copy %d, usb-pkt %d/%d, scsi-buf %d/%d" | |
430 | usb_uas_scsi_data(int addr, uint16_t tag, uint32_t bytes) "dev %d, tag 0x%x, bytes %d" | |
431 | usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, uint32_t resid) "dev %d, tag 0x%x, status 0x%x, residue %d" | |
432 | usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) "dev %d, tag 0x%x, task-tag 0x%x" | |
433 | usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%x, lun %d" | |
434 | usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x" | |
435 | ||
3ba00637 | 436 | # hw/usb/host-libusb.c |
e6a2f500 GH |
437 | usb_host_open_started(int bus, int addr) "dev %d:%d" |
438 | usb_host_open_success(int bus, int addr) "dev %d:%d" | |
439 | usb_host_open_failure(int bus, int addr) "dev %d:%d" | |
e6a2f500 | 440 | usb_host_close(int bus, int addr) "dev %d:%d" |
2b2325ff GH |
441 | usb_host_attach_kernel(int bus, int addr, int interface) "dev %d:%d, if %d" |
442 | usb_host_detach_kernel(int bus, int addr, int interface) "dev %d:%d, if %d" | |
e6a2f500 GH |
443 | usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d" |
444 | usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d" | |
445 | usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d" | |
2b2325ff | 446 | usb_host_claim_interface(int bus, int addr, int config, int interface) "dev %d:%d, config %d, if %d" |
2b2325ff | 447 | usb_host_release_interface(int bus, int addr, int interface) "dev %d:%d, if %d" |
19b89252 GH |
448 | usb_host_req_control(int bus, int addr, void *p, int req, int value, int index) "dev %d:%d, packet %p, req 0x%x, value %d, index %d" |
449 | usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) "dev %d:%d, packet %p, in %d, ep %d, size %d" | |
8c908fca | 450 | usb_host_req_complete(int bus, int addr, void *p, int status, int length) "dev %d:%d, packet %p, status %d, length %d" |
19b89252 GH |
451 | usb_host_req_emulated(int bus, int addr, void *p, int status) "dev %d:%d, packet %p, status %d" |
452 | usb_host_req_canceled(int bus, int addr, void *p) "dev %d:%d, packet %p" | |
c32da151 GH |
453 | usb_host_iso_start(int bus, int addr, int ep) "dev %d:%d, ep %d" |
454 | usb_host_iso_stop(int bus, int addr, int ep) "dev %d:%d, ep %d" | |
455 | usb_host_iso_out_of_bufs(int bus, int addr, int ep) "dev %d:%d, ep %d" | |
e6a2f500 GH |
456 | usb_host_reset(int bus, int addr) "dev %d:%d" |
457 | usb_host_auto_scan_enabled(void) | |
458 | usb_host_auto_scan_disabled(void) | |
96dd9aac GH |
459 | usb_host_parse_config(int bus, int addr, int value, int active) "dev %d:%d, value %d, active %d" |
460 | usb_host_parse_interface(int bus, int addr, int num, int alt, int active) "dev %d:%d, num %d, alt %d, active %d" | |
461 | usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *type, int active) "dev %d:%d, ep %d, %s, %s, active %d" | |
96dd9aac | 462 | usb_host_parse_error(int bus, int addr, const char *errmsg) "dev %d:%d, msg %s" |
e6a2f500 | 463 | |
3ba00637 | 464 | # hw/scsi/scsi-bus.c |
47f08d7a | 465 | scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d" |
814589c4 | 466 | scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d" |
47f08d7a | 467 | scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" |
e88c591d | 468 | scsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" |
47f08d7a LV |
469 | scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d" |
470 | scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d" | |
6f6710aa | 471 | scsi_req_continue_canceled(int target, int lun, int tag) "target %d lun %d tag %d" |
47f08d7a | 472 | scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d" |
689d7e2f | 473 | scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64 |
47f08d7a LV |
474 | scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d" |
475 | scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x" | |
e48e84ea | 476 | scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) "target %d lun %d key %#02x asc %#02x ascq %#02x" |
47f08d7a LV |
477 | scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d" |
478 | scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x" | |
479 | scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d" | |
480 | scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d" | |
5138efec | 481 | |
94b0b5ff | 482 | # vl.c |
47f08d7a | 483 | vm_state_notify(int running, int reason) "running %d reason %d" |
4524051c | 484 | load_file(const char *name, const char *path) "name %s location %s" |
7e866003 | 485 | runstate_set(int new_state) "new state %d" |
3ba00637 MA |
486 | g_malloc(size_t size, void *ptr) "size %zu ptr %p" |
487 | g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p" | |
488 | g_free(void *ptr) "ptr %p" | |
4fed9421 | 489 | system_wakeup_request(int reason) "reason=%d" |
298800ca | 490 | |
3cce16f4 KW |
491 | # block/qcow2.c |
492 | qcow2_writev_start_req(void *co, int64_t sector, int nb_sectors) "co %p sector %" PRIx64 " nb_sectors %d" | |
493 | qcow2_writev_done_req(void *co, int ret) "co %p ret %d" | |
494 | qcow2_writev_start_part(void *co) "co %p" | |
495 | qcow2_writev_done_part(void *co, int cur_nr_sectors) "co %p cur_nr_sectors %d" | |
496 | qcow2_writev_data(void *co, uint64_t offset) "co %p offset %" PRIx64 | |
497 | ||
3ba00637 | 498 | # block/qcow2-cluster.c |
94783de6 KW |
499 | qcow2_alloc_clusters_offset(void *co, uint64_t offset, int num) "co %p offset %" PRIx64 " num %d" |
500 | qcow2_handle_copied(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offset %" PRIx64 " host_offset %" PRIx64 " bytes %" PRIx64 | |
501 | qcow2_handle_alloc(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offset %" PRIx64 " host_offset %" PRIx64 " bytes %" PRIx64 | |
502 | qcow2_do_alloc_clusters_offset(void *co, uint64_t guest_offset, uint64_t host_offset, int nb_clusters) "co %p guest_offset %" PRIx64 " host_offset %" PRIx64 " nb_clusters %d" | |
3cce16f4 KW |
503 | qcow2_cluster_alloc_phys(void *co) "co %p" |
504 | qcow2_cluster_link_l2(void *co, int nb_clusters) "co %p nb_clusters %d" | |
505 | ||
506 | qcow2_l2_allocate(void *bs, int l1_index) "bs %p l1_index %d" | |
507 | qcow2_l2_allocate_get_empty(void *bs, int l1_index) "bs %p l1_index %d" | |
508 | qcow2_l2_allocate_write_l2(void *bs, int l1_index) "bs %p l1_index %d" | |
509 | qcow2_l2_allocate_write_l1(void *bs, int l1_index) "bs %p l1_index %d" | |
510 | qcow2_l2_allocate_done(void *bs, int l1_index, int ret) "bs %p l1_index %d ret %d" | |
511 | ||
3ba00637 | 512 | # block/qcow2-cache.c |
3cce16f4 KW |
513 | qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) "co %p is_l2_cache %d offset %" PRIx64 " read_from_disk %d" |
514 | qcow2_cache_get_replace_entry(void *co, int c, int i) "co %p is_l2_cache %d index %d" | |
515 | qcow2_cache_get_read(void *co, int c, int i) "co %p is_l2_cache %d index %d" | |
516 | qcow2_cache_get_done(void *co, int c, int i) "co %p is_l2_cache %d index %d" | |
517 | qcow2_cache_flush(void *co, int c) "co %p is_l2_cache %d" | |
518 | qcow2_cache_entry_flush(void *co, int c, int i) "co %p is_l2_cache %d index %d" | |
519 | ||
298800ca | 520 | # block/qed-l2-cache.c |
47f08d7a LV |
521 | qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" |
522 | qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" | |
523 | qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" | |
298800ca SH |
524 | |
525 | # block/qed-table.c | |
47f08d7a LV |
526 | qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" |
527 | qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" | |
528 | qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" | |
529 | qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" | |
eabba580 SH |
530 | |
531 | # block/qed.c | |
47f08d7a LV |
532 | qed_need_check_timer_cb(void *s) "s %p" |
533 | qed_start_need_check_timer(void *s) "s %p" | |
534 | qed_cancel_need_check_timer(void *s) "s %p" | |
535 | qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d" | |
6e4f59bd | 536 | qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int flags) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p flags %#x" |
689d7e2f | 537 | qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64 |
47f08d7a LV |
538 | qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
539 | qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" | |
689d7e2f SH |
540 | qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 |
541 | qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 | |
47f08d7a | 542 | qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
0f3a4a01 | 543 | |
3ba00637 | 544 | # hw/display/g364fb.c |
47f08d7a LV |
545 | g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x" |
546 | g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x" | |
b213b370 | 547 | |
3ba00637 | 548 | # hw/timer/grlib_gptimer.c |
47f08d7a LV |
549 | grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" |
550 | grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" | |
551 | grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" | |
552 | grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x" | |
553 | grlib_gptimer_hit(int id) "timer:%d HIT" | |
554 | grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" | |
555 | grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" | |
3f10bcbb | 556 | |
3ba00637 | 557 | # hw/intc/grlib_irqmp.c |
2f4a725b | 558 | grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x" |
47f08d7a LV |
559 | grlib_irqmp_ack(int intno) "interrupt:%d" |
560 | grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" | |
689d7e2f | 561 | grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 |
47f08d7a | 562 | grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" |
8b1e1320 | 563 | |
3ba00637 | 564 | # hw/char/grlib_apbuart.c |
47f08d7a LV |
565 | grlib_apbuart_event(int event) "event:%d" |
566 | grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" | |
0c685d28 | 567 | grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64"" |
b04d9890 | 568 | |
3ba00637 | 569 | # hw/sparc/leon3.c |
47f08d7a LV |
570 | leon3_set_irq(int intno) "Set CPU IRQ %d" |
571 | leon3_reset_irq(int intno) "Reset CPU IRQ %d" | |
9363ee31 | 572 | |
cbcc6336 | 573 | # spice-qemu-char.c |
47f08d7a LV |
574 | spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d" |
575 | spice_vmc_read(int bytes, int len) "spice read %d of requested %d" | |
576 | spice_vmc_register_interface(void *scd) "spice vmc registered interface %p" | |
577 | spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p" | |
5a49d3e9 | 578 | spice_vmc_event(int event) "spice vmc event %d" |
4ef66fa7 | 579 | |
3ba00637 | 580 | # hw/intc/lm32_pic.c |
47f08d7a LV |
581 | lm32_pic_raise_irq(void) "Raise CPU interrupt" |
582 | lm32_pic_lower_irq(void) "Lower CPU interrupt" | |
583 | lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d" | |
584 | lm32_pic_set_im(uint32_t im) "im 0x%08x" | |
585 | lm32_pic_set_ip(uint32_t ip) "ip 0x%08x" | |
586 | lm32_pic_get_im(uint32_t im) "im 0x%08x" | |
587 | lm32_pic_get_ip(uint32_t ip) "ip 0x%08x" | |
15d7dc4f | 588 | |
3ba00637 | 589 | # hw/char/lm32_juart.c |
47f08d7a LV |
590 | lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x" |
591 | lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x" | |
592 | lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" | |
593 | lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" | |
ea7924dc | 594 | |
3ba00637 | 595 | # hw/timer/lm32_timer.c |
47f08d7a LV |
596 | lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
597 | lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |
598 | lm32_timer_hit(void) "timer hit" | |
599 | lm32_timer_irq_state(int level) "irq state %d" | |
770ae571 | 600 | |
3ba00637 | 601 | # hw/char/lm32_uart.c |
47f08d7a LV |
602 | lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
603 | lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |
604 | lm32_uart_irq_state(int level) "irq state %d" | |
f19410ca | 605 | |
3ba00637 | 606 | # hw/misc/lm32_sys.c |
47f08d7a | 607 | lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
25a8bb96 | 608 | |
3ba00637 | 609 | # hw/scsi/megasas.c |
e8f943c3 HR |
610 | megasas_init_firmware(uint64_t pa) "pa %" PRIx64 " " |
611 | megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at %" PRIx64 " len %d head %" PRIx64 " tail %" PRIx64 " flags %x" | |
612 | megasas_initq_map_failed(int frame) "scmd %d: failed to map queue" | |
613 | megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw cmds %d" | |
614 | megasas_qf_found(unsigned int index, uint64_t pa) "found mapped frame %x pa %" PRIx64 "" | |
615 | megasas_qf_new(unsigned int index, void *cmd) "return new frame %x cmd %p" | |
616 | megasas_qf_failed(unsigned long pa) "all frames busy for frame %lx" | |
617 | megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int tail, int busy) "enqueue frame %x count %d context %" PRIx64 " tail %x busy %d" | |
618 | megasas_qf_update(unsigned int head, unsigned int busy) "update reply queue head %x busy %d" | |
e8f943c3 HR |
619 | megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu" |
620 | megasas_qf_complete_noirq(uint64_t context) "context %" PRIx64 " " | |
621 | megasas_qf_complete(uint64_t context, unsigned int tail, unsigned int offset, int busy, unsigned int doorbell) "context %" PRIx64 " tail %x offset %d busy %d doorbell %x" | |
e8f943c3 HR |
622 | megasas_frame_busy(uint64_t addr) "frame %" PRIx64 " busy" |
623 | megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: Unhandled MFI cmd %x" | |
624 | megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu" | |
625 | megasas_scsi_target_not_present(const char *frame, int bus, int dev, int lun) "%s dev %x/%x/%x target not present" | |
626 | megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun, int len) "%s dev %x/%x/%x invalid cdb len %d" | |
627 | megasas_iov_read_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" | |
628 | megasas_iov_write_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" | |
629 | megasas_iov_read_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" | |
630 | megasas_iov_write_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" | |
631 | megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) "%s dev %x/%x req allocation failed" | |
632 | megasas_scsi_read_start(int cmd, int len) "scmd %d: transfer %d bytes of data" | |
633 | megasas_scsi_write_start(int cmd, int len) "scmd %d: transfer %d bytes of data" | |
634 | megasas_scsi_nodata(int cmd) "scmd %d: no data to be transferred" | |
635 | megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) "scmd %d: finished with status %x, len %u/%u" | |
636 | megasas_command_complete(int cmd, uint32_t status, uint32_t resid) "scmd %d: command completed, status %x, residual %d" | |
637 | megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned long lba, unsigned long count) "scmd %d: %s dev %x/%x lba %lx count %lu" | |
638 | megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun) "scmd %d: %s dev 1/%x/%x LUN not present" | |
639 | megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)" | |
640 | megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)" | |
641 | megasas_io_complete(int cmd, uint32_t len) "scmd %d: %d bytes completed" | |
642 | megasas_io_read(int cmd, int bytes, int len, unsigned long offset) "scmd %d: %d/%d bytes, iov offset %lu" | |
643 | megasas_io_write(int cmd, int bytes, int len, unsigned long offset) "scmd %d: %d/%d bytes, iov offset %lu" | |
e8f943c3 HR |
644 | megasas_iovec_sgl_overflow(int cmd, int index, int limit) "scmd %d: iovec count %d limit %d" |
645 | megasas_iovec_sgl_underflow(int cmd, int index) "scmd %d: iovec count %d" | |
646 | megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) "scmd %d: element %d pa %" PRIx64 " len %u" | |
647 | megasas_iovec_overflow(int cmd, int len, int limit) "scmd %d: len %d limit %d" | |
648 | megasas_iovec_underflow(int cmd, int len, int limit) "scmd %d: len %d limit %d" | |
649 | megasas_handle_dcmd(int cmd, int opcode) "scmd %d: MFI DCMD opcode %x" | |
650 | megasas_finish_dcmd(int cmd, int size) "scmd %d: MFI DCMD wrote %d bytes" | |
651 | megasas_dcmd_req_alloc_failed(int cmd, const char *desc) "scmd %d: %s alloc failed" | |
652 | megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) "scmd %d: %s to dev %d" | |
653 | megasas_dcmd_internal_finish(int cmd, int opcode, int lun) "scmd %d: DCMD finish internal cmd %x lun %d" | |
654 | megasas_dcmd_internal_invalid(int cmd, int opcode) "scmd %d: Invalid internal DCMD %x" | |
655 | megasas_dcmd_unhandled(int cmd, int opcode, int len) "scmd %d: opcode %x, len %d" | |
656 | megasas_dcmd_zero_sge(int cmd) "scmd %d: zero DCMD sge count" | |
657 | megasas_dcmd_invalid_sge(int cmd, int count) "scmd %d: invalid DCMD sge count %d" | |
e8f943c3 HR |
658 | megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) "scmd %d: invalid xfer len %ld, max %ld" |
659 | megasas_dcmd_enter(int cmd, const char *dcmd, int len) "scmd %d: DCMD %s len %d" | |
660 | megasas_dcmd_dummy(int cmd, unsigned long size) "scmd %d: DCMD dummy xfer len %ld" | |
661 | megasas_dcmd_set_fw_time(int cmd, unsigned long time) "scmd %d: Set FW time %lx" | |
662 | megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) "scmd %d: DCMD PD get list: %d / %d PDs, size %d" | |
663 | megasas_dcmd_ld_get_list(int cmd, int num, int max) "scmd %d: DCMD LD get list: found %d / %d LDs" | |
664 | megasas_dcmd_ld_get_info(int cmd, int ld_id) "scmd %d: DCMD LD get info for dev %d" | |
665 | megasas_dcmd_pd_get_info(int cmd, int pd_id) "scmd %d: DCMD PD get info for dev %d" | |
666 | megasas_dcmd_pd_list_query(int cmd, int flags) "scmd %d: DCMD PD list query flags %x" | |
10d6530c | 667 | megasas_dcmd_unsupported(int cmd, unsigned long size) "scmd %d: set properties len %ld" |
e8f943c3 HR |
668 | megasas_abort_frame(int cmd, int abort_cmd) "scmd %d: aborting frame %x" |
669 | megasas_abort_no_cmd(int cmd, uint64_t context) "scmd %d: no active command for frame context %" PRIx64 "" | |
670 | megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) "scmd %d: invalid frame context %" PRIx64 " for abort frame %x" | |
671 | megasas_reset(void) "Reset" | |
672 | megasas_init(int sges, int cmds, const char *intr, const char *mode) "Using %d sges, %d cmds, %s, %s mode" | |
673 | megasas_msix_raise(int vector) "vector %d" | |
674 | megasas_irq_lower(void) "INTx" | |
675 | megasas_irq_raise(void) "INTx" | |
676 | megasas_intr_enabled(void) "Interrupts enabled" | |
677 | megasas_intr_disabled(void) "Interrupts disabled" | |
678 | megasas_mmio_readl(unsigned long addr, uint32_t val) "addr 0x%lx: 0x%x" | |
679 | megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx" | |
680 | megasas_mmio_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x" | |
681 | megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x" | |
682 | ||
3ba00637 | 683 | # hw/audio/milkymist-ac97.c |
47f08d7a LV |
684 | milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
685 | milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
686 | milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" | |
687 | milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply" | |
688 | milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write" | |
689 | milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read" | |
690 | milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u" | |
691 | milkymist_ac97_in_cb_transferred(int transferred) "transferred %d" | |
692 | milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u" | |
693 | milkymist_ac97_out_cb_transferred(int transferred) "transferred %d" | |
e4dc6d2c | 694 | |
3ba00637 | 695 | # hw/misc/milkymist-hpdmc.c |
47f08d7a LV |
696 | milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x" |
697 | milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x" | |
b4e37d98 | 698 | |
3ba00637 | 699 | # hw/sd/milkymist-memcard.c |
47f08d7a LV |
700 | milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
701 | milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
07424544 | 702 | |
3ba00637 | 703 | # hw/net/milkymist-minimac2.c |
47f08d7a LV |
704 | milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
705 | milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
706 | milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" | |
707 | milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" | |
708 | milkymist_minimac2_tx_frame(uint32_t length) "length %u" | |
709 | milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u" | |
710 | milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p" | |
711 | milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d" | |
712 | milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX" | |
713 | milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX" | |
714 | milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX" | |
5ee18b9c | 715 | |
3ba00637 | 716 | # hw/misc/milkymist-pfpu.c |
47f08d7a LV |
717 | milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
718 | milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
719 | milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x" | |
720 | milkymist_pfpu_pulse_irq(void) "Pulse IRQ" | |
87a381ec | 721 | |
3ba00637 | 722 | # hw/input/milkymist-softusb.c |
47f08d7a LV |
723 | milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
724 | milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
725 | milkymist_softusb_mevt(uint8_t m) "m %d" | |
726 | milkymist_softusb_kevt(uint8_t m) "m %d" | |
47f08d7a | 727 | milkymist_softusb_pulse_irq(void) "Pulse IRQ" |
96832424 | 728 | |
3ba00637 | 729 | # hw/timer/milkymist-sysctl.c |
47f08d7a LV |
730 | milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
731 | milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
732 | milkymist_sysctl_icap_write(uint32_t value) "value %08x" | |
733 | milkymist_sysctl_start_timer0(void) "Start timer0" | |
734 | milkymist_sysctl_stop_timer0(void) "Stop timer0" | |
735 | milkymist_sysctl_start_timer1(void) "Start timer1" | |
736 | milkymist_sysctl_stop_timer1(void) "Stop timer1" | |
737 | milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0" | |
738 | milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1" | |
0670dadd | 739 | |
3ba00637 | 740 | # hw/display/milkymist-tmu2.c |
47f08d7a LV |
741 | milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
742 | milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
743 | milkymist_tmu2_start(void) "Start TMU" | |
744 | milkymist_tmu2_pulse_irq(void) "Pulse IRQ" | |
883de16b | 745 | |
3ba00637 | 746 | # hw/char/milkymist-uart.c |
47f08d7a LV |
747 | milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
748 | milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
fcfa3397 MW |
749 | milkymist_uart_raise_irq(void) "Raise IRQ" |
750 | milkymist_uart_lower_irq(void) "Lower IRQ" | |
d23948b1 | 751 | |
3ba00637 | 752 | # hw/display/milkymist-vgafb.c |
47f08d7a LV |
753 | milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
754 | milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
432d268c | 755 | |
3ba00637 | 756 | # hw/net/mipsnet.c |
83818f7c HP |
757 | mipsnet_send(uint32_t size) "sending len=%u" |
758 | mipsnet_receive(uint32_t size) "receiving len=%u" | |
759 | mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x" | |
903ec8ea | 760 | mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 "" |
83818f7c HP |
761 | mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)" |
762 | ||
3ba00637 | 763 | # hw/isa/pc87312.c |
1ae41f44 HP |
764 | pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x" |
765 | pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x" | |
766 | pc87312_info_floppy(uint32_t base) "base 0x%x" | |
767 | pc87312_info_ide(uint32_t base) "base 0x%x" | |
768 | pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u" | |
769 | pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u" | |
770 | ||
881d588a DF |
771 | # hw/scsi/vmw_pvscsi.c |
772 | pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) "TX/RX rings logarithms set to %d/%d" | |
773 | pvscsi_ring_init_msg(uint32_t len_log2) "MSG ring logarithm set to %d" | |
774 | pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) "new production counter of completion ring is 0x%"PRIx64"" | |
775 | pvscsi_ring_flush_msg(uint64_t filled_cmp_ptr) "new production counter of message ring is 0x%"PRIx64"" | |
776 | pvscsi_update_irq_level(bool raise, uint64_t mask, uint64_t status) "interrupt level set to %d (MASK: 0x%"PRIx64", STATUS: 0x%"PRIx64")" | |
777 | pvscsi_update_irq_msi(void) "sending MSI notification" | |
778 | pvscsi_cmp_ring_put(unsigned long addr) "got completion descriptor 0x%lx" | |
779 | pvscsi_msg_ring_put(unsigned long addr) "got message descriptor 0x%lx" | |
780 | pvscsi_complete_request(uint64_t context, uint64_t len, uint8_t sense_key) "completion: ctx: 0x%"PRIx64", len: 0x%"PRIx64", sense key: %u" | |
6e860b5d | 781 | pvscsi_get_sg_list(int nsg, size_t size) "get SG list: depth: %u, size: %zu" |
881d588a DF |
782 | pvscsi_get_next_sg_elem(uint32_t flags) "unknown flags in SG element (val: 0x%x)" |
783 | pvscsi_command_complete_not_found(uint32_t tag) "can't find request for tag 0x%x" | |
784 | pvscsi_command_complete_data_run(void) "not all data required for command transferred" | |
785 | pvscsi_command_complete_sense_len(int len) "sense information length is %d bytes" | |
786 | pvscsi_convert_sglist(uint64_t context, unsigned long addr, uint32_t resid) "element: ctx: 0x%"PRIx64" addr: 0x%lx, len: %ul" | |
787 | pvscsi_process_req_descr(uint8_t cmd, uint64_t ctx) "SCSI cmd 0x%x, ctx: 0x%"PRIx64"" | |
788 | pvscsi_process_req_descr_unknown_device(void) "command directed to unknown device rejected" | |
789 | pvscsi_process_req_descr_invalid_dir(void) "command with invalid transfer direction rejected" | |
790 | pvscsi_process_io(unsigned long addr) "got descriptor 0x%lx" | |
791 | pvscsi_on_cmd_noimpl(const char* cmd) "unimplemented command %s ignored" | |
792 | pvscsi_on_cmd_reset_dev(uint32_t tgt, int lun, void* dev) "PVSCSI_CMD_RESET_DEVICE[target %u lun %d (dev 0x%p)]" | |
793 | pvscsi_on_cmd_arrived(const char* cmd) "command %s arrived" | |
794 | pvscsi_on_cmd_abort(uint64_t ctx, uint32_t tgt) "command PVSCSI_CMD_ABORT_CMD for ctx 0x%"PRIx64", target %u" | |
795 | pvscsi_on_cmd_unknown(uint64_t cmd_id) "unknown command %"PRIx64"" | |
796 | pvscsi_on_cmd_unknown_data(uint32_t data) "data for unknown command 0x:%x" | |
797 | pvscsi_io_write(const char* cmd, uint64_t val) "%s write: %"PRIx64"" | |
798 | pvscsi_io_write_unknown(unsigned long addr, unsigned sz, uint64_t val) "unknown write address: 0x%lx size: %u bytes value: 0x%"PRIx64"" | |
799 | pvscsi_io_read(const char* cmd, uint64_t status) "%s read: 0x%"PRIx64"" | |
800 | pvscsi_io_read_unknown(unsigned long addr, unsigned sz) "unknown read address: 0x%lx size: %u bytes" | |
801 | pvscsi_init_msi_fail(int res) "failed to initialize MSI, error %d" | |
802 | pvscsi_state(const char* state) "starting %s ..." | |
803 | pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) "%s page: %"PRIx64"" | |
804 | pvscsi_tx_rings_num_pages(const char* label, uint32_t num) "Number of %s pages: %u" | |
805 | ||
432d268c | 806 | # xen-all.c |
47f08d7a | 807 | xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx" |
20581d20 | 808 | xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i" |
432d268c JN |
809 | |
810 | # xen-mapcache.c | |
689d7e2f SH |
811 | xen_map_cache(uint64_t phys_addr) "want %#"PRIx64 |
812 | xen_remap_bucket(uint64_t index) "index %#"PRIx64 | |
47f08d7a | 813 | xen_map_cache_return(void* ptr) "%p" |
050a0ddf | 814 | |
3ba00637 | 815 | # hw/xen/xen_platform.c |
47f08d7a | 816 | xen_platform_log(char *s) "xen platform: %s" |
00dccaf1 KW |
817 | |
818 | # qemu-coroutine.c | |
47f08d7a LV |
819 | qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p" |
820 | qemu_coroutine_yield(void *from, void *to) "from %p to %p" | |
821 | qemu_coroutine_terminate(void *co) "self %p" | |
b96e9247 KW |
822 | |
823 | # qemu-coroutine-lock.c | |
02ffb504 | 824 | qemu_co_queue_run_restart(void *co) "co %p" |
bfe24e1a | 825 | qemu_co_queue_next(void *nxt) "next %p" |
47f08d7a LV |
826 | qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p" |
827 | qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p" | |
828 | qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p" | |
829 | qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p" | |
30c2f238 | 830 | |
3ba00637 | 831 | # hw/char/escc.c |
47f08d7a LV |
832 | escc_put_queue(char channel, int b) "channel %c put: 0x%02x" |
833 | escc_get_queue(char channel, int val) "channel %c get 0x%02x" | |
834 | escc_update_irq(int irq) "IRQ = %d" | |
835 | escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d" | |
836 | escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x" | |
837 | escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d" | |
838 | escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x" | |
839 | escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d" | |
840 | escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d" | |
841 | escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x" | |
842 | escc_sunkbd_event_out(int ch) "Translated keycode %2.2x" | |
843 | escc_kbd_command(int val) "Command %d" | |
844 | escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x" | |
bf4b9889 | 845 | |
c589b249 | 846 | # block/iscsi.c |
f4dfa67f | 847 | iscsi_aio_write16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d" |
c589b249 | 848 | iscsi_aio_writev(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p" |
f4dfa67f | 849 | iscsi_aio_read16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d" |
c589b249 RS |
850 | iscsi_aio_readv(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p" |
851 | ||
3ba00637 | 852 | # hw/scsi/esp.c |
3af4e9aa HP |
853 | esp_error_fifo_overrun(void) "FIFO overrun" |
854 | esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)" | |
855 | esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]" | |
bf4b9889 BS |
856 | esp_raise_irq(void) "Raise IRQ" |
857 | esp_lower_irq(void) "Lower IRQ" | |
858 | esp_dma_enable(void) "Raise enable" | |
859 | esp_dma_disable(void) "Lower enable" | |
860 | esp_get_cmd(uint32_t dmalen, int target) "len %d target %d" | |
861 | esp_do_busid_cmd(uint8_t busid) "busid 0x%x" | |
862 | esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d" | |
863 | esp_write_response(uint32_t status) "Transfer status (status=%d)" | |
864 | esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d" | |
865 | esp_command_complete(void) "SCSI Command complete" | |
866 | esp_command_complete_unexpected(void) "SCSI command completed unexpectedly" | |
867 | esp_command_complete_fail(void) "Command failed" | |
868 | esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d" | |
869 | esp_handle_ti(uint32_t minlen) "Transfer Information len %d" | |
870 | esp_handle_ti_cmd(uint32_t cmdlen) "command len %d" | |
871 | esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x" | |
872 | esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x" | |
873 | esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)" | |
874 | esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)" | |
875 | esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)" | |
876 | esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)" | |
877 | esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)" | |
878 | esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)" | |
879 | esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)" | |
880 | esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)" | |
6915bff1 | 881 | esp_mem_writeb_cmd_rstatn(uint32_t val) "Reset ATN (%2.2x)" |
bf4b9889 BS |
882 | esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)" |
883 | esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)" | |
884 | esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)" | |
885 | esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)" | |
6fe84c18 | 886 | esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (%2.2x)" |
3ba00637 MA |
887 | |
888 | # hw/scsi/esp-pci.c | |
fabaaf1d HP |
889 | esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction" |
890 | esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)" | |
891 | esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)" | |
892 | esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]" | |
893 | esp_pci_dma_read(uint32_t saddr, uint32_t reg) "reg[%d]: 0x%8.8x" | |
894 | esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) "reg[%d]: 0x%8.8x -> 0x%8.8x" | |
895 | esp_pci_dma_idle(uint32_t val) "IDLE (%.8x)" | |
896 | esp_pci_dma_blast(uint32_t val) "BLAST (%.8x)" | |
897 | esp_pci_dma_abort(uint32_t val) "ABORT (%.8x)" | |
898 | esp_pci_dma_start(uint32_t val) "START (%.8x)" | |
899 | esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x" | |
900 | esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x" | |
89bd820a SH |
901 | |
902 | # monitor.c | |
903 | handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\"" | |
904 | monitor_protocol_emitter(void *mon) "mon %p" | |
afeecec2 DB |
905 | monitor_protocol_event(uint32_t event, const char *evname, void *data) "event=%d name \"%s\" data %p" |
906 | monitor_protocol_event_handler(uint32_t event, void *data, uint64_t last, uint64_t now) "event=%d data=%p last=%" PRId64 " now=%" PRId64 | |
907 | monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p" | |
908 | monitor_protocol_event_queue(uint32_t event, void *data, uint64_t rate, uint64_t last, uint64_t now) "event=%d data=%p rate=%" PRId64 " last=%" PRId64 " now=%" PRId64 | |
909 | monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64 | |
342407fd | 910 | |
3ba00637 | 911 | # hw/net/opencores_eth.c |
342407fd MF |
912 | open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x" |
913 | open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x" | |
914 | open_eth_update_irq(uint32_t v) "IRQ <- %x" | |
915 | open_eth_receive(unsigned len) "RX: len: %u" | |
916 | open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x" | |
917 | open_eth_receive_reject(void) "RX: rejected" | |
918 | open_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: %08x, len_flags: %08x" | |
919 | open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: %08x, len: %u, tx_len: %u" | |
920 | open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[%02x] -> %08x" | |
921 | open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[%02x] <- %08x" | |
922 | open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[%04x] -> %08x" | |
923 | open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x] <- %08x" | |
1f99b949 | 924 | |
c572f23a | 925 | # hw/9pfs/virtio-9p.c |
7999f7e1 | 926 | v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d" |
c572f23a HPB |
927 | v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" |
928 | v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" | |
c76eaf13 | 929 | v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s" |
c572f23a HPB |
930 | v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64"" |
931 | v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" | |
932 | v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}" | |
933 | v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64"" | |
934 | v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}" | |
935 | v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d" | |
936 | v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p" | |
937 | v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d" | |
938 | v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" | |
939 | v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u" | |
940 | v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" | |
941 | v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d" | |
942 | v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" | |
2f008a8c | 943 | v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u" |
c572f23a | 944 | v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd" |
2f008a8c AK |
945 | v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u" |
946 | v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd" | |
947 | v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d" | |
c572f23a HPB |
948 | v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd" |
949 | v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d" | |
950 | v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" | |
951 | v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u" | |
952 | v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}" | |
953 | v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d" | |
954 | v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s" | |
955 | v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" | |
c76eaf13 | 956 | v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}" |
c572f23a HPB |
957 | v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d" |
958 | v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}" | |
959 | v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64"" | |
960 | v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d" | |
961 | v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64"" | |
962 | v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u" | |
c76eaf13 SW |
963 | v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u" |
964 | v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d" | |
c572f23a HPB |
965 | v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s" |
966 | v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64"" | |
967 | v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d" | |
968 | v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" | |
969 | v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s" | |
ec0ceb17 BS |
970 | |
971 | # target-sparc/mmu_helper.c | |
972 | mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" | |
973 | mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" | |
974 | mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64"" | |
975 | mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64"" | |
976 | mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64"" | |
977 | mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64"" | |
978 | mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64"" | |
979 | mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64"" | |
11e66bca | 980 | |
3ba00637 | 981 | # target-sparc/int64_helper.c |
11e66bca BS |
982 | int_helper_set_softint(uint32_t softint) "new %08x" |
983 | int_helper_clear_softint(uint32_t softint) "new %08x" | |
984 | int_helper_write_softint(uint32_t softint) "new %08x" | |
3ba00637 MA |
985 | |
986 | # target-sparc/int32_helper.c | |
11e66bca BS |
987 | int_helper_icache_freeze(void) "Instruction cache: freeze" |
988 | int_helper_dcache_freeze(void) "Data cache: freeze" | |
870be6ad BS |
989 | |
990 | # target-sparc/win_helper.c | |
991 | win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x" | |
992 | win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x" | |
993 | win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)" | |
994 | win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x" | |
995 | win_helper_done(uint32_t tl) "tl=%d" | |
996 | win_helper_retry(uint32_t tl) "tl=%d" | |
c57c4658 KW |
997 | |
998 | # dma-helpers.c | |
999 | dma_bdrv_io(void *dbs, void *bs, int64_t sector_num, bool to_dev) "dbs=%p bs=%p sector_num=%" PRId64 " to_dev=%d" | |
1000 | dma_aio_cancel(void *dbs) "dbs=%p" | |
1001 | dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p" | |
1002 | dma_bdrv_cb(void *dbs, int ret) "dbs=%p ret=%d" | |
1003 | dma_map_wait(void *dbs) "dbs=%p" | |
cdbc19dd | 1004 | |
3ba00637 | 1005 | # ui/console.c |
437fe106 | 1006 | console_gfx_new(void) "" |
5d28b0e9 SW |
1007 | console_putchar_csi(int esc_param0, int esc_param1, int ch, int nb_esc_params) "escape sequence CSI%d;%d%c, %d parameters" |
1008 | console_putchar_unhandled(int ch) "unhandled escape character '%c'" | |
437fe106 GH |
1009 | console_txt_new(int w, int h) "%dx%d" |
1010 | console_select(int nr) "%d" | |
0f7b2864 | 1011 | console_refresh(int interval) "interval %d ms" |
da229ef3 GH |
1012 | displaysurface_create(void *display_surface, int w, int h) "surface=%p, %dx%d" |
1013 | displaysurface_create_from(void *display_surface, int w, int h, int bpp, int swap) "surface=%p, %dx%d, bpp %d, bswap %d" | |
1014 | displaysurface_free(void *display_surface) "surface=%p" | |
7c20b4a3 GH |
1015 | displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]" |
1016 | displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]" | |
72750018 | 1017 | ppm_save(const char *filename, void *display_surface) "%s surface=%p" |
3ba00637 | 1018 | |
ef0dd982 SW |
1019 | # ui/gtk.c |
1020 | gd_switch(int width, int height) "width=%d, height=%d" | |
1021 | gd_update(int x, int y, int w, int h) "x=%d, y=%d, w=%d, h=%d" | |
1022 | gd_key_event(int gdk_keycode, int qemu_keycode, const char *action) "translated GDK keycode %d to QEMU keycode %d (%s)" | |
1023 | ||
c43ce551 GH |
1024 | # ui/input.c |
1025 | input_event_key_number(int conidx, int number, bool down) "con %d, key number 0x%d, down %d" | |
1026 | input_event_key_qcode(int conidx, const char *qcode, bool down) "con %d, key qcode %s, down %d" | |
1027 | input_event_btn(int conidx, const char *btn, bool down) "con %d, button %s, down %d" | |
1028 | input_event_rel(int conidx, const char *axis, int value) "con %d, axis %s, value %d" | |
1029 | input_event_abs(int conidx, const char *axis, int value) "con %d, axis %s, value 0x%x" | |
1030 | input_event_sync(void) "" | |
a8dfb1c3 | 1031 | input_mouse_mode(int absolute) "absolute %d" |
c43ce551 | 1032 | |
3ba00637 | 1033 | # hw/display/vmware_vga.c |
7a6404cd GH |
1034 | vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x" |
1035 | vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x" | |
1036 | vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x" | |
1037 | vmware_palette_write(uint32_t index, uint32_t value) "index %d, value 0x%x" | |
1038 | vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x" | |
1039 | vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x" | |
eb2f9b02 | 1040 | vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp" |
c480bb7d | 1041 | |
517a13c9 | 1042 | # savevm.c |
464400f6 AK |
1043 | savevm_section_start(const char *id, unsigned int section_id) "%s, section_id %u" |
1044 | savevm_section_end(const char *id, unsigned int section_id) "%s, section_id %u" | |
517a13c9 | 1045 | |
3c12193d JQ |
1046 | # arch_init.c |
1047 | migration_bitmap_sync_start(void) "" | |
1048 | migration_bitmap_sync_end(uint64_t dirty_pages) "dirty_pages %" PRIu64"" | |
7ca1dfad | 1049 | migration_throttle(void) "" |
3c12193d | 1050 | |
3ba00637 | 1051 | # hw/display/qxl.c |
c480bb7d AL |
1052 | disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d" |
1053 | disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u" | |
95b752bc | 1054 | qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=%" PRIx64 " %u,%u" |
c480bb7d AL |
1055 | qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d" |
1056 | qxl_destroy_primary(int qid) "%d" | |
1057 | qxl_enter_vga_mode(int qid) "%d" | |
1058 | qxl_exit_vga_mode(int qid) "%d" | |
1059 | qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=%"PRId64"" | |
1060 | qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) "%d current=%d cookie=%p" | |
1061 | qxl_interface_attach_worker(int qid) "%d" | |
1062 | qxl_interface_get_init_info(int qid) "%d" | |
1063 | qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64 | |
1064 | qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]" | |
1065 | qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) "%d #=%d" | |
1066 | qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d" | |
1067 | qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d" | |
1068 | qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s" | |
a639ab04 | 1069 | qxl_io_log(int qid, const uint8_t *log_buf) "%d %s" |
c480bb7d | 1070 | qxl_io_read_unexpected(int qid) "%d" |
917ae08c | 1071 | qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) "%d 0x%"PRIx64"=%"PRIu64" (%s)" |
18b20385 | 1072 | qxl_io_write(int qid, const char *mode, uint64_t addr, const char *aname, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " (%s) val=%"PRIu64" size=%u async=%d" |
c480bb7d AL |
1073 | qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64 |
1074 | qxl_post_load(int qid, const char *mode) "%d %s" | |
1075 | qxl_pre_load(int qid) "%d" | |
1076 | qxl_pre_save(int qid) "%d" | |
1077 | qxl_reset_surfaces(int qid) "%d" | |
1078 | qxl_ring_command_check(int qid, const char *mode) "%d %s" | |
1079 | qxl_ring_command_get(int qid, const char *mode) "%d %s" | |
1080 | qxl_ring_command_req_notification(int qid) "%d" | |
1081 | qxl_ring_cursor_check(int qid, const char *mode) "%d %s" | |
1082 | qxl_ring_cursor_get(int qid, const char *mode) "%d %s" | |
1083 | qxl_ring_cursor_req_notification(int qid) "%d" | |
1084 | qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) "%d %s s#=%d res#=%d last=%p notify=%s" | |
1085 | qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]" | |
1086 | qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d" | |
1087 | qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]" | |
1088 | qxl_soft_reset(int qid) "%d" | |
c480bb7d AL |
1089 | qxl_spice_destroy_surfaces_complete(int qid) "%d" |
1090 | qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d" | |
1091 | qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d" | |
1092 | qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d" | |
1093 | qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d" | |
917ae08c | 1094 | qxl_spice_monitors_config(int qid) "%d" |
c480bb7d AL |
1095 | qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d" |
1096 | qxl_spice_oom(int qid) "%d" | |
1097 | qxl_spice_reset_cursor(int qid) "%d" | |
1098 | qxl_spice_reset_image_cache(int qid) "%d" | |
1099 | qxl_spice_reset_memslots(int qid) "%d" | |
1100 | qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]" | |
1101 | qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d" | |
1102 | qxl_surfaces_dirty(int qid, int surface, int offset, int size) "%d surface=%d offset=%d size=%d" | |
917ae08c | 1103 | qxl_send_events(int qid, uint32_t events) "%d %d" |
511aefb0 | 1104 | qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d" |
917ae08c | 1105 | qxl_set_guest_bug(int qid) "%d" |
a639ab04 AL |
1106 | qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) "%d %d %p" |
1107 | qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) "%d %X %p" | |
e0ac6097 | 1108 | qxl_client_monitors_config_unsupported_by_device(int qid, int revision) "%d revision=%d" |
a639ab04 AL |
1109 | qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d" |
1110 | qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u" | |
e0ac6097 | 1111 | qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d" |
d53291cf | 1112 | |
3ba00637 MA |
1113 | # ui/spice-display.c |
1114 | qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d" | |
1115 | qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u" | |
1116 | qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d" | |
1117 | qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d" | |
1118 | qemu_spice_wakeup(uint32_t qid) "%d" | |
1119 | qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d" | |
1120 | ||
1121 | # hw/display/qxl-render.c | |
d53291cf AL |
1122 | qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]" |
1123 | qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d" | |
1124 | qxl_render_update_area_done(void *cookie) "%p" | |
a2950fb6 | 1125 | |
3ba00637 | 1126 | # hw/ppc/spapr_pci.c |
0ee2c058 AK |
1127 | spapr_pci_msi(const char *msg, uint32_t n, uint32_t ca) "%s (device#%d, cfg=%x)" |
1128 | spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64 | |
1129 | spapr_pci_rtas_ibm_change_msi(unsigned func, unsigned req) "func %u, requested %u" | |
1130 | spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u" | |
1131 | spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u" | |
a2950fb6 | 1132 | spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u" |
500efa23 | 1133 | |
ddd0bd48 | 1134 | # hw/intc/xics.c |
500efa23 DG |
1135 | xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=%#x" |
1136 | xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR %#"PRIx32"->%#"PRIx32 | |
1137 | xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR %#"PRIx32" new XIRR %#"PRIx32 | |
1138 | xics_icp_irq(int server, int nr, uint8_t priority) "cpu %d trying to deliver irq %#"PRIx32" priority %#x" | |
1139 | xics_icp_raise(uint32_t xirr, uint8_t pending_priority) "raising IRQ new XIRR=%#x new pending priority=%#x" | |
1140 | xics_set_irq_msi(int srcno, int nr) "set_irq_msi: srcno %d [irq %#x]" | |
1141 | xics_masked_pending(void) "set_irq_msi: masked pending" | |
1142 | xics_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d [irq %#x]" | |
1143 | xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) "ics_write_xive: irq %#x [src %d] server %#x prio %#x" | |
1144 | xics_ics_reject(int nr, int srcno) "reject irq %#x [src %d]" | |
1145 | xics_ics_eoi(int nr) "ics_eoi: irq %#x" | |
e7c033c3 | 1146 | |
7e472264 AK |
1147 | # hw/ppc/spapr_iommu.c |
1148 | spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64 | |
a0fcac9c | 1149 | spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64 |
7e472264 AK |
1150 | spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) "liobn=%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" perm=%u mask=%x" |
1151 | spapr_iommu_new_table(uint64_t liobn, void *tcet, void *table, int fd) "liobn=%"PRIx64" tcet=%p table=%p fd=%d" | |
1152 | ||
3ba00637 | 1153 | # util/hbitmap.c |
e7c033c3 PB |
1154 | hbitmap_iter_skip_words(const void *hb, void *hbi, uint64_t pos, unsigned long cur) "hb %p hbi %p pos %"PRId64" cur 0x%lx" |
1155 | hbitmap_reset(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64 | |
1156 | hbitmap_set(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64 | |
7b18aad5 CH |
1157 | |
1158 | # target-s390x/ioinst.c | |
1159 | ioinst(const char *insn) "IOINST: %s" | |
1160 | ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) "IOINST: %s (%x.%x.%04x)" | |
1161 | ioinst_chp_id(const char *insn, int cssid, int chpid) "IOINST: %s (%x.%02x)" | |
1162 | ioinst_chsc_cmd(uint16_t cmd, uint16_t len) "IOINST: chsc command %04x, len %04x" | |
df1fe5bb CH |
1163 | |
1164 | # hw/s390x/css.c | |
1165 | css_enable_facility(const char *facility) "CSS: enable %s" | |
1166 | css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=%x, erc=%x, rsid=%x %s" | |
1167 | css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type %02x)" | |
1168 | css_new_image(uint8_t cssid, const char *default_cssid) "CSS: add css image %02x %s" | |
1169 | css_assign_subch(const char *do_assign, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) "CSS: %s %x.%x.%04x (devno %04x)" | |
1170 | css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, const char *conditional) "CSS: I/O interrupt on sch %x.%x.%04x (intparm %08x, isc %x) %s" | |
7e749462 | 1171 | css_adapter_interrupt(uint8_t isc) "CSS: adapter I/O interrupt (isc %x)" |
a5cf2bb4 CH |
1172 | |
1173 | # hw/s390x/virtio-ccw.c | |
1174 | virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command %x" | |
1175 | virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno %04x (%s)" | |
c09e5bb1 | 1176 | |
3a553fc6 JF |
1177 | # hw/intc/s390_flic.c |
1178 | flic_create_device(int err) "flic: create device failed %d" | |
1179 | flic_no_device_api(int err) "flic: no Device Contral API support %d" | |
1180 | flic_reset_failed(int err) "flic: reset failed %d" | |
1181 | ||
c09e5bb1 KS |
1182 | # migration.c |
1183 | migrate_set_state(int new_state) "new state %d" | |
9c775729 KS |
1184 | |
1185 | # kvm-all.c | |
4fe6e9ec AK |
1186 | kvm_ioctl(int type, void *arg) "type 0x%x, arg %p" |
1187 | kvm_vm_ioctl(int type, void *arg) "type 0x%x, arg %p" | |
1188 | kvm_vcpu_ioctl(int cpu_index, int type, void *arg) "cpu_index %d, type 0x%x, arg %p" | |
b76ac80a | 1189 | kvm_run_exit(int cpu_index, uint32_t reason) "cpu_index %d, reason %d" |
0a6a7cca | 1190 | kvm_device_ioctl(int fd, int type, void *arg) "dev fd %d, type 0x%x, arg %p" |
b36f100e AK |
1191 | kvm_failed_spr_set(int str, const char *msg) "Warning: Unable to set SPR %d to KVM: %s" |
1192 | kvm_failed_spr_get(int str, const char *msg) "Warning: Unable to retrieve SPR %d from KVM: %s" | |
b76ac80a | 1193 | |
55d5d048 PB |
1194 | # memory.c |
1195 | memory_region_ops_read(void *mr, uint64_t addr, uint64_t value, unsigned size) "mr %p addr %#"PRIx64" value %#"PRIx64" size %u" | |
1196 | memory_region_ops_write(void *mr, uint64_t addr, uint64_t value, unsigned size) "mr %p addr %#"PRIx64" value %#"PRIx64" size %u" | |
1197 | ||
fa131d94 PB |
1198 | # qom/object.c |
1199 | object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)" | |
1200 | object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)" | |
8fbab3b6 PD |
1201 | |
1202 | # hw/xen/xen_pvdevice.c | |
1203 | xen_pv_mmio_read(uint64_t addr) "WARNING: read from Xen PV Device MMIO space (address %"PRIx64")" | |
1204 | xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (address %"PRIx64")" | |
3bf4dfdd AK |
1205 | |
1206 | # hw/pci/pci_host.c | |
1207 | pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x" | |
1208 | pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x" |