projects / qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| 94a420b1 SH |
1 | # Trace events for debugging and performance instrumentation |
| 2 | # | |
| 3 | # This file is processed by the tracetool script during the build. | |
| 4 | # | |
| 5 | # To add a new trace event: | |
| 6 | # | |
| 7 | # 1. Choose a name for the trace event. Declare its arguments and format | |
| 8 | # string. | |
| 9 | # | |
| 10 | # 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> | |
| 11 | # trace_multiwrite_cb(). The source file must #include "trace.h". | |
| 12 | # | |
| 13 | # Format of a trace event: | |
| 14 | # | |
| 1e2cf2bc | 15 | # [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" |
| 94a420b1 SH |
16 | # |
| 17 | # Example: qemu_malloc(size_t size) "size %zu" | |
| 18 | # | |
| 1e2cf2bc SH |
19 | # The "disable" keyword will build without the trace event. |
| 20 | # In case of 'simple' trace backend, it will allow the trace event to be | |
| 21 | # compiled, but this would be turned off by default. It can be toggled on via | |
| 22 | # the monitor. | |
| 23 | # | |
| 94a420b1 SH |
24 | # The <name> must be a valid as a C function name. |
| 25 | # | |
| 26 | # Types should be standard C types. Use void * for pointers because the trace | |
| 27 | # system may not have the necessary headers included. | |
| 28 | # | |
| 29 | # The <format-string> should be a sprintf()-compatible format string. | |
| cd245a19 SH |
30 | |
| 31 | # qemu-malloc.c | |
| 32 | disable qemu_malloc(size_t size, void *ptr) "size %zu ptr %p" | |
| 33 | disable qemu_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p" | |
| 34 | disable qemu_free(void *ptr) "ptr %p" | |
| 35 | ||
| 36 | # osdep.c | |
| 37 | disable qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" | |
| dda85211 | 38 | disable qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p" |
| cd245a19 | 39 | disable qemu_vfree(void *ptr) "ptr %p" |
| 6d519a5f | 40 | |
| 64979a4d SH |
41 | # hw/virtio.c |
| 42 | disable virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" | |
| 43 | disable virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" | |
| 44 | disable virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" | |
| 45 | disable virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" | |
| 46 | disable virtio_irq(void *vq) "vq %p" | |
| 47 | disable virtio_notify(void *vdev, void *vq) "vdev %p vq %p" | |
| 48 | ||
| 6d519a5f SH |
49 | # block.c |
| 50 | disable multiwrite_cb(void *mcb, int ret) "mcb %p ret %d" | |
| 51 | disable bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d" | |
| 52 | disable bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p" | |
| 53 | disable bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d" | |
| bbf0a440 SH |
54 | disable bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" |
| 55 | disable bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" | |
| 6d519a5f SH |
56 | |
| 57 | # hw/virtio-blk.c | |
| 58 | disable virtio_blk_req_complete(void *req, int status) "req %p status %d" | |
| 59 | disable virtio_blk_rw_complete(void *req, int ret) "req %p ret %d" | |
| 9a85d394 | 60 | disable virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" |
| 6d519a5f SH |
61 | |
| 62 | # posix-aio-compat.c | |
| 9a85d394 | 63 | disable paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d" |
| bd3c9aa5 PS |
64 | |
| 65 | # ioport.c | |
| 66 | disable cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u" | |
| 67 | disable cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u" | |
| 62dd89de PS |
68 | |
| 69 | # balloon.c | |
| 70 | # Since requests are raised via monitor, not many tracepoints are needed. | |
| 71 | disable balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" | |
| d8023f31 BS |
72 | |
| 73 | # hw/apic.c | |
| 74 | disable apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" | |
| 75 | disable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t polarity, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d polarity %d trigger_mode %d" | |
| 76 | disable cpu_set_apic_base(uint64_t val) "%016"PRIx64"" | |
| 77 | disable cpu_get_apic_base(uint64_t val) "%016"PRIx64"" | |
| 78 | disable apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" | |
| 79 | disable apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" | |
| 80 | # coalescing | |
| 81 | disable apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" | |
| 82 | disable apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" | |
| 83 | disable apic_set_irq(int apic_irq_delivered) "coalescing %d" | |
| 97bf4851 BS |
84 | |
| 85 | # hw/cs4231.c | |
| 86 | disable cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" | |
| 87 | disable cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" | |
| 88 | disable cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" | |
| 89 | disable cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" | |
| 90 | ||
| 91 | # hw/eccmemctl.c | |
| 92 | disable ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" | |
| 93 | disable ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" | |
| 94 | disable ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" | |
| 95 | disable ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" | |
| 96 | disable ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" | |
| 97 | disable ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" | |
| 98 | disable ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" | |
| 99 | disable ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" | |
| 100 | disable ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" | |
| 101 | disable ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" | |
| 102 | disable ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" | |
| 103 | disable ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" | |
| 104 | disable ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" | |
| 105 | disable ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" | |
| 106 | disable ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" | |
| 107 | disable ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" | |
| 108 | disable ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" | |
| 109 | disable ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" | |
| 110 | ||
| 111 | # hw/lance.c | |
| 112 | disable lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" | |
| 113 | disable lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" | |
| 114 | ||
| 115 | # hw/slavio_intctl.c | |
| 116 | disable slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" | |
| 117 | disable slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" | |
| 118 | disable slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" | |
| 119 | disable slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" | |
| 120 | disable slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" | |
| 121 | disable slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" | |
| 122 | disable slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" | |
| 123 | disable slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" | |
| 124 | disable slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" | |
| 125 | disable slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" | |
| 126 | disable slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" | |
| 127 | disable slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" | |
| 128 | ||
| 129 | # hw/slavio_misc.c | |
| 130 | disable slavio_misc_update_irq_raise(void) "Raise IRQ" | |
| 131 | disable slavio_misc_update_irq_lower(void) "Lower IRQ" | |
| 132 | disable slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" | |
| 133 | disable slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" | |
| 134 | disable slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" | |
| 135 | disable slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" | |
| 136 | disable slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" | |
| 137 | disable slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" | |
| 138 | disable slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" | |
| 139 | disable slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" | |
| 140 | disable slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" | |
| 141 | disable slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" | |
| 142 | disable slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" | |
| 143 | disable apc_mem_writeb(uint32_t val) "Write power management %02x" | |
| 144 | disable apc_mem_readb(uint32_t ret) "Read power management %02x" | |
| 145 | disable slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" | |
| 146 | disable slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" | |
| 147 | disable slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" | |
| 148 | disable slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" | |
| 149 | ||
| 150 | # hw/slavio_timer.c | |
| 151 | disable slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" | |
| 152 | disable slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" | |
| 153 | disable slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64"" | |
| 154 | disable slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" | |
| 155 | disable slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" | |
| 156 | disable slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64"" | |
| 157 | disable slavio_timer_mem_writel_counter_invalid(void) "not user timer" | |
| 158 | disable slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" | |
| 159 | disable slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" | |
| 160 | disable slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" | |
| 161 | disable slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" | |
| 162 | disable slavio_timer_mem_writel_mode_invalid(void) "not system timer" | |
| 163 | disable slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64"" | |
| 164 | ||
| 165 | # hw/sparc32_dma.c | |
| 166 | disable ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64"" | |
| 167 | disable ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64"" | |
| 168 | disable sparc32_dma_set_irq_raise(void) "Raise IRQ" | |
| 169 | disable sparc32_dma_set_irq_lower(void) "Lower IRQ" | |
| 170 | disable espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" | |
| 171 | disable espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" | |
| 172 | disable sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" | |
| 173 | disable sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" | |
| 174 | disable sparc32_dma_enable_raise(void) "Raise DMA enable" | |
| 175 | disable sparc32_dma_enable_lower(void) "Lower DMA enable" | |
| 176 | ||
| 177 | # hw/sun4m.c | |
| 178 | disable sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" | |
| 179 | disable sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" | |
| 180 | disable sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" | |
| 181 | disable sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" | |
| 182 | ||
| 183 | # hw/sun4m_iommu.c | |
| 184 | disable sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" | |
| 185 | disable sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" | |
| 186 | disable sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64"" | |
| 187 | disable sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" | |
| 188 | disable sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" | |
| 189 | disable sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" | |
| 190 | disable sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" | |
| 191 | disable sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64"" | |
| 94b0b5ff | 192 | |
| 37fb59d3 GH |
193 | # hw/usb-desc.c |
| 194 | disable usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" | |
| 25620cba | 195 | disable usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" |
| 37fb59d3 | 196 | disable usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" |
| 25620cba | 197 | disable usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" |
| 37fb59d3 | 198 | disable usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d" |
| 41c6abbd | 199 | disable usb_set_addr(int addr) "dev %d" |
| a980a065 | 200 | disable usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" |
| ed5a83dd GH |
201 | disable usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" |
| 202 | disable usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" | |
| 37fb59d3 | 203 | |
| 94b0b5ff SH |
204 | # vl.c |
| 205 | disable vm_state_notify(int running, int reason) "running %d reason %d" | |
| 298800ca SH |
206 | |
| 207 | # block/qed-l2-cache.c | |
| 208 | disable qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" | |
| 209 | disable qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" | |
| 210 | disable qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" | |
| 211 | ||
| 212 | # block/qed-table.c | |
| 213 | disable qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" | |
| 214 | disable qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" | |
| 215 | disable qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" | |
| 216 | disable qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" | |
| eabba580 SH |
217 | |
| 218 | # block/qed.c | |
| 219 | disable qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d" | |
| 220 | disable qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d" | |
| 221 | disable qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64"" | |
| 222 | disable qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" | |
| 223 | disable qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" | |
| 224 | disable qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64"" | |
| 225 | disable qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64"" | |
| 226 | disable qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" | |
| 0f3a4a01 FC |
227 | |
| 228 | # hw/grlib_gptimer.c | |
| 229 | disable grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" | |
| 230 | disable grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" | |
| 231 | disable grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" | |
| 232 | disable grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x" | |
| 233 | disable grlib_gptimer_hit(int id) "timer:%d HIT" | |
| 234 | disable grlib_gptimer_readl(int id, const char *s, uint32_t val) "timer:%d %s 0x%x" | |
| 235 | disable grlib_gptimer_writel(int id, const char *s, uint32_t val) "timer:%d %s 0x%x" | |
| 236 | disable grlib_gptimer_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64"" |